A low thermal stress COS structure and its preparation method
By inlaiding the transition layer in the COS structure of the semiconductor laser and optimizing the welding process, controlling the temperature and rate, the problem of degradation in semiconductor laser performance caused by thermal stress is solved, and its reliability and life are improved.
Patent Information
- Application Number
- CN202110126681.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-01-29
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2041-01-29
AI Technical Summary
During the production process of semiconductor lasers, thermal stress leads to problems such as excessive threshold current, low power, high thermal resistance, and band offset, which affects the service life of the laser and packaging process.
Using a COS structure with low thermal stress, the welding process is optimized to reduce the generation of thermal stress by inlaiding the transition layer on the upper surface of the heat sink and controlling the temperature range, temperature increase and cooling rate and insulation time during the welding process.
It effectively reduces the thermal stress of semiconductor lasers, improves its reliability and life, improves electrical parameter performance, and solves the problems of reduced luminous power and low luminous power caused by thermal stress.
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Abstract
Description
Technical Field
[0001] The invention relates to a COS structure with low thermal stress and a preparation method thereof, and belongs to the field of semiconductor material preparation. Background Art
[0002] Semiconductor lasers offer advantages such as small size, light weight, high electro-optical conversion efficiency, a wide wavelength range, high reliability, and long life. Their applications span the entire optoelectronics field and have become a core technology in today's optoelectronics science. Semiconductor lasers are among the most promising areas in the optoelectronics industry, finding widespread application in laser ranging, lidar, laser communications, laser guidance and tracking, and have established a vast market.
[0003] Thermal stress is generated during the manufacturing process of semiconductor lasers, which can cause excessive threshold current, low power, high thermal resistance, and band shift of the semiconductor laser. In severe cases, it affects the service life of the laser. For the laser packaging process, how to reduce the thermal stress generated during the process has become an urgent issue.
[0004] Currently, there are two main factors that affect the generation of thermal stress in semiconductor lasers. The first is the sintering process of the semiconductor laser welding layer. Due to the different thermal expansion coefficients of different materials, improper control of the heating and cooling rates during the welding process will generate varying degrees of thermal stress. The second is the COS structure. Due to uncertain factors such as the uneven surface of the heat sink, the intrusion of impurities, surface oxidation, and the formation of intermetallic compounds in the welding layer during the improper sintering process of the welding layer, voids may form in the solder layer. The voids in the solder layer have a significant impact on the heat dissipation of the device. The heat dissipation effect of the light-emitting unit located above the void will be significantly reduced, causing the junction temperature to rise sharply, forming a local high-temperature zone, reducing the laser's luminous power, and dissipating energy as heat energy. Thermal stress is generated accordingly, which in turn manifests itself in the form of thermal resistance, unstable waveform, excessive threshold current, and low optical power.
[0005] Improving the structure of semiconductor lasers and optimizing them during alloy welding can effectively reduce the thermal stress generated between different device structures. Optimizing the packaging process of semiconductor lasers is a direction to improve the service life and various electrical parameter performance of semiconductor lasers. Summary of the Invention
[0006] In view of the deficiencies in the prior art, the present invention provides a COS structure with low thermal stress and a preparation method thereof.
[0007] Terminology Notes:
[0008] COS (Chip on Submount): A pre-packaged semiconductor laser that includes a laser chip and a heat sink, where the laser chip is fixed to the heat sink via solder.
[0009] N side: The semiconductor laser die needs to be connected to the negative side of the detection power supply;
[0010] P side: The semiconductor laser die needs to be connected to the positive side of the detection power supply;
[0011] The technical solutions of the present invention are as follows:
[0012] A low thermal stress COS structure includes a heat sink, a transition layer formed on the upper surface of the heat sink, and a semiconductor laser die soldered to the transition layer via a solder layer. The semiconductor laser die has an N-face on the upper side and a P-face on the lower side, a front end serving as an anti-reflection surface, and a rear end serving as a high-reflection surface, with the high-reflection surface protruding out of the heat sink.
[0013] According to a preferred embodiment of the present invention, the heat sink is made of copper alloy, has a thickness of 250 to 350 μm, a length of 950 to 1050 μm, and a width of 450 to 550 μm.
[0014] According to the preferred embodiment of the present invention, the transition layer is made of gold and has a thickness of 2 to 2.5 μm.
[0015] Preferably, according to the present invention, the material of the solder layer is indium alloy with a thickness of 4-5 μm; the indium alloy is in the form of solid metal indium particles, and the purity of the material composition is 99%.
[0016] Preferably, according to the present invention, the material of the semiconductor laser tube core is gallium arsenide, the tube core cavity length is 550-650 μm, the width is 350-450 μm, and the thickness is 80-120 μm.
[0017] Preferably, according to the present invention, the semiconductor laser die is attached to the center of the heat sink, with a left-right offset within a range of 30±10 μm, and the high-reflection surface protrudes outward by a distance of 5 to 15 μm.
[0018] A method for preparing the COS structure with low thermal stress comprises the following steps:
[0019] (1) Pre-treating the heat sink, transition layer material, and welding layer material respectively, then polishing and grinding the upper surface of the heat sink, and inlaying the transition layer material to obtain a heat sink with a transition layer;
[0020] (2) The welding layer material is placed on the transition layer, and the semiconductor laser tube core is placed on the welding layer material. Then, the temperature is preheated to 110-130°C in an inert gas environment to make the welding layer material in a molten state and kept warm for 80-120s; then the temperature is quickly raised to 200-210°C, and heated in this temperature range for 120-180s to perform reflow soldering of the semiconductor laser tube core and the heat sink; after the soldering is completed, the temperature is quickly lowered to 110-130°C, and kept warm in this temperature range for 60-120s, and finally the temperature is slowly lowered to 60-70°C to obtain a COS structure with low thermal stress.
[0021] Preferably, according to the present invention, the pretreatment in step (1) is performed as follows: the heat sink, transition layer material and welding layer material are washed with deionized water for 20 to 30 minutes, and then ultrasonically treated for 20 to 30 minutes.
[0022] According to a preferred embodiment of the present invention, the embedding in step (1) is performed as follows: the transition layer material is melted and then prepared on the heat sink by CVD vapor deposition method.
[0023] According to the preferred embodiment of the present invention, the preheating rate in step (2) is 1.0-1.5°C / s and the preheating is performed in a formic acid environment to ensure that the indium solder can be reduced after the oxidation reaction occurs at high temperature.
[0024] According to the preferred embodiment of the present invention, the rapid heating rate in step (2) is 1.5-2°C / s.
[0025] According to the preferred embodiment of the present invention, the reflow soldering process in step (2) is carried out in a nitrogen environment to ensure the stability of the solder at excessively high temperatures.
[0026] According to the preferred embodiment of the present invention, the rapid cooling rate in step (2) is 1.5-2°C / s.
[0027] According to the preferred embodiment of the present invention, the cooling rate of the slow cooling in step (2) is 0.5-1°C / s.
[0028] The technical features of the present invention are as follows:
[0029] The preparation method provided by the present invention is carried out in a vacuum reflow soldering device and is divided into five stages: a preheating stage, a preheating stage, a rapid heating stage, a reflow soldering stage, and a cooling stage.
[0030] During the preheating stage, the temperature reaches 110-130°C. On the one hand, it can maintain the molten state, and on the other hand, it can reduce the temperature difference in the rapid heating zone and reduce the thermal attraction generated when the temperature changes rapidly. The heating rate needs to be kept slow; heating is carried out at a slower heating rate of 1.0-1.5°C / s. Firstly, it is to avoid the COS structure heating up too fast, causing the junction temperature of the light-emitting area of the tube core to rise, thereby increasing the thermal stress generated between the devices. Secondly, too fast a heating rate causes the molten solder to splash, causing the tube core to be contaminated and the luminous efficiency to be reduced.
[0031] During the preheating stage, the solder layer material is kept in a molten state and the temperature is maintained for 80 to 120 seconds. Too long a holding time will cause excessive thermal stress, while too short a holding time will result in poor wetting effect of the solder.
[0032] During the rapid heating stage, the heating rate is 1.5-2℃ / s and the heating temperature needs to reach 200-210℃. This is to make the solder change from molten state to liquid state quickly and prevent the loss of liquid solder from causing welding voids, which will reduce the welding firmness of the tube core and heat sink.
[0033] During the reflow soldering stage, the temperature must be maintained at 200-210°C for 120-180 seconds. If the temperature of the soldering area is too high, the heating time will be extended accordingly, and the thermal stress generated will also increase. If the temperature is too low, the soldering effect will not be ideal. The heating time should be maintained for 2-3 minutes. If the heating time is too long, the solder will be lost, resulting in reduced soldering strength. If the heating time is too short, the solder will not fully react, which will also result in insufficient soldering strength.
[0034] During the cooling stage, the cooling rate is 1.5-2℃ / s, which is basically consistent with the rate in the rapid heating zone. In this way, the stress generated by the secondary thermal expansion of the device during cooling can be minimized. First, the temperature is lowered to 110-130℃ to make the solder molten and maintained for 1-2 minutes to minimize the residual thermal stress; finally, the temperature is slowly lowered to 60-70℃ at 0.5-1.0℃ / s. At this stage, the solder slowly cools down from the molten state to the solid state, reducing the thermal stress again and avoiding the increase of thermal stress between the die and the heat sink due to excessively rapid cooling, which may cause damage to the die in severe cases.
[0035] The beneficial effects of the present invention are:
[0036] 1. The low thermal stress COS structure provided by the present invention overcomes the solder layer voids caused by the uneven surface of the heat sink, the intrusion of impurities, and surface oxidation by embedding a transition layer on the upper surface of the heat sink and adjusting the placement of the tube core to the heat sink. This makes the semiconductor laser highly reliable, has a long life, has low thermal stress, and can operate in complex environments.
[0037] 2. The preparation method provided by the present invention is simple to operate and optimizes the existing welding process. By controlling the temperature range, heating and cooling rates, and holding time, staged cooling is adopted in the cooling stage. The thermal stress caused by improper heating and cooling rates during welding due to different thermal expansion coefficients of different materials is overcome, and holes formed by intermetallic compounds in the welding layer due to improper sintering process are avoided. The thermal stress of the COS structure is minimized, and the problem of reduced laser luminous power and low light output power caused by thermal stress is solved, which effectively improves the service life and various electrical parameter performances of the semiconductor laser. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] Figure 1 Schematic diagram of the COS structure with low thermal stress of the present invention;
[0039] Figure 2 Schematic diagram of the position of the semiconductor laser die on the heat sink;
[0040] Figure 3 Flowchart of the method for preparing a COS structure with low thermal stress according to the present invention.
[0041] Among them, 1. heat sink, 2. transition layer, 3. solder layer, 4. semiconductor laser die, 5. anti-reflection surface, 6. high reflection surface, 7. N surface, 8. P surface. DETAILED DESCRIPTION
[0042] The present invention will be further described below with reference to the embodiments and drawings, but is not limited thereto.
[0043] Example 1
[0044] like Figures 1-2 As shown, a low thermal stress COS structure includes a heat sink 1, a transition layer 2 formed on the upper surface of the heat sink, and a semiconductor laser die 4 soldered to the transition layer 2 through a solder layer 3. The N surface 7 of the semiconductor laser die 4 is on the top, the P surface 8 is on the bottom, the front end is an anti-reflection surface 5, and the rear end is a high-reflection surface 6. The semiconductor laser die 4 is attached to the center position of the heat sink 1, and the high-reflection surface 6 protrudes out of the heat sink 1 at a protrusion distance of 10μm.
[0045] The heat sink 1 is made of copper alloy, with a thickness of 300 μm, a length of 1000 μm, and a width of 500 μm. The transition layer 2 is made of gold, with a thickness of 2 μm. The solder layer 3 is made of indium alloy with a purity of 99% and a thickness of 4 μm. The semiconductor laser die 4 is made of gallium arsenide, with a cavity length of 600 μm, a width of 400 μm, and a thickness of 100 μm.
[0046] Example 2
[0047] like Figure 3As shown, a method for preparing a COS structure with low thermal stress as described in Example 1 includes the following steps:
[0048] (1) The heat sink, transition layer material, and welding layer material were cleaned with deionized water for 20 minutes, and then ultrasonically treated for 20 minutes. The upper surface of the heat sink was then polished. After the transition layer material was melted, it was prepared on the heat sink by CVD vapor deposition to obtain a heat sink with a transition layer.
[0049] (2) The welding layer material is placed on the transition layer, the semiconductor laser tube core is placed on the welding layer material, and placed in a vacuum reflow soldering equipment; then the vacuum reflow soldering equipment is evacuated, and the extraction ratio is five-sixths of the atmospheric pressure value, and nitrogen is added in the vacuum environment to create an inert gas environment in the reflow soldering equipment; preheating is carried out at a rate of 1.0℃ / s to 130℃, so that the welding layer material is in a molten state. During the preheating period, formic acid is filled into the vacuum reflow soldering equipment with a filling volume of 1L and kept warm for 100s; then the temperature is quickly raised to 200℃ at a rate of 1.5℃ / s, heated for 150s, and the semiconductor laser tube core and the heat sink are soldered. The reflow soldering process is carried out in a nitrogen environment; after the welding is completed, the temperature is quickly lowered to 130℃ at a rate of 1.0℃ / s, kept warm for 100s, and finally slowly lowered to 70℃ at 0.5℃ / s to obtain a COS structure with low thermal stress.
[0050] The preparation method provided by the present invention is carried out in a vacuum reflow soldering device and is divided into five stages: a preheating stage, a preheating stage, a rapid heating stage, a reflow soldering stage, and a cooling stage.
[0051] During the preheating stage, the temperature reaches 130°C. On the one hand, it can maintain the molten state, and on the other hand, it can reduce the temperature difference in the rapid heating zone and reduce the thermal attraction generated when the temperature changes rapidly. The heating rate needs to be kept slow; at the same time, a slower heating rate of 1.0°C / s is maintained. First, it is to avoid the COS structure heating up too fast, causing the junction temperature of the light-emitting area of the tube core to rise, thereby increasing the thermal stress generated between the devices. Second, the heating rate is too fast, causing the molten solder to splash, causing the tube core to be contaminated and the luminous efficiency to be reduced.
[0052] The temperature in the preheating stage needs to be kept constant at 130°C. Too long a heating time will cause excessive thermal stress, while too short a heating time will result in poor solder wetting. Considering the size of the chip, the time is selected as 100s.
[0053] During the rapid heating phase, a relatively fast heating rate of 1.5°C / s is required to quickly convert the molten solder to a liquid state and prevent the loss of liquid solder, which could cause solder voids and weaken the solder joint between the die and the heat sink. Nitrogen gas is added at this stage, with a volume of 1 liter, to ensure solder stability during the high-temperature process.
[0054] During the reflow soldering phase, the selected temperature should be between 30 and 40°C above the solder melting point. If the selected temperature is too high, the corresponding heating time in the curve will be prolonged, resulting in a linear increase in thermal stress. The selected reflow temperature is 200°C. The selected reflow time affects the fluidity of the solder. If the time is too long, the solder will lose and reduce the solder joint strength. If the time is too short, the solder will not fully react, which can also result in insufficient solder joint strength. Based on the size of the chip, the selected reflow zone time is 150 seconds. Nitrogen gas is required during this phase, with a filling volume of 1 liter to ensure solder stability at excessive temperatures.
[0055] During the cooling stage, the cooling rate is controlled at a slower rate, which is basically consistent with the rate in the rapid heating zone. In this way, the stress generated by the secondary thermal expansion of the device during cooling can be minimized. The rate is 1.5s / ℃. During cooling, if it drops directly to the solder solid temperature of 70℃, the thermal stress between the die and the heat sink will increase, and in severe cases, the die will be damaged. Therefore, it is necessary to first drop to 130℃ and then maintain a constant temperature for a period of time. The solder slowly drops from the molten state to the solid state at a rate of 0.5℃ / s to minimize thermal stress.
[0056] The welding quality of the low thermal stress COS structure after welding in this embodiment was tested, and the welding firmness was tested. The thrust meter test result was 2.5g.
[0057] Example 3
[0058] A method for preparing the low thermal stress COS structure described in Example 1 comprises the following steps:
[0059] (1) The heat sink, transition layer material, and welding layer material were cleaned with deionized water for 20 minutes, and then ultrasonically treated for 20 minutes. The upper surface of the heat sink was then polished. After the transition layer material was melted, it was prepared on the heat sink by CVD vapor deposition to obtain a heat sink with a transition layer.
[0060] (2) The welding layer material is placed on the transition layer, the semiconductor laser tube core is placed on the welding layer material, and placed in a vacuum reflow soldering equipment; then the vacuum reflow soldering equipment is evacuated, and the extraction ratio is five-sixths of the atmospheric pressure value, and nitrogen is added in a vacuum environment to create an inert gas environment in the reflow soldering equipment; preheating is carried out at a rate of 1.0℃ / s to 110℃, so that the welding layer material is in a molten state. During the preheating period, formic acid is filled into the reflow soldering equipment with a filling volume of 1L and kept warm for 100s; then the temperature is quickly raised to 210℃ at a rate of 1.5℃ / s, heated for 150s, and the semiconductor laser tube core and the heat sink are soldered. The reflow soldering process is carried out in a nitrogen environment; after the welding is completed, the temperature is quickly lowered to 120℃ at a rate of 1.5℃ / s, kept warm for 100s, and finally slowly lowered to 70℃ at a rate of 0.5℃ / s to obtain a COS structure with low thermal stress.
[0061] The welding quality of the low thermal stress COS structure after welding in this embodiment was inspected, and the welding firmness was tested. The thrust meter test result was 2.2g.
[0062] Example 4
[0063] A method for preparing the low thermal stress COS structure described in Example 1 comprises the following steps:
[0064] (1) The heat sink, transition layer material, and welding layer material were cleaned with deionized water for 20 minutes, and then ultrasonically treated for 20 minutes. The upper surface of the heat sink was then polished. After the transition layer material was melted, it was prepared on the heat sink by CVD vapor deposition to obtain a heat sink with a transition layer.
[0065] (2) The welding layer material is placed on the transition layer, the semiconductor laser tube core is placed on the welding layer material, and placed in a vacuum reflow soldering equipment; then the vacuum reflow soldering equipment is evacuated, and the extraction ratio is five-sixths of the atmospheric pressure value, and nitrogen is added in a vacuum environment to create an inert gas environment in the reflow soldering equipment; preheating is carried out at a rate of 1.5℃ / s to 120℃, so that the welding layer material is in a molten state. During the preheating period, formic acid is filled into the vacuum reflow soldering equipment with a filling volume of 1L and kept warm for 100s; then the temperature is quickly raised to 200℃ at a rate of 2℃ / s, heated for 180s, and the semiconductor laser tube core and the heat sink are soldered. The reflow soldering process is carried out in a nitrogen environment; after the welding is completed, the temperature is quickly lowered to 130℃ at a rate of 2℃ / s, kept warm for 100s, and finally slowly lowered to 70℃ at a rate of 1.0℃ / s to obtain a COS structure with low thermal stress.
[0066] The welding quality of the low thermal stress COS structure after welding in this embodiment was inspected, and the welding firmness was tested. The thrust meter test result was 2.1g.
[0067] Comparative Example 1
[0068] A COS structure was prepared. The structure was similar to that described in Example 1, except that the transition layer was not included. Instead, the heat sink was directly connected to the semiconductor laser die via a solder layer. 100 pellets of each of the COS structures from Example 1 and Comparative Example 1 were selected. The heat sinks were either constructed with a gold transition layer added to the soldering surface or without a transition layer. The preparation method from Example 2 was used for soldering.
[0069] The poor thermal resistance ratio of the COS structure described in Example 1 is 2%, and the poor thermal resistance ratio of the COS structure of the heat sink in Comparative Example 1 without adding a transition layer is 8%. The data show that the COS structure provided by the present invention can reduce the thermal stress generated by sintering.
[0070] Method and standard for measuring thermal resistance: Select the 808nm band COS and test the wavelength value twice before and after using a fiber optic spectrometer. A wavelength offset greater than 1.5nm is defined as poor thermal resistance.
[0071] Thermal resistance defect ratio = number of COS structures with defective thermal resistance / total number of COS structures with tested thermal resistance.
[0072] Comparative Example 2
[0073] A COS structure was prepared. The structure was as described in Example 1, except that the laser chip was placed on the heat sink. The laser chip was placed in a positive structure with the anti-reflective surface protruding 10 μm from the heat sink in the front and the high reflective surface placed at the rear end. 100 particles of each of the two COS structures of Example 1 and Comparative Example 1 were selected and welded using the preparation method of Example 2.
[0074] The COS piercing test thermal resistance failure rate described in Example 1 is 1.5%, the chip placement adopts the COS structure thermal resistance rate of 24%, and there are 12% COS piercing test failures. The poor heat dissipation capacity leads to the burning of the tube core. The data show that the COS structure implemented according to the present invention can reduce the thermal stress generated by sintering.
[0075] Comparative Example 3
[0076] A method for preparing a COS structure with low thermal stress, comprising the steps as described in the embodiment, except that the heating rate of the rapid heating is 3°C / s.
[0077] After welding, the low thermal stress COS structure of this comparative example was tested for welding firmness, and the thrust meter test result was 1.5g.
[0078] Comparative Example 4
[0079] A method for preparing a COS structure with low thermal stress comprises the following steps:
[0080] (1) The heat sink, transition layer material, and welding layer material were washed with deionized water for 20 minutes, and then ultrasonically treated for 20 minutes. The upper surface of the heat sink was then polished. The transition layer material was melted at a high temperature and then deposited on the heat sink using a CVD vapor deposition method to obtain a heat sink with a transition layer.
[0081] (2) The welding layer material is placed on the transition layer, the semiconductor laser tube core is placed on the welding layer, and placed in a vacuum reflow soldering equipment; then the vacuum reflow soldering equipment is evacuated, and the extraction ratio is five-sixths of the atmospheric pressure value, and nitrogen is added in a vacuum environment to create an inert gas environment in the reflow soldering equipment; preheating is carried out at a rate of 2℃ / s to 120℃, so that the welding layer material is in a molten state. During the preheating period, formic acid is filled into the reflow soldering equipment with a filling volume of 1L and kept warm for 100s; then the temperature is quickly raised to 200℃ at a rate of 3℃ / s, kept warm for 150s, and the semiconductor laser tube core and the heat sink are soldered. The reflow soldering process is carried out in a nitrogen environment; after the welding is completed, the temperature is quickly lowered to 130℃ at a rate of 3℃ / s, kept warm for 100s, and finally slowly lowered to 70℃ at a rate of 1.5℃ / s to obtain a COS structure with low thermal stress.
[0082] After the COS structure in this comparative example was welded, the welding firmness was tested. The thrust meter test result was 1.2g, which was a low thrust value. This indicates that heating too quickly will lead to reduced welding firmness and pose a risk.
[0083] 100 COS structures prepared in Comparative Example 4 were selected for performance testing, and the poor thermal resistance ratio was 32%.
[0084] Although the subject matter of the present invention has been described above in conjunction with specific preferred embodiments and specific embodiments, the aforementioned drawings and their description are only used to describe typical embodiments of the subject matter of the present invention and therefore should not be considered as limiting the scope of the subject matter of the present invention. Obviously, many alternatives and modifications will be apparent to those skilled in the art.
[0085] As reflected in the claims below, aspects of the present invention may have fewer than all of the features of a single embodiment disclosed above. Therefore, the claims expressed below are hereby expressly incorporated into the detailed description, with each claim standing on its own as a separate embodiment of the present invention. Furthermore, while some embodiments described herein include features included in other embodiments without including those features, those skilled in the art will understand that combinations of features from different embodiments are intended to fall within the scope of the present invention and are intended to form distinct embodiments.
Claims
1. A low thermal stress COS structure, characterized in that: The heat sink comprises a transition layer formed on the upper surface of the heat sink, and a semiconductor laser die soldered to the transition layer via a solder layer, wherein the semiconductor laser die has an N surface on the upper side and a P surface on the lower side, a front end being an anti-reflection surface, and a rear end being a high-reflection surface, with the high-reflection surface protruding out of the heat sink; The heat sink is made of copper alloy with a thickness of 250 to 350 μm, a length of 950 to 1050 μm, and a width of 450 to 550 μm; the transition layer is made of gold with a thickness of 2 to 2.5 μm. The solder layer is made of indium alloy with a thickness of 4 to 5 μm. The indium alloy is in the form of solid metal indium particles with a purity of 99%. The semiconductor laser die is made of gallium arsenide with a cavity length of 550 to 650 μm, a width of 350 to 450 μm, and a thickness of 80 to 120 μm. The semiconductor laser tube core is attached to the center of the heat sink, with a left-right offset within a range of 30±10 μm, and a high-reflection surface protruding outwards by a distance of 5 to 15 μm.
2. The method for preparing the low thermal stress COS structure according to claim 1, comprising the following steps: (1) Pre-treating the heat sink, transition layer material, and welding layer material respectively, then polishing and grinding the upper surface of the heat sink, and inlaying the transition layer material to obtain a heat sink with a transition layer; (2) The welding layer material is placed on the transition layer, and the semiconductor laser tube core is placed on the welding layer material. Then, the temperature is preheated to 110-130°C in an inert gas environment to make the welding layer material in a molten state and kept warm for 80-120s; then the temperature is quickly raised to 200-210°C, and heated in this temperature range for 120-180s to perform reflow soldering of the semiconductor laser tube core and the heat sink; after the soldering is completed, the temperature is quickly lowered to 110-130°C, and kept warm in this temperature range for 60-120s, and finally the temperature is slowly lowered to 60-70°C to obtain a COS structure with low thermal stress.
3. The method for preparing a COS structure with low thermal stress according to claim 2, wherein: The pretreatment described in step (1) is carried out as follows: the heat sink, transition layer material and welding layer material are washed with deionized water for 20 to 30 minutes, and then ultrasonically treated for 20 to 30 minutes.
4. The method for preparing a COS structure with low thermal stress according to claim 2, wherein: The embedding described in step (1) is carried out as follows: after melting the transition layer material, the transition layer is prepared on the heat sink by using the CVD vapor deposition method.
5. The method for preparing a COS structure with low thermal stress according to claim 2, wherein: The heating rate of the preheating in step (2) is 1.0-1.5°C / s, and the preheating is carried out in a formic acid environment.
6. The method for preparing a COS structure with low thermal stress according to claim 2, wherein: The rapid heating rate in step (2) is 1.5-2°C / s; the reflow soldering process is carried out in a nitrogen environment.
7. The method for preparing a COS structure with low thermal stress according to claim 2, wherein: The cooling rate of the rapid cooling in step (2) is 1.5 to 2°C / s; the cooling rate of the slow cooling is 0.5 to 1°C / s.
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