A broadband high-precision vector synthesis phase shifter structure

Abstract

The present invention discloses a broadband high-precision vector synthesis phase shifter structure, comprising an orthogonal signal generator, a first control module, a second control module, and an output network. The orthogonal signal generator is composed of an improved orthogonal all-pass network; the first control module and the second control module are composed of transistor arrays that respectively control the amplitude and polarity of in-phase and orthogonal signals, and the first control module and the second control module are respectively connected to the orthogonal signal generator; the output network is respectively connected to the first control module and the second control module.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic circuit design and semiconductor element design, and particularly relates to a broadband high-precision vector synthesis type phase shifter structure. Background Art

[0002] Phase shifters are key components of phased array systems. The antenna of a phased array system is usually composed of multiple antenna units. By changing the phase and amplitude of the signal fed into each antenna unit, the aperture illumination function of the antenna array is changed to achieve rapid scanning of the antenna beam. The phased array system adopts an electronic scanning method to overcome the shortcomings of slow response and poor anti-interference ability of mechanical scanning, and is widely used in military and automotive radars. At present, the domestic microwave on-chip integrated phase shifters and microwave on-chip phased array TR components are relatively weak, and the design and research of high-performance on-chip integrated phase shifters is very much needed.

[0003] The current mainstream phase shifter design schemes can be divided into active phase shifters and passive phase shifters based on the implementation method. Passive phase shifters usually include reflective phase shifters, loaded line phase shifters, switch line phase shifters, and switch high- and low-pass network phase shifters. These types of phase shifters often have the disadvantages of narrow frequency band, large loss or large phase error within the band, and are not suitable for large-scale integration and industrial production. Active phase shifters usually refer to vector synthesis phase shifters, which are composed of orthogonal signal generation networks, variable gain amplifiers, polarity selection structures, and orthogonal signal synthesizers. They have the advantages of low loss and compact structure, and are suitable for production using IC processes.

[0004] The performance of active vector synthesis phase shifters is mainly limited by the accuracy of the orthogonal signal generation network, the gain control range and gain control accuracy of the variable gain amplifier. How to achieve a wide-band, high-precision orthogonal signal generation network and a variable gain amplifier is the primary problem that needs to be solved in the design of vector synthesis phase shifters. The high stability required by industrial production is also an issue that needs to be considered in the design of vector synthesis phase shifters. Summary of the invention

[0005] In view of the above-mentioned problems, the purpose of the present invention is to provide a broadband high-precision vector synthesis phase shifter structure suitable for BiCM°S process, which can work within one octave and can achieve a phase shift range of 0 to 360°. The structure has the characteristics of wide operating frequency band, large gain control range, high gain control accuracy and high stability. It is very suitable for solving the current technical problems of active phase shifters and is suitable for industrial production.

[0006] The technical solution of the present invention is: a broadband high-precision vector synthesis phase shifter structure, comprising:

[0007] An orthogonal signal generator, the input of which is a differential signal, and the output is two differential signals of the same phase and orthogonal phase, and the amplitudes of the two differential signals are equal;

[0008] A first control module and a second control module, wherein the first control module and the second control module are respectively connected to the output end of the orthogonal signal generator, and are respectively composed of transistor arrays for controlling the amplitude and polarity of the in-phase and orthogonal differential signals, respectively changing the amplitude of the two differential signals and independently controlling the two differential signals to achieve 180° phase polarity reversal;

[0009] The output network is connected to the output ends of the first control module and the second control module respectively.

[0010] Further, the orthogonal signal generator includes a first capacitor, a first resistor, a second resistor, a first inductor, a third resistor, a second capacitor, a fourth resistor, a fifth resistor, a second inductor, and a sixth resistor. The first capacitor and the first resistor are connected in series in sequence, the first inductor and the third resistor are connected in series in sequence, the second inductor and the sixth resistor are connected in series in sequence, the second capacitor and the fourth resistor are connected in series in sequence, the lower end of the first capacitor is connected to the left end of the first inductor, and are jointly connected to the input signal Input+, the lower end of the second capacitor is connected to the right end of the second inductor, and are jointly connected to the input signal Input-, the second resistor is bridged between the upper end of the first resistor and the upper end of the sixth resistor, the fifth resistor is bridged between the upper end of the third resistor and the upper end of the fourth resistor, the upper end of the first resistor and the upper end of the fourth resistor output in-phase signals I+ and I- respectively, and the upper end of the third resistor and the upper end of the sixth resistor output differential signals Q+ and Q- respectively.

[0011] Furthermore, the first resistor, the third resistor, the fourth resistor and the sixth resistor are small resistors, and small resistors are inserted into the traditional full-pass network filter structure to reduce the sensitivity of the orthogonal signal generating network to subsequent capacitive loads, thereby effectively ensuring the accuracy of the orthogonal signal and having the advantage of widening the frequency band.

[0012] Further, the first control module and the second control module respectively include 5 transistor array units connected in parallel, each transistor array unit includes a third capacitor, a seventh resistor, a first transistor, an eighth resistor, a ninth resistor, a fourth capacitor, a second transistor, a tenth resistor, a fifth capacitor, a third transistor, an eleventh resistor, a sixth capacitor, a fourth transistor, a seventh capacitor, a twelfth resistor, a fifth transistor, a thirteenth resistor, a fourteenth resistor, an eighth capacitor, a sixth transistor, a fifteenth resistor, a ninth capacitor, a seventh transistor, a sixteenth resistor, a tenth capacitor and an eighth transistor, the left end of the third capacitor and the right end of the seventh capacitor are respectively connected to the same-phase input signals I+ and I-, the collector of the third transistor is connected to the collector of the eighth transistor, and the common The output signal I°ut+ is connected, the collector of the fourth transistor is connected to the collector of the seventh transistor, and the output signal I°ut- is commonly connected, the left end of the tenth resistor and the right end of the fifteenth resistor are commonly connected to the digital control voltage bias Vb1, the lower end of the ninth resistor and the lower end of the fourteenth resistor are commonly connected to the digital control voltage bias Vb3, the right end of the eleventh resistor and the left end of the sixteenth resistor are commonly connected to the digital control voltage bias Vb5, the lower end of the seventh resistor and the lower end of the twelfth resistor are commonly connected to the fixed voltage bias Vbias_1, the collector of the second transistor and the collector of the sixth transistor are commonly connected to the fixed voltage bias Vbias_2, the right end of the third capacitor and the upper end of the seventh resistor are commonly connected to the base of the first transistor, and the The left end of the seventh capacitor and the upper end of the twelfth resistor are commonly connected to the base of the fifth transistor, the emitter of the first transistor is grounded through the eighth resistor, the emitter of the fifth transistor is grounded through the thirteenth resistor, the collector of the first transistor is connected to the emitter of the second transistor, the emitter of the third transistor, and the emitter of the fourth transistor, the collector of the fifth transistor is connected to the emitter of the sixth transistor, the emitter of the seventh transistor, and the emitter of the eighth transistor, the base of the second transistor is connected to the upper end of the ninth resistor and is grounded through the fourth capacitor, the base of the sixth transistor is connected to the upper end of the fourteenth resistor and is grounded through the eighth capacitor, the base of the third transistor is connected to the right end of the tenth resistor and is grounded through the fifth capacitor, the base of the seventh transistor is connected to the fifteenth resistor The left end of the first transistor and the fifth transistor are connected and grounded through the ninth capacitor, the base of the fourth transistor is connected to the left end of the eleventh resistor and grounded through the sixth capacitor, the base of the eighth transistor is connected to the right end of the sixteenth resistor and grounded through the tenth capacitor, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor and the eighth transistor are of the same size, and the sizes of the transistors in the five transistor array units are arranged in order from large to small; the fixed voltage bias Vbias_1 ensures that the working current of the first transistor and the fifth transistor is constant; one of the digital control voltage biases Vb1 and Vb5 is in a low voltage shutdown mode, and the other changes the number of transistors incorporated in the circuit by controlling the number of bits of high voltage conduction, thereby controlling the gain of the amplifier;The digital control voltage bias Vb1 and Vb5 in the low voltage shutdown mode are different, which can realize the polarity reversal of the differential input signal; the digital control voltage signal Vb3 changes the number of current rudders incorporated into the circuit by controlling the number of bits of high voltage conduction, thereby controlling the gain of the amplifier; a more precise gain control is achieved by combining the two gain control methods; the eighth resistor and the thirteenth resistor are negative feedback structures to ensure the stability of the phase shifter structure. ;

[0013] Further, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are all composed of npn-type transistors.

[0014] Furthermore, the second control module has the same structure as the first control module. The second control module uses a digital control circuit to control the current amplitude. The digital control logic of this part is different from the digital control logic of the first control module to achieve orthogonal amplitude regulation.

[0015] Further, the output network includes a seventeenth resistor, an eleventh capacitor, a ninth transistor, an eighteenth resistor, a twelfth capacitor, a tenth transistor, a third inductor, a fourth inductor, a nineteenth resistor, a fifth inductor, a sixth inductor, a twentieth resistor, a thirteenth capacitor and a fourteenth capacitor, the emitter of the ninth transistor is connected to the input signals I°ut+ and Q°ut+, the emitter of the tenth transistor is connected to the input signals I°ut- and Q°ut-, the left end of the thirteenth capacitor and the right end of the fourteenth capacitor are respectively connected to the phase shifter output signals °utput+ and °utput-, the left end of the seventeenth resistor and the right end of the eighteenth resistor are connected to the fixed voltage bias Vbias_, the upper end of the fourth inductor and the upper end of the sixth inductor are connected to the fixed voltage bias Vdc, the base of the ninth transistor is connected to the right end of the seventeenth resistor and is grounded through the eleventh capacitor, the base of the tenth transistor is connected to the eighteenth resistor and is grounded through the twelfth capacitor, the collector of the ninth transistor is connected to the lower end of the third inductor, the collector of the tenth transistor is connected to the lower end of the fifth inductor, the upper end of the third inductor is connected to the lower end of the fourth inductor and the right end of the thirteenth capacitor, the upper end of the fifth inductor is connected to the lower end of the sixth inductor and the left end of the fourteenth capacitor, the nineteenth resistor is connected between the lower end of the third inductor and the upper end of the fourth inductor, the twentieth resistor is connected between the lower end of the fifth inductor and the upper end of the sixth inductor, and the output network first realizes orthogonal synthesis at the emitters of the ninth transistor and the tenth transistor, and then realizes output matching through a T-type matching network.

[0016] The working principle of the present invention is as follows: the input end of the orthogonal signal generation module is the input end of the broadband high-precision vector synthesis phase shifter, which is used to convert the input differential signal into two differential signals of in-phase (0°, 180°) and orthogonal (90°, 270°); the input ends of the first control module and the second control module are respectively connected to the output end of the orthogonal signal generation module, which are used to respectively control the amplitudes of the two differential signals and select the polarities of the differential signals; the input end of the output network is respectively connected to the output ends of the first control module and the second control module, and the output end is the output end of the broadband high-precision vector synthesis phase shifter, which is used to synthesize the two differential signals with regulated amplitudes and polarities, and output the differential signal of the required phase.

[0017] Compared with the prior art, the beneficial effects of the present invention are as follows: the broadband high-precision vector synthesis phase shifter structure provided by the present invention has good performance in bandwidth, phase shifting accuracy, circuit stability and industrial production feasibility, and can meet various application requirements including satellite communication, radar, mobile communication technology, etc.; it effectively improves the phase shifting accuracy, reduces the amplitude deviation, and broadens the working bandwidth, and has good linearity. In the 8-16GHz frequency band, the phase shifter structure can achieve broadband 7-bit phase shifting, with a phase shifting accuracy better than 2.8° and an amplitude deviation less than 0.53dB. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of the circuit structure of a broadband high-precision vector synthesis phase shifter.

[0019] Figure 2 This is the phase shift result of the post-layout simulation (typical process corner) of the phase shifter in the 8-16GHz frequency band.

[0020] Figure 3 It is the phase shift accuracy of post-layout simulation (typical process corner) of phase shifter in the 8-16GHz frequency band.

[0021] Figure 4 It is the amplitude deviation of the post-layout simulation (typical process corner) of the phase shifter in the 8-16GHz frequency band.

[0022] Among them, 100-orthogonal signal generator, 101-first capacitor, 102-first resistor, 103-second resistor, 104-first inductor, 105-third resistor, 106-second capacitor, 107-fourth resistor, 108-fifth resistor, 109-second inductor, 110-sixth resistor, 200-first control module, 201-third capacitor, 202-seventh resistor, 203-first transistor, 204-eighth resistor, 205-ninth resistor, 206-fourth capacitor, 207-second transistor, 208-tenth resistor, 209-fifth capacitor, 210-third transistor, 211-eleventh resistor, 212-sixth capacitor, 213-fourth transistor, 214-seventh capacitor, 215-twelfth resistor, 216 -fifth transistor, 217-thirteenth resistor, 218-fourteenth resistor, 219-eighth capacitor, 220-sixth transistor, 221-fifteenth resistor, 222-ninth capacitor, 223-seventh transistor, 224-sixteenth resistor, 225-tenth capacitor, 226-eighth transistor, 300-second control module, 400-output network, 401-seventeenth resistor, 402-eleventh capacitor, 403-ninth transistor, 404-eighteenth resistor, 405-twelfth capacitor, 406-tenth transistor, 407-third inductor, 408-fourth inductor, 409-nineteenth resistor, 410-fifth inductor, 411-sixth inductor, 412-twentieth resistor, 413-thirteenth capacitor, 414-fourteenth capacitor. DETAILED DESCRIPTION

[0023] The specific implementation modes of the present invention are described in detail below in conjunction with the accompanying drawings, but it should be understood that the protection scope of the present invention is not limited by the specific implementation modes.

[0024] Example: Figure 1 As shown, a broadband high-precision vector synthesis phase shifter structure includes an orthogonal signal generator 100, a first control module 200, a second control module 300 and an output network 400. Among them:

[0025] The orthogonal signal generator 100 is composed of an improved orthogonal all-pass network. The input of the orthogonal signal generator 100 is a differential signal, and the output is two differential signals of in-phase and orthogonal. The two differential signals have equal amplitudes. The orthogonal signal generator 100 includes a first capacitor 101, a first resistor 102, a second resistor 103, a first inductor 104, a third resistor 105, a second capacitor 106, a fourth resistor 107, a fifth resistor 108, a second inductor 109, and a sixth resistor 110. The first capacitor 101 and the first resistor 102 are connected in series in sequence, the first inductor 104 and the third resistor 105 are connected in series in sequence, the second inductor 109 and the sixth resistor 110 are connected in series in sequence, and the second capacitor 106 and the fourth resistor 107 are connected in series in sequence. , the lower end of the first capacitor 101 is connected to the left end of the first inductor 104, and are connected to the input signal Input+, the lower end of the second capacitor 106 is connected to the right end of the second inductor 109, and are connected to the input signal Input-, the second resistor 103 is connected between the upper end of the first resistor 102 and the upper end of the sixth resistor 110, the fifth resistor 108 is connected between the upper end of the third resistor 105 and the upper end of the fourth resistor 107, the upper end of the first resistor 102 and the upper end of the fourth resistor 107 output in-phase signals I+ and I- respectively, the upper end of the third resistor 105 and the upper end of the sixth resistor 110 output differential signals Q+ and Q- respectively, the first resistor 102, the third resistor 105, the fourth resistor 107 and the sixth resistor 110 are small resistors;

[0026] The first control module 200 and the second control module 300 are composed of transistor arrays for controlling the amplitude and polarity of the in-phase and orthogonal signals respectively, and the first control module 200 and the second control module 300 are respectively connected to the orthogonal signal generator 100, and the first control module 200 and the second control module 300 respectively include 5 transistor array units combined in parallel, and each transistor array unit includes a third capacitor 201, a seventh resistor 202, a first transistor 203, an eighth resistor 204, a ninth resistor 205, a fourth capacitor 206, a second transistor 207, a tenth resistor 208, a fifth capacitor 209, a third transistor 210, an eleventh resistor 211, a sixth capacitor 212, a fourth transistor 213, and a seventh capacitor 214. , a twelfth resistor 215, a fifth transistor 216, a thirteenth resistor 217, a fourteenth resistor 218, an eighth capacitor 219, a sixth transistor 220, a fifteenth resistor 221, a ninth capacitor 222, a seventh transistor 223, a sixteenth resistor 224, a tenth capacitor 225 and an eighth transistor 226, the left end of the third capacitor 201 and the right end of the seventh capacitor 214 are respectively connected to the in-phase input signals I+ and I-, the collector of the third transistor 210 and the collector of the eighth transistor 226 are connected, and the output signal I°ut+ is connected together, the collector of the fourth transistor 213 and the collector of the seventh transistor 223 are connected, and the output signal I°ut- is connected together, the left end of the tenth resistor 208 and the right end of the fifteenth resistor 221 are connected together to the digital control voltage The lower end of the ninth resistor 205 and the lower end of the fourteenth resistor 218 are commonly connected to the digital control voltage bias Vb3, the right end of the eleventh resistor 211 and the left end of the sixteenth resistor 224 are commonly connected to the digital control voltage bias Vb5, the lower end of the seventh resistor 202 and the lower end of the twelfth resistor 215 are commonly connected to the fixed voltage bias Vbias_1, the collector of the second transistor 207 and the collector of the sixth transistor 220 are commonly connected to the fixed voltage bias Vbias_2, the right end of the third capacitor 201 and the upper end of the seventh resistor 202 are commonly connected to the base of the first transistor 203, the left end of the seventh capacitor 214 and the upper end of the twelfth resistor 215 are commonly connected to the base of the fifth transistor 216, and the emitter of the first transistor 203 is connected to the base of the fifth transistor 216 through the eighth resistor 204. The emitter of the fifth transistor is connected to the ground through the thirteenth resistor 217, the collector of the first transistor is connected to the emitter of the second transistor 207, the emitter of the third transistor 210, and the emitter of the fourth transistor 213, the collector of the fifth transistor 216 is connected to the emitter of the sixth transistor 220, the emitter of the seventh transistor 223, and the emitter of the eighth transistor 226, the base of the second transistor 207 is connected to the upper end of the ninth resistor 205, and is grounded through the fourth capacitor 206, the base of the sixth transistor 220 is connected to the upper end of the fourteenth resistor 218, and is grounded through the eighth capacitor 219, the base of the third transistor 210 is connected to the right end of the tenth resistor 208, and is grounded through the fifth capacitor 209, the base of the seventh transistor 223 is connected to the left end of the fifteenth resistor,and grounded through the ninth capacitor 222, the base of the fourth transistor 213 is connected to the left end of the eleventh resistor 211 and grounded through the sixth capacitor 212, the base of the eighth transistor 226 is connected to the right end of the sixteenth resistor 224 and grounded through the tenth capacitor 225, the first transistor 203, the second transistor 207, the third transistor 210, the fourth transistor 213, the fifth transistor 216, the sixth transistor 220, the seventh transistor 223, and the eighth transistor 226 are all composed of npn-type transistors;

[0027] The output network 400 is connected to the first control module 200 and the second control module 300 respectively. The output network 400 includes a seventeenth resistor 401, an eleventh capacitor 402, a ninth transistor 403, an eighteenth resistor 404, a twelfth capacitor 405, a tenth transistor 406, a third inductor 407, a fourth inductor 408, a nineteenth resistor 409, a fifth inductor 410, a sixth inductor 411, a twentieth resistor 412, a thirteenth capacitor 413 and a fourteenth capacitor 414. The emitter of the ninth transistor 403 is connected to the input signals I°ut+ and Q°ut+, the emitter of the tenth transistor 406 is connected to the input signals I°ut- and Q°ut-, the left end of the thirteenth capacitor 413 and the right end of the fourteenth capacitor 414 are connected to the phase shifter output signals °utput+ and °utput- respectively, and the left end of the seventeenth resistor 401 and the right end of the eighteenth resistor 404 are connected to the fixed The voltage bias is Vbias_3, the upper end of the fourth inductor 408 and the upper end of the sixth inductor 411 are connected to the fixed voltage bias Vdc, the base of the ninth transistor 403 is connected to the right end of the seventeenth resistor 401, and is grounded through the eleventh capacitor 402, the base of the tenth transistor 406 is connected to the eighteenth resistor 404, and is grounded through the twelfth capacitor 405, the collector of the ninth transistor 403 is connected to the lower end of the third inductor 407, the collector of the tenth transistor 406 is connected to the lower end of the fifth inductor 410, the upper end of the third inductor 407 is connected to the lower end of the fourth inductor 408 and the right end of the thirteenth capacitor 413, the upper end of the fifth inductor 410 is connected to the lower end of the sixth inductor 411 and the left end of the fourteenth capacitor 414, the nineteenth resistor 409 is connected between the lower end of the third inductor 407 and the upper end of the fourth inductor 408, and the twentieth resistor 412 is connected between the lower end of the fifth inductor 410 and the upper end of the sixth inductor 411.

[0028] The present invention sets 128 digital control states, which respectively control the first control module 200 and the second control module 300 to adjust the amplitude of the two orthogonal signals. After being synthesized by the output network 400, phase stepping from 0° to 360° with a step length of 2.8125° and minimum amplitude deviation are achieved.

[0029] The working principle of the above embodiment is as follows: the input end of the orthogonal signal generation module 100 is the input end of the broadband high-precision vector synthesis phase shifter, which is used to convert the input differential signal into two differential signals of in-phase (0°, 180°) and orthogonal (90°, 270°); the input ends of the first control module 200 and the second control module 300 are respectively connected to the output end of the orthogonal signal generation module 100, which are used to control the amplitudes of the two differential signals respectively and select the polarities of the differential signals at the same time; the input end of the output network 400 is respectively connected to the output ends of the first control module 200 and the second control module 300, and the output end is the output end of the broadband high-precision vector synthesis phase shifter, which is used to synthesize the two differential signals with regulated amplitudes and polarities, and output the differential signal of the required phase.

[0030] Figure 2 This is the phase shift result of post-layout simulation (typical process angle) of the phase shifter structure of the present invention. The central operating frequency is 12 GHz. Within the 8-16 GHz operating frequency band, the phase shifter can achieve a phase shift of 360° with no overlap in phase states.

[0031] Figure 3 The phase shift accuracy results of the post-layout simulation (typical process angle) of the phase shifter structure of the present invention are as follows. In the 8-16 GHz operating frequency band, the phase shift accuracy is better than 2.8°, and in the 8-15.5 GHz operating frequency band, the phase shift accuracy is better than 2°.

[0032] Figure 4 This is the amplitude deviation result of the post-layout simulation (typical process angle) of the phase shifter structure of the present invention. In the 8-16 GHz operating frequency band, the amplitude deviation is less than 0.53 dB.

[0033] The specific models of the above electronic components are not specially specified, and conventional devices of integrated circuit technology can be selected as long as they can meet the use requirements of the present invention.

[0034] The specific embodiments described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific embodiment of the present invention and does not limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention are included in the protection scope of the present invention.

Claims

1. A broadband high-precision vector synthesis phase shifter structure, characterized in that: include: An orthogonal signal generator (100), the input of the orthogonal signal generator (100) is a differential signal, and the output is two differential signals in phase and in quadrature, and the two differential signals have equal amplitudes; A first control module (200) and a second control module (300), the first control module (200) and the second control module (300) are respectively connected to the output end of the orthogonal signal generator (100), and are respectively composed of transistor arrays for controlling the amplitude and polarity of the in-phase and orthogonal differential signals, respectively changing the amplitude of the two differential signals and independently controlling the two differential signals to achieve 180° phase polarity reversal; An output network (400) connected to the output ends of the first control module (200) and the second control module (300) respectively, for realizing orthogonal synthesis and output matching; The orthogonal signal generator (100) comprises a first capacitor (101), a first resistor (102), a second resistor (103), a first inductor (104), a third resistor (105), a second capacitor (106), a fourth resistor (107), a fifth resistor (108), a second inductor (109), and a sixth resistor (110); the first capacitor (101) and the first resistor (102) are sequentially connected in series, the first inductor (104) and the third resistor (105) are sequentially connected in series, the second inductor (109) and the sixth resistor (110) are sequentially connected in series, the second capacitor (106) and the fourth resistor (107) are sequentially connected in series, and the lower end of the first capacitor (101) is connected in series. The first inductor (104) and the left end thereof are connected to the input signal Input (+), the lower end of the second capacitor (106) and the right end of the second inductor (109) are connected to the input signal Input (-), the second resistor (103) is connected between the upper end of the first resistor (102) and the upper end of the sixth resistor (110), the fifth resistor (108) is connected between the upper end of the third resistor (105) and the upper end of the fourth resistor (107), the upper end of the first resistor (102) and the upper end of the fourth resistor (107) respectively output in-phase signals I+ and I-, and the upper end of the third resistor (105) and the upper end of the sixth resistor (110) respectively output differential signals Q+ and Q-; The first control module (200) and the second control module (300) respectively comprise five transistor array units connected in parallel, each transistor array unit comprising a third capacitor (201), a seventh resistor (202), a first transistor (203), an eighth resistor (204), a ninth resistor (205), a fourth capacitor (206), a second transistor (207), a tenth resistor (208), a fifth capacitor (209), a third transistor (210), an eleventh resistor (211), a sixth capacitor (212), a fourth transistor (213), a seventh capacitor (214), a twelfth resistor (215), a fifth transistor (216), a thirteenth resistor (217), a fourteenth resistor (218), a an eighth capacitor (219), a sixth transistor (220), a fifteenth resistor (221), a ninth capacitor (222), a seventh transistor (223), a sixteenth resistor (224), a tenth capacitor (225) and an eighth transistor (226); the left end of the third capacitor (201) and the right end of the seventh capacitor (214) are respectively connected to the same-phase input signals I+ and I-; the collector of the third transistor (210) and the collector of the eighth transistor (226) are connected and are jointly connected to the output signal I°ut+; the collector of the fourth transistor (213) and the collector of the seventh transistor (223) are connected and are jointly connected to the output signal I°ut-; the left end of the tenth resistor (208) and the right end of the fifteenth resistor (221) are jointly connected The first resistor (205) and the second resistor (218) are connected to a digital control voltage bias Vb1, the lower end of the ninth resistor (205) and the lower end of the fourteenth resistor (218) are connected to a digital control voltage bias Vb3, the right end of the eleventh resistor (211) and the left end of the sixteenth resistor (224) are connected to a digital control voltage bias Vb5, the lower end of the seventh resistor (202) and the lower end of the twelfth resistor (215) are connected to a fixed voltage bias Vbias_1, the collector of the second transistor (207) and the collector of the sixth transistor (220) are connected to a fixed voltage bias Vbias_2, the right end of the third capacitor (201) and the upper end of the seventh resistor (202) are connected to the base of the first transistor (203), and the seventh capacitor (214) is connected to the base of the first transistor (203). The left end and the upper end of the twelfth resistor (215) are commonly connected to the base of the fifth transistor (216); the emitter of the first transistor (203) is grounded through the eighth resistor (204); the emitter of the fifth transistor is grounded through the thirteenth resistor (217); the collector of the first transistor is connected to the emitter of the second transistor (207), the emitter of the third transistor (210), and the emitter of the fourth transistor (213); the collector of the fifth transistor (216) is connected to the emitter of the sixth transistor (220), the emitter of the seventh transistor (223), and the emitter of the eighth transistor (226); the base of the second transistor (207) is connected to the upper end of the ninth resistor (205), and is grounded through the fourth capacitor (206);The base of the sixth transistor (220) is connected to the upper end of the fourteenth resistor (218) and is grounded via the eighth capacitor (219); the base of the third transistor (210) is connected to the right end of the tenth resistor (208) and is grounded via the fifth capacitor (209); the base of the seventh transistor (223) is connected to the left end of the fifteenth resistor and is grounded via the ninth capacitor (222); the base of the fourth transistor (213) is connected to the left end of the eleventh resistor (211) and is grounded via the sixth capacitor (212); the base of the eighth transistor (226) is connected to the right end of the sixteenth resistor (224) and is grounded via the tenth capacitor (225); The output network (400) includes a seventeenth resistor (401), an eleventh capacitor (402), a ninth transistor (403), an eighteenth resistor (404), a twelfth capacitor (405), a tenth transistor (406), a third inductor (407), a fourth inductor (408), a nineteenth resistor (409), a fifth inductor (410), a sixth inductor (411), a twentieth resistor (412), a thirteenth capacitor (413) and a fourteenth capacitor (414), wherein the ninth transistor The emitter of the transistor (403) is connected to the input signal I°ut+, Q°ut+, the emitter of the tenth transistor (406) is connected to the input signal I°ut-, Q°ut-, the left end of the thirteenth capacitor (413) and the right end of the fourteenth capacitor (414) are connected to the phase shifter output signals °utput+ and °utput-, respectively, the left end of the seventeenth resistor (401) and the right end of the eighteenth resistor (404) are connected to the fixed voltage bias Vbias_3, the fourth inductor (408) The upper end of the ninth transistor (403) and the upper end of the sixth inductor (411) are connected to a fixed voltage bias Vdc, the base of the ninth transistor (403) is connected to the right end of the seventeenth resistor (401) and is grounded through the eleventh capacitor (402), the base of the tenth transistor (406) is connected to the eighteenth resistor (404) and is grounded through the twelfth capacitor (405), the collector of the ninth transistor (403) is connected to the lower end of the third inductor (407), the collector of the tenth transistor (406) is connected to the fifth inductor (41 0), the upper end of the third inductor (407) is connected to the lower end of the fourth inductor (408) and the right end of the thirteenth capacitor (413), the upper end of the fifth inductor (410) is connected to the lower end of the sixth inductor (411) and the left end of the fourteenth capacitor (414), the nineteenth resistor (409) is connected between the lower end of the third inductor (407) and the upper end of the fourth inductor (408), and the twentieth resistor (412) is connected between the lower end of the fifth inductor (410) and the upper end of the sixth inductor (411).

2. A broadband high-precision vector synthesis phase shifter structure as claimed in claim 1, characterized in that: The first resistor (102), the third resistor (105), the fourth resistor (107) and the sixth resistor (110) are small resistors.

3. A broadband high-precision vector synthesis phase shifter structure as claimed in claim 1, characterized in that: The first transistor (203), the second transistor (207), the third transistor (210), the fourth transistor (213), the fifth transistor (216), the sixth transistor (220), the seventh transistor (223), and the eighth transistor (226) are all composed of npn-type transistors.

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