Terminal circuit

Abstract

The present invention provides a terminal circuit, which includes a termination resistor, a first switching circuit, a second switching circuit, and a control circuit. A first end of the termination resistor is coupled to a signal pad. A first end of the first switching circuit is coupled to a second end of the termination resistor. A first end of the second switching circuit is coupled to a second end of the first switching circuit. A second end of the second switching circuit is coupled to a reference voltage line. During a period when the second switching circuit is conductive, the control circuit turns on the first switching circuit with a bias voltage. During a period when the second switching circuit is non-conductive, the control circuit turns off the first switching circuit with a voltage at a first end of the first switching circuit.

Description

Technical Field

[0001] The present invention relates to an integrated circuit, and in particular to a terminal circuit in the integrated circuit. Background Art

[0002] Usually, the high-speed transmission interface of an integrated circuit (IC) is equipped with a termination circuit to match the impedance of the transmission channel. With the evolution of technology, the power supply voltage of the integrated circuit is getting smaller and smaller, that is, the voltage range that the components (such as transistors) in the integrated circuit can tolerate is getting smaller and smaller. For example, the tolerance voltage of the transistor in the 22 nanometer (22nm) process is 3.3V, but the tolerance voltage of the transistor in the 12 nanometer (12nm) process is only 1.8V. The input voltage range of the integrated circuit is easily higher than the tolerance voltage of the components in the advanced process node. Based on this situation, the voltage across the transistor in the terminal circuit may exceed the voltage range that the transistor can tolerate, causing electrical overstress and / or increased leakage current in the transistor. Summary of the invention

[0003] The present invention is directed to a terminal circuit to avoid electrical overstress and / or leakage current problems as much as possible.

[0004] In an embodiment according to the present invention, the above-mentioned terminal circuit includes a terminal resistor, a first switch circuit, a second switch circuit and a control circuit. The first end of the terminal resistor is suitable for coupling to a signal pad. The first end of the first switch circuit is coupled to the second end of the terminal resistor. The first end of the second switch circuit is coupled to the second end of the first switch circuit. The second end of the second switch circuit is coupled to a reference voltage line. The second switch circuit is controlled by a control signal. The control circuit is configured to control the first switch circuit. During the period when the control signal turns on the second switch circuit, the control circuit transmits a bias voltage to the control end of the first switch circuit to turn on the first switch circuit. During the period when the control signal turns off the second switch circuit, the control circuit transmits the voltage of the first end of the first switch circuit to the control end of the first switch circuit to turn off the first switch circuit.

[0005] Based on the above, the control circuit and the first switch circuit described in each embodiment of the present invention can be self-biased. For example, when the second switch circuit is cut off, the control circuit can transmit the voltage of the first end of the first switch circuit to the control end of the first switch circuit to cut off the first switch circuit. When the second switch circuit is turned on, the control circuit can transmit the bias voltage (higher than 0V) to the control end of the first switch circuit to turn on the first switch circuit. The terminal circuit can avoid electrical overvoltage and / or leakage current problems as much as possible. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 It is a schematic diagram of a circuit block of an integrated circuit according to an embodiment of the present invention.

[0007] Figure 2 According to an embodiment Figure 1 Circuit block diagram of the terminal circuit shown.

[0008] Figure 3 According to an embodiment of the present invention, Figure 1 Circuit block diagram of the terminal circuit shown.

[0009] Figure 4 According to an embodiment of the present invention, Figure 3 The circuit block diagram of the control circuit shown.

[0010] Figure 5 Another embodiment of the present invention is described Figure 1 Circuit block diagram of the terminal circuit shown.

[0011] Description of Reference Numerals

[0012] 100: Integrated Circuits

[0013] 110, 120: Signal pads

[0014] 130: Functional Circuit

[0015] 140: Terminal circuit

[0016] 141_1, 141_2, 310_1, 310_2, 510_1, 510_2: Terminal resistance

[0017] 142_1, 142_2, MP31, MP32, MN41, MN42, MP41, MP51, MP52: Transistors

[0018] 320_1, 320_2, 520_1, 520_2: first switch circuit

[0019] 330_1, 330_2, 530_1, 530_2: Second switching circuit

[0020] 340_1, 340_2, 540_1, 540_2: Control circuit

[0021] SC, SC1, SC2, VG1: Control signals

[0022] SC1B: Inverted signal

[0023] VB: Bias voltage

[0024] VDD: Power supply voltage

[0025] VIN, VS1: Voltages

[0026] VTERM: Reference voltage line Detailed implementation manners

[0027] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0028] As used throughout the specification of the present invention (including the claims), the term "coupled (or connected)" may refer to any direct or indirect means of connection. For example, if it is described in the text that a first device is coupled (or connected) to a second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be indirectly connected to the second device through other devices or some means of connection. The terms "first", "second", etc. mentioned throughout the specification of the present invention (including the claims) are used to name components (elements), or to distinguish different embodiments or scopes, rather than to limit the upper or lower limits of the number of components, nor to limit the order of components. Additionally, wherever possible, components / components / steps using the same reference numerals in the drawings and embodiments represent the same or similar parts. Components / components / steps using the same reference numerals or the same terms in different embodiments can be referred to each other for relevant descriptions.

[0029] Figure 1 FIG. is a schematic diagram of a circuit block of an integrated circuit (IC) 100 according to an embodiment of the present invention. Figure 1The illustrated integrated circuit 100 includes signal pads 110, signal pads 120, a functional circuit 130, and a termination circuit 140. The functional circuit 130 can receive differential signals from outside the integrated circuit 100 through the signal pads 110 and 120, and / or the functional circuit 130 can output differential signals to the outside of the integrated circuit 100 through the signal pads 110 and 120. The peak voltage level of the signal of the signal pad 110 (or 120) is higher than the power supply voltage VDD of the integrated circuit 100. For example, the power supply voltage VDD of the integrated circuit 100 is 1.8V, and the peak voltage level of the signal of the signal pad 110 (or 120) may be 3V.

[0030] The termination circuit 140 is adapted to be disposed in the integrated circuit 100. The termination circuit 140 can match the impedance of the transmission channel (including the signal pads 110 and 120). The functional circuit 130 can generate a control signal SC according to the actual operation to set / control the termination resistance value of the termination circuit 140. Based on the control signal SC of the functional circuit 130, the termination circuit 140 can provide an appropriate termination impedance to the transmission channel (including the signal pads 110 and 120).

[0031] Figure 2 is illustrated according to an embodiment Figure 1 The circuit block diagram of the illustrated termination circuit 140. Figure 2 The illustrated termination circuit 140 includes a plurality of termination resistors (such as termination resistors 141_1 to 141_2) and a plurality of transistors (such as transistors 142_1 to 142_2). The number of these termination resistors and the number of these transistors can be determined according to the actual design. The first ends of the termination resistors 141_1 and 141_2 are coupled to the signal pad 110. The source of the transistor 142_1 is coupled to the second end of the termination resistor 141_1. The bulk of the transistor 142_1 is coupled to the power supply voltage VDD of the integrated circuit 100. The source of the transistor 142_2 is coupled to the second end of the termination resistor 141_2. The drains of the transistors 142_1 and 142_2 are coupled to the reference voltage line VTERM. The bases of the transistors 142_1 and 142_2 are coupled to the power supply voltage VDD of the integrated circuit 100.

[0032] The resistance values of these termination resistors 141_1 to 141_2 can be determined according to the actual design. In Figure 2 the illustrated embodiment, the control signal SC includes a control signal SC1 and a control signal SC2. The functional circuit 130 can generate the control signal SC1 and the control signal SC2 according to the actual operation to control the transistors 142_1 and 142_2, thereby setting the termination resistance value of the termination circuit 140.

[0033] When the signal on the signal pad 110 is one end of a differential signal, the voltage of the reference voltage line VTERM can be the intermediate voltage of the differential signal, such as the common mode voltage. Therefore, the voltage swing range of the signal on the signal pad 110 is from VTERM + Vswing to VTERM - Vswing, where Vswing is half of the voltage swing range of the signal on the signal pad 110. Here, it is assumed that VTERM - Vswing is greater than 0V, that is, VTERM is greater than Vswing. Hereinafter, the termination resistor 141_1 and the transistor 142_1 will be used as illustrative examples. Other termination resistors and other transistors of the termination circuit 140 (such as the termination resistor 141_2 and the transistor 142_2) can be analogized with reference to the relevant descriptions of the termination resistor 141_1 and the transistor 142_1, so they will not be elaborated.

[0034] When the transistor 142_1 is turned on, electrical overstress may occur in the transistor 142_1. For example, assume that the voltage of the signal pad 110 is 3V, the power supply voltage VDD of the integrated circuit 100 is 1.8V, and the voltage of the reference voltage line VTERM is 1.8V. When the control signal SC1 is 0V, the transistor 142_1 is turned on. When the transistor 142_1 is turned on, assume that the drain-source voltage (generally referred to as Vds) of the transistor 142_1 is 0.2V, that is, the source voltage of the transistor 142_1 is 2V. Therefore, the gate-source voltage (generally referred to as Vgs) of the transistor 142_1 is 2V. The Vgs (2V) of the transistor 142_1 is greater than the power supply voltage VDD (1.8V), so the turned-on transistor 142_1 has a problem of electrical overstress.

[0035] In order to avoid the occurrence of electrical overstress as much as possible, the source voltage of the transistor 142_1 should be less than the power supply voltage VDD. Assume that the voltage of the signal on the signal pad 110 is VTERM ± Vswing, then the source voltage of the transistor 142_1 is VTERM ± VT, where the voltage VT is (Vswing * R2) / (R1 + R2), R1 is the resistance value of the termination resistor 141_1, and R2 is the resistance value of the turned-on transistor 142_1. In order to avoid the occurrence of electrical overstress, VTERM + VT should be less than the power supply voltage VDD.

[0036] When the control signal SC1 is pulled up to 1.8V to turn off the transistor 142_1, leakage current may occur in the transistor 142_1. For example, assume that the voltage of the signal pad 110 is 3V, the power supply voltage VDD of the integrated circuit 100 is 1.8V, and the voltage of the reference voltage line VTERM is 1.8V. When the control signal SC1 is pulled up to 1.8V to turn off the transistor 142_1, the source voltage of the transistor 142_1 approaches the voltage of the signal pad 110 (3V). Since the gate-source voltage of the transistor 142_1 (generally referred to as Vsg, which is 3 - 1.8 = 1.2) is greater than the critical voltage, current can flow from the source to the drain. In addition, since the source voltage of the transistor 142_1 is greater than the base voltage of the transistor 142_1, current can flow from the source to the base.

[0037] To avoid the occurrence of leakage current as much as possible, the source voltage of the transistor 142_1 should be less than the power supply voltage VDD. Assume that the voltage of the signal on the signal pad 110 is VTERM ± Vswing. Then, when the control signal SC1 is pulled up, the source voltage of the transistor 142_1 is approximately VTERM ± Vswing. To avoid the occurrence of leakage current, VTERM + Vswing should be less than the power supply voltage VDD.

[0038] Figure 3 It is illustrated according to an embodiment of the present invention Figure 1 The circuit block diagram of the illustrated terminal circuit 140. Figure 3 The illustrated terminal circuit 140 includes a plurality of terminal resistors (such as terminal resistors 310_1 to 310_2), a plurality of first switch circuits (such as first switch circuits 320_1 to 320_2), a plurality of second switch circuits (such as second switch circuits 330_1 to 330_2), and a plurality of control circuits (such as control circuits 340_1 to 340_2). The number of these terminal resistors, the number of these first switch circuits, the number of these second switch circuits, and the number of these control circuits can be determined according to the actual design.

[0039] The first ends of the terminal resistors 310_1 and 310_2 are adapted to be coupled to the signal pad 110. The first end of the first switch circuit 320_1 is coupled to the second end of the terminal resistor 310_1. The first end of the second switch circuit 330_1 is coupled to the second end of the first switch circuit 320_1. The first end of the first switch circuit 320_2 is coupled to the second end of the terminal resistor 310_2. The first end of the second switch circuit 330_2 is coupled to the second end of the first switch circuit 320_2. The second ends of the second switch circuits 330_1 and 330_2 are coupled to the reference voltage line VTERM.

[0040] The resistance values of these termination resistors 310_1 to 310_2 can be determined according to the actual design. In Figure 3 the illustrated embodiment, the control signal SC includes a control signal SC1 and a control signal SC2. The second switching circuit 330_1 is controlled by the control signal SC1, and the second switching circuit 330_2 is controlled by the control signal SC2. The functional circuit 130 can generate the control signals SC1 and SC2 according to the actual operation to control the transistors 330_1 and 330_2, thereby setting the termination resistance value of the termination circuit 140. The voltage swing ranges of the control signals SC1 and SC2 can be determined according to the actual design. For example, the voltage swing ranges of the control signals SC1 and SC2 can be from the bias voltage VB to the power supply voltage VDD. The bias voltage VB can be determined according to the actual design. For example, the bias voltage VB can be a fixed voltage greater than 0V. For another example, the bias voltage VB can be greater than the voltage VT. Assuming that the voltage of the signal at the signal pad 110 is VIN = VTERM ± Vswing, when the first switching circuit 320_1 and the second switching circuit 330_1 are turned on, the voltage difference across the two ends of the termination resistor 310_1 is the voltage drop VIN - VS1, and the voltage difference between the voltage of the signal pad 110 and the voltage of the reference voltage line VTERM is the voltage difference VIN - VTERM, then the voltage VT can be the difference between the voltage difference VIN - VTERM and the voltage drop VIN - VS1 (i.e., VS1 - VTERM).

[0041] The following will take the termination resistor 310_1, the first switching circuit 320_1, the second switching circuit 330_1, and the control circuit 340_1 as illustrative examples. Figure 3 For other termination resistors, other first switching circuits, other second switching circuits, and other control circuits of the illustrated termination circuit 140 (such as the termination resistor 310_2, the first switching circuit 320_2, the second switching circuit 330_2, and the control circuit 340_2), the relevant descriptions of the termination resistor 310_1, the first switching circuit 320_1, the second switching circuit 330_1, and the control circuit 340_1 can be referred to for analogy, so they will not be elaborated here.

[0042] The control circuit 340_1 can output a control signal VG1 to control the first switching circuit 320_1. During the period when the control signal SC1 turns on the second switching circuit 330_1, the control circuit 340_1 can transmit the bias voltage VB (low logic level, but higher than 0V) as the control signal VG1 to the control terminal of the first switching circuit 320_1 to turn on the first switching circuit 320_1. During the period when the control signal SC1 turns off the second switching circuit 330_1, the control circuit 340_1 can transmit the voltage VS1 at the first end of the first switching circuit 320_1 as the control signal VG1 to the control terminal of the first switching circuit 320_1 to turn off the first switching circuit 320_1. Therefore, the control circuit 340_1 and the first switching circuit 320_1 can achieve self-biased.

[0043] In Figure 3 the illustrated embodiment, the first switching circuit 320_1 includes a transistor MP31. The gate of the transistor MP31 is coupled to the control circuit 340_1 to receive the control signal VG1. The source of the transistor MP31 is coupled to the second end of the terminal resistor 310_1. The drain of the transistor MP31 is coupled to the first end of the second switching circuit 330_1. The base of the transistor MP31 is coupled to the drain of the transistor MP31. In Figure 3 the illustrated embodiment, the second switching circuit 330_1 includes a transistor MP32. The source of the transistor MP32 is coupled to the second end of the first switching circuit 320_1. The drain of the transistor MP32 is coupled to the reference voltage line VTERM. The base of the transistor MP32 is coupled to the drain of the transistor MP32.

[0044] The gate of the transistor MP32 is controlled by the control signal SC1. When the control signal SC1 is the power supply voltage VDD to turn off the transistor MP32, the control circuit 340_1 can transmit the voltage at the source of the transistor MP31 as the control signal VG1 to the gate of the transistor MP31 to turn off the transistor MP31. That is to say, the voltage at the gate of the transistor MP31 can follow the voltage at the source of the transistor MP31, so that the transistor MP31 can be surely turned off and the occurrence of leakage current can be avoided as much as possible.

[0045] When the control signal SC1 is the bias voltage VB to turn on the transistor MP32, the control circuit 340_1 can transmit the bias voltage VB (low logic level, but higher than 0V) as the control signal VG1 to the gate of the transistor MP31 to turn on the transistor MP31. Assuming that the voltage VIN of the signal of the signal pad 110 is VTERM ± Vswing, the source voltage of the transistor MP31 is VTERM ± VT, where the voltage VT is VS1 - VTERM. The gate-source voltage (Vgs) of the transistor MP31 is VS1 – VB. The bias voltage VB is greater than the voltage VT, and the voltage VT can be VS1 - VTERM, so the Vgs of the transistor MP31 is less than VS1 – VT = VS1 – (VS1 - VTERM) = VTERM. The voltage of the reference voltage line VTERM is less than the power supply voltage VDD, so the Vgs of the transistor MP31 is less than the power supply voltage VDD. By analogy, when the control signal SC1 is the bias voltage VB, the Vgs of the transistor MP32 is also less than the power supply voltage VDD. Therefore, the transistors MP31 and MP32 can avoid the occurrence of electrical overvoltage.

[0046] Figure 4 is described according to an embodiment of the present invention Figure 3 The circuit block diagram of the control circuit 340_1 shown. Figure 3 Other control circuits (such as the control circuit 340_2) of the terminal circuit 140 shown can be referred to Figure 4 the relevant description of the control circuit 340_1 shown for analogy, so it will not be elaborated. Figure 4 The control circuit 340_1 shown includes a transistor MP41, a transistor MN41, and a transistor MN42. The source of the transistor MP41 is coupled to the first end of the first switch circuit 320_1 to receive the voltage VS1. The drains of the transistor MP41 and the transistor MN41 are coupled to the control end of the first switch circuit 320_1 to provide the control signal VG1. The gates of the transistor MP41 and the transistor MN41 are coupled to the power supply voltage VDD. The base of the transistor MN41 is coupled to the source of the transistor MN41. The gate of the transistor MN42 is adapted to receive the inverted signal SC1B of the control signal SC1. The drain of the transistor MN42 is coupled to the source of the transistor MN41. The source of the transistor MN42 is adapted to receive the bias voltage VB. The base of the transistor MN42 is coupled to the source of the transistor MN42.

[0047] During the period when the control signal SC1 turns on the second switch circuit 330_1, the inverted signal SC1B can turn on the transistor MN42, so that the bias voltage VB can be transmitted to the control terminal of the first switch circuit 320_1 through the transistor MN42 and the transistor MN41. The bias voltage VB as the control signal VG1 can turn on the first switch circuit 320_1, causing the voltage VS1 to be pulled down. The pulled-down voltage VS1 will reduce the gate-source voltage (Vgs) of the transistor MP41, making the transistor MP41 cut off.

[0048] During the period when the control signal SC1 turns off the second switch circuit 330_1, the inverted signal SC1B can turn off the transistor MN42. In addition, due to the turn-off of the second switch circuit 330_1, the voltage VS1 is pulled up to the voltage VIN (such as 3V) of the signal close to the signal pad 110. The pulled-up voltage VS1 will increase the gate-source voltage (Vgs) of the transistor MP41, making the transistor MP41 turn on. Therefore, the voltage VS1 at the first end of the first switch circuit 320_1 can be transmitted to the control terminal of the first switch circuit 320_1 through the transistor MP41. That is to say, the voltage (control signal VG1) at the control terminal of the first switch circuit 320_1 can follow the voltage VS1 at the first end of the first switch circuit 320_1, so that the first switch circuit 320_1 can be surely turned off and the occurrence of leakage current can be avoided as much as possible.

[0049] Figure 5 It is described according to another embodiment of the present invention Figure 1 The circuit block diagram of the shown terminal circuit 140. Figure 5 The shown terminal circuit 140 includes a plurality of terminal resistors (such as terminal resistors 510_1 to 510_2), a plurality of first switch circuits (such as first switch circuits 520_1 to 520_2), a plurality of second switch circuits (such as second switch circuits 530_1 to 530_2), and a plurality of control circuits (such as control circuits 540_1 to 540_2). Figure 5 The shown terminal resistor 510_1, terminal resistor 510_2, first switch circuit 520_1, first switch circuit 520_2, second switch circuit 530_1, second switch circuit 530_2, control circuit 540_1 and control circuit 540_2 can be referred to Figure 3 The relevant descriptions of the shown terminal resistor 310_1, terminal resistor 310_2, first switch circuit 320_1, first switch circuit 320_2, second switch circuit 330_1, second switch circuit 330_2, control circuit 340_1 and control circuit 340_2 can be analogized, so no further description will be given. Figure 5 The shown control circuits 540_1 and 540_2 can be referred to Figure 4The related description of the control circuit 340_1 can be inferred by analogy, so it is not repeated here.

[0050] The following will take the first switch circuit 520_1 as an example for illustration. Figure 5 Other first switch circuits (eg, the first switch circuit 520_2 ) of the terminal circuit 140 can be deduced by referring to the relevant description of the first switch circuit 520_1 , and thus will not be described in detail.

[0051] exist Figure 5 In the illustrated embodiment, the first switch circuit 520_1 includes a transistor MP51 and a transistor MP52. The gates of the transistor MP51 and the transistor MP52 are coupled to the control circuit 540_1 to receive the control signal VG1. The source of the transistor MP51 is coupled to the second end of the terminal resistor 510_1. The base of the transistor MP51 is coupled to the drain of the transistor MP51. The source of the transistor MP52 is coupled to the drain of the transistor MP51. The drain of the transistor MP52 is coupled to the first end of the second switch circuit 530_1. The base of the transistor MP52 is coupled to the drain of the transistor MP52.

[0052] The number of transistors in the first switch circuit 520_1 may be determined according to actual design. For example, in other embodiments, the first switch circuit 520_1 may include three (or more) transistors, wherein these transistors are connected in series (see Figure 5 The transistor MP51 and the transistor MP52 are analogous).

[0053] In summary, the terminal circuit 140 described in the above embodiments can use the control circuit and the first switch circuit to achieve self-bias. For example, when the second switch circuit is turned off, the control circuit can transmit the voltage of the first end of the first switch circuit to the control end of the first switch circuit to turn off the first switch circuit. When the second switch circuit is turned on, the control circuit can transmit the bias voltage VB (low logic level, but higher than 0V) to the control end of the first switch circuit to turn on the first switch circuit. The terminal circuit 140 can avoid electrical overvoltage and (or) leakage current problems as much as possible.

[0054] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A terminal circuit, characterized in that, the terminal circuit comprises: a terminal resistor having a first end coupled to a signal pad; a first switch circuit having a first end coupled to a second end of the terminal resistor; a second switch circuit having a first end coupled to a second end of the first switch circuit, wherein a second end of the second switch circuit is coupled to a reference voltage line, and the second switch circuit is controlled by a control signal; and a control circuit configured to control the first switch circuit, wherein, during a period when the control signal turns on the second switch circuit, the control circuit transmits a bias voltage to a control end of the first switch circuit to turn on the first switch circuit; and during a period when the control signal turns off the second switch circuit, the control circuit transmits a voltage at the first end of the first switch circuit to the control end of the first switch circuit to turn off the first switch circuit.

2. The terminal circuit according to claim 1, characterized in that, the terminal circuit is adapted to be disposed in an integrated circuit, and a peak voltage level of a signal of the signal pad is higher than a power supply voltage of the integrated circuit.

3. The terminal circuit according to claim 1, characterized in that, a voltage swing range of the control signal is from the bias voltage to the power supply voltage.

4. The terminal circuit according to claim 1, characterized in that, the bias voltage is greater than 0V.

5. The terminal circuit according to claim 4, characterized in that, when the first switch circuit and the second switch circuit are turned on, a difference between voltages at two ends of the terminal resistor is a voltage drop, and a difference between a voltage of the signal pad and a voltage of the reference voltage line is a voltage difference, and the bias voltage is greater than a difference between the voltage difference and the voltage drop.

6. The terminal circuit according to claim 1, characterized in that, the first switch circuit comprises: a transistor having a gate coupled to the control circuit, wherein a source of the transistor is coupled to the second end of the terminal resistor, a drain of the transistor is coupled to the first end of the second switch circuit, and a base of the transistor is coupled to the drain of the transistor.

7. The terminal circuit according to claim 1, characterized in that, the first switch circuit comprises: a first transistor having a gate coupled to the control circuit, wherein a source of the first transistor is coupled to the second end of the terminal resistor, and a base of the first transistor is coupled to a drain of the first transistor; and a second transistor having a gate coupled to the control circuit, wherein a source of the second transistor is coupled to the drain of the first transistor, a drain of the second transistor is coupled to the first end of the second switch circuit, and a base of the second transistor is coupled to a drain of the second transistor.

8. The terminal circuit according to claim 1, characterized in that, the second switch circuit comprises: A transistor having a gate controlled by the control signal, wherein a source of the transistor is coupled to the second terminal of the first switching circuit, a drain of the transistor is coupled to the reference voltage line, and a base of the transistor is coupled to the drain of the transistor.

9. The terminal circuit according to claim 1, wherein, the control circuit includes: a first transistor having a gate coupled to a power supply voltage, wherein a source of the first transistor is coupled to the first terminal of the first switching circuit, and a drain of the first transistor is coupled to the control terminal of the first switching circuit; a second transistor having a gate coupled to the power supply voltage, wherein a drain of the second transistor is coupled to the control terminal of the first switching circuit, and a base of the second transistor is coupled to a source of the second transistor; and a third transistor having a gate adapted to receive an inverted signal of the control signal, wherein a drain of the third transistor is coupled to the source of the second transistor, a source of the third transistor is adapted to receive the bias voltage, and a base of the third transistor is coupled to the source of the third transistor.

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