Epitaxial method for improving dislocation defects and epitaxial wafer thereof

Abstract

The application provides an epitaxial method for improving dislocation defects and an epitaxial wafer. The epitaxial method comprises the following steps: providing a substrate; forming a first modulation superlattice buffer layer on the surface of the substrate, which is used for adjusting thermal mismatch; continuously forming a second modulation superlattice buffer layer, which is used for blocking dislocations; and continuously forming an epitaxial layer. By arranging the superlattice buffer layers for adjusting thermal mismatch and blocking dislocations on the substrate in sequence, the thermal expansion coefficient is modulated and the dislocations are blocked, so that a high-quality epitaxial layer can be formed on the substrate.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an epitaxial method for improving dislocation defects and an epitaxial wafer thereof. Background Technology

[0002] GaN, as a third-generation semiconductor material, has the characteristics of high bandgap, high critical breakdown electric field, high carrier saturation migration velocity, high thermal conductivity and direct bandgap, and has great application prospects in high temperature, high frequency, high power microelectronic devices and high performance optoelectronic devices.

[0003] SiC substrates are currently the most ideal substrate material for GaN heteroepitaxial growth due to their small lattice mismatch and high thermal conductivity. However, SiC substrates have a smaller coefficient of thermal expansion than GaN, resulting in a thermal mismatch of 33.1%, which leads to significant tensile stress in the GaN epitaxial layer. This, in turn, causes cracks in the epitaxial layer, negatively impacting the performance of semiconductor devices. To address this issue, researchers both domestically and internationally have optimized buffer layer technology to improve the crystal quality and stress state of the thin film. However, as the thickness of the GaN epitaxial layer increases, cracks still inevitably appear, making it difficult to obtain high-quality GaN epitaxial layers. GaN-based HEMTs, due to the strong spontaneous polarization, piezoelectric excitation effect, and large band structure of the heterostructure material, exhibit high two-dimensional electron gas density. However, the two-dimensional electron gas density is greatly affected by the characteristics of the epitaxial layer material, especially dislocation defects in the material, which severely impacts the performance and efficiency of HEMT devices. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide an epitaxial method and epitaxial wafer for improving dislocation defects, which can improve dislocation defects in materials.

[0005] To address the aforementioned problems, the present invention provides an epitaxial method comprising the following steps: providing a substrate; forming a first modulation superlattice buffer layer on the surface of the substrate for adjusting thermal mismatch; further forming a second modulation superlattice buffer layer for blocking dislocations; and further forming an epitaxial layer.

[0006] To address the aforementioned problems, the present invention provides an epitaxial wafer comprising: a substrate; a first modulation superlattice buffer layer on the surface of the substrate for adjusting thermal mismatch; a second modulation superlattice buffer layer on the surface of the first modulation superlattice buffer layer for blocking dislocations; and an epitaxial layer on the surface of the second modulation superlattice buffer layer.

[0007] This invention improves the growth quality of epitaxial layers by sequentially incorporating superlattice buffer layers that regulate thermal mismatch and block dislocations. The first modulation superlattice buffer layer, used to regulate thermal mismatch, has a relatively small lattice mismatch between TiN and materials such as SiC, GaN, and AlN, but still exhibits a significant lattice gap with the target epitaxial material and the substrate. Therefore, a large number of dislocations are generated during growth. Consequently, a second supermodulation superlattice buffer layer is also needed to block dislocations. The combination of these two layers reduces the lattice mismatch ratio, lowers thermal adaptation stress, prevents cracking in the epitaxial layer, and blocks dislocations, thus promoting the growth of high-quality epitaxial layers. Attached Figure Description

[0008] Appendix Figure 1 The diagram shows the implementation steps of a specific embodiment of the epitaxial method described in this invention.

[0009] Appendix Figures 2A to 2D The diagram shown is a process flow chart of a specific embodiment of the epitaxial method described in this invention. Detailed Implementation

[0010] The following detailed description, in conjunction with the accompanying drawings, illustrates the specific implementation of the epitaxial method for improving dislocation defects and the epitaxial wafer provided by the present invention.

[0011] Appendix Figure 1 The diagram shows the implementation steps of a specific embodiment of the epitaxial method of the present invention, including the following steps: Step S11, providing a substrate; Step S12, forming a first modulation superlattice buffer layer on the substrate surface for adjusting thermal mismatch; Step S13, continuing to form a second modulation superlattice buffer layer for blocking dislocations; Step S14, continuing to form an epitaxial layer.

[0012] Appendix Figures 2A to 2D The diagram shown is a process flow chart of a specific embodiment of the epitaxial method for improving dislocation defects according to the present invention.

[0013] Appendix Figure 2A As shown, and referring to step S11, a substrate 20 is provided. The material of the substrate 20 is any one of SiC, sapphire, and single-crystal silicon. As one specific embodiment, SiC is selected as the material of the substrate 20. In other specific embodiments, sapphire or single-crystal silicon may also be selected as the material of the substrate 20.

[0014] Appendix Figure 2BAs shown, and referring to step S12, a first modulation superlattice buffer layer 21 is formed on the surface of the substrate 20 to adjust thermal mismatch. In one specific embodiment, before forming the first modulation superlattice buffer layer 21 on the surface of the substrate 20, a buffer layer is further formed on the surface of the substrate 20 and the first modulation superlattice buffer layer 21, with the following steps: placing the substrate 20 in an MOCVD reaction chamber and heat-treating the substrate 20 under a hydrogen atmosphere; growing an AlN buffer layer with a thickness of 10 nm to 200 nm; and growing a GaN pre-relaxation layer with a thickness of 5 nm to 10 nm. In other specific embodiments, the buffer layer can also be InN, and its thickness can also be 200 nm to 500 nm.

[0015] In one specific implementation, the first modulation superlattice buffer layer 21 is a TiN / SiC modulation superlattice buffer layer. Forming the first modulation superlattice buffer layer 21 on the surface of the substrate 20 further includes: growing a TiN buffer layer with a thickness of 1 nm to 10 nm; growing a SiC buffer layer with a thickness of 1 nm to 10 nm; and cyclically growing the TiN buffer layer and the SiC buffer layer for 1 to 10 cycles to obtain the TiN / SiC modulation superlattice buffer layer. In other specific implementations, the number of cyclic growth cycles can be 10 to 20 cycles. In the TiN / SiC modulation superlattice buffer layer, because the thermal expansion coefficient of TiN is much larger than that of SiC, TiN modulates the thermal expansion coefficient of SiC, resulting in thermal expansion properties close to the middle value. Simultaneously, TiN has a smaller lattice mismatch with SiC and materials such as GaN and AlN, reducing thermal mismatch stress during growth, avoiding cracks in the epitaxial layer, and facilitating the growth of a high-quality epitaxial layer.

[0016] Appendix Figure 2CAs shown, and referring to step S13, the second modulation superlattice buffer layer 22 is further formed to block dislocations. In one specific embodiment, before forming the second modulation superlattice buffer layer 22, the process further includes: growing a GaN relaxation layer with a thickness of 5 nm to 10 nm. In another specific embodiment, the second modulation superlattice buffer layer 22 is a TiN / Si3N4 modulation superlattice buffer layer. Forming the second modulation superlattice buffer layer 22 further includes: growing a TiN buffer layer with a thickness of 1 nm to 10 nm; growing a Si3N4 buffer layer with a thickness of 1 nm to 10 nm; and cyclically growing the TiN buffer layer and the Si3N4 buffer layer for 1 to 10 cycles to obtain the TiN / Si3N4 modulation superlattice buffer layer. In other specific embodiments, the number of cycles can be 10 to 20. In the TiN / Si3N4 modulation superlattice buffer layer, since Si3N4 generally exhibits an amorphous state, it can form a coating on the TiN layer. Even if dislocations penetrate into the TiN layer, the dislocations in the TiN layer cannot move through the Si3N4 amorphous phase, which effectively blocks the dislocations and is beneficial to the growth of high-quality epitaxial layers.

[0017] Appendix Figure 2D As shown, and referring to step S14, the epitaxial layer 23 is further formed. In one specific embodiment, the material of the epitaxial layer 23 is a nitride, selected from AlN, GaN, InN, and ternary or quaternary compounds of the above materials. In another specific embodiment, the step of forming the epitaxial layer 23 further includes: growing a GaN epitaxial layer with a thickness of 1 micrometer to 4 micrometers; growing an AlGaN isolation layer, which is an AlGaN layer with a thickness of 1 nanometer to 10 nanometers; an n-type AlGaN barrier layer with a thickness of 10 nanometers to 100 nanometers; and growing a GaN cap layer with a thickness of 1 nanometer to 5 nanometers.

[0018] Appendix Figure 2D The structure shown is an epitaxial wafer obtained after the implementation of the above specific embodiments, including: a substrate 20; a first modulation superlattice buffer layer 21 on the surface of the substrate 20 for adjusting thermal mismatch; a second modulation superlattice buffer layer 22 on the surface of the first modulation superlattice buffer layer 21 for blocking dislocations; and an epitaxial layer 23 on the surface of the second modulation superlattice buffer layer 22.

[0019] In one specific embodiment, the substrate 20 is made of any one of SiC, sapphire, and single-crystal silicon. The epitaxial layer 23 is made of a nitride, selected from AlN, GaN, InN, and ternary or quaternary compounds of the above materials. The first modulation superlattice buffer layer 21 is a TiN / SiC modulation superlattice buffer layer; the second modulation superlattice buffer layer 22 is a TiN / Si3N4 modulation superlattice buffer layer.

[0020] The above technical solution utilizes the lattice mismatch of the modulation superlattice layers to form lattice distortion at the interface of the modulation superlattice buffer layer. The interplanar spacing between the modulation superlattice layers approaches the median value due to the stress at the coherent interface, resulting in a periodic alternating stress field of tensile and compressive strain within the modulation superlattice buffer layer, making it difficult for dislocations to cross the interface.

[0021] In the TiN / SiC modulated superlattice buffer layer, TiN's thermal expansion coefficient is much larger than that of SiC, even more than twice that of SiC. TiN modulates the thermal expansion coefficient of SiC, resulting in thermal expansion properties close to the middle value. Simultaneously, TiN has a smaller lattice mismatch with materials such as SiC, GaN, and AlN, reducing thermal mismatch stress and lattice mismatch during growth, preventing crack formation in the epitaxial layer, and promoting the growth of high-quality epitaxial layers.

[0022] However, since the first modulation superlattice buffer layer, as a material for adjusting thermal mismatch, has a large lattice difference with the epitaxial target material and the substrate, a large number of dislocations are generated during the growth process. Therefore, a second supermodulation superlattice buffer layer is also needed to block dislocations, preferably made of TiN / Si3N4. Because Si3N4 is generally amorphous, it can coat the TiN layer. Even if dislocations penetrate into the TiN layer, they cannot move through the amorphous phase of Si3N4, effectively blocking the dislocations and promoting the growth of high-quality epitaxial layers.

[0023] This invention provides an embodiment with the following steps:

[0024] Step 1: Place a SiC substrate in the MOCVD reaction chamber and perform heat treatment on the substrate under a hydrogen atmosphere.

[0025] Step 2: Grow an AlN buffer layer with a thickness of 10-200 nanometers.

[0026] Step 3: Grow a GaN pre-relaxation layer with a thickness of 5-10 nanometers.

[0027] Step 4, pre-circuit the Ti source.

[0028] Step 5: Grow a TiN buffer layer with a thickness of 1-10 nanometers.

[0029] Step 6: Grow a SiC buffer layer with an arc of 1-10 nanometers.

[0030] Step 7: Repeat 1-10 cycles to obtain the TiN / SiC modulated superlattice buffer layer.

[0031] Step 8: Grow a GaN relaxation layer with a thickness of 5-10 nanometers.

[0032] Step 9: Grow a TiN buffer layer with a thickness of 1-10 nanometers.

[0033] Step 10: Grow a Si3N4 buffer layer with a thickness of 1-10 nanometers.

[0034] Step 11: Repeat 1-10 cycles to obtain the TiN / SiC modulated superlattice buffer layer.

[0035] Step 12: Grow a GaN epitaxial layer with a thickness of 1-4 micrometers.

[0036] Step 13: Grow an AlGaN isolation layer, which is an AlGaN layer with a thickness of 1 nm to 10 nm.

[0037] Step 14: n-type AlGaN barrier layer, thickness 10 nm-100 nm, doping range 1 × 10⁻⁶ 18 ~2×10 19 cm -3 .

[0038] Step 15: Grow a GaN cap layer with a thickness of 1-5 nanometers.

[0039] The present invention also provides a comparative example, which differs from the embodiments in that the comparative example omits steps 3 to 11, i.e.:

[0040] Step 1: Place a SiC substrate in the MOCVD reaction chamber and perform heat treatment on the substrate under a hydrogen atmosphere.

[0041] Step 2: Grow an AlN buffer layer with a thickness of 10-200 nanometers.

[0042] Step 3: Directly grow a GaN epitaxial layer with a thickness of 1-4 micrometers.

[0043] Step 4: Grow an AlGaN isolation layer, which is an AlGaN layer with a thickness of 1 nm to 10 nm.

[0044] Step 5: n-type AlGaN barrier layer, thickness 10 nm-100 nm, doping range 1 × 10⁻⁶ 18 ~2×10 19 cm -3 .

[0045] Step 6: Grow a GaN cap layer with a thickness of 1-5 nanometers.

[0046] In the example, compared to the comparative example, the surface roughness of the epitaxial wafer decreased from 0.52 nm to 0.27 nm, and the electron gas density at position two decreased from 8.62 × 10⁻⁶. 12 cm -2 Increased to 1.03×1013 cm -2 The mobility increased from 980 cm 2 / (VS) increased to 1944cm 2 / (VS), surface defect density is 5.2×10 8 cm -2 Reduced to 1.0×10 8 cm -2 .

[0047] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for improving the epitaxiality of dislocation defects, characterized in that, Includes the following steps: Provide substrate; A first modulation superlattice buffer layer is formed on the substrate surface. The first modulation superlattice buffer layer is a TiN / SiC modulation superlattice buffer layer, which is used to adjust thermal mismatch. The TiN / SiC modulation superlattice buffer layer includes a TiN buffer layer and a SiC buffer layer arranged in a cyclic manner. The TiN buffer layer is used to modulate the thermal expansion coefficient of the SiC buffer layer. A second modulation superlattice buffer layer is formed, which is a TiN / Si3N4 modulation superlattice buffer layer used to block dislocations. The TiN / Si3N4 modulation superlattice buffer layer includes a cyclically arranged TiN buffer layer and a Si3N4 buffer layer. The Si3N4 buffer layer is amorphous to form a coating on the TiN buffer layer. Continue to form epitaxial layers.

2. The method according to claim 1, characterized in that, The substrate is made of any one of SiC, sapphire, or single-crystal silicon.

3. The method according to claim 1, characterized in that, The material of the epitaxial layer is a nitride, selected from AlN, GaN, InN, and one of the ternary or quaternary compounds of the above materials.

4. The method according to claim 1, characterized in that, The step of growing the TiN / SiC modulated superlattice buffer layer further includes the following steps: Growth of TiN buffer layers with a thickness of 1 nm to 10 nm; Growing SiC buffer layers with a thickness of 1-10 nanometers; The TiN buffer layer and SiC buffer layer are grown in multiple cycles to obtain a TiN / SiC modulated superlattice buffer layer.

5. The method according to claim 1, characterized in that, The step of growing the TiN / Si3N4 modulated superlattice buffer layer further includes the following steps: Growth of TiN buffer layers with a thickness of 1 nm to 10 nm; Growing Si3N4 buffer layers with a thickness of 1 nm to 10 nm; The TiN buffer layer and Si3N4 buffer layer are grown in multiple cycles to obtain a TiN / Si3N4 modulated superlattice buffer layer.

6. An epitaxial wafer, characterized in that, include: Substrate; A first modulation superlattice buffer layer on the substrate surface, wherein the first modulation superlattice buffer layer is a TiN / SiC modulation superlattice buffer layer, is used to adjust thermal mismatch, wherein the TiN / SiC modulation superlattice buffer layer includes a cyclically arranged TiN buffer layer and a SiC buffer layer, and the TiN buffer layer is used to modulate the thermal expansion coefficient of the SiC buffer layer; A second modulation superlattice buffer layer, which is a TiN / Si3N4 modulation superlattice buffer layer, is applied to the surface of a first modulation superlattice buffer layer to block dislocations. The TiN / Si3N4 modulation superlattice buffer layer comprises cyclically arranged TiN and Si3N4 buffer layers, wherein the Si3N4 buffer layer is amorphous to form a coating over the TiN buffer layer. The epitaxial layer on the surface of the second modulation superlattice buffer layer.

7. The epitaxial wafer according to claim 6, characterized in that, The substrate is made of any one of SiC, sapphire, or single-crystal silicon.

8. The epitaxial wafer according to claim 6, characterized in that, The material of the epitaxial layer is a nitride, selected from AlN, GaN, InN, and one of the ternary or quaternary compounds of the above materials.

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