A novel SM-JTE termination structure of floating junction silicon carbide power device and a preparation method thereof

Abstract

This invention discloses a novel SM-JTE termination structure for a floating junction silicon carbide power device and its fabrication method. The method includes: providing an N+ substrate; fabricating at least one epitaxial structure on one side surface of the N+ substrate; the epitaxial structure includes: a first N- epitaxial layer, and a floating junction p-region and a JTE region formed by ion implantation on the side surface of the first N- epitaxial layer away from the N+ substrate; growing a second N- epitaxial layer on the side surface of the at least one epitaxial structure away from the N+ substrate, and fabricating a surface termination; growing an oxide layer on the side surface of the second N- epitaxial layer away from the substrate; fabricating a first electrode on the side surface of the second N- epitaxial layer away from the substrate, and fabricating a second electrode on the side surface of the N+ substrate away from the epitaxial structure, with the first electrode in contact with the oxide layer. This invention divides the JTE region into multiple SMJTE structures, which can disperse the single-point electric field peak of the JTE region to these SMJTE structures, thereby reducing the electric field peak and giving the power device stronger dose offset resistance.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to a novel SM-JTE (Space Modulated Junction Termination Extension) terminal structure for floating junction silicon carbide power devices and its fabrication method. Background Technology

[0002] To improve the performance of 4H-SiC power devices, "superjunction" structures, represented by floating junctions, have been applied to related power devices. A floating junction structure involves adding one or more discontinuous P+ structures to the epitaxial layer of a traditional 4H-SiC power device, similar to forming a PN junction structure within the epitaxial layer. When the device operates in reverse, the addition of the floating junction structure can change the original triangular or trapezoidal electric field distribution within the epitaxial layer into a double-triangular distribution with the floating junction as the dividing line, thereby increasing the reverse breakdown voltage of the device without changing the thickness and concentration of the epitaxial layer.

[0003] However, the addition of floating junction structures to traditional devices complicates device design, requiring comprehensive consideration of the impact of various factors, including epitaxial layer structure, source region floating junction structure, terminal region floating junction structure, and terminal structure, on device performance. Therefore, there is an urgent need to conduct design optimization research on the terminal structures of floating junction devices in related technologies to ensure the optimal performance of the floating junction structure. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides a novel SM-JTE termination structure for floating junction silicon carbide power devices and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0005] In a first aspect, the present invention provides a method for fabricating a novel SM-JTE termination structure for a floating junction silicon carbide power device, comprising:

[0006] Provide an N+ substrate;

[0007] At least one epitaxial structure is fabricated on one side surface of the N+ substrate; the epitaxial structure includes: a first N- epitaxial layer, and a floating junction p-region and a JTE region formed after ion implantation on the side surface of the first N- epitaxial layer away from the N+ substrate; wherein the floating junction p-region is located in the active region, the JTE region is located in the termination region, and the JTE region includes a plurality of SMJTE structures arranged along a first direction; the first direction is the direction from the active region to the termination region;

[0008] A second N- epitaxial layer is grown on the surface of the at least one epitaxial structure on the side away from the N+ substrate, and a surface termination is formed within the second N- epitaxial layer;

[0009] An oxide layer is grown on the surface of the second N-epitaxial layer on the side away from the substrate;

[0010] A first electrode is formed on the surface of the second N- epitaxial layer away from the substrate, and a second electrode is formed on the surface of the N+ substrate away from the epitaxial structure, wherein the first electrode is in contact with the oxide layer.

[0011] In one embodiment of the present invention, the epitaxial structure is obtained by the following steps:

[0012] A first N- epitaxial layer is grown on one side surface of the N+ substrate using a chemical vapor deposition (CVD) process.

[0013] Active region Al ion implantation is performed on the surface of the first N- epitaxial layer away from the N+ substrate to form a floating junction p region;

[0014] Al ion implantation is performed on the side of the first N- epitaxial layer away from the N+ substrate to form a JTE region.

[0015] In one embodiment of the present invention, in a first direction, the width of the plurality of SMJTE structures gradually decreases in the first direction, and the spacing between two adjacent SMJTE structures gradually increases.

[0016] In one embodiment of the present invention, in a first direction, the width of the SMJTE structure is 1 to 100 μm, and the spacing between two adjacent SMJTE structures is 1 to 10 μm.

[0017] In one embodiment of the present invention, the doping concentration of the JTE region is 1×10⁻⁶. 16 ~1×10 18 cm -3 .

[0018] In one embodiment of the present invention, the thickness of the SMJTE structure is 0.5 to 2 μm along the direction perpendicular to the plane of the N+ substrate.

[0019] In one embodiment of the present invention, the doping concentration of the floating junction p-region is 1×10⁻⁶. 16 ~1×10 20 cm -3 .

[0020] In one embodiment of the present invention, the floating knot p region includes a plurality of floating knots arranged along a first direction;

[0021] In the first direction, the width of the floating knot is 1 to 5 μm and the distance between two adjacent floating knots is 1 to 5 μm.

[0022] In one embodiment of the present invention, the doping concentration of the N+ substrate is 1×10⁻⁶. 18 ~1×10 20 cm -3 Along a direction perpendicular to the plane containing the N+ substrate, the thickness of the N+ substrate is 50–400 μm.

[0023] Secondly, the present invention also provides a novel SM-JTE terminal structure for a floating junction silicon carbide power device, which is prepared by the method for preparing the novel SM-JTE terminal structure for a floating junction silicon carbide power device described in the first aspect above.

[0024] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0025] This invention provides a novel SM-JTE termination structure for a floating junction silicon carbide power device and its fabrication method. Since a JTE region is formed in the termination region of the power device, and the JTE region contains multiple SMJTE structures arranged along a first direction, this method of dividing the JTE region into multiple SMJTE structures can disperse the single-point electric field peak of the JTE region to these SMJTE structures, thereby reducing the electric field peak. Furthermore, since the SMJTE has reduced sensitivity to dose and a larger dose window, the power device can have stronger dose offset resistance characteristics.

[0026] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0027] Figure 1 This is a flowchart of a method for fabricating the SM-JTE terminal structure of a novel floating junction silicon carbide power device provided in an embodiment of the present invention;

[0028] Figure 2 This is a schematic diagram of a method for fabricating the SM-JTE terminal structure of a novel floating junction silicon carbide power device provided in an embodiment of the present invention;

[0029] Figure 3 This is another schematic diagram of the method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device provided in this embodiment of the invention;

[0030] Figure 4 This is another schematic diagram of the method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device provided in this embodiment of the invention;

[0031] Figure 5This is another schematic diagram of the method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device provided in this embodiment of the invention;

[0032] Figure 6 This is another schematic diagram of the fabrication method of the SM-JTE terminal structure of the novel floating junction silicon carbide power device provided in the embodiments of the present invention. Detailed Implementation

[0033] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0034] Figure 1 This is a flowchart of a method for fabricating the SM-JTE terminal structure of a novel floating junction silicon carbide power device provided in an embodiment of the present invention. Figure 2-6 This is a schematic diagram of a method for fabricating the SM-JTE terminal structure of a novel floating junction silicon carbide power device provided in this embodiment of the invention. Please refer to... Figure 1-6 This invention provides a method for fabricating a novel SM-JTE terminal structure for a floating junction silicon carbide power device, comprising:

[0035] S1, Provide an N+ substrate 1;

[0036] S2. At least one epitaxial structure 2 is fabricated on one side surface of the N+ substrate 1; the epitaxial structure 2 includes: a first N- epitaxial layer 201, and a floating junction p-region 202 and a JTE region 203 formed after ion implantation on the side surface of the first N- epitaxial layer 201 away from the N+ substrate 1; wherein, the floating junction p-region 202 is located in the active region, the JTE region 203 is located in the terminal region, and the JTE region 203 includes a plurality of SMJTE structures arranged along a first direction; the first direction is the direction from the active region to the terminal region;

[0037] S3. A second N-epi-epi-layer 3 is grown on the surface of at least one epitaxial structure 2 on the side away from the N+ substrate 1, and a surface terminal is fabricated in the second N-epi-epi-layer 3.

[0038] S4. An oxide layer 5 is grown on the surface of the second N-epitaxial layer 3 on the side away from the substrate;

[0039] S5. A first electrode 4 is formed on the surface of the second N- epitaxial layer 3 away from the substrate, and a second electrode 6 is formed on the surface of the N+ substrate 1 away from the epitaxial structure 2. The first electrode 4 is in contact with the oxide layer 5.

[0040] Specifically, in the method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device provided in this embodiment of the invention, the following steps are first provided: Figure 2 The N+ substrate shown is used, and an epitaxial structure 2 is fabricated on one side surface of the N+ substrate 1. Please refer to [link to relevant documentation]. Figure 3The epitaxial structure 2 may include: a first N-epiaxial layer 201, a floating junction p-region 202, and a JTE region 203; wherein, the floating junction p-region 202 and the JTE region 203 are formed by ion implantation on the surface of the first N-epiaxial layer 201 away from the N+ substrate 1, the floating junction p-region 202 is located in the active region, the JTE region is located in the terminal region, and the JTE region 203 includes a plurality of SMJTE structures arranged along a first direction, the first direction being the direction from the active region to the terminal region.

[0041] Optionally, in step S2 above, the epitaxial structure 22 located above the N+ substrate 11 can be a single layer or multiple layers, and this application does not limit this.

[0042] Furthermore, such as Figure 4-6 As shown, after the epitaxial structure 2 is fabricated, a second N- epitaxial layer 3 is grown on the surface of at least one epitaxial structure 2 away from the N+ substrate 1, and a surface terminal is fabricated within the second N- epitaxial layer 3. Then, an oxide layer 5 is grown on the surface of the second N- epitaxial layer 3 away from the substrate using a thermal oxidation process, with an oxidation temperature of 1100℃~1400℃. Finally, metal layers are deposited on the surface of the second N- epitaxial layer 3 away from the substrate and on the surface of the N+ substrate 1 away from the epitaxial structure 2, and a first electrode 4 located on the upper surface of the second N- epitaxial layer 3 and a second electrode 6 located on the lower surface of the N+ substrate 1 are formed by an annealing process. For example, the metal deposited in step S5 can be Ti, Ni, etc., and the annealing temperature is 400℃~1000℃.

[0043] In this embodiment, the first electrode 4 can be an ohmic contact or a Schottky contact, and the second electrode 6 can be an ohmic contact.

[0044] It should be understood that in the terminal structure provided by the present invention, the terminal region of the power device forms a JTE region 203, and the JTE region 203 includes a plurality of SMJTE structures arranged along the first direction. This method of dividing the JTE region 203 into a plurality of SMJTE structures can disperse the electric field peak of a single point of the JTE region 203 to these SMJTE structures, thereby reducing the electric field peak. Furthermore, since the SMJTE is less sensitive to dose and the dose window is larger, the power device can have stronger anti-dose shift characteristics.

[0045] Please continue reading Figure 3 The epitaxial structure 2 is prepared by the following steps:

[0046] A first N- epitaxial layer 201 is grown on one side surface of an N+ substrate 1 using chemical vapor deposition (CVD) process.

[0047] Active region Al ion implantation is performed on the surface of the first N- epitaxial layer 201 away from the N+ substrate 1 to form a floating junction p region 202;

[0048] Al ion implantation is performed on the side of the first N-epitaxial layer 201 away from the N+ substrate 1 to form the JTE region 203.

[0049] Specifically, in the process of fabricating epitaxial structure 2, firstly, a first N- epitaxial layer 201 is grown on one side of the N+ substrate 1 using CVD (Chemical Vapor Deposition) technology at a growth temperature of 1600℃~1900℃; then, active region ion implantation is performed on the side of the first N- epitaxial layer 201 away from the N+ substrate 1, with Al ions implanted and an implantation energy of 10keV~800keV, forming a floating junction p region 202; further, terminal region ion implantation is performed on the side of the first N- epitaxial layer 201 away from the N+ substrate 1, with Al ions implanted and an implantation energy of 10keV~800keV, forming multiple SMJTE region 203 structures, resulting in JTE region 203.

[0050] Obviously, by repeating the above steps, an epitaxial structure 2 of arbitrary layer can be formed on the upper surface of the N+ substrate 1; in addition, the fabrication process of the second N-epitaxial layer 3 located on the side of the epitaxial structure 2 away from the N+ substrate 1 is the same as that of the first N-epitaxial layer 201, so it will not be described again here.

[0051] Optionally, in the first direction, the width of the multiple SMJTE structures gradually decreases and the spacing between two adjacent SMJTE structures gradually increases.

[0052] For the termination structure of power devices, the dose required on the outer side is typically smaller than that on the inner side. Since the SMJTE structure is achieved through a single ion implantation, the width of multiple SMJTE structures decreases sequentially along the direction from the active region to the termination region. For example, the width of the SMJTE structure in the first direction is 1–100 μm.

[0053] It should be understood that during the design of the SMJTE structure, the width of each SMJTE and the sum of its spacing with adjacent SMJTEs must remain consistent. Since the charge required by the SMJTE structure decreases as the distance between the SMJTE structure and the main junction increases, the width of the SMJTE gradually decreases and the spacing between adjacent SMJTEs gradually increases in the direction from the active region to the terminal region. Specifically, in the first direction, the spacing between two adjacent SMJTE structures is 1–10 μm.

[0054] Optionally, in this embodiment, the doping concentration of JTE region 203 is 1×10⁻⁶. 16~1×10 18 cm -3 ;

[0055] Along the direction perpendicular to the plane of N+ substrate 1, the thickness of the SMJTE structure is 0.5–2 μm.

[0056] Optionally, the doping concentration of the floating junction p-region 202 is 1×10⁻⁶. 16 ~1×10 20 cm -3 .

[0057] In this embodiment, the floating knot p region 202 includes a plurality of floating knots arranged along a first direction; wherein, in the first direction, the width of the floating knot is 1 to 5 μm and the spacing between two adjacent floating knots is 1 to 5 μm.

[0058] Specifically, the floating junction p-region 202 includes a plurality of floating junctions arranged along a first direction, with a spacing of 1 to 5 μm between adjacent floating junctions. In the first direction, the width of each floating junction is 1 to 5 μm, and in the direction perpendicular to the plane of the N+ substrate 1, the thickness of each floating junction is 0.5 to 2.0 μm. In this embodiment, the introduction of floating junctions can uniformly distribute the electric field in the active region, thereby improving the breakdown voltage of the device.

[0059] It should be noted that the shape of each floating knot in the floating knot p area can be rectangular, strip-shaped or polygonal, and this application does not limit it.

[0060] Optionally, the doping concentration of the N+ substrate 1 is 1×10⁻⁶. 18 ~1×10 20 cm -3 Along the direction perpendicular to the plane where the N+ substrate 1 is located, the thickness of the N+ substrate 1 is 50 to 400 μm.

[0061] like Figure 6 As shown, this embodiment of the invention also provides a novel SM-JTE terminal structure for a floating junction silicon carbide power device, which is prepared by the above-described method for preparing the novel SM-JTE terminal structure for a floating junction silicon carbide power device.

[0062] As can be seen from the above embodiments, the beneficial effects of the present invention are as follows:

[0063] This invention provides a novel SM-JTE termination structure for a floating junction silicon carbide power device and its fabrication method. Since a JTE region is formed in the termination region of the power device, and the JTE region contains multiple SMJTE structures arranged along a first direction, this method of dividing the JTE region into multiple SMJTE structures can disperse the single-point electric field peak of the JTE region to these SMJTE structures, thereby reducing the electric field peak. Furthermore, since the SMJTE has reduced sensitivity to dose and a larger dose window, the power device can have stronger dose offset resistance characteristics.

[0064] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0065] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0066] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0067] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0068] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, disclosure, and appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0069] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method for fabricating a novel SM-JTE terminal structure for a floating junction silicon carbide power device, characterized in that, include: Provide an N+ substrate; At least one epitaxial structure is formed on one side surface of the N+ substrate; The epitaxial structure includes: a first N-epiaxial layer, and a floating junction p-region and a JTE region formed after ion implantation on the surface of the first N-epiaxial layer away from the N+ substrate; wherein the floating junction p-region is located in the active region, the JTE region is located in the termination region, and the JTE region includes a plurality of SMJTE structures arranged along a first direction; the first direction is the direction from the active region to the termination region. A second N- epitaxial layer is grown on the surface of the at least one epitaxial structure on the side away from the N+ substrate, and a surface termination is formed within the second N- epitaxial layer; An oxide layer is grown on the surface of the second N-epitaxial layer on the side away from the substrate; A first electrode is formed on the surface of the second N- epitaxial layer away from the substrate, and a second electrode is formed on the surface of the N+ substrate away from the epitaxial structure, wherein the first electrode is in contact with the oxide layer; In the first direction, the width of the plurality of SMJTE structures gradually decreases, the spacing between two adjacent SMJTE structures gradually increases, and the width of each SMJTE structure itself and the sum of its spacing with the adjacent SMJTE structures must be consistent.

2. The method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device according to claim 1, characterized in that, The epitaxial structure is prepared using the following steps: A first N- epitaxial layer is grown on one side surface of the N+ substrate using a chemical vapor deposition (CVD) process. Active region Al ion implantation is performed on the surface of the first N- epitaxial layer away from the N+ substrate to form a floating junction p region; Al ion implantation is performed on the side of the first N- epitaxial layer away from the N+ substrate to form a JTE region.

3. The method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device according to claim 1, characterized in that, In the first direction, the width of the SMJTE structure is 1~100μm, and the spacing between two adjacent SMJTE structures is 1~10μm.

4. The method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device according to claim 3, characterized in that, The doping concentration of the JTE region is 1×10⁻⁶. 16 ~1×10 18 cm -3 .

5. The method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device according to claim 4, characterized in that, The thickness of the SMJTE structure is 0.5~2μm along the direction perpendicular to the plane of the N+ substrate.

6. The method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device according to claim 1, characterized in that, The doping concentration of the floating-junction p-region is 1×10⁻⁶. 16 ~1×10 20 cm -3 .

7. The method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device according to claim 6, characterized in that, The floating knot p region includes multiple floating knots arranged along a first direction; In the first direction, the width of the floating knot is 1~5μm and the distance between two adjacent floating knots is 1~5μm.

8. The method for fabricating the SM-JTE terminal structure of the novel floating junction silicon carbide power device according to claim 1, characterized in that, The doping concentration of the N+ substrate is 1×10⁻⁶. 18 ~1×10 20 cm -3 The thickness of the N+ substrate is 50~400μm along a direction perpendicular to the plane containing the N+ substrate.

9. A novel SM-JTE termination structure for a floating junction silicon carbide power device, characterized in that, It is prepared by the SM-JTE terminal structure fabrication method of the novel floating junction silicon carbide power device according to any one of claims 1-8.

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