Distance measuring image sensor and manufacturing method thereof

Abstract

The ranging image sensor includes a semiconductor layer and an electrode layer. The semiconductor layer and the electrode layer form a plurality of pixels. Each of the plurality of pixels has an avalanche multiplication region, a charge distribution region, a first charge transfer region, and a second charge transfer region in the semiconductor layer. Each of the plurality of pixels has a photogate electrode, a first transfer gate electrode, and a second transfer gate electrode in the electrode layer. The avalanche multiplication region is continuous across the plurality of pixels or reaches a trench formed in the semiconductor layer to separate the plurality of pixels from each other.

Description

Technical Field

[0001] The present invention relates to a ranging image sensor and a manufacturing method thereof. Background Art

[0002] As a range-finding image sensor that uses an indirect TOF (Time of Flight) method to acquire a distance image of an object, a range-finding image sensor is known that includes a semiconductor layer having a photosensitive region, and a photogate electrode and a transfer gate electrode provided for each pixel on the semiconductor layer (see, for example, Patent Documents 1 and 2). With such a range-finding image sensor, the charge generated in the photosensitive region can be transferred at high speed by incident light.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2011-133464

[0006] Patent Document 2: Japanese Patent Application Laid-Open No. 2013-206903 Summary of the Invention

[0007] Technical problem to be solved by the invention

[0008] In the above-described ranging image sensor, for example, in order to increase the measurable distance, it is sometimes required to increase the light receiving sensitivity.

[0009] An object of the present invention is to provide a ranging image sensor capable of uniformly improving light receiving sensitivity in a plurality of pixels and a method for manufacturing the same.

[0010] Technical solutions to technical problems

[0011] One aspect of the present invention provides a ranging image sensor comprising: a semiconductor layer having a first surface on a first side and a second surface on a second side opposite to the first side, for constituting a plurality of pixels arranged along the first surface; and an electrode layer provided on the first surface for constituting a plurality of pixels, each of the plurality of pixels comprising: an avalanche multiplication region comprising a first multiplication region of a first conductivity type formed in the semiconductor layer, and a second multiplication region of a second conductivity type formed in the semiconductor layer on a first side of the first multiplication region; a charge distribution region of the second conductivity type formed in the semiconductor layer on a first side of the second multiplication region and connected to the second multiplication region; and a first charge transfer region of the second conductivity type formed in the semiconductor layer. A first side of the second multiplication region is connected to the charge distribution region; a second charge transfer region of the second conductivity type is formed in the semiconductor layer on the first side of the second multiplication region and is connected to the charge distribution region; a photogate electrode is formed in the electrode layer on the first side of the charge distribution region; a first transfer gate electrode is formed in the electrode layer on the first side of the charge distribution region in a manner that is located on the side of the first charge transfer region compared to the photogate electrode; and a second transfer gate electrode is formed in the electrode layer on the first side of the charge distribution region in a manner that is located on the side of the second charge transfer region compared to the photogate electrode, the avalanche multiplication regions are connected throughout a plurality of pixels, or reach a groove formed in the semiconductor layer in a manner that separates each pixel of the plurality of pixels from each other.

[0012] In this ranging image sensor, an avalanche multiplication region formed in the semiconductor layer extends across multiple pixels, either continuously or reaching trenches formed in the semiconductor layer to separate the pixels from one another. This reduces variations in light sensitivity between the pixels and within each pixel, while achieving higher sensitivity in each of the pixels. Consequently, this ranging image sensor achieves uniformly improved light sensitivity across multiple pixels.

[0013] In the ranging image sensor according to one aspect of the present invention, the groove may be formed on the first surface, and the bottom surface of the groove may be located on the second side relative to the avalanche multiplication region. This can suppress the occurrence of crosstalk between adjacent pixels.

[0014] In the ranging image sensor according to one aspect of the present invention, the groove may be formed on the first surface, with the bottom surface of the groove located within the avalanche multiplication region. This shortens the time required to form the groove and substantially suppresses crosstalk between adjacent pixels.

[0015] In a ranging image sensor according to one aspect of the present invention, each of the plurality of pixels may further include: a well region of the first conductivity type formed in the semiconductor layer on a first side of the second multiplication region, for forming a readout circuit electrically connected to at least one of the first charge transfer region and the second charge transfer region; and a barrier region of the second conductivity type formed in the semiconductor layer between the second multiplication region and the well region. Thus, even if a depletion layer formed in the avalanche multiplication region expands toward the well region of the first conductivity type by applying a high voltage to the avalanche multiplication region, the barrier region of the second conductivity type can suppress the depletion layer from reaching the well region of the first conductivity type. In other words, current flow between the avalanche multiplication region and the well region due to the depletion layer reaching the well region can be suppressed.

[0016] In the ranging image sensor according to one aspect of the present invention, the barrier region may include a well region when viewed in the thickness direction of the semiconductor layer. This can suppress current flow between the avalanche multiplication region and the well region due to the depletion layer reaching the well region.

[0017] In the ranging image sensor according to one aspect of the present invention, each of the plurality of pixels may further include a sink region of the second conductivity type, the sink region of the second conductivity type being formed in the semiconductor layer on the first side of the barrier region and connected to the barrier region. Thus, since charges accumulated around the second conductivity type barrier region are introduced into the sink region of the second conductivity type, the charges accumulated around the barrier region can be suppressed from becoming parasitic charges and generating noise.

[0018] In the ranging image sensor according to one aspect of the present invention, the sink region may be connected to the second charge transfer region. This allows the charge introduced into the sink region to be discharged to the second charge transfer region when the second charge transfer region is used as an unnecessary charge discharge region.

[0019] The ranging image sensor according to one aspect of the present invention may further include a wiring layer provided on the first surface so as to cover the electrode layer and electrically connected to each of the plurality of pixels. Thus, electrical signals can be input and output to each of the plurality of pixels via the wiring layer.

[0020] One aspect of the present invention provides a method for manufacturing a ranging image sensor, which includes: a first step of forming a semiconductor layer by forming an avalanche multiplication region, a charge distribution region, a first charge transfer region, and a second charge transfer region on a semiconductor substrate; and a second step of forming an electrode layer by forming a photogate electrode, a first transfer gate electrode, and a second transfer gate electrode on a first surface of the semiconductor layer after the first step. In the first step, the avalanche multiplication region is formed on the semiconductor substrate in a manner connected across multiple pixels.

[0021] In this method for manufacturing a ranging image sensor, an avalanche multiplication region is formed on a semiconductor substrate in a manner that is continuous across multiple pixels. This allows the resulting ranging image sensor to achieve high sensitivity in each of the multiple pixels while suppressing variations in light sensitivity between the pixels and within each pixel. Consequently, this method for manufacturing a ranging image sensor achieves uniformly improved light sensitivity across multiple pixels.

[0022] In the method for manufacturing a ranging image sensor according to one aspect of the present invention, in the first step, after at least the avalanche multiplication region is formed on the semiconductor substrate, a trench may be formed on the first surface. This allows for a structure in which the avalanche multiplication region reaches the trench to be easily and reliably obtained.

[0023] The method for manufacturing a ranging image sensor according to one aspect of the present invention may further include a fifth step of forming a wiring layer on the first surface to cover the electrode layer after the second step, and electrically connecting the wiring layer to each of the plurality of pixels. In this manner, the manufactured ranging image sensor can input and output electrical signals to each of the plurality of pixels via the wiring layer.

[0024] Effects of the Invention

[0025] According to the present invention, it is possible to provide a ranging image sensor capable of uniformly improving light receiving sensitivity in a plurality of pixels and a method for manufacturing the same. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 FIG. 1 is a structural diagram of a light detection device including the distance measuring image sensor according to the first embodiment.

[0027] Figure 2 This is a top view (plan view) of a pixel portion of the distance-finding image sensor according to the first embodiment.

[0028] Figure 3 It is along Figure 2 The cross-sectional view along line III-III is shown.

[0029] Figure 4 It is along Figure 2 The cross-sectional view along line IV-IV is shown.

[0030] Figure 5 It is a cross-sectional view for explaining the method of manufacturing the ranging image sensor according to the first embodiment.

[0031] Figure 6It is a cross-sectional view for explaining the method of manufacturing the ranging image sensor according to the first embodiment.

[0032] Figure 7 This is a plan view of a portion of a distance-finding image sensor according to a second embodiment.

[0033] Figure 8 It is along Figure 7 A cross-sectional view along line VIII-VIII is shown.

[0034] Figure 9 This is a plan view of a portion of a distance-finding image sensor according to a third embodiment.

[0035] Figure 10 It is along Figure 9 The cross-sectional view taken along line X-X is shown.

[0036] Figure 11 It is a plan view of a portion of a distance-finding image sensor according to a fourth embodiment.

[0037] Figure 12 It is along Figure 11 The cross-sectional view along the line XII-XII is shown.

[0038] Figure 13 It is along Figure 11 A cross-sectional view taken along line XIII-XIII is shown.

[0039] Figure 14 It is a plan view of a portion of a distance-finding image sensor according to a fifth embodiment.

[0040] Figure 15 It is along Figure 14 A cross-sectional view taken along line XV-XV is shown.

[0041] Figure 16 is a cross-sectional view of a distance-finding image sensor according to a modified example.

[0042] Figure 17 is a cross-sectional view of a distance-finding image sensor according to a modified example.

[0043] Figure 18 is a cross-sectional view of a distance-finding image sensor according to a modified example.

[0044] Figure 19 is a cross-sectional view of a distance-finding image sensor according to a modified example.

[0045] Figure 20 is a cross-sectional view of a distance-finding image sensor according to a modified example.

[0046] Figure 21 is a cross-sectional view of a distance-finding image sensor according to a modified example.

[0047] Figure 22 is a cross-sectional view of a distance-finding image sensor according to a modified example. DETAILED DESCRIPTION

[0048] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and repeated descriptions are omitted.

[0049] [First embodiment]

[0050] [Structure of Photodetection Device]

[0051] like Figure 1 As shown, the light detection device 1 includes a light source 2, a distance measuring image sensor 10A, a signal processing unit 3, a control unit 4, and a display unit 5. The light detection device 1 is a device that acquires a distance image (an image containing information about the distance d to the object OJ) of the object OJ using an indirect TOF method.

[0052] The light source 2 emits (emit) pulsed light L. The light source 2 is composed of, for example, an infrared LED. The pulsed light L is, for example, near-infrared light, and the frequency of the pulsed light L is, for example, 10 kHz or higher. The ranging image sensor 10A detects the pulsed light L emitted from the light source 2 and reflected by the object OJ. The ranging image sensor 10A is constructed by monolithically forming a pixel unit 11 and a CMOS readout circuit unit 12 on a semiconductor substrate (e.g., a silicon substrate). The ranging image sensor 10A is mounted on the signal processing unit 3.

[0053] The signal processing unit 3 controls the pixel unit 11 and CMOS readout circuit unit 12 of the ranging image sensor 10A. The signal processing unit 3 performs predetermined processing on the signal output from the ranging image sensor 10A to generate a detection signal. The control unit 4 controls the light source 2 and the signal processing unit 3. The control unit 4 generates a distance image of the object OJ based on the detection signal output from the signal processing unit 3. The display unit 5 displays the distance image of the object OJ generated by the control unit 4.

[0054] [Structure of the ranging image sensor]

[0055] like Figure 2 、 Figure 3 and Figure 4As shown, the ranging image sensor 10A includes a semiconductor layer 20 and an electrode layer 40 in the pixel portion 11. The semiconductor layer 20 has a first surface 20a and a second surface 20b. The first surface 20a is a surface on one side in the thickness direction of the semiconductor layer 20. The second surface 20b is a surface on the other side in the thickness direction of the semiconductor layer 20. The electrode layer 40 is provided on the first surface 20a of the semiconductor layer 20. The semiconductor layer 20 and the electrode layer 40 constitute a plurality of pixels 11a arranged along the first surface 20a. In the ranging image sensor 10A, the plurality of pixels 11a are arranged two-dimensionally along the first surface 20a. Hereinafter, the thickness direction of the semiconductor layer 20 is referred to as the Z direction, a direction perpendicular to the Z direction is referred to as the X direction, and a direction perpendicular to both the Z direction and the X direction is referred to as the Y direction. In addition, one side in the Z direction is referred to as the first side, and the other side in the Z direction (the opposite side to the first side) is referred to as the second side. In addition, in Figure 2 In the figure, the wiring layer 60 described later is omitted.

[0056] Each pixel 11a includes a semiconductor region 21, an avalanche multiplication region 22, a charge distribution region 23, a pair of first charge transfer regions 24 and 25, a pair of second charge transfer regions 26 and 27, multiple charge blocking regions 28, a well region 31, a LOCOS (Local Oxidation of Silicon) region 33, a barrier region 34, and a pair of sink regions 35 in a semiconductor layer 20. Each region 21 to 28 and 31 to 35 is formed by subjecting a semiconductor substrate (e.g., a silicon substrate) to various processes (e.g., etching, film formation, impurity implantation, etc.).

[0057] The semiconductor region 21 is a p-type (first conductivity type) region and is provided along the second surface 20b of the semiconductor layer 20. The semiconductor region 21 functions as a light absorption region (photoelectric conversion region). As an example, the semiconductor region 21 has a 1×10 15 cm －3 In the p-type region with a carrier concentration of 10 μm or less, the thickness of the semiconductor region 21 is about 10 μm. In addition, the avalanche multiplication region 22 and the like also function as a light absorption region (photoelectric conversion region).

[0058] The avalanche multiplication region 22 includes a first multiplication region 22a and a second multiplication region 22b. The first multiplication region 22a is a p-type region formed on the first side of the semiconductor region 21 in the semiconductor layer 20. As an example, the first multiplication region 22a has a 1×10 16 cm －3The first multiplication region 22a is a p-type region with a carrier concentration of 1 μm or more. The second multiplication region 22b is an n-type (second conductivity type) region formed on the first side of the first multiplication region 22a in the semiconductor layer 20. As an example, the second multiplication region 22b has a thickness of 1×10 16 cm －3 In the n-type region with a carrier concentration above 1 μm, the thickness of the second multiplication region 22 b is about 1 μm. The first multiplication region 22 a and the second multiplication region 22 b form a pn junction.

[0059] The charge sharing region 23 is an n-type region formed on the first side of the second multiplication region 22b in the semiconductor layer 20. As an example, the charge sharing region 23 has a 5×10 15 ~1×10 16 cm －3 In the n-type region with a carrier concentration of , the thickness of the charge sharing region 23 is about 1 μm.

[0060] Each first charge transfer region 24, 25 is an n-type region and is formed on the first side of the second multiplication region 22b in the semiconductor layer 20. Each first charge transfer region 24, 25 is connected to the charge sharing region 23. A pair of first charge transfer regions 24, 25 face each other in the X direction, sandwiching the first side portion of the charge sharing region 23. As an example, each first charge transfer region 24, 25 has a 1×10 18 cm －3 The thickness of each first charge transfer region 24, 25 is approximately 0.2 μm. Furthermore, the second side portion of the charge distribution region 23 extends between each first charge transfer region 24, 25 and the second multiplication region 22b. In this embodiment, each first charge transfer region 24, 25 functions as a charge accumulation region.

[0061] Each second charge transfer region 26, 27 is an n-type region and is formed on the first side of the second multiplication region 22b in the semiconductor layer 20. Each second charge transfer region 26, 27 is connected to the charge sharing region 23. A pair of second charge transfer regions 26, 27 face each other in the Y direction, sandwiching the first side portion of the charge sharing region 23. As an example, each second charge transfer region 26, 27 has a 1×10 18 cm －3 In the n-type region with a carrier concentration above 0.1 μm, the thickness of each second charge transfer region 26, 27 is approximately 0.2 μm. Furthermore, the second side portion of the charge distribution region 23 extends between each second charge transfer region 26, 27 and the second multiplication region 22b. In this embodiment, each second charge transfer region 26, 27 functions as a charge discharge region.

[0062] Each charge blocking region 28 is a p-type region formed between each first charge transfer region 24, 25 and the charge sharing region 23 (the portion on the second side of the charge sharing region 23) in the semiconductor layer 20. As an example, each charge blocking region 28 has a 1×10 17 ~1×10 18 cm －3 The thickness of each charge blocking region 28 is about 0.2 μm.

[0063] The well region 31 is a p-type region formed on the first side of the second multiplication region 22b in the semiconductor layer 20. When viewed from the Z direction, the well region 31 surrounds the charge distribution region 23. The LOCOS region 33 is formed on the first side of the well region 31 in the semiconductor layer 20. The LOCOS region 33 is connected to the well region 31. The well region 31 and the LOCOS region 33 together constitute a plurality of readout circuits (e.g., source follower amplifiers, reset transistors, etc.). Each readout circuit is electrically connected to each of the first charge transfer regions 24 and 25. As an example, the well region 31 has a 1×10 16 ~5×10 17 cm －3 The well region 31 is a p-type region with a carrier concentration of about 1 μm. Furthermore, as a structure for electrically isolating the pixel portion and the readout circuit portion, STI (Shallow Trench Isolation) may be used instead of LOCOS region 33, or only well region 31 may be used.

[0064] The barrier region 34 is an n-type region formed in the semiconductor layer 20 between the second multiplication region 22b and the well region 31. When viewed from the Z direction, the barrier region 34 includes the well region 31. That is, when viewed from the Z direction, the well region 31 is located within the barrier region 34. The barrier region 34 surrounds the charge sharing region 23. The concentration of n-type impurities in the barrier region 34 is higher than the concentration of n-type impurities in the second multiplication region 22b. As an example, the barrier region 34 is an n-type region having a carrier concentration ranging from the carrier concentration of the second multiplication region 22b to approximately twice the carrier concentration of the second multiplication region 22b, and the thickness of the barrier region 34 is approximately 1 μm.

[0065] Each sink region 35 is an n-type region formed on a first side of the barrier region 34 in the semiconductor layer 20. The second end of each sink region 35 is connected to the barrier region 34. The first end of each sink region 35 is connected to each of the second charge transfer regions 26 and 27. The concentration of n-type impurities in each of the second charge transfer regions 26 and 27 is higher than the concentration of n-type impurities in each sink region 35. The concentration of n-type impurities in each sink region 35 is higher than the concentration of n-type impurities in the barrier region 34 and the concentration of p-type impurities in the well region 31. As an example, each sink region 35 is an n-type region having a carrier concentration greater than that of the well region 31. The thickness of each sink region 35 depends on the distance between each of the second charge transfer regions 26 and 27 and the barrier region 34.

[0066] Each pixel 11a includes a photogate electrode (photogate electrode) 41, a pair of first transfer gate electrodes (transfer gate electrodes) 42 and 43, and a pair of second transfer gate electrodes 44 and 45 in the electrode layer 40. Each gate electrode 41 to 45 is formed on the first surface 20a of the semiconductor layer 20 via an insulating film 46. The insulating film 46 is, for example, a silicon nitride film or a silicon oxide film.

[0067] The photogate electrode 41 is formed in the electrode layer 40 on the first side of the charge sharing region 23. The photogate electrode 41 is formed of a conductive and light-transmitting material (e.g., polysilicon). As an example, when viewed from the Z direction, the photogate electrode 41 has a rectangular shape having two sides that face each other in the X direction and two sides that face each other in the Y direction.

[0068] The first transfer gate electrode 42 is formed in the electrode layer 40 on the first side of the charge sharing region 23 so as to be located on the first charge transfer region 24 side relative to the photo gate electrode 41. The first transfer gate electrode 43 is formed in the electrode layer 40 on the first side of the charge sharing region 23 so as to be located on the first charge transfer region 25 side relative to the photo gate electrode 41. Each of the first transfer gate electrodes 42 and 43 is formed of a conductive and light-transmitting material (e.g., polysilicon). As an example, when viewed in the Z direction, each of the first transfer gate electrodes 42 and 43 has a rectangular shape having two sides opposing each other in the X direction and two sides opposing each other in the Y direction.

[0069] The second transfer gate electrode 44 is formed on the first side of the charge sharing region 23 in the electrode layer 40 so as to be located on the second charge transfer region 26 side relative to the photo gate electrode 41. The second transfer gate electrode 45 is formed on the first side of the charge sharing region 23 in the electrode layer 40 so as to be located on the second charge transfer region 27 side relative to the photo gate electrode 41. Each of the second transfer gate electrodes 44 and 45 is formed of a conductive and light-transmitting material (e.g., polycrystalline silicon). As an example, when viewed in the Z direction, each of the second transfer gate electrodes 44 and 45 has a rectangular shape having two sides opposing each other in the X direction and two sides opposing each other in the Y direction.

[0070] The ranging image sensor 10A further includes an opposing electrode 50 and a wiring layer 60 in the pixel portion 11. The opposing electrode 50 is provided on the second surface 20b of the semiconductor layer 20. When viewed from the Z direction, the opposing electrode 50 includes a plurality of pixels 11a. The opposing electrode 50 is opposed to the electrode layer 40 in the Z direction. The opposing electrode 50 is formed of, for example, a metal material. The wiring layer 60 is provided on the first surface 20a of the semiconductor layer 20 so as to cover the electrode layer 40. The wiring layer 60 is connected to each pixel 11a and the CMOS readout circuit portion 12 (see Figure 1 A light incident opening 60a is formed in a portion of the wiring layer 60 that faces the photogate electrode 41 of each pixel 11a.

[0071] A trench 29 is formed in the semiconductor layer 20 to separate the pixels 11a from each other. The trench 29 is formed on the first surface 20a of the semiconductor layer 20. The bottom surface 29a of the trench 29 is located on the second side relative to the avalanche multiplying region 22. In other words, the trench 29 completely separates the avalanche multiplying region 22. An insulating material 47, such as silicon oxide, is disposed within the trench 29. Alternatively, a metal material, such as tungsten, or polysilicon may be disposed within the trench 29 in place of the insulating material 47.

[0072] In each pixel 11a, the avalanche multiplication region 22 reaches the trench 29. The avalanche multiplication region 22 is a region that causes avalanche multiplication. That is, in each pixel 11a, when a reverse bias voltage of a predetermined value is applied, 3×10 5 ~4×10 5 The avalanche multiplication region 22 with an electric field strength of 100 V / cm extends to the entire region surrounded by the trench 29 .

[0073] An example of the operation of the distance measuring image sensor 10A configured as described above is as follows. In each pixel 11a of the distance measuring image sensor 10A, a negative voltage (e.g., -50V) is applied to the counter electrode 50 (i.e., a reverse bias is applied to the pn junction formed in the avalanche multiplication region 22) with the potential of the photogate electrode 41 as a reference, and a 3×10 5 ~4×105 In this state, if the pulse light L enters the semiconductor layer 20 through the light incident opening 60 a and the photogate electrode 41 , the electrons generated by the absorption of the pulse light L are multiplied in the avalanche multiplication region 22 and move to the charge sharing region 23 at high speed.

[0074] In the generated object OJ (refer to Figure 1 ), in each pixel 11a, a reset voltage is first applied to the pair of second transfer gate electrodes 44 and 45. The reset voltage is a positive voltage based on the potential of the photogate electrode 41. As a result, electrons that have moved to the charge sharing region 23 are ejected from the pair of second charge transfer regions 26 and 27.

[0075] Next, a pulse voltage signal is applied to the pair of first transfer gate electrodes 42 and 43. As an example, the pulse voltage signal applied to the first transfer gate electrode 42 is a voltage signal that alternates between positive and negative voltages with the potential of the photogate electrode 41 as a reference, and has a period, pulse width, and phase that are consistent with the period, pulse width, and phase of the signal from the light source 2 (see FIG. Figure 1 ) is the same voltage signal as the intensity signal of the pulsed light L emitted by the first transfer gate electrode. On the other hand, the pulse voltage signal applied to the first transfer gate electrode 43 is the same voltage signal as the pulse voltage signal applied to the first transfer gate electrode 42 except that the phase is shifted by 180 degrees.

[0076] Thus, the electrons that have moved to the charge sharing region 23 are alternately and rapidly transferred to the pair of first charge transfer regions 24 and 25. The electrons accumulated in the first charge transfer regions 24 and 25 by the transfer for a predetermined period are transferred as signals to the CMOS readout circuit section 12 (see FIG. Figure 1 ).

[0077] like Figure 1 As shown, when the pulse light L emitted from the light source 2 and reflected by the object OJ is detected by the ranging image sensor 10A, the phase of the intensity signal of the pulse light L detected by the ranging image sensor 10A is shifted (displaced) by the distance d to the object OJ compared to the phase of the intensity signal of the pulse light L emitted from the light source 2. Therefore, by acquiring a signal based on the electrons accumulated in each first charge transfer region 24, 25 for each pixel 11a, a distance image of the object OJ can be generated.

[0078] [Method for manufacturing a ranging image sensor]

[0079] like Figure 5As shown in (a), a p-type semiconductor substrate 20s is prepared, and an avalanche multiplication region 22 and a charge sharing region 23 are formed on the semiconductor substrate 20s. At this time, the avalanche multiplication region 22 is formed to extend over a plurality of pixels 11a (see Figure 5 (b)) is formed on the semiconductor substrate 20s. Figure 5 As shown in (b), a groove 29 is formed on the first surface 20a of the semiconductor layer 20. Figure 6 As shown in (a), regions 24 to 28, 31 to 35 are formed on a semiconductor substrate 20s so that each pixel 11a includes a pair of first charge transfer regions 24 and 25, a pair of second charge transfer regions 26 and 27, multiple charge blocking regions 28, a well region 31, a LOCOS region 33, a barrier region 34, and a pair of sink regions 35. As described above, the semiconductor layer 20 having the trench 29 formed therein is formed (first step). The semiconductor region 21 is a region of the semiconductor substrate 20s.

[0080] Then, if Figure 6 As shown in (b), each gate electrode 41 to 45 is formed on the first surface 20a of the semiconductor layer 20 so that each pixel 11a has a photogate electrode 41, a pair of first transfer gate electrodes 42 and 43, and a pair of second transfer gate electrodes 44 and 45. Thus, the electrode layer 40 is formed (second step). Figure 3 As shown, a wiring layer 60 is formed on the first surface 20a of the semiconductor layer 20 in a manner covering the electrode layer 40, and the wiring layer 60 is electrically connected to each pixel 11a (third step). Next, a counter electrode 50 is formed on the second surface 20b of the semiconductor layer 20. While forming the pixel portion 11 on the semiconductor substrate 20s as described above, a CMOS readout circuit portion 12 is formed on the semiconductor substrate 20s. In the manner described above, the ranging image sensor 10A can be manufactured. The formation of the groove 29 can also be implemented after the regions 24 to 28 and 31 to 35 are formed on the semiconductor substrate 20s and before the gate electrodes 41 to 45 are formed on the first surface 20a of the semiconductor layer 20.

[0081] [Function and Effect]

[0082] In the ranging image sensor 10A, the avalanche multiplication region 22 formed in the semiconductor layer 20 reaches the trench 29 formed in the semiconductor layer 20 to separate the pixels 11a from each other. This allows each pixel 11a to achieve high sensitivity while suppressing variations in light sensitivity between the multiple pixels 11a and variations in light sensitivity between different locations within a single pixel 11a. Therefore, the ranging image sensor 10A can achieve uniform improvements in light sensitivity across the multiple pixels 11a.

[0083] In the ranging image sensor 10A, the bottom surface 29a of the trench 29 is located on the second side relative to the avalanche multiplication region 22. This can suppress the occurrence of crosstalk between adjacent pixels 11a.

[0084] In the ranging image sensor 10A, an n-type barrier region 34 is formed between the n-type second multiplication region 22b and the p-type well region 31 that constitutes the readout circuit. Thus, even if a depletion layer formed in the avalanche multiplication region 22 expands toward the p-type well region 31 by applying a high voltage to the avalanche multiplication region 22, the n-type barrier region 34 can prevent the depletion layer from reaching the p-type well region 31. In other words, the flow of current between the avalanche multiplication region 22 and the well region 31, which would otherwise be caused by the depletion layer reaching the well region 31, can be suppressed.

[0085] In the ranging image sensor 10A, the barrier region 34 includes the well region 31 when viewed from the Z direction. This can suppress the current from flowing between the avalanche multiplication region 22 and the well region 31 due to the depletion layer reaching the well region 31 .

[0086] In the ranging image sensor 10A, an n-type sink region 35 connected to the barrier region 34 is formed on a first side of the barrier region 34. This allows electrons gathered around the n-type barrier region 34 to be introduced into the n-type sink region 35, thereby preventing the electrons gathered around the barrier region 34 from becoming noise as parasitic electrons. Furthermore, by adjusting the impurity concentration in the region between the first charge transfer region 24 and each sink region 35, and in the region between the first charge transfer region 25 and each sink region 35, a potential state can be created in which parasitic electrons are more likely to be introduced into the sink region 35 than into each of the first charge transfer regions 24 and 25.

[0087] In the range-finding image sensor 10A, the sink region 35 is connected to the second charge transfer regions 26 and 27. This allows parasitic electrons introduced into the sink region 35 to be discharged to the second charge transfer regions 26 and 27 functioning as unnecessary charge discharge regions.

[0088] In the ranging image sensor 10A, a wiring layer 60 is provided on the first surface 20a of the semiconductor layer 20 to cover the electrode layer 40 , and the wiring layer 60 is electrically connected to each pixel 11a .

[0089] In the method for manufacturing the ranging image sensor 10A, the avalanche multiplying region 22 is formed on the semiconductor substrate 20s in a manner that is continuous across multiple pixels 11a. This allows the manufactured ranging image sensor 10A to achieve high sensitivity in each pixel 11a while suppressing variations in light sensitivity between the multiple pixels 11a and variations in light sensitivity between different locations within a single pixel 11a. Therefore, the method for manufacturing the ranging image sensor 10A achieves a ranging image sensor 10A that uniformly improves light sensitivity across the multiple pixels 11a.

[0090] In the method of manufacturing the ranging image sensor 10A, after forming the avalanche multiplying region 22, the trench 29 is formed in the first surface 20a of the semiconductor layer 20. This makes it possible to easily and reliably obtain a structure in which the avalanche multiplying region 22 reaches the trench 29.

[0091] In the method for manufacturing the ranging image sensor 10A, after forming the gate electrodes 41-45, a wiring layer 60 is formed on the first surface 20a of the semiconductor layer 20 to cover the electrode layer 40. The wiring layer 60 is electrically connected to each pixel 11a. In this manner, in the manufactured ranging image sensor 10A, electrical signals can be input and output to and from each pixel 11a via the wiring layer 60.

[0092] [Second embodiment]

[0093] like Figure 7 and Figure 8 As shown, the ranging image sensor 10B differs from the above-mentioned ranging image sensor 10A mainly in that the second charge transfer regions 26a, 26b, 27a, and 27b are arranged on both sides of the charge distribution region 23 in the X direction, and the plurality of second transfer gate electrodes 44a, 44b, 45a, and 45b are arranged on both sides of the photogate electrode 41 in the X direction.

[0094] In each pixel 11a of the ranging image sensor 10B, a pair of second charge transfer regions 26a and 26b are arranged on one side of the charge distribution region 23 in the X direction and on both sides of the first charge transfer region 24 in the Y direction. A pair of second charge transfer regions 27a and 27b are arranged on the other side of the charge distribution region 23 in the X direction and on both sides of the first charge transfer region 25 in the Y direction. When viewed in the Z direction, the second transfer gate electrode 44a is arranged between the photogate electrode 41 and the second charge transfer region 26a. When viewed in the Z direction, the second transfer gate electrode 44b is arranged between the photogate electrode 41 and the second charge transfer region 26b. When viewed in the Z direction, the second transfer gate electrode 45a is arranged between the photogate electrode 41 and the second charge transfer region 27a. When viewed in the Z direction, the second transfer gate electrode 45b is arranged between the photogate electrode 41 and the second charge transfer region 27b.

[0095] In the ranging image sensor 10B, similar to the ranging image sensor 10A described above, the avalanche multiplying region 22 formed in the semiconductor layer 20 reaches the trench 29 formed in the semiconductor layer 20 to separate the pixels 11a from one another. This suppresses variations in light sensitivity between the multiple pixels 11a and variations in light sensitivity between different locations within a single pixel 11a, achieving high sensitivity in each pixel 11a. Therefore, the ranging image sensor 10B can achieve uniform improvements in light sensitivity across the multiple pixels 11a.

[0096] [Third embodiment]

[0097] like Figure 9 and Figure 10 As shown, the ranging image sensor 10C differs from the above-mentioned ranging image sensor 10A mainly in that the first charge transfer region 24 is arranged in the center of the charge sharing region 23, the second charge transfer region 26 is formed in a ring shape, and the electrodes 41, 42, and 44 are formed in a ring shape.

[0098] In each pixel 11a of the ranging image sensor 10C, the first charge transfer region 24 is arranged in the center of the charge distribution region 23 when viewed from the Z direction. The second charge transfer region 26, for example, has a rectangular ring shape and is arranged along the outer edge of the charge distribution region 23 when viewed from the Z direction. The photogate electrode 41, for example, has a rectangular ring shape and is arranged outside the first charge transfer region 24 and inside the second charge transfer region 26 when viewed from the Z direction. The first transfer gate electrode 42, for example, has a rectangular ring shape and is arranged outside the first charge transfer region 24 and inside the photogate electrode 41 when viewed from the Z direction. The second transfer gate electrode 44, for example, has a rectangular ring shape and is arranged outside the photogate electrode 41 and inside the second charge transfer region 26 when viewed from the Z direction.

[0099] In the ranging image sensor 10C, similar to the ranging image sensor 10A described above, the avalanche multiplying region 22 formed in the semiconductor layer 20 reaches the trench 29 formed in the semiconductor layer 20 to separate the pixels 11a from one another. This allows high sensitivity to be achieved in each pixel 11a while suppressing variations in light sensitivity between the multiple pixels 11a and variations in light sensitivity between different locations within a single pixel 11a. Therefore, the ranging image sensor 10C can achieve uniform improvement in light sensitivity across the multiple pixels 11a.

[0100] In addition, in the ranging image sensor 10C, the well region 31, the LOCOS region 33, the barrier region 34, and the sink region 35 (see Figure 3 ) is not formed in the semiconductor layer 20. Therefore, according to the ranging image sensor 10C, it is possible to achieve a high density of the plurality of pixels 11a and a simplified structure of the semiconductor layer 20. As an example, in the ranging image sensor 10C, a semiconductor substrate having a readout circuit for each pixel 11a and a CMOS readout circuit unit 12 formed thereon is bonded from the first side.

[0101] [Fourth embodiment]

[0102] like Figure 11 、 Figure 12 and Figure 13 As shown, the ranging image sensor 10D differs from the above-mentioned ranging image sensor 10A mainly in the following points, namely, the first charge transfer region 24 is arranged in the central part of the charge sharing region 23, the multiple second charge transfer regions 26 are arranged along the outer edge of the charge sharing region 23, the photogate electrode 41 and the first transfer gate electrode 42 are formed in a ring shape, the multiple second transfer gate electrodes 44 are arranged in a manner surrounding the photogate electrode 41, and the trench 29 is not formed in the semiconductor layer 20 and the avalanche multiplication region 22 is connected to multiple pixels 11a.

[0103] In each pixel 11a of the ranging image sensor 10D, the first charge transfer region 24 is located in the center of the charge distribution region 23 when viewed in the Z direction. Multiple second charge transfer regions 26 are located along the outer edge of the charge distribution region 23 when viewed in the Z direction. Each second charge transfer region 26 is shared by two adjacent pixels 11a. A photogate electrode 41, for example, has a rectangular ring shape and is located outside the first charge transfer region 24 and inside the multiple second charge transfer regions 26 when viewed in the Z direction. A first transfer gate electrode 42, for example, has a rectangular ring shape and is located outside the first charge transfer region 24 and inside the photogate electrode 41 when viewed in the Z direction. Each second transfer gate electrode 44 is located between the photogate electrode 41 and each second charge transfer region 26 when viewed in the Z direction.

[0104] In each pixel 11a of the ranging image sensor 10D, when viewed from the Z direction, the well region 31 and the barrier region 34 are arranged at the intersections of a plurality of virtual lines arranged in a grid pattern to separate the plurality of pixels 11a. Therefore, no trenches 29 are formed in the semiconductor layer 20, and the avalanche multiplication region 22 is continuous across the plurality of pixels 11a.

[0105] In the ranging image sensor 10D, the avalanche multiplication region 22 formed in the semiconductor layer 20 is connected across multiple pixels 11a. This allows each pixel 11a to achieve higher sensitivity while suppressing variations in light sensitivity between the multiple pixels 11a and variations in light sensitivity between different locations within a single pixel 11a. Therefore, the ranging image sensor 10D can achieve uniformly improved light sensitivity across the multiple pixels 11a.

[0106] In addition, in the ranging image sensor 10D, the sink area 35 (see Figure 3 ) is not formed in the semiconductor layer 20. This is because, in the ranging image sensor 10D, compared to the ranging image sensor 10A described above, the barrier region 34 is spaced apart from the first charge transfer region 24. As a result, it is difficult for electrons gathered around the barrier region 34 to enter the first charge transfer region 24.

[0107] [Fifth embodiment]

[0108] like Figure 14 and Figure 15As shown, the ranging image sensor 10E differs from the ranging image sensor 10A described above mainly in the following points: the first charge transfer region 24 is arranged in the center of each pixel 11a, the multiple second charge transfer regions 26 are arranged in multiple corners of each pixel 11a, the first transfer gate electrode 42 is formed in a ring shape, the photogate electrode 41 is arranged so as to avoid the center and multiple corners of each pixel 11a, the multiple second transfer gate electrodes 44 are arranged in multiple corners of each pixel 11a, and the trench 29 is not formed in the semiconductor layer 20 and the avalanche multiplication region 22 is connected across multiple pixels 11a.

[0109] In each pixel 11a of the ranging image sensor 10E, the first charge transfer region 24 is located in the center of each pixel 11a when viewed from the Z direction. Multiple second charge transfer regions 26 are located at the corners of each pixel 11a when viewed from the Z direction. The photogate electrode 41 is arranged to avoid the center and corners of each pixel 11a (i.e., to avoid the first charge transfer region 24 and the multiple second charge transfer regions 26). The photogate electrode 41 is connected across multiple pixels 11a. The first transfer gate electrode 42, for example, has a rectangular ring shape when viewed from the Z direction and is located outside the first charge transfer region 24 and inside the photogate electrode 41. Each second transfer gate electrode 44 is located between the photogate electrode 41 and each second charge transfer region 26 when viewed from the Z direction.

[0110] In each pixel 11a of the ranging image sensor 10E, the corresponding second charge transfer region 26 and second transfer gate electrode 44 are shared by four adjacent pixels 11a. Therefore, no trench 29 is formed in the semiconductor layer 20, and the avalanche multiplication region 22 is connected across the plurality of pixels 11a.

[0111] In the ranging image sensor 10E, the avalanche multiplication region 22 formed in the semiconductor layer 20 is connected across multiple pixels 11a. This allows each pixel 11a to achieve higher sensitivity while suppressing variations in light sensitivity between the multiple pixels 11a and variations in light sensitivity between different locations within a single pixel 11a. Therefore, the ranging image sensor 10E can achieve uniformly improved light sensitivity across the multiple pixels 11a.

[0112] In addition, in the ranging image sensor 10E, the well region 31, the LOCOS region 33, the barrier region 34, and the sink region 35 (see Figure 3) is not formed in the semiconductor layer 20. Therefore, according to the ranging image sensor 10E, it is possible to achieve a high density of the plurality of pixels 11a and a simplified structure of the semiconductor layer 20. As an example, in the ranging image sensor 10E, a semiconductor substrate having a readout circuit for each pixel 11a and a CMOS readout circuit unit 12 formed thereon is bonded from the first side.

[0113] [Modification]

[0114] The present invention is not limited to the first to fifth embodiments described above. In the ranging image sensors 10A, 10B, and 10C, the bottom surface 29a of the trench 29 may be located within the avalanche multiplication region 22. In this case, the time required to form the trench 29 can be shortened, and the occurrence of crosstalk between adjacent pixels 11a can be sufficiently suppressed.

[0115] In the ranging image sensors 10A, 10B, and 10C, the bottom surface 29a of the trench 29 may be located on the first side relative to the avalanche multiplying region 22, and the avalanche multiplying region 22 may be connected across the plurality of pixels 11a. Alternatively, in the ranging image sensors 10A and 10B, the trench 29 may not be formed in the semiconductor layer 20, and the avalanche multiplying region 22 may be connected across the plurality of pixels 11a. In these cases, uniform improvement in light sensitivity can be achieved across the plurality of pixels 11a.

[0116] In the ranging image sensors 10A and 10B, the sink regions 35 may not be connected to the second charge transfer regions 26 and 27. In the ranging image sensors 10A and 10B, the sink regions 35 may not be formed in the semiconductor layer 20. In the ranging image sensors 10A and 10B, the well regions 31 and the barrier regions 34 may not be formed in the semiconductor layer 20. In the ranging image sensors 10A, 10B, and 10C, the charge blocking region 28 may not be formed in the semiconductor layer 20.

[0117] In the ranging image sensor 10D, the sink region 35 connected to the barrier region 34 may be formed in the semiconductor layer 20. In the ranging image sensor 10D, the sink region 35 connected to the barrier region 34 and the second charge transfer region 26 may also be formed in the semiconductor layer 20. In the ranging image sensor 10D, the well region 31 and the barrier region 34 may not be formed in the semiconductor layer 20. In the ranging image sensors 10D and 10E, the charge blocking region 28 may also be formed in the semiconductor layer 20.

[0118] like Figures 16 to 22 As shown, in the ranging image sensors 10A to 10E, a buried region 36 may be formed in the semiconductor layer 20 of each pixel 11a. The buried region 36 formed in the semiconductor layer 20 of each pixel 11a can suppress the generation of dark current in each pixel 11a.

[0119] Figure 16 and Figure 17 The illustrated ranging image sensor 10A differs from the aforementioned ranging image sensor 10A mainly in that a plurality of charge blocking regions 28 are not formed in the semiconductor layer 20 of each pixel 11 a and a buried region 36 is formed in the semiconductor layer 20 of each pixel 11 a . Figure 16 and Figure 17 The structure of the semiconductor layer 20 of each pixel 11 a in the illustrated ranging image sensor 10A is as follows.

[0120] like Figure 16 and Figure 17 As shown, the charge sharing region 23 is formed so as to overlap with the photogate electrode 41 when viewed in the Z direction, and does not overlap with the plurality of transfer gate electrodes 42, 43, 44, and 45 when viewed in the Z direction. The buried region 36 is a p-type region and is formed on the first side of the charge sharing region 23 in the semiconductor layer 20. That is, the charge sharing region 23 is buried in the semiconductor layer 20 via the buried region 36. The well region 31 surrounds a portion of the charge sharing region 23 on the first side and the buried region 36. A portion of the well region 31 is located between the buried region 36 and each of the charge transfer regions 24, 25, 26, and 27. The barrier region 34 surrounds a portion of the charge sharing region 23 on the second side. When viewed in the Z direction, the inner edge of the barrier region 34 surrounding the charge sharing region 23 is located inward of the inner edge of the well region 31 surrounding the charge sharing region 23 and the buried region 36.

[0121] Figure 18 The illustrated ranging image sensor 10B differs from the aforementioned ranging image sensor 10B mainly in that a plurality of charge blocking regions 28 are not formed in the semiconductor layer 20 of each pixel 11 a and a buried region 36 is formed in the semiconductor layer 20 of each pixel 11 a . Figure 18 The structure of the semiconductor layer 20 of each pixel 11 a in the illustrated ranging image sensor 10B is as follows.

[0122] like Figure 18 As shown, the charge sharing region 23 is formed so as to overlap with the photogate electrode 41 when viewed from the Z direction and not overlap with the plurality of transfer gate electrodes 42, 43, 44a, 44b, 45a, 45b (see FIG. Figure 7) overlap. The buried region 36 is a p-type region and is formed on the first side of the charge sharing region 23 in the semiconductor layer 20. That is, the charge sharing region 23 is buried in the semiconductor layer 20 via the buried region 36. The well region 31 surrounds the first side portion of the charge sharing region 23 and the buried region 36. A portion of the well region 31 is located between the buried region 36 and each of the charge transfer regions 24, 25, 26a, 26b, 27a, and 27b (see Figure 7 ). The barrier region 34 surrounds the portion on the second side of the charge sharing region 23. When viewed in the Z direction, the inner edge of the barrier region 34 surrounding the charge sharing region 23 is located inward of the inner edge of the well region 31 surrounding the charge sharing region 23 and the buried region 36.

[0123] Figure 19 The ranging image sensor 10C shown is different from the above-mentioned ranging image sensor 10C mainly in that an embedded region 36 is formed in the semiconductor layer 20 of each pixel 11a, a well region 31 (hereinafter referred to as the “inner well region 31”) is formed in the semiconductor layer 20 in each pixel 11a so as to include (surround) the first charge transfer region 24, a well region 31 (hereinafter referred to as the “outer well region 31”) is formed in the semiconductor layer 20 in each pixel 11a so as to include (surround) the second charge transfer region 26, and a barrier region 34 is formed on the second side of each of the inner well region 31 and the outer well region 31. Figure 19 The structure of the semiconductor layer 20 of each pixel 11 a in the illustrated ranging image sensor 10C is as follows.

[0124] like Figure 19 As shown, the portion on the first side of the charge sharing region 23 is formed so as to overlap with the photogate electrode 41 when viewed in the Z direction, but does not overlap with the multiple transfer gate electrodes 42 and 44 when viewed in the Z direction. The buried region 36 is a p-type region formed on the first side of the charge sharing region 23 in the semiconductor layer 20. That is, the charge sharing region 23 is embedded in the semiconductor layer 20 via the buried region 36. When viewed in the Z direction, the buried region 36, like the photogate electrode 41, has a rectangular ring shape, for example. When viewed in the Z direction, the buried region 36 surrounds the inner well region 31. When viewed in the Z direction, the outer well region 31 surrounds the buried region 36.

[0125] Figure 20 and Figure 21The ranging image sensor 10D shown is different from the above-mentioned ranging image sensor 10D mainly in that an embedded region 36 is formed in the semiconductor layer 20 of each pixel 11a, a well region 31 (hereinafter referred to as the “inner well region 31”) is formed in the semiconductor layer 20 in a manner including the first charge transfer region 24 in each pixel 11a, a well region 31 (hereinafter referred to as the “outer well region 31”) is formed in the semiconductor layer 20 in a manner including a plurality of second charge transfer regions 26 in each pixel 11a, and a barrier region 34 is formed on the second side of each of the inner well region 31 and the outer well region 31. Figure 20 and Figure 21 The structure of the semiconductor layer 20 of each pixel 11 a in the illustrated ranging image sensor 10D is as follows.

[0126] like Figure 20 and Figure 21 As shown, the portion on the first side of the charge sharing region 23 is formed so as to overlap with the photogate electrode 41 when viewed in the Z direction, but does not overlap with the multiple transfer gate electrodes 42 and 44 when viewed in the Z direction. The buried region 36 is a p-type region formed on the first side of the charge sharing region 23 in the semiconductor layer 20. That is, the charge sharing region 23 is embedded in the semiconductor layer 20 via the buried region 36. When viewed in the Z direction, the buried region 36, like the photogate electrode 41, has a rectangular ring shape, for example. When viewed in the Z direction, the buried region 36 surrounds the inner well region 31. When viewed in the Z direction, the outer well region 31 surrounds the buried region 36.

[0127] Figure 22 The ranging image sensor 10E shown is different from the above-mentioned ranging image sensor 10E mainly in that an embedded region 36 is formed in the semiconductor layer 20 of each pixel 11a, a well region 31 (hereinafter referred to as the “inner well region 31”) is formed in the semiconductor layer 20 in a manner that includes the first charge transfer region 24 in each pixel 11a, a well region 31 (hereinafter referred to as the “outer well region 31”) is formed in the semiconductor layer 20 in a manner that includes each of the multiple second charge transfer regions 26 in each pixel 11a, and a barrier region 34 is formed on the second side of each of the inner well region 31 and the outer well region 31. Figure 22 The structure of the semiconductor layer 20 of each pixel 11 a in the illustrated ranging image sensor 10E is as follows.

[0128] like Figure 22As shown, the portion on the first side of the charge sharing region 23 is formed so as to overlap with the photogate electrode 41 when viewed in the Z direction, and does not overlap with the plurality of transfer gate electrodes 42 and 44 when viewed in the Z direction. The buried region 36 is a p-type region and is formed on the first side of the charge sharing region 23 in the semiconductor layer 20. That is, the charge sharing region 23 is buried in the semiconductor layer 20 via the buried region 36. When viewed in the Z direction, the buried region 36 surrounds the inner well region 31.

[0129] In the ranging image sensors 10A to 10E, light can enter the semiconductor layer 20 from either the first side or the second side. For example, when light enters the semiconductor layer 20 from the second side, the counter electrode 50 can be formed of a conductive and light-transmitting material (e.g., polycrystalline silicon). The electrode connected to the semiconductor region 21, or the electrode connected to the first multiplication region 22a side (the electrode of the first conductivity type), is not limited to the counter electrode 50. It can also be a through electrode extending from the first surface 20a of the semiconductor layer 20 to the semiconductor region 21, or an electrode formed on the surface of the semiconductor region 21 that reaches the first surface 20a of the semiconductor layer 20. In each of the ranging image sensors 10A to 10E, at least one first charge transfer region, at least one second charge transfer region, at least one first transfer gate electrode, and at least one second transfer gate electrode can be provided for each pixel 11a. The method of applying voltage to the first and second transfer gate electrodes, as well as the method of extracting / discharging charge from the first and second charge transfer regions, are not limited to the above-described methods. In each of the ranging image sensors 10A to 10E, the p-type and n-type conductivity types may be reversed from the above. In each of the ranging image sensors 10A to 10E, the plurality of pixels 11 a may be arranged one-dimensionally along the first surface 20 a of the semiconductor layer 20 .

[0130] Description of Reference Signs

[0131] 10A, 10B, 10C, 10D, 10E ranging image sensors;

[0132] 11a pixels;

[0133] 20 semiconductor layer;

[0134] 20a first surface;

[0135] 20b second surface;

[0136] 20s semiconductor substrate;

[0137] 22 avalanche multiplication zone;

[0138] 22a first doubling region;

[0139] 22b second doubling region;

[0140] 23 charge distribution region;

[0141] 24, 25 first charge transfer region;

[0142] 26, 26a, 26b, 27, 27a, 27b second charge transfer region;

[0143] 29 grooves;

[0144] 29a bottom surface;

[0145] 31 well area;

[0146] 34 Barrier region;

[0147] 35 lodge area;

[0148] 40 electrode layer;

[0149] 41 photogate electrode;

[0150] 42, 43 first transfer gate electrodes;

[0151] 44, 44a, 44b, 45, 45a, 45b second transfer gate electrodes;

[0152] 60 wiring layers.

Claims

1. A ranging image sensor, characterized in that: include: a semiconductor layer having a first surface on a first side and a second surface on a second side opposite to the first side, for constituting a plurality of pixels arranged along the first surface; and an electrode layer provided on the first surface and used to constitute the plurality of pixels, Each pixel in the plurality of pixels has: an avalanche multiplication region comprising a first multiplication region of a first conductivity type formed in the semiconductor layer, and a second multiplication region of a second conductivity type formed in the semiconductor layer on the first side of the first multiplication region; a charge sharing region of a second conductivity type formed in the semiconductor layer on the first side of the second multiplication region and connected to the second multiplication region; a first charge transfer region of a second conductivity type formed in the semiconductor layer on the first side of the second multiplication region and connected to the charge sharing region; a second charge transfer region of a second conductivity type formed in the semiconductor layer on the first side of the second multiplication region and connected to the charge sharing region; a photogate electrode formed in the electrode layer on the first side of the charge distribution region; a first transfer gate electrode formed in the electrode layer on the first side of the charge sharing region so as to be located on the first charge transfer region side relative to the photogate electrode; and a second transfer gate electrode formed on the first side of the charge sharing region in the electrode layer so as to be located on the second charge transfer region side relative to the photogate electrode; The avalanche multiplication region is connected over the plurality of pixels or reaches a trench formed in the semiconductor layer so as to separate the plurality of pixels from each other.

2. The ranging image sensor according to claim 1, wherein: The groove is formed on the first surface, A bottom surface of the trench is located on the second side relative to the avalanche multiplication region.

3. The ranging image sensor according to claim 1, wherein: The groove is formed on the first surface, The bottom surface of the trench is located in the avalanche multiplication region.

4. The ranging image sensor according to any one of claims 1 to 3, wherein: Each pixel in the plurality of pixels further has: a well region of a first conductivity type formed in the semiconductor layer on the first side of the second multiplication region, for constituting a readout circuit electrically connected to at least one of the first charge transfer region and the second charge transfer region; and A barrier region of the second conductivity type is formed in the semiconductor layer between the second multiplication region and the well region.

5. The ranging image sensor according to claim 4, wherein: When viewed in the thickness direction of the semiconductor layer, the barrier region includes the well region.

6. The ranging image sensor according to claim 4 or 5, characterized in that: Each of the plurality of pixels further includes a sink region of the second conductivity type formed on the first side of the barrier region in the semiconductor layer and connected to the barrier region.

7. The ranging image sensor according to claim 6, wherein: The sink region is connected to the second charge transfer region.

8. The ranging image sensor according to any one of claims 1 to 7, wherein: Also includes: A wiring layer is provided on the first surface so as to cover the electrode layer and is electrically connected to each of the plurality of pixels.

9. A method for manufacturing a ranging image sensor, characterized in that: The manufacturing method is the manufacturing method of the ranging image sensor according to claim 1, comprising: A first step is to form the semiconductor layer by forming the avalanche multiplication region, the charge distribution region, the first charge transfer region, and the second charge transfer region on a semiconductor substrate; and A second step, after the first step, is to form the electrode layer by forming the photogate electrode, the first transfer gate electrode, and the second transfer gate electrode on the first surface of the semiconductor layer. In the first step, the avalanche multiplication region is formed on the semiconductor substrate so as to be connected across the plurality of pixels.

10. The method for manufacturing a ranging image sensor according to claim 9, wherein: In the first step, after at least the avalanche multiplication region is formed on the semiconductor substrate, the trench is formed on the first surface.

11. The method for manufacturing a ranging image sensor according to claim 10, wherein: Also includes: A third step is to form a wiring layer on the first surface so as to cover the electrode layer after the second step, and electrically connect the wiring layer to each of the plurality of pixels.

Images