Method for manufacturing semiconductor device

Abstract

The method for manufacturing a semiconductor device of the present invention comprises the following steps: a step of providing a ridge (4) on the surface of an InP substrate (1); a step of applying a photoresist (10) on the surface of the InP substrate in a manner covering the ridge; a step of exposing a region of the photoresist covering a portion of an electrode contact portion at the head of the ridge via a mask (20) and developing the region to form a resist pattern (11); a step of applying a shrinkage material (16) in a manner covering a defective portion of the resist pattern generated when the resist pattern is formed; a step of allowing an acid (33) remaining in the interface of the resist pattern after exposure to react with the shrinkage material to form a cross-linked portion (17) at the defective portion for repair; and a step of removing the electrode contact portion (5b) exposed from the resist pattern after the defective portion is repaired by etching after stripping off the unreacted shrinkage material, thereby obtaining a desired processed shape.

Description

Technical Field

[0001] The present application relates to a method for manufacturing a semiconductor device. Background Art

[0002] Conventional optical semiconductor elements have a structure in which the mesa structure has the same size but different elemental compositions on the same substrate, and the manufacturing method becomes complicated accordingly. For example, prior patent 1 discloses the following method: after a vertical component structure serving as the basis of the mesa structure is produced by MOVPE (metal-organic vapor phase epitaxy), a mesa strip is formed by etching, and the portion other than the portion above the mesa strip to be corrected is covered with a resist, and a portion of the exposed mesa strip is removed by etching to form a core layer, and then the resist is removed, and a buried layer is formed by regrowth by MOVPE.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2010-153826 (paragraphs 0036, Figure 6 )

[0004] However, in the method of Patent Document 1, when the resist patterns are overlapped by photolithography, there is a problem that the opening portion is uneven with respect to the left and right of the table due to the deviation of the alignment accuracy, and the side wall of the top of the table is exposed due to excessive or insufficient exposure, or the resist residue is generated. In addition, since a thick resist specification is used to cover the table step with the resist, the resist residue is also likely to be generated. Therefore, the conditions such as the time for developing the resist are increased, and there is a problem that local stress is generated in the resist opening portion, cracks are generated in the resist, and etching is poor. Summary of the invention

[0005] The present application discloses a technology for solving the above-mentioned problems, and an object of the present application is to provide a method for manufacturing a semiconductor device that reduces resist defects and obtains a desired processed shape.

[0006] The manufacturing method of the semiconductor device disclosed in the present application includes the following steps: a step of providing a ridge on the surface of an InP substrate; a step of applying a photoresist on the surface of the InP substrate in a manner covering the ridge; a step of exposing an area of ​​the photoresist covering a portion of an electrode portion at the head of the ridge through a mask, and developing the area to form a resist pattern; a step of applying a shrinkage material in a manner covering the resist pattern; a step of reacting an acid remaining in the interface of the resist pattern after exposure with the shrinkage material to form a cross-linked portion; and a step of removing the electrode portion exposed from the resist pattern having the cross-linked portion by etching after stripping off the unreacted shrinkage material except for the reacted shrinkage material.

[0007] According to the present application, by forming a cross-linked portion with a shrink material to repair defects generated in a resist pattern used for etching the top portion of a ridge portion, resist defects can be reduced and a desired processed shape can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 This is a plan view showing the structure of a semiconductor device according to the method for manufacturing the semiconductor device according to the first embodiment.

[0009] Figure 2 This is a cross-sectional view showing the structure of a semiconductor device according to the method for manufacturing the semiconductor device according to the first embodiment.

[0010] Figure 3 This is a cross-sectional view showing the structure of a semiconductor device according to the method for manufacturing the semiconductor device according to the first embodiment.

[0011] Figure 4 This is a plan view of a semiconductor device before being processed by the method for manufacturing the semiconductor device according to the first embodiment.

[0012] Figure 5 This is a cross-sectional view of a semiconductor device before being processed by the method for manufacturing the semiconductor device according to the first embodiment.

[0013] Figure 6 1 and 2 are cross-sectional views showing a process of manufacturing a semiconductor device according to the method of manufacturing a semiconductor device according to the first embodiment.

[0014] Figure 7 1 and 2 are cross-sectional views showing a process of manufacturing a semiconductor device according to the method of manufacturing a semiconductor device according to the first embodiment.

[0015] Figure 8 1 and 2 are cross-sectional views showing a process of manufacturing a semiconductor device according to the method of manufacturing a semiconductor device according to the first embodiment.

[0016] Fig. 9 1 and 2 are cross-sectional views showing a process of manufacturing a semiconductor device according to the method of manufacturing a semiconductor device according to the first embodiment.

[0017] Fig.10 1 and 2 are cross-sectional views showing a process of manufacturing a semiconductor device according to the method of manufacturing a semiconductor device according to the first embodiment.

[0018] Fig.11 1 and 2 are cross-sectional views showing a process of manufacturing a semiconductor device according to the method of manufacturing a semiconductor device according to the first embodiment.

[0019] Fig.12 This is a flowchart showing a process of manufacturing a semiconductor device according to the method of manufacturing a semiconductor device according to the first embodiment.

[0020] Fig.13 It is a plan view showing a manufacturing process of the semiconductor device according to the manufacturing method of the semiconductor device according to the first embodiment. DETAILED DESCRIPTION

[0021] Implementation Method 1

[0022] Figure 1 It is a plan view showing a semiconductor device after the manufacturing process using the semiconductor device manufacturing method according to the first embodiment of the present application. Figure 2 yes Figure 1 AA section view, Figure 3 yes Figure 1 BB section view.

[0023] After the semiconductor device manufacturing process using the semiconductor device manufacturing method according to the first embodiment of the present application, Figure 1 , Figure 2 as well as Figure 3 As shown, an LD (Laser Diode) section 42 is formed on the top of the ridge 4 with the electrode contact section 5a remaining, and a wavelength modulator section 41 is formed with the electrode contact section removed from the top of the ridge 4. In an optical semiconductor, since the LD section 41 and the wavelength modulator section 42 are connected, the electrode contact section 5 becomes an unnecessary portion in the connection portion and needs to be removed.

[0024] Figure 4 is a plan view before processing of a semiconductor device manufacturing process using the semiconductor device manufacturing method according to the first embodiment, Figure 5 yes Figure 4 Cross-sectional view from the CC direction. Figures 6 to 11is a cross-sectional view of each manufacturing process of a semiconductor device using the manufacturing method of a semiconductor device according to the first embodiment, Fig.12 2 is a flowchart showing a manufacturing procedure in a method for manufacturing a semiconductor device according to Embodiment 1. Hereinafter, the manufacturing method will be described with reference to this figure.

[0025] First, the patent document 1 (paragraph 0036, Figure 6 B) The recorded method, such as Figure 4 as well as Figure 5 As shown, InP and InGaAs are stacked on the surface 2 of the InP substrate 1 by the MOVPE method, and etching is performed to the InP substrate 1 using a protective mask, thereby forming a mesa strip composed of a stacked body on the convex portion 4a of the InP substrate 1 (step S1201). Here, the waveguide (InGaAs) 3 is sandwiched between the ridges 4 (ridges 4a and ridges 4b), and the electrode contact portion 5 is arranged at the top of the ridge 4. The electrode contact portion 5b of the LD portion 41 is an unnecessary layer and should be removed, but the electrode contact 5a of the wavelength modulator portion 42 is a necessary layer. Since the step between the mesa strip and the substrate surface 2 is large, which is several μm, it becomes important to ensure the resist coverage of the step portion and the focus margin during exposure in the resist process of semiconductor manufacturing.

[0026] Then, if Figure 6 As shown, a photoresist 10 is applied on the InP substrate 1 in a manner covering the ridge 4 (step S1202). The photoresist 10 is spin-coated in a manner covering the top of the ridge 4 and becoming flat, and then pre-baked. As the photoresist 10, as a positive resist sensitive to i-line (wavelength 365nm), there is THMR (registered trademark)-iP1800~3650 series manufactured by Tokyo Ohka Industry Co., Ltd., etc. The thickness of the resist is adjusted by viscosity and the number of rotations. A hot plate is used, and the treatment is carried out at a heating temperature of 90°C and a treatment time of 120 seconds. The photoresist 10 used here is composed of commonly used materials, which is a mixture of a photosensitive agent NQD (naphthoquinonediazide), a novolac resin, and a thinner for dissolving them for coating. Most of the thinner evaporates in the pre-baking after coating, and the main components of the photoresist 10 are a photosensitive agent and a resin. However, considering the step coverage corresponding to the terrace step, the resist thickness is preferably greater than the step of the ridge 4 .

[0027] Next, the InP substrate 1 covered with the photoresist 10 and the mask 20 are aligned, as shown in FIG. Figure 7As shown, the area of ​​the photoresist 10 corresponding to the electrode contact portion 5b to be removed is exposed (step S1203). The exposure is performed by irradiating the exposure light L of the i-line. The mask 20 forms an exposure area on the transparent glass mask 21 through the mask shading portion 22. Although the mask 20 that opens the area of ​​the mask shading portion 22 corresponding to the top of the electrode contact portion 5b to be removed is aligned, the center will be offset by the amount of alignment deviation. In addition, the opening width of the mask shading portion 22 needs to be determined by the relationship between the side etching amount during the etching process. In the present embodiment 1, a mask shading portion 22 having the same width as the top of the ridge 4, or a slightly wider opening width is used.

[0028] Exposure light L having passed through mask 20 is separated into exposed area 31 and unexposed area 32 by photosensitizing photoresist 10. Photosensitive agent NQD of photoresist 10 is photodecomposed to generate acid 33. A small amount of photodecomposed acid 33 exists at the interface between unexposed area 32 and exposed area 31 of resist 10.

[0029] Next, the exposed portion 31 is developed with a developer (step S1204). An alkaline developer, such as TMAH (tetramethylammonium hydroxide), is used for development, and the photoresist 10 is washed with water and dried after development. In the unexposed portion 32 of the photoresist 10, the photosensitive agent NQD enters between the polymer molecules of the novolac resin and is inhibited from dissolving into the developer by intermolecular forces. On the other hand, in the exposed portion 31, the photosensitive agent NQD undergoes photodecomposition to become an acid 33, which is easily soluble in an alkaline developer. By utilizing the difference in solubility in the developer between the exposed portion 31 and the unexposed portion 32, as shown in FIG. Figure 8 As shown, a desired resist pattern 11 is formed.

[0030] Fig.13 31 is a top view after the exposure portion 31 is developed with a developer. Fig.13 as well as Figure 8 As shown in the figure, by applying the photoresist 10 on the step of the ridge 4 and pre-baking it, and exposing it to a strong alkaline developer, local stress is likely to concentrate on the photoresist 10 around the step of the ridge 4, and resist cracks 13, 14, and 15 may be generated. In addition, due to the misalignment of the step of the ridge 4, a deep resist recess 12 is also likely to be generated on the side wall of the ridge 4. The resist crack 13 enters the unexposed part 32 of the photoresist 10 on the electrode contact part 5a of the wavelength modulator part 42 to be covered, and the electrode contact part 5a cannot be covered. The resist recess 12 and the resist cracks 14 and 15 expose the waveguide 3 to be covered. If etching is performed in the state where the defective parts of the resist recess 12 and the resist cracks 13, 14, and 15 exist, the electrode contact part 5a and the waveguide 3 are abnormally etched, and the desired device characteristics cannot be obtained.

[0031] Therefore, next, a defect repair process is introduced to repair the defective part, such as Fig. 9 As shown, a shrink material 16 is applied to the defective part (step S1205). The shrink material 16, which is a liquid substance containing a cross-linking agent, is uniformly applied to the substrate on which the resist pattern 11 is formed by spin coating so that it enters the gaps of the defective parts of the resist recesses 12 and the resist cracks 13, 14, and 15. The shrink material 16 uses, for example, a micro-pattern forming material described in Patent Gazette No. 3071401.

[0032] Then, if Fig.10 As shown in FIG. 1 , the shrink material 16 is reacted with the acid 33 remaining in the interface of the resist pattern 11 after exposure to form a cross-linked portion 17 (step S1206) to repair the defective portion. If the shrink material 16 is pre-baked at a heating temperature of 120° C. and a treatment time of 2 minutes using a hot plate, it reacts with the acid 33 to form a cross-linked portion 17, which becomes impossible to peel off during water washing, and the defective portion is repaired by the shrink material. The unreacted shrink material 16 is as shown in FIG. Fig.11 The film can be easily peeled off by washing with water or the like.

[0033] Finally, when the unnecessary electrode contact portion 5b is removed by etching (step S1207), and the resist pattern 11 and the cross-linking portion 17 are further removed (step S1208), the obtained Figure 1 , Figure 2 as well as Figure 3 Processing shape as shown.

[0034] Here, although a positive resist having i-line sensitivity is shown as the photoresist 10, any resist that generates acid when irradiated with exposure light may be used, and similarly, the developer may be a developer other than an alkaline developer.

[0035] In this way, by forming the cross-linked portion 17 with the shrink material 16, the defective portion of the resist pattern 11 used for etching the top portion of the ridge portion 4 is repaired, thereby reducing resist defects and obtaining a desired processed shape.

[0036] As described above, the method for manufacturing a semiconductor device according to the first embodiment includes the following steps: a step of providing a ridge portion 4 on the surface of an InP substrate 1; a step of applying a photoresist 10 on the surface of the InP substrate 1 in a manner covering the ridge portion 4; a step of exposing the region of the photoresist 10 covering a portion of the electrode contact portion 5 located at the top portion of the ridge portion 4 through a mask 20 and developing the region to form a resist pattern 11; a step of applying a shrink material 16 in a manner covering a defective portion of the resist pattern 11 generated when the resist pattern 11 is formed; a defect repairing step of allowing the acid 33 remaining in the interface of the resist pattern 11 after exposure to react with the shrink material 16 to repair the defective portion by forming a cross-linked portion 17; and a step of removing the electrode contact portion 5b exposed from the resist pattern 11 after the defective portion is repaired by etching after stripping off the unreacted shrink material 16, thereby reducing resist defects and obtaining a desired processed shape.

[0037] Although various illustrative embodiments and examples are described in this application, the various features, forms and functions described in the embodiments are not limited to the application of specific embodiments, and can be applied to the embodiments alone or in various combinations. Therefore, countless unillustrated variations can be imagined within the technical scope disclosed in this specification. For example, it includes the case where at least one constituent element is deformed, added or omitted, and also includes the case where at least one constituent element is extracted and combined with other constituent elements.

[0038] Description of Reference Numerals

[0039] 1...InP substrate; 2...surface; 3...waveguide; 4...ridge; 5b...electrode contact portion (electrode portion); 10...photoresist; 12...resist depression (defective portion); 13, 14, 15...resist crack (defective portion); 16...shrinkage material; 17...crosslinking portion; 20...mask; 31...exposure portion; 33...acid.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: Including the following processes: A step of providing a ridge on a surface of an InP substrate; A step of applying a photoresist on the surface of the InP substrate in a manner covering the ridge portion; A step of exposing a region of the photoresist covering a portion of the electrode portion at the head portion of the ridge portion through a mask and developing the region to form a resist pattern; A step of applying a shrink material so as to cover the resist pattern; a step of causing the acid remaining in the interface of the resist pattern after exposure to react with the shrinkage material to form a crosslinked portion; as well as a step of removing the electrode portion exposed from the resist pattern having the cross-linked portion formed therein by etching after peeling off the unreacted shrinkage material other than the reacted shrinkage material; A part of the electrode portion is a top portion of the ridge portion of the laser diode portion provided on the InP substrate.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The ridge portion includes a waveguide, and both the waveguide and the electrode portion are made of InGaAs.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The photoresist comprises naphthoquinone diazide and novolac resin.

Images