Processing tool and piezoelectric device forming method

Abstract

In some embodiments, the disclosure relates to a processing tool including a wafer chuck disposed within a hot plate chamber and having an upper surface configured to hold a semiconductor wafer. A heating element is disposed within the wafer chuck and configured to increase a temperature of the wafer chuck. A motor is coupled to the wafer chuck and configured to rotate the wafer chuck about an axis of rotation extending through the upper surface of the wafer chuck. The processing tool also includes control circuitry coupled to the motor and configured to operate the motor to rotate the wafer chuck while the temperature of the wafer chuck is increased to form a piezoelectric layer from a sol-gel solution layer on the semiconductor wafer.

Description

Technical Field

[0001] This disclosure relates to a processing tool and a method for forming a piezoelectric device. Background Technology

[0002] Piezoelectric devices (e.g., piezoelectric actuators, piezoelectric sensors, etc.) are used in many modern electronic devices (e.g., automotive sensors / actuators, aerospace sensors / actuators, etc.). One example of a piezoelectric device is the piezoelectric actuator. A piezoelectric actuator can be used to generate physical movement under the control of an electrical signal to apply force to physical components in a system. The physical movement generated by a piezoelectric actuator can be used to control various systems (e.g., mechanical systems, optical systems, etc.). Summary of the Invention

[0003] According to one embodiment, a processing tool is provided, comprising: a wafer chuck disposed within a heating plate chamber and having an upper surface configured to hold a semiconductor wafer; a heating element disposed within the wafer chuck and configured to increase the temperature of the wafer chuck; a motor coupled to the wafer chuck and configured to rotate the wafer chuck about a rotation axis extending through the upper surface of the wafer chuck; and a control circuit system coupled to the motor and configured to operate the motor to rotate the wafer chuck while the temperature of the wafer chuck is increased, thereby forming a piezoelectric layer on the semiconductor wafer by a sol-gel solution layer.

[0004] According to one embodiment, a method for forming a piezoelectric device is provided, comprising: forming a bottom electrode on a wafer; conveying the wafer to a cooling plate and performing a cooling process on the wafer; forming a first sol-gel solution layer on the wafer using a spin coater; and conveying the wafer from the spin coater to a heating plate in a heating plate chamber.

[0005] A baking process is performed in the heating plate chamber to dry the first sol-gel solution layer, thereby forming a first piezoelectric layer from the first sol-gel solution layer; a top electrode is formed on the first piezoelectric layer; and the wafer is diced to form a plurality of piezoelectric devices from the wafer. Throughout the baking process, the wafer is arranged with different orientations relative to the heating plate chamber.

[0006] According to one embodiment, a method for forming a piezoelectric device is provided, comprising: forming a bottom electrode on a wafer; forming a first piezoelectric layer on the bottom electrode using a sol-gel process, wherein the sol-gel process includes: forming a first sol-gel solution layer on the wafer using a spin coater; conveying the wafer from the spin coater to a heating plate in a heating plate chamber; performing a baking process in the heating plate chamber to dry, decompose, and densify the first sol-gel solution layer, thereby forming the first piezoelectric layer on the bottom electrode, wherein the wafer is rotated within the heating plate chamber during the baking process; forming a top electrode on the first piezoelectric layer; and forming a plurality of piezoelectric devices from the wafer. Attached Figure Description

[0007] The best understanding of all aspects of this disclosure will be achieved by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale. In fact, the dimensions of the various features may be increased or decreased arbitrarily for clarity of explanation.

[0008] Figure 1 Cross-sectional views of some embodiments of a piezoelectric device are shown, the piezoelectric structure being configured to have a substantially uniform breakdown voltage throughout the piezoelectric structure.

[0009] Figure 2 The diagram shows a top view of some embodiments of a wafer comprising multiple die regions, wherein each die includes a piezoelectric structure having a certain breakdown voltage.

[0010] Figure 3 Cross-sectional views of some embodiments of a spin coating tool including an orienting device for forming piezoelectric structures with small breakdown voltage variations are shown.

[0011] Figure 4 A perspective view of some embodiments of a heating plate chamber including an directional device for forming a piezoelectric structure with a small breakdown voltage variation is shown.

[0012] Figure 5 A perspective view of some embodiments of a plurality of heating plate chambers in a heating plate tool is shown, wherein each heating plate chamber includes an orienting device for forming a piezoelectric structure with a small breakdown voltage variation.

[0013] Figure 6 Cross-sectional views of some embodiments of a heating plate chamber including a rotating device configured to rotate the heating plate during a baking process to reduce breakdown voltage variations in the piezoelectric structure are shown.

[0014] Figure 7Cross-sectional views of some embodiments of a plurality of heating plate chambers in a heating plate tool are shown, wherein each heating plate chamber includes a rotating device configured to rotate the heating plate during the baking process to reduce the breakdown voltage variation of the piezoelectric structure.

[0015] Figures 8 to 18 Various views are shown of some embodiments of a method for forming a piezoelectric structure on a wafer using a heating plate chamber including a motor, the motor being configured to rotate the heating plate during a baking process to reduce the breakdown voltage variation of the piezoelectric structure.

[0016] Figure 19 Showing with Figures 8 to 18 The flowcharts show some embodiments of the method shown.

[0017] Figures 20A to 23 Various views are shown of some other embodiments of a method for forming piezoelectric structures on a wafer using a heated plate chamber including an orientation device for forming piezoelectric structures with small breakdown voltage variations.

[0018] Figure 24 Showing with Figures 20A to 23 The flowcharts show some embodiments of the method shown.

[0019] Figures 25A to 28 Various views are shown of further embodiments of a method for forming piezoelectric structures on a wafer using a spin coater that includes an orientation device for forming piezoelectric structures with small breakdown voltage variations.

[0020] Figure 29 Showing with Figures 25A to 28 The flowcharts show some embodiments of the method shown.

[0021] Figures 30 to 32 Various views are shown of some embodiments in which a top electrode is formed on a piezoelectric structure on a wafer to form multiple piezoelectric devices.

[0022] Figure 33 Flowcharts illustrating some embodiments of a method for forming a piezoelectric device by rotating a wafer during a baking process to form a piezoelectric structure, thereby reducing the breakdown voltage variation of the piezoelectric structure in the piezoelectric device.

[0023] [Explanation of Symbols]

[0024] 100, 300, 600, 700, 800, 1000, 1100, 1200, 1300, 1500, 1700, 1800, 2500A, 3000, 3200: Sectional View

[0025] 102: Substrate

[0026] 104: Passivation layer

[0027] 106: Bottom Electrode

[0028] 108: Piezoelectric structure

[0029] 108a: First piezoelectric layer

[0030] 108b: Second piezoelectric layer

[0031] 108c: Third piezoelectric layer

[0032] 108d: Fourth piezoelectric layer

[0033] 110: Top electrode

[0034] 111, 317, 319, 418, 603: Conductors

[0035] 112: Control circuit system

[0036] 200, 900, 1600, 2000B, 2100, 2300, 2500B, 2600, 2700B, 3100: Top View

[0037] 202: Legend

[0038] 204: Low breakdown voltage

[0039] 206: Medium breakdown voltage

[0040] 208: High breakdown voltage

[0041] 214: Chip

[0042] 216: Notch

[0043] 216a: Any position

[0044] 218: Core Area

[0045] 302: Rotatable shaft

[0046] 303, 604, 2102, 2602, 2606: Rotation

[0047] 304, 1002: Chip chuck

[0048] 306: Solution shell

[0049] 308: Nozzle

[0050] 310: Orientation device

[0051] 312: Orienter Control Circuit System

[0052] 312a: First Orientator Control Circuit System

[0053] 312b: Second Orientator Control Circuit System

[0054] 312c: Third Orienter Control Circuit System

[0055] 312d: Fourth Orienter Control Circuit System

[0056] 314: Optical Analysis of the Wafer by the Director Device

[0057] 316: Spin coating tool housing

[0058] 318: Spin coating control circuit system

[0059] 400, 500, 1400, 2000A, 2200, 2700A, 2800: Stereoscopic Diagram

[0060] 402: Structural shell

[0061] 404: Heating plate chamber

[0062] 404a: First heating plate chamber

[0063] 404b: Second heating plate chamber

[0064] 404c: Third heating plate chamber

[0065] 404d: Fourth heating plate chamber

[0066] 406: Heating plate holder structure

[0067] 408: Heating plate

[0068] 410: Exhaust pipe

[0069] 412: Stomatal opening

[0070] 414: Open

[0071] 416: Door

[0072] 420: Heating plate chamber control circuit system

[0073] 420a: First heating plate chamber control circuit system

[0074] 420b: Second heating plate chamber control circuit system

[0075] 420c: Third heating plate chamber control circuit system

[0076] 420d: Fourth heating plate chamber control circuit system

[0077] 602: Motor

[0078] 606: Motor control circuit system

[0079] 606a: First motor control circuit system

[0080] 606b: Second Motor Control Circuit System

[0081] 606c: Third Motor Control Circuit System

[0082] 610: Axis of rotation

[0083] 1004: Cooling chamber shell

[0084] 1202: Sol-gel solution

[0085] 1302: Sol-gel solution layer

[0086] 1502: Gas

[0087] 1900, 2400, 2900, 3300: Method

[0088] 1902, 1904, 1906, 1908, 2402, 2404, 2406, 2408, 2410, 2412, 2414, 2416, 2418, 2420, 2422, 2902, 2904, 2906, 2908, 2910, 2912, 2914, 2916, 2918, 2920, 3302, 3304, 3306, 3308, 3310, 3312, 3314: Actions

[0089] 2104: First reserved location

[0090] 2202: Closed

[0091] 2306: Second reserved location

[0092] 2308: Third reserved location

[0093] 2310: Fourth reserved location

[0094] 2312: Pre-ordered degree

[0095] 2604: Robotic Arm

[0096] 2604p: Original location

[0097] 3202: First piezoelectric device

[0098] 3204: Second piezoelectric device

[0099] 3206: Third piezoelectric device

[0100] t1: First thickness

[0101] t2: Second thickness Detailed Implementation

[0102] The following disclosure provides numerous different embodiments or instances for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and not intended to be limiting. For example, in the following description, forming a first feature on or over a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which an additional feature may be formed between the first and second features such that the first and second features are not in direct contact. Furthermore, reference numerals and / or letters may be repeated throughout this disclosure. Such repetition is for the sake of brevity and clarity and does not in itself imply a relationship between the various embodiments and / or configurations discussed.

[0103] Furthermore, for ease of explanation, spatially relative terms such as “beneath,” “below,” “lower,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the figures and another element or feature. In addition to the orientations illustrated in the figures, these spatially relative terms are also intended to encompass different orientations of the device during use or operation. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatially relative descriptive terms used herein will be interpreted accordingly.

[0104] A piezoelectric device is a metal-insulator-metal (MIM) device comprising a piezoelectric structure disposed between a top electrode and a bottom electrode. When a sufficient bias voltage is applied across the top and bottom electrodes, mechanical strain may be induced in the piezoelectric structure. This mechanical strain can be used, for example, in acoustic, mechanical, and / or optical applications. Changes in the structure of the piezoelectric layer can affect other electronic properties of the piezoelectric structure, such as dielectric constant, capacitance, and polarization. When the bias voltage applied to the piezoelectric structure is less than the breakdown voltage of the piezoelectric layer, the structural change is reversible. If a bias voltage greater than or equal to the breakdown voltage of the piezoelectric structure is applied to the piezoelectric layer, the mechanical strain induced in the piezoelectric layer is irreversible, and therefore, the piezoelectric structure is damaged, rendering the piezoelectric device unreliable.

[0105] In some methods of manufacturing piezoelectric devices, a bottom electrode may be formed on a wafer; a piezoelectric structure may be formed on the bottom electrode; and a top electrode may be formed on the piezoelectric structure. A dicing process may then be performed along a die region on the wafer to form a plurality of piezoelectric devices from the wafer. In some embodiments, a sol-gel process is used to form the piezoelectric structure on the wafer. The sol-gel process may include: a spin-coating step, wherein a sol-gel solution layer is formed on the wafer; and a baking process, wherein drying, decomposition, and densification are performed to form a solid piezoelectric structure from the sol-gel solution layer. However, in some embodiments, the removal of gas during the baking process is non-uniform throughout the piezoelectric structure, resulting in a varying piezoelectric composition throughout the piezoelectric structure and ultimately a wide range of breakdown voltages throughout the piezoelectric structure on the wafer. For example, in some embodiments, a first piezoelectric device and a second piezoelectric device from the same wafer as the first piezoelectric device may have a breakdown voltage difference of up to 20 volts between them. Therefore, piezoelectric devices formed by the same sol-gel process do not have predictable properties (e.g., breakdown voltage, composition, etc.).

[0106] Various embodiments of this disclosure relate to rotating a wafer into different orientations within a heated plate chamber during a baking process to improve the uniformity of the baking process throughout the piezoelectric structure, thereby reducing compositional variations throughout the piezoelectric structure and thus reducing the breakdown voltage range in the final piezoelectric device formed from the piezoelectric structure. For example, in some embodiments, rotating the wafer into different orientations within a heated plate chamber during the baking process can reduce the breakdown voltage range of the final piezoelectric device by 50%. In some embodiments of this disclosure, wafer rotation can be achieved by using an orientation device to rotate the wafer between different cycles of the baking process, while in other embodiments of this disclosure, wafer rotation can be achieved by continuously rotating the wafer within a heated plate chamber during the baking process using a rotatable wafer chuck or a heated plate. Therefore, a sol-gel process including performing the baking process in different orientations within a heated plate chamber produces a piezoelectric structure with a more uniform breakdown voltage distribution throughout the piezoelectric structure, thereby improving the reliability of the resulting piezoelectric device.

[0107] Figure 1 A cross-sectional view 100 shows some embodiments of a piezoelectric device coupled to a control circuit system.

[0108] In some embodiments, the piezoelectric device in cross-sectional view 100 may include a bottom electrode 106 disposed on a substrate 102. A piezoelectric structure 108 may be disposed above the bottom electrode 106 and below the top electrode 110. In some embodiments, a passivation layer 104 may be disposed directly between the substrate 102 and the bottom electrode 106. In some embodiments, the bottom electrode 106 may be wider than the top electrode 110 and the piezoelectric structure 108. In some embodiments, the piezoelectric structure 108 may be wider than the top electrode 110. In still other embodiments, the outer walls of the top electrode 110, the piezoelectric structure 108, and / or the bottom electrode 106 may be substantially aligned with each other. In some embodiments, the piezoelectric structure 108 may include multiple layers made of the same piezoelectric material. In some embodiments, the piezoelectric structure 108 may, for example, comprise a piezoelectric ceramic material, such as lead zirconate titanate comprising lead, zirconium, titanium, and oxygen. In some other embodiments, the piezoelectric structure 108 may, for example, comprise aluminum nitride, lithium niobate, gallium arsenide, zinc oxide, quartz single crystal, polymer film piezoelectric, or some other suitable piezoelectric material. In some embodiments, the thickness of the piezoelectric structure 108 may be in the range of, for example, approximately 2,000 angstroms to approximately 30,000 angstroms.

[0109] In some embodiments, the control circuitry 112 can be coupled to the top electrode 110 and the bottom electrode 106 via wires 111. In some embodiments, electrical contacts such as solder bumps or bonding pads (not shown) directly couple the wires 111 to the top electrode 110 and the bottom electrode 106. In some embodiments, the control circuitry 112 is configured to apply a voltage bias across the piezoelectric structure 108. In some embodiments, to prevent irreversible damage to the piezoelectric structure 108, the control circuitry 112 is configured to apply a voltage bias smaller than the breakdown voltage of the piezoelectric structure 108. Therefore, by knowing the breakdown voltage of the piezoelectric structure 108, the control circuitry 112 can prevent damage to the piezoelectric device.

[0110] In some embodiments, a sol-gel process is used to form the piezoelectric structure 108 over the entire wafer. In this embodiment, the wafer is then diced to form the piezoelectric device shown in the cross-sectional view 100. In this embodiment, by rotating the wafer during the baking process of the sol-gel method, the piezoelectric structure 108 can be formed over the wafer with reduced compositional variation throughout the piezoelectric structure 108. This allows the piezoelectric structure 108 to undergo a more uniform baking process, and reduces the difference in breakdown voltage within the resulting piezoelectric device.

[0111] Figure 2 A top view 200 showing some embodiments of piezoelectric structures arranged on a wafer, and the breakdown voltage of the piezoelectric structure in each die region of the wafer. The following will combine... Figure 1 Let's discuss the sectional view 100. Figure 2Top view 200.

[0112] In some embodiments, a plurality of die regions 218 are arranged on a wafer 214, and each die region 218 is separated using a rotating blade and / or water slitting process to form Figure 1 The piezoelectric device is shown. Therefore, multiple piezoelectric devices can be formed on a single wafer 214 to improve manufacturing efficiency.

[0113] Figure 2 The top view 200 shows the piezoelectric structure 108 arranged on the wafer 214. Figure 1 The substrate 102 shown corresponds to a portion of the wafer 214. In some embodiments, the bottom electrode 106 and the passivation layer 104 may be disposed on... Figure 2 Behind the piezoelectric structure 108. Furthermore, in some embodiments, a top electrode 110 may be formed on the piezoelectric structure 108 prior to performing the slitting process.

[0114] In some embodiments, each core region 218 corresponding to the piezoelectric device has a breakdown voltage corresponding to a low breakdown voltage 204, a medium breakdown voltage 206, or a high breakdown voltage 208, as indicated by a diagonal stripe pattern, a cross pattern, or a concentric circle pattern, respectively. For example, in some embodiments, according to Figure 2 In Figure 202, a die region 218 with a low breakdown voltage 204 has a breakdown voltage in the range between a and b; a die region 218 with a medium breakdown voltage 206 has a breakdown voltage in the range between b and c; and a die region 218 with a high breakdown voltage 208 has a breakdown voltage in the range between c and d. In this embodiment, a may be equal to the minimum breakdown voltage of the piezoelectric structure 108, and d may be equal to the maximum breakdown voltage of the piezoelectric structure 108. In some embodiments, the minimum breakdown voltage of the piezoelectric structure 108, or a, may be in the range, for example, between approximately 60 volts and approximately 62 volts. In some embodiments, the maximum breakdown voltage of the piezoelectric structure 108, or d, may be in the range, for example, between approximately 68 volts and approximately 70 volts. In some other embodiments, for example, the maximum breakdown voltage of the piezoelectric structure 108, or d, may be greater than 80 volts.

[0115] Therefore, in some embodiments, the overall breakdown voltage variation across the entire piezoelectric structure 108 on wafer 214 can be quantified by the range between a and d. In some embodiments, the difference between a and d is, for example, between approximately 1 volt and approximately 8 volts. In some other embodiments, the difference between a and d is, for example, between approximately 8 volts and approximately 10 volts. The reliability of the piezoelectric structure 108 can be improved by reducing the range between a and d so that the piezoelectric structure 108 can be formed with a more uniform and therefore predictable breakdown voltage for each die region 218. In this way, each piezoelectric device has a known breakdown voltage, such that the control circuitry system 112 does not apply a voltage bias across the piezoelectric structure 108 in the piezoelectric device that exceeds the known breakdown voltage and irreversibly damages the piezoelectric structure 108.

[0116] In some embodiments, the range between a and d for reducing the breakdown voltage of the piezoelectric structure 108 is achieved by rotating the wafer 214 during a baking process of the sol-gel process used to form the piezoelectric structure 108. In some embodiments, the orientation of the wafer 214 is determined by identifying a notch 216 in the wafer 214. Then, in this embodiment, the orientation device may rotate the wafer 214 during a first cycle of the baking process such that the notch 216 is in a first predetermined position relative to the heating plate chamber. In this embodiment, after the first cycle of the baking process, the orientation device may rotate the wafer 214 to a second predetermined position by a predetermined amount of degrees, and then a second cycle of the baking process may be performed. In this embodiment, the number of cycles of the baking process may correspond to 360 degrees divided by a predetermined amount of degrees. For example, in some embodiments, the predetermined amount of degrees is equal to 90 degrees, and therefore the baking process includes four cycles.

[0117] Figure 3 A cross-sectional view 300 shows some embodiments of a spin coating tool for a sol-gel process, including an orienting device.

[0118] In some embodiments, a spin coater housing 316 defines the spin coater. In some embodiments, a rotatable shaft 302 is disposed on the bottom of the spin coater housing 316, and a wafer chuck 304 is coupled to the top of the rotatable shaft 302. In this embodiment, the wafer chuck 304 may be configured to hold the wafer 214. In some embodiments, the spin coater further includes a solution housing 306 and a nozzle 308 for depositing a sol-gel solution onto the wafer 214 during the spin coat step of a sol-gel process. In some embodiments, the solution housing 306 and nozzle 308 are disposed directly above the wafer chuck 304. In other embodiments, other sol-gel solution distribution devices may be used instead of the solution housing 306 and nozzle 308, such as a cup, syringe, etc.

[0119] In some embodiments, the rotatable shaft 302 and / or solution housing 306 and nozzle 308 are controlled by a spin coating control circuitry 318. In some embodiments, the spin coating control circuitry 318 is disposed within the spin coating tool housing 316, while in other embodiments, the spin coating control circuitry 318 may be disposed outside the spin coating tool housing 316. In some embodiments, the spin coating control circuitry 318 is directly coupled to the rotatable shaft 302 and / or solution housing 306 and nozzle 308 via wires 317, while in other embodiments, the spin coating control circuitry 318 is wirelessly coupled to the rotatable shaft 302 and / or solution housing 306 and nozzle 308. However, in some embodiments, the spin coating control circuitry 318 is configured to rotate the rotatable shaft 302 303 to distribute the sol-gel solution (not shown) evenly onto the wafer 214. Thus, after the spin coating process, the sol-gel solution is disposed on the wafer 214 as a layer with substantially uniform thickness.

[0120] In some embodiments, the spin coater further includes an orienting device 310. In some embodiments, the orienting device 310 is disposed within the spin coater housing 316. In this embodiment, the orienting device 310 may include some type of optical imaging device, such as a charge-coupled device (CCD) image sensor, a complementary metal-oxide-semiconductor (CMOS) image sensor, a time-of-flight (ToF) camera, or some other optical imaging device. In some embodiments, the orienting device 310 may be configured to use the optical imaging device to orient notches on the wafer 214 after the sol-gel solution has been distributed onto the wafer 214. Figure 2 Positioning of 216). Therefore, in some embodiments, the directional device 310 may be configured to perform optical analysis on the entire area of ​​wafer 214, as shown by dashed line 314. In some embodiments, the directional device 310 is coupled to a directional control circuit system 312. In some embodiments, the directional control circuit system 312 is disposed within the spin coater housing 316, while in other embodiments, the directional control circuit system 312 may be disposed outside the spin coater housing 316. In some embodiments, the directional control circuit system 312 is directly coupled to the directional device 310 via a wire 319, while in other embodiments, the directional control circuit system 312 may be wirelessly coupled to the directional device 310. However, in some embodiments, the directional control circuit system 312 may "turn on" the directional device 310 after the spin coater control circuit system 318 is "turned off" to position the notches ( ) on wafer 214 after the sol-gel solution has been deposited on wafer 214. Figure 2 Positioning is performed using 216).

[0121] In some embodiments, the orienter device 310 further includes an alignment device configured to orient the wafer 214 such that the notch ( Figure 2 The aligning element 216 is arranged at a specific location on the wafer chuck 304. In this embodiment, the alignment means of the aligner device 310 may be or include a rotating feature on the wafer chuck 304, a robotic arm, or some other device configured to move the wafer 214. In other embodiments, the alignment means of the aligner device 310 may be arranged outside the spin coater housing 316. In some embodiments, the aligner device 310 may also be referred to as a wafer alignment system. In general, the aligner device 310 may be configured according to a notch ( Figure 2 The wafer 214 is transported in a certain orientation to the next processing chamber of the sol-gel process at position 216.

[0122] Figure 4 A perspective view 400 shows some embodiments of a heating plate chamber for a sol-gel process, including an orienter device.

[0123] In some embodiments, a heating plate chamber 404, defined by a heating plate chamber housing, is used in a sol-gel process and is configured to perform a baking process on the sol-gel solution layer. The baking process may include multiple cycles and / or temperature conditions to dry, decompose, and densify the sol-gel solution layer, thereby forming a solid layer on the wafer 214. In some embodiments, the heating plate chamber 404 is disposed within a structural housing 402 and held within the structural housing 402 by a heating plate holder structure 406. A heating plate 408 is disposed on the bottom of the heating plate chamber 404, and in some embodiments, a door 416 may be used to open the heating plate chamber 404 to load the wafer 214 onto the heating plate 408. In some embodiments, the heating plate 408 includes a wafer chuck and a heating element, the wafer chuck being configured to hold the wafer 214 at its upper surface, and the heating element being configured to increase the temperature of the wafer chuck.

[0124] A heating plate 408 is configured to provide heat within a heating plate chamber 404 to facilitate a baking process. The heating plate 408 may be controlled by a heating plate chamber control circuitry 420. In some embodiments, the heating plate chamber control circuitry 420 is disposed within the heating plate chamber 404, while in other embodiments, it may be disposed outside the heating plate chamber 404. In some embodiments, the heating plate chamber control circuitry 420 is directly coupled to the heating plate chamber 404 and / or the heating plate 408 via a wire 418, while in other embodiments, it may be wirelessly coupled to the heating plate chamber 404 and / or the heating plate 408. In some embodiments, the heating plate chamber control circuitry 420 may be configured to control the temperature setting, gate 416, and / or other parameters of the heating plate chamber 404.

[0125] In some embodiments, gases are released from the sol-gel solution layer on wafer 214 during the baking process. Therefore, in some embodiments, the heating plate chamber 404 may include vent openings 412 extending through the heating plate chamber 404 and coupled to an exhaust line 410. Thus, in some embodiments, gases released during the baking process (e.g., carbon dioxide, water vapor, oxygen, etc.) can be discharged from the heating plate chamber 404 through the vent openings 412 and the exhaust line 410. In some embodiments, the exhaust line 410 may be fixed to the structural housing 402. Furthermore, in some embodiments, more or fewer than four vent openings 412 may be arranged within the heating plate chamber 404. In some embodiments, the vent openings 412 do not completely surround the heating plate 408. For example, in some embodiments, the vent openings 412 may not be arranged on the door 416 of the heating plate chamber 404. In such embodiments, the rate of gas removal from certain areas of wafer 214 through the vent openings 412 may be faster than from other areas of wafer 214.

[0126] Therefore, in some embodiments, to remove gases more evenly during the baking process and to achieve a more uniform composition throughout the solid layer formed on wafer 214, the heating plate chamber 404 may also include an aligner device 310 coupled to the aligner control circuitry system 312. In some embodiments, the aligner device 310 may be disposed near the top of the heating plate chamber 404. In this embodiment, the aligner device 310 may include an optical imaging device and an alignment device to rotate the wafer 214 to a different orientation relative to the heating plate chamber 404 throughout the baking process. In some embodiments, for example, the optical imaging device of the aligner device 310 (e.g., a CCD image sensor, a CMOS image sensor, a ToF camera, etc.) may be configured to align with a notch on the wafer 214 ( Figure 2Positioning of wafer 214 is performed by the alignment device of the orienter device 310 (e.g., a rotating feature, a robotic arm, etc.), and the alignment device of the orienter device 310 can be configured to move wafer 214 so that the notch ( Figure 2 216) is located at a predetermined position on the heating plate 408 within the heating plate chamber 404. For example, in some embodiments, a first cycle of the baking process is performed when the wafer 214 is in a first predetermined position in the heating plate chamber 404; a second cycle of the baking process is performed when the wafer 214 is in a second predetermined position in the heating plate chamber 404; a third cycle of the baking process is performed when the wafer 214 is in a third predetermined position in the heating plate chamber 404; and a fourth cycle of the baking process is performed when the wafer 214 is in a fourth predetermined position in the heating plate chamber 404.

[0127] Therefore, as the wafer is moved or rotated between baking process cycles, gas removal through the vent opening 412 can be more uniform across all areas of the wafer 214. Thus, the solid layer formed by the sol-gel solution layer (e.g., Figure 1 The piezoelectric structure 108 shown can have a more uniform composition, and therefore, throughout the solid layer (e.g., Figure 1 The piezoelectric structure 108 shown has a smaller property (e.g., breakdown voltage) variation.

[0128] Figure 5 A perspective view 500 shows some embodiments of multiple heating plate chambers, including an orienting device, that are vertically stacked to improve manufacturing efficiency.

[0129] The perspective view 500 includes a first heating plate chamber 404a, a second heating plate chamber 404b, a third heating plate chamber 404c, and a fourth heating plate chamber 404d, vertically arranged within the structural housing 402. Therefore, multiple wafers can be processed simultaneously. Figure 4(214), thereby improving manufacturing efficiency. In this embodiment, each of the first heating plate chambers 404a to the fourth heating plate chambers 404d may include an orienter device 310. Furthermore, in some embodiments, each of the first heating plate chambers 404a to the fourth heating plate chambers 404d and each orienter device 310 within each of the first heating plate chambers 404a to the fourth heating plate chambers 404d may include its own control circuitry system. For example, in some embodiments, the first heating plate chamber 404a and the orienting device 310 of the first heating plate chamber 404a can be coupled to the first heating plate chamber control circuit system 420a and the first orienting control circuit system 312a, respectively; the second heating plate chamber 404b and the orienting device 310 of the second heating plate chamber 404b can be coupled to the second heating plate chamber control circuit system 420b and the second orienting control circuit system 312b, respectively; the third heating plate chamber 404c and the orienting device 310 of the third heating plate chamber 404c can be coupled to the third heating plate chamber control circuit system 420c and the third orienting control circuit system 312c, respectively; and the fourth heating plate chamber 404d and the orienting device 310 of the fourth heating plate chamber 404d can be coupled to the fourth heating plate chamber control circuit system 420d and the fourth orienting control circuit system 312d, respectively. In other embodiments, the first heating plate chamber 404a to the fourth heating plate chamber 404d and the corresponding directional device 310 can be operated by a single heating plate chamber control circuit system and a directional device control circuit system, respectively.

[0130] Figure 6 A cross-sectional view 600 is shown of some alternative embodiments of a heating plate chamber used in a sol-gel process and including a motor for continuously rotating a heating plate in the heating plate chamber.

[0131] In some embodiments, the heating plate chamber 404 may include a motor 602 or a suitable rotating device configured to rotate the heating plate 408 about a rotation axis 610 extending through the heating plate 408 and orthogonal to the upper surface of the heating plate 408. In some embodiments, for example, the motor 602 may be or include an actuator. In some embodiments, the heating plate 408, and therefore the wafer 214, may rotate continuously during a baking process in the heating plate chamber 404. In some embodiments, the motor 602 may be coupled to and controlled by a motor control circuitry 606. In some embodiments, the motor control circuitry 606 may be disposed within the heating plate chamber 404, while in other embodiments, the motor control circuitry 606 may be disposed outside the heating plate chamber 404. Furthermore, in some embodiments, the motor control circuitry 606 may be coupled to the motor 602 via a wire 603, while in other embodiments, the motor control circuitry 606 may be wirelessly coupled to the motor 602. In some embodiments, the motor control circuitry 606 and the motor 602 may be configured to rotate the heating plate 408 at a constant speed (e.g., revolutions per minute) for one full 360-degree rotation during the baking process. In some embodiments, the motor control circuitry 606 and the motor 602 may be configured to rotate the heating plate 408 for multiple full 360-degree rotations during the baking process.

[0132] In some embodiments, due to the continuous rotation of the wafer 214, the distribution of gas discharged from the heating plate chamber 404 through the vent opening 412 can be more uniform throughout the wafer 214. Therefore, the solid layer formed by the sol-gel solution layer (e.g., Figure 1 The piezoelectric structure 108 shown can have a more uniform composition, and therefore, throughout the solid layer (e.g., Figure 1 The piezoelectric structure 108 shown exhibits smaller variations in properties (e.g., breakdown voltage). Furthermore, in some embodiments where the heating plate chamber 404 includes a motor 602, the baking process can comprise a single cycle, which improves manufacturing efficiency.

[0133] Figure 7 A cross-sectional view 700 is shown of some embodiments of multiple heating plate chambers, including motors configured to continuously rotate the heating plates and stacked vertically to improve manufacturing efficiency.

[0134] Cross-sectional view 700 includes a first heating plate chamber 404a, a second heating plate chamber 404b, and a third heating plate chamber 404c, vertically arranged within the structural housing 402. Therefore, multiple wafers can be processed simultaneously. Figure 6(214), thereby improving manufacturing efficiency. It should be understood that in other embodiments, more or fewer than three heating plate chambers (404a to 404c) may be vertically arranged in the structural housing 402. In some embodiments, each of the first heating plate chamber 404a to the third heating plate chamber 404c may include a motor 602 configured to rotate the heating plate 408 about the rotation axis 610 during the baking process. In some embodiments, the first heating plate chamber 404a and its motor 602 can be coupled to the first heating plate chamber control circuit system 420a and the first motor control circuit system 606a, respectively; the second heating plate chamber 404b and its motor 602 can be coupled to the second heating plate chamber control circuit system 420b and the second motor control circuit system 606b, respectively; and the third heating plate chamber 404c and its motor 602 can be coupled to the third heating plate chamber control circuit system 420c and the third motor control circuit system 606c, respectively. In other embodiments, each of the first heating plate chambers 404a to the third heating plate chamber 404c and its corresponding motor 602 can be operated by a single heating plate control circuit system and a single motor control circuit system.

[0135] Figures 8 to 18 Various views 800 to 1800 illustrate some embodiments of a method for forming piezoelectric structures on a wafer using a sol-gel process with a continuously rotating heating plate. Although Figures 8 to 18 It is about explaining a method, but it should be understood that... Figures 8 to 18 The structure disclosed herein is not limited to this method, but can exist independently as a structure independent of the method.

[0136] like Figure 8As shown in cross-sectional view 800, a wafer 214 is provided. In some embodiments, the wafer 214 may be or contain a semiconductor material. In some embodiments, the wafer 214 may contain any type of semiconductor body (e.g., silicon / CMOS block, silicon, germanium, SiGe, silicon-on-insulator (SOI), etc.). In some embodiments, a passivation layer 104 may be formed on the wafer 214. In some embodiments, the passivation layer 104 may contain titanium oxide, silicon dioxide, silicon nitride, or some other suitable passivation material. In some embodiments, the passivation layer 104 may be formed by a deposition process (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma-enhanced CVD (PE-CVD), atomic layer deposition (ALD), sputtering, etc.).

[0137] Furthermore, in some embodiments, a bottom electrode 106 may be formed on the wafer 214. In some embodiments, the bottom electrode 106 is formed directly on the passivation layer 104. In some embodiments, the bottom electrode 106 may comprise, for example, copper, platinum, gold, silver, titanium, cobalt, titanium nitride, manganese, zinc, or some other suitable conductive material. In some embodiments, the bottom electrode 106 may be formed by a deposition process (e.g., PVD, CVD, PE-CVD, ALD, sputtering, etc.).

[0138] Figure 9 This shows the process after the bottom electrode 106 is formed. Figure 8 Top view 900 of some embodiments of the sectional view 800.

[0139] like Figure 9 As shown in the top view 900, in some embodiments, the wafer 214 has a substantially circular shape when viewed from the top view 900. However, in some embodiments, the wafer 214 includes a notch 216 near its edge. The notch 216 in the wafer 214 can be described as a recess in the wafer 214. In some embodiments, the notch 216 can be like... Figure 9 In the top view, it also has a pointed profile, while in other embodiments, the notch 216 may have a rounded profile. However, the location of the notch 216 can be used in future processing steps to align the wafer 214 in a processing tool.

[0140] like Figure 10As shown in the cross-sectional view 1000, in some embodiments, a wafer 214 may be transported into a cooling chamber defined by a cooling chamber housing 1004. In some embodiments, the cooling chamber housing 1004 may include a wafer chuck 1002 on which the wafer 214 is placed. In some embodiments, the wafer chuck 1002 may also be a cooling plate, wherein the wafer chuck 1002 includes cooling elements configured to reduce the temperature of the wafer chuck 1002. In some embodiments, the cooling chamber may cool the wafer 214 and its overlays (e.g., passivation layer 104, bottom electrode 106) to a temperature, for example, between approximately 20 degrees Celsius and approximately 26 degrees Celsius. Therefore, in some embodiments, after the bottom electrode 106 is formed on the wafer 214, the wafer 214 is inserted into the cooling chamber housing 1004 to reduce the temperature of the bottom electrode 106 for future processing steps.

[0141] like Figure 11 As shown in the cross-sectional view 1100, in some embodiments, a wafer 214 may be fed into a spin coater defined by a spin coater housing 316. In this embodiment, the wafer 214 may be loaded onto a wafer chuck 304 coupled to a rotatable shaft 302. In some embodiments, the rotatable shaft 302 is coupled to a spin coater control circuitry 318 via a wire 317 or wirelessly. Furthermore, in some embodiments, a solution housing 306 and a nozzle 308 are arranged on top of the spin coater housing 316 and cover the wafer 214.

[0142] like Figure 12 As shown in the cross-sectional view 1200, in some embodiments, a sol-gel solution 1202 is deposited onto wafer 214 from solution housing 306 and nozzle 308. In some embodiments, the sol-gel solution 1202 comprises a colloidal solution initially deposited on bottom electrode 106. In some embodiments, the sol-gel solution 1202, for example, contains lead, zirconium, and titanium dispersed in one or more solvents. In this embodiment, the sol-gel solution 1202 can be used to form a piezoelectric layer comprising lead zirconate titanate. In some embodiments, the one or more solvents may contain carbon, hydrogen, and / or oxygen. It should be understood that in some other embodiments, the sol-gel solution 1202 may contain other metals besides lead, zirconium, and / or titanium dispersed in one or more solvents to generate a piezoelectric layer other than lead zirconate titanate.

[0143] like Figure 13 As shown in cross-sectional view 1300, in some embodiments, spin coating control circuitry 318 "connects" the rotatable shaft 302 to cause the rotatable shaft 302, wafer chuck 304, and thus wafer 214 to rotate 303. In this embodiment, the sol-gel solution ( Figure 12The sol-gel solution layer 1302 (1202) is evenly distributed on the wafer 214 and the bottom electrode 106 as a sol-gel solution layer 1302. In some embodiments, the sol-gel solution ( Figure 12 The sediments of 1202) and Figure 13 The rotation 303 of the wafer 214, while in other embodiments, a sol-gel solution is deposited first. Figure 12 (1202), then, rotate the rotatable shaft 302 by 303. However, Figure 12 and Figure 13 The steps in this process constitute the spin coating process in the sol-gel process, in order to coat the sol-gel solution ( Figure 12 The 1202) is evenly distributed in the sol-gel solution layer 1302 on the wafer 214.

[0144] like Figure 14 As shown in perspective view 1400, in some embodiments, a wafer 214 is fed into a heating plate chamber 404. In this embodiment, a door 416 of the heating plate chamber 404 can be opened to load the wafer 214 onto a heating plate 408 within the heating plate chamber 404. In some embodiments, the heating plate 408 may include a wafer chuck having an upper surface configured to hold the wafer 214, and may also include a heating element configured to raise the temperature of the wafer chuck and thus the wafer 214. In some embodiments, the heating plate chamber 404 may be held in a structural housing 402 by a heating plate holder structure 406. In some embodiments, an vent opening 412 may be disposed within the heating plate chamber 404 and coupled to an exhaust line 410 disposed on or within the structural housing 402. In some embodiments, the heating plate chamber 404 and / or the heating plate 408 are coupled via a wire 418 or wirelessly to a heating plate chamber control circuitry 420, and a motor (see...) Figure 15 (602) is coupled to the motor control circuit system 606 via a wire 603 or wirelessly.

[0145] like Figure 15 As shown in the cross-sectional view 1500, in some embodiments, a motor 602 may be arranged within a heating plate chamber 404 and coupled to a heating plate 408. In some embodiments, a door to the heating plate chamber 404 may be closed. Figure 14The baking process can be performed under the control of the heating plate chamber control circuit system 420 (416). In this embodiment, the motor control circuit system 606 can "turn on" the motor 602 to cause the motor 602, the heating plate 408, and subsequently the wafer 214 to rotate 604 about a rotation axis 610 extending through the heating plate 408 and perpendicular to the upper surface of the heating plate 408. In this embodiment, the motor 602 rotates continuously 604 throughout the baking process. In some embodiments, the motor control circuit system 606 and the heating plate chamber control circuit system 420 operate simultaneously, causing the wafer 214 to rotate continuously while the baking process is underway, thereby arranging the wafer 214 in different orientations within the heating plate chamber 404 throughout the baking process. In this way, in this embodiment, the gas 1502 from the one or more solvents in the sol-gel solution layer 1302 can be discharged more evenly from the heating plate chamber 404 through the vent opening 412. Due to the more uniform distribution of gas 1502 removal from the heating plate chamber 404, the sol-gel solution layer 1302 can be more uniformly transformed into a solid layer with low compositional variation throughout the wafer 214.

[0146] In some embodiments, the baking process includes a drying step and a decomposition step. In some embodiments, the drying step may be performed at a first temperature, and the decomposition step may be performed at a second temperature above the first temperature. For example, in some embodiments, the drying step may be performed at a first temperature in the range of approximately 120°C to approximately 140°C, while the decomposition step may be performed at a second temperature in the range of approximately 340°C to approximately 360°C. In some embodiments, during the drying step of the baking process, a majority (e.g., greater than 50%) of the one or more solvents evaporates and is discharged as gas 1502 from the heating plate chamber 404 through the vent opening 412. In some embodiments, after the drying process, the sol-gel solution layer 1302 may be described as a “gel-like” material having both a liquid phase and a solid phase. Then, in some embodiments, during the decomposition step of the baking process, the temperature of the heating plate 408 and / or the heating plate chamber 404 is increased to a second temperature to further dry, decompose, and densify the sol-gel solution layer 1302, thereby forming a first piezoelectric layer (see...). Figure 17 (108a) The first piezoelectric layer is a solid layer disposed on the bottom electrode 106. Due to the continuous rotation 604 of the heating plate 408 by the motor 602 while the heating plate 408 is at a high temperature, the resulting first piezoelectric layer (see 108a) Figure 17 108a) can be present throughout the entire first piezoelectric layer (see 108a). Figure 17 108a) has a reduced compositional change and thus a reduced property (e.g., breakdown voltage) change.

[0147] Figure 16 Showing with Figure 15 Top view 1600 of some embodiments of the baking process shown, wherein wafer 214 is continuously rotated 604.

[0148] As shown in top view 1600, in some embodiments, wafer 214 is rotated at least 360 degrees during the baking process. In some embodiments, wafer 214 is rotated 360 degrees multiple times throughout the baking process to ensure gas ( Figure 15 1502) is evenly discharged from the heating plate chamber 404. In some embodiments, the motor control circuit system 606 controls the motor ( Figure 15 The speed (e.g., revolutions per minute) of the 602). Furthermore, in some embodiments, a notch 216 of the wafer 214 can be used to ensure that the wafer 214 is positioned on the heating plate ( Figure 15 Center / align on (408).

[0149] like Figure 17 As shown in cross-sectional view 1700, in some embodiments, a first piezoelectric layer 108a is formed over the bottom electrode 106 on the wafer 214 after the baking process. In this embodiment, the first piezoelectric layer 108a may have a first thickness t1. In some embodiments, the first thickness t1 is in the range of, for example, approximately 500 angstroms to approximately 3000 angstroms. In some embodiments, the first piezoelectric layer 108a comprises a piezoelectric material such as lead zirconate titanate. In other embodiments, the first piezoelectric layer 108a may comprise some other piezoelectric material such as aluminum nitride, lithium niobate, gallium arsenide, zinc oxide, quartz single crystal, polymer film piezoelectric, or some other suitable piezoelectric material. Due to the continuous rotation of the wafer 214 throughout the baking process, the first piezoelectric layer 108a may have a reduced compositional variation over its entire region on the wafer 214. In some embodiments, for example, a first region of the first piezoelectric layer 108a may have a first element at a first concentration, while a second region of the first piezoelectric layer 108a may have a second concentration of the first element different from the first concentration. However, due to the continuous rotation of the wafer 214 during the baking process, the difference between the first and second concentrations can be reduced. Therefore, the first piezoelectric layer 108a can have more uniform properties (e.g., breakdown voltage) (i.e., less property variation) throughout its entire region on the wafer 214.

[0150] like Figure 18 As shown in the cross-sectional view 1800, in some embodiments, the repetition is repeated several times. Figures 10 to 17The steps shown are to generate a piezoelectric structure 108 comprising multiple piezoelectric layers (e.g., 108a to 108d). For example, in some embodiments, the piezoelectric structure 108 may include a second piezoelectric layer 108b disposed over the first piezoelectric layer 108a, a third piezoelectric layer 108c disposed over the second piezoelectric layer 108b, and a fourth piezoelectric layer 108d disposed over the third piezoelectric layer 108c. In other embodiments, the piezoelectric structure 108 may include more or fewer piezoelectric layers than the first piezoelectric layers 108a to the fourth piezoelectric layers 108d. Furthermore, in some embodiments, the piezoelectric structure 108 may contain the same piezoelectric material throughout the first piezoelectric layers 108a to the fourth piezoelectric layers 108d. In some embodiments, the piezoelectric structure 108 may have a second thickness t2 in the range of, for example, approximately 2,000 angstroms to approximately 30,000 angstroms. Since each of the first piezoelectric layers 108a to the fourth piezoelectric layers 108d is heated by a heating plate ( Figure 14 The piezoelectric structure 108 is continuously rotated and formed to have a reduced compositional change, so the entire piezoelectric structure 108 can also have a reduced compositional change, and thus have a reduced property (e.g., breakdown voltage) change, thereby improving the reliability of the piezoelectric structure 108.

[0151] Figure 19 Showing with Figures 8 to 18 Flowcharts of some embodiments corresponding to method 1900 shown.

[0152] Although method 1900 is shown and described below as a series of actions or events, it should be understood that the order in which such actions or events are shown should not be construed as limiting. For example, some actions may occur in a different order and / or simultaneously with other actions or events besides those shown and / or described herein. Furthermore, not all of the shown actions may be required to implement one or more aspects or embodiments described herein. Additionally, one or more of the actions depicted herein may be performed by one or more separate actions and / or stages.

[0153] At action 1902, a sol-gel solution layer is formed on the wafer using a spin coater. Figure 13 A cross-sectional view 1300 is shown for some embodiments corresponding to action 1902.

[0154] At action 1904, the wafer is transferred from the spin coater to the heating plate in the heating plate chamber. Figure 14 A perspective view 1400 shows some embodiments corresponding to action 1904.

[0155] At action 1906, a baking process is performed in the heating plate chamber to dry, decompose, and densify the sol-gel solution layer, thereby forming a piezoelectric layer on the wafer.

[0156] At action 1908, the heating plate is rotated during the baking process to reduce the compositional changes and thus the property changes throughout the piezoelectric layer. Figure 15 A cross-sectional view 1500 is shown for some embodiments corresponding to actions 1906 and 1908.

[0157] Figures 20A to 23 Various views 2000A to 2300 illustrate some alternative embodiments of a method for forming piezoelectric structures on a wafer using a sol-gel process with an oriented device in a heated plate chamber. Although Figures 20A to 23 It is about explaining a method, but it should be understood that... Figures 20A to 23 The structure disclosed herein is not limited to this method, but can exist independently as a structure independent of the method.

[0158] In some of these alternative embodiments, a first piezoelectric layer is formed on wafer 214. Figure 17 The method of 108a) includes forming a sol-gel solution layer 1302 on the bottom electrode 106 on the wafer 214, such as Figures 8 to 13 As shown. Then, the method can be used from... Figure 13 Advance to Figure 20A .

[0159] like Figure 20A As shown in perspective view 2000A, in some embodiments, the wafer 214 is... Figure 13 The spin coating tool shown is fed to Figure 20A The heating plate chamber 404 is located within the heating plate 408. The heating plate 408 may include a wafer chuck configured to hold the wafer 214 and heating elements configured to heat the wafer chuck and the wafer 214. In some embodiments, the heating plate chamber 404 may include an aligner device 310 disposed within the heating plate chamber 404 and above the heating plate 408. In some embodiments, the aligner device 310 may include an optical imaging device and an alignment device. In some embodiments, the optical imaging device and the alignment device are disposed within the heating plate chamber 404, while in other embodiments, one of the optical imaging device or the alignment device of the aligner device 310 may be disposed outside the heating plate chamber 404. However, in some embodiments, in… Figures 11 to 13 After the spin coating process shown, the door 416 of the heating plate chamber 404 can be opened, and the wafer 214 can be transported onto the heating plate 408.

[0160] Figure 20B A top view 2000B showing some embodiments of the wafer 214 in the heating plate chamber 404, which is consistent with... Figure 20A The 3D diagram 2000A corresponds to this.

[0161] As shown in top view 2000B, in some embodiments, the notch 216 in the wafer 214 can be arranged at any location in the heating plate chamber 404. The wafer 214 is placed in the heating plate of the heating plate chamber 404. Figure 20A After positioning the notch 216 on the wafer 214 (408), the locator control circuitry 312 is configured to operate the locator device 310 to identify the location of the notch 216 on the wafer 214. In some embodiments, the door 416 of the heating plate chamber 404 may be opened while the locator device 310 is positioning the notch 216, while in other embodiments, the door 416 of the heating plate chamber 404 may be closed. In some embodiments, the locator device 310 uses some type of optical imaging device (e.g., a CCD image sensor, a CMOS image sensor, a ToF camera, etc.) to position the notch 216 on the wafer 214.

[0162] like Figure 21 As shown in the top view 2100, the aligner control circuitry system 312 can be configured to use the alignment device of the aligner device 310 to rotate the wafer 2102, such that the notch 216 moves from any position 216a within the heating plate chamber 404 to a first predetermined position 2104. In some embodiments, the alignment device of the aligner device 310 may include a device coupled to the heating plate (…). Figure 20A A certain type of rotating device of (408) to make the heating plate ( Figure 20A The notch 216 is positioned within the heating plate chamber 404 at a first predetermined position 2104 by rotating the 408) 2102. In other embodiments, the alignment device of the aligner device 310 may include some type of robotic arm configured to pick up the wafer 214 and rotate it 2102 such that the notch is in the first predetermined position 2104. In this embodiment, the robotic arm or alignment device of the aligner device 310 may be disposed within the heating plate chamber 404, while in other embodiments, the robotic arm or alignment device of the aligner device 310 may be disposed outside the heating plate chamber 404 such that the door 416 of the heating plate chamber 404 is opened to allow the wafer 214 to rotate 2102.

[0163] In some embodiments, the first predetermined position 2104 of the notch 216 may be located directly opposite the door 416 of the heating plate chamber. In other embodiments, the first predetermined position 2104 of the notch 216 may be located in other locations besides... Figure 21 The location may be at a location other than that shown in the top view 2100. However, in some embodiments, prior to performing the baking process, the notch 216 of the wafer 214 may be oriented in a first predetermined position 2104 within the heating plate chamber 404 using an orienter device 310 within the heating plate chamber 404.

[0164] like Figure 22As shown in perspective view 2200, in some embodiments, the door 416 of the heating plate chamber 404 is closed, and a first cycle of the baking process is performed within the heating plate chamber 404 under the control of the heating plate chamber control circuit system 420. In this embodiment, the first cycle of the baking process is performed when the notch 216 of the wafer 214 is positioned at a first predetermined location 2104 in the heating plate chamber 404. In some embodiments, the wafer 214 remains stationary during the first cycle of the baking process. In some embodiments, the first cycle of the baking process includes a drying step at a first temperature and a decomposition step at a second temperature above the first temperature. In some embodiments, during the first cycle of the baking process, gas 1502 is released through the vent opening 412 and the exhaust line 410. In some embodiments, during the first cycle of the baking process, the sol-gel solution layer ( Figure 21 Only a portion of the solvent in (1302) is evaporated. Therefore, in some embodiments, a solid layer containing piezoelectric material has not yet formed after the first cycle of the baking process.

[0165] like Figure 23 As shown in the top view 2300, in some embodiments, after the first cycle of the baking process, the orienter control circuitry 312 can operate the orienter device 310 to re-orient the wafer 214 and / or the heating plate ( Figure 22 The notch 216 is positioned at a second predetermined position 2306 within the heating plate chamber 404, such that the door 416 of the heating plate chamber 404 is rotated 2102 after the first cycle of the baking process. In some embodiments, the door 416 of the heating plate chamber 404 is opened to perform rotation 2102, while in other embodiments, the door 416 of the heating plate chamber 404 remains closed to perform rotation 2102. In some embodiments, the wafer 214 and / or the heating plate ( Figure 22 The wafer 214 (408) can rotate 2102 away from the first predetermined position 2104 by a predetermined amount of degree 2312 to reach the second predetermined position 2306. In some embodiments, the predetermined amount of degree 2312 is defined as the angle between the first predetermined position 2104 and the second predetermined position 2306, wherein the vertex of the angle is located at the center of the wafer 214. In some embodiments, the predetermined amount of degree 2312 may be equal to approximately 90 degrees. In other embodiments, the predetermined amount of degree 2312 may be in the range of, for example, approximately 1 degree to approximately 180 degrees.

[0166] In some embodiments, a second cycle of the baking process can be performed once the orientation device 310 rotates the wafer 214 2102 such that the notch 216 is positioned at the second predetermined location 2306. In some embodiments, the second cycle of the baking process may include the same parameters as the first cycle of the baking process (e.g., time, temperature, pressure, etc.). In some embodiments, during the second cycle of the baking process, the wafer is again opened through the vent ( Figure 22 412) and exhaust pipe ( Figure 22 410) releases gas ( Figure 22 (1502). In some embodiments, only a portion of the solvent in the sol-gel solution layer 1302 is evaporated during the second cycle of the baking process. Therefore, in some embodiments, a solid layer containing piezoelectric material has not yet been formed after the second cycle of the baking process. In other embodiments, a solid layer containing piezoelectric material may be formed after the second cycle of the baking process.

[0167] In some embodiments, after the second cycle of the baking process, the orientation device 310 may be configured to orient the wafer 214 and / or the heating plate ( Figure 22 The wafer 214 is rotated by a predetermined amount of degree 2312, such that the notch 216 of the wafer 214 is positioned at a third predetermined position 2308 within the heating plate chamber 404. The third predetermined position 2308 is positioned at a predetermined amount of degree 2312 away from the second predetermined position 2306. Then, in some embodiments, a third cycle of the baking process can be performed when the notch 216 of the wafer 214 is positioned at the third predetermined position 2308 within the heating plate chamber 404.

[0168] In some embodiments, after the third cycle of the baking process, the orienter device 310 may be configured to orient the wafer 214 and / or the heating plate ( Figure 22 The wafer 214 is rotated by a predetermined amount of degree 2312 (408) such that the notch 216 of the wafer 214 is positioned at a fourth predetermined position 2310 within the heating chamber 404. The fourth predetermined position 2310 is positioned at a predetermined amount of degree 2312 away from the third predetermined position 2308. Then, in some embodiments, a fourth cycle of the baking process can be performed when the notch 216 of the wafer 214 is positioned at the fourth predetermined position 2310 within the heating chamber 404.

[0169] In some embodiments, the baking process may be performed in more or fewer than four cycles. Furthermore, in some embodiments, each cycle of the baking process may include the same parameters (e.g., time, temperature, pressure, etc.), while in other embodiments, at least one cycle of the baking process may include parameters different from those of at least another cycle of the baking process (e.g., time, temperature, pressure, etc.). In some embodiments, each cycle of the baking process may include a drying step and a decomposition step. In some other embodiments, the first to fourth cycles of the baking process may be performed under the parameters of the drying step of the baking process, and then the first to fourth cycles of the baking process may be repeated at a first to a fourth predetermined position under the parameters of the decomposition step of the baking process. In some embodiments, the number of cycles of the baking process performed may be equal to 360 degrees divided by a predetermined amount of degree 2312. For example, in some embodiments where the predetermined amount of degree 2312 is equal to approximately 90 degrees, four cycles of the baking process may be performed.

[0170] In this embodiment, in which the wafer 214 is arranged in different orientations (e.g., first predetermined position 2104, second predetermined position 2306, third predetermined position 2308, fourth predetermined position 2310), the gas from the sol-gel solution layer 1302 ( Figure 22 1502) can be passed through the pore opening ( Figure 22 412) is discharged more evenly from the heating plate chamber 404. Due to the more even distribution of gas 1502 removal from the heating plate chamber 404, the sol-gel solution layer 1302 can be more uniformly transformed into a solid layer with low compositional variation and therefore low property (e.g., breakdown voltage) variation throughout the wafer 214. Figure 17 The first piezoelectric layer 108a).

[0171] In some embodiments, it should be understood that repeatable Figures 8 to 13 and Figures 20A to 23 The method shown forms multiple piezoelectric layers on wafer 214 (e.g., Figure 18 The first piezoelectric layer 108a to the fourth piezoelectric layer 108d are shown.

[0172] Figure 24 Showing with Figures 20A to 23 Flowcharts of some embodiments of the corresponding method 2400.

[0173] Although method 2400 is illustrated and described below as a series of actions or events, it should be understood that the order in which such actions or events are shown should not be construed as limiting. For example, some actions may occur in a different order and / or simultaneously with other actions or events besides those shown and / or described herein. Furthermore, not all of the shown actions may be required to implement one or more aspects or embodiments described herein. Additionally, one or more of the actions illustrated herein may be performed by one or more separate actions and / or stages.

[0174] At action 2402, a sol-gel solution layer is formed on the wafer using a spin coater. Figures 11 to 13 Cross-sectional views 1100 to 1300 are shown for some embodiments corresponding to action 2402.

[0175] At action 2404, the wafer is transported from the spin coater to the heating plate in the heating plate chamber. Figure 20A A perspective view 2000A shows some embodiments corresponding to action 2404.

[0176] At action 2406, the location of the notch on the wafer is determined. Figure 20B A top view 2000B is shown, illustrating some embodiments corresponding to action 2406.

[0177] At action 2408, the wafer is oriented such that the notch is positioned at a first predetermined location within the heating plate cavity. Figure 21 A top view 2100 showing some embodiments corresponding to action 2408 is provided.

[0178] At action 2410, the first cycle of the baking process is performed to dry, decompose, and densify the sol-gel solution layer. Figure 22 A perspective view 2200 shows some embodiments corresponding to action 2410.

[0179] At action 2412, the wafer is rotated away from the first predetermined position by a predetermined amount of degree, and the wafer is oriented such that the notch is arranged at the second predetermined position in the heating plate cavity.

[0180] At action 2414, a second cycle of the baking process is performed in the heating plate chamber to further dry, decompose, and densify the sol-gel solution layer.

[0181] At action 2416, the wafer is rotated away from the second predetermined position by a predetermined amount of degree, and the wafer is oriented such that the notch is arranged in the heating plate cavity at the third predetermined position.

[0182] At action 2418, the third cycle of the baking process is performed in the heating plate chamber to further dry, decompose, and densify the sol-gel solution layer.

[0183] At action 2420, the wafer is oriented such that the notch is positioned at the fourth predetermined position within the heating plate cavity by rotating the wafer away from the third predetermined position by a predetermined amount of degree.

[0184] At action 2422, the fourth cycle of the baking process is performed in the heating plate chamber to further dry, decompose and densify the sol-gel solution layer, thereby forming a piezoelectric layer on the wafer. Figure 23 A top view 2300 is shown of some embodiments corresponding to actions 2412, 2414, 2416, 2418, 2420 and 2422.

[0185] Figures 25A to 28 Various views 2500A to 2800 illustrate some other alternative embodiments of a method for forming piezoelectric structures on a wafer via a sol-gel process using an orienting device in a spin coater. Although Figures 25A to 28 It is about explaining a method, but it should be understood that... Figures 25A to 28 The structure disclosed herein is not limited to this method, but can exist independently as a structure independent of the method.

[0186] In some other alternative embodiments, a first piezoelectric layer is formed on wafer 214. Figure 17 The method of 108a) includes forming a sol-gel solution layer 1302 on the bottom electrode 106 on the wafer 214, such as Figures 8 to 13 As shown. Then, the method can be used from... Figure 13 Advance to Figure 25A .

[0187] like Figure 25A As shown in cross-sectional view 2500A, in some embodiments, the aligner device 310 may be disposed within the spin coater housing 316 and on the wafer 214. In some such embodiments, the aligner device 310 may include an optical imaging device and an alignment device disposed within the spin coater housing 316, while in other embodiments, one of the optical imaging device or the alignment device of the aligner device 310 may be disposed outside the spin coater housing 316. However, in some embodiments, after the sol-gel solution layer 1302 is formed on the bottom electrode 106, the aligner control circuitry system 312 can be used to analyze the wafer 214, as shown by the dashed line 314, to align the notch of the wafer 214 ( Figure 9 Positioning is performed using 216).

[0188] Figure 25B A top view 2500B shows some embodiments of wafer 214 after a spin coating process. Figure 25B In the top view 2500B, the notch 216 of the wafer 214 can be arranged at some arbitrary position and is positioned by the optical imaging device within the directional device 310.

[0189] like Figure 26 As shown in the top view 2600, the orienter control circuit system 312 can be configured to use the orienter device ( Figure 25A The alignment device 310 (orienter device 310) is used to rotate the wafer 214 2602 such that the notch 216 moves from any position 216a within the spin coater housing 316 to a first predetermined position 2104. In some embodiments, the alignment device of the orienter device 310 may be or include a robotic arm 2604. In this embodiment, the robotic arm 2604 may rotate 2606 from its original position 2604p to orient the wafer 214 such that the notch 216 is positioned at the first predetermined position 2104. In other embodiments, for example, the alignment device of the orienter device 310 may include a wafer chuck coupled to a wafer chuck (or similar device). Figure 25A A certain type of rotating device (304). Furthermore, in some embodiments, the alignment device of the orienter device 310 (e.g., Figure 26 The robotic arm 2604 shown may be arranged outside the spin coater housing 316, and the spin coater housing 316 is opened so that the robotic arm 2604 can rotate the wafer 214 2602. In some other embodiments, the alignment means of the orienter device 310 may be arranged inside the spin coater housing 316.

[0190] like Figure 27A As shown, in some embodiments, the alignment device of the orienter device 310 and / or some additional transport device may be used to move the wafer 214 from the spin coating tool housing ( Figure 26 The wafer 214 is conveyed to the heating plate 408 in the heating plate chamber 404. In this embodiment, the alignment device and / or additional conveying device of the orienter device 310 can maintain the alignment of the wafer 214, such that the notch 216 of the wafer 214 is arranged at a first predetermined position 2104 in the heating plate chamber 404.

[0191] In some other embodiments, it should be understood that the orienter device 310 may be a separate tool housing unit. For example, in some embodiments, after the spin coating process, the wafer 214 may be conveyed into an orienter device housing (not shown), and the orienter device 310 within the orienter device housing may be configured to position and align the notch 216 of the wafer 214 at a first predetermined position 2104. Then, in such other embodiments, the wafer 214 may be conveyed from the orienter device housing into a heating plate chamber 404 such that the notch 216 of the wafer 214 is positioned at the first predetermined position 2104 within the heating plate chamber 404.

[0192] Figure 27B A top view 2700B showing some embodiments of a notch 216 in the wafer 214 arranged at a first predetermined position 2104 within the heating plate chamber 404.

[0193] As shown in top view 2700B, in some embodiments, the first predetermined position 2104 of the notch 216 may be arranged directly opposite the door 416 of the heating plate chamber 404. In other embodiments, the first predetermined position 2104 of the notch 216 may be arranged in other locations besides... Figure 27B The location is at a position other than that shown in the top view 2700B. However, in some embodiments, the notch 216 of the wafer 214 is arranged at a first predetermined position 2104 within the heating plate chamber 404 before the baking process is performed.

[0194] like Figure 28 As shown in perspective view 2800, in some embodiments, when the wafer 214 is positioned at a first predetermined location 2104 within the heating plate chamber 404, a first cycle of a baking process can be performed in the heating plate chamber 404. In some embodiments, the first cycle of the baking process may include a drying step and a decomposition step. In some embodiments, the first cycle of the baking process completely dries, decomposes, and densifies the sol-gel solution layer 1302 to form a first piezoelectric layer ( Figure 17 (108a). In this embodiment, during the first cycle of the baking process performed at a first predetermined position 2104 within the heating plate chamber 404, the wafer 214 may remain stationary.

[0195] In some embodiments, repeat Figures 10 to 13 and Figures 25A to 28 The method shown is to form multiple piezoelectric layers on a wafer (e.g., Figure 18 The first piezoelectric layer 108a to the fourth piezoelectric layer 108d shown, wherein each piezoelectric layer (e.g., Figure 18 (108a to 108d) undergo a cycle of baking at different predetermined locations within the heating plate chamber 404. For example, in some embodiments, the process is repeated. Figures 10 to 13 and Figures 25A to 28 The method shown is to, in the first piezoelectric layer ( Figure 17 A second sol-gel solution layer is formed on top of 108a). Then, a spin coating tool housing is used. Figure 25A The orienting device 310, inside or outside of (316), orients the notch 216 of the wafer 214 to a second predetermined position (e.g., Figure 23At position 2306). In this embodiment, a second cycle of the baking process is then performed when the notch 216 of the wafer 214 is positioned at the second predetermined position 2306 within the heating plate chamber 404. In some embodiments of this, the second cycle of the baking process may completely dry, decompose, and densify the second sol-gel solution layer to achieve the desired effect in the first piezoelectric layer ( Figure 18 A second piezoelectric layer is formed on top of 108a. Figure 18 108b). In some such embodiments, at the third predetermined position ( Figure 23 The third repetition at position 2308) Figures 10 to 13 and Figures 25A to 28 The method shown is used to form a third piezoelectric layer ( Figure 18 108c), in the fourth predetermined position ( Figure 23 The fourth repetition at (2310) Figures 10 to 13 and Figures 25A to 28 The method shown is used to form the fourth piezoelectric layer ( Figure 18 (108d), etc.

[0196] In this embodiment, since the baking process is performed in different orientations within the heating plate chamber 404, the entire piezoelectric structure ( Figure 18 108) may have reduced compositional changes and therefore reduced property (e.g., breakdown voltage) changes. However, in which... Figures 10 to 13 and Figures 25A to 28 In this embodiment where the piezoelectric layer is formed by the method shown, each piezoelectric layer ( Figure 18 The 108a to 108d layers can have varying compositions and properties (e.g., breakdown voltage) throughout each piezoelectric layer, because wafer 214 does not, for example, undergo a baking process throughout the baking process. Figure 15 and Figure 16 or Figures 20A to 23 It is rotated as shown in the method. However, by means of... Figures 10 to 13 and Figures 25A to 28 In the same way, within the heating plate chamber 404, in different orientations (e.g., Figure 23 A piezoelectric layer is formed at the first predetermined position 2104, the second predetermined position 2306, the third predetermined position 2308, and the fourth predetermined position 2310 (as shown). Figure 18 (108a to 108d), the entire piezoelectric structure ( Figure 18 108) may have reduced compositional changes and thus reduced property (e.g., breakdown voltage) changes.

[0197] Figure 29 Showing with Figures 25A to 28 Flowcharts of some embodiments of the corresponding method 2900.

[0198] Although method 2900 is illustrated and described below as a series of actions or events, it should be understood that the order in which such actions or events are shown should not be construed as limiting. For example, some actions may occur in a different order and / or simultaneously with other actions or events besides those shown and / or described herein. Furthermore, not all of the shown actions may be required to implement one or more aspects or embodiments described herein. Additionally, one or more of the actions illustrated herein may be performed by one or more separate actions and / or stages.

[0199] At action 2902, a first sol-gel solution layer is formed on the wafer using a spin coater. Figures 11 to 13 Cross-sectional views 1100 to 1300 are shown for some embodiments corresponding to action 2902.

[0200] At action 2904, the location of the notch on the wafer is determined. Figure 25A and Figure 25B A cross-sectional view 2500A and a top view 2500B are shown for some embodiments corresponding to action 2904.

[0201] At action 2906, the wafer is oriented such that the notch is positioned at the first predetermined location. Figure 26 A top view 2600 showing some embodiments corresponding to action 2906 is provided.

[0202] At action 2908, the wafer is transported from the spin coating tool to the heating plate in the heating plate chamber, so that the notch of the wafer is in a first predetermined position in the heating plate chamber. Figure 27A A perspective view 2700A shows some embodiments corresponding to action 2908.

[0203] At action 2910, the first cycle of the baking process is performed in the heating plate chamber to dry, decompose and densify the first sol-gel solution layer, thereby forming the first piezoelectric layer. Figure 28 A perspective view 2800 shows some embodiments corresponding to action 2910.

[0204] At action 2912, the wafer is transported back to the spin coater, and the spin coater is used to form a second sol-gel solution layer on the first piezoelectric layer. Figures 11 to 13 Cross-sectional views 1100 to 1300 are shown for some embodiments corresponding to action 2912.

[0205] At action 2914, the location of the notch on the wafer is determined. Figure 25A and Figure 25B Cross-sectional view 2500A and top view 2500B are shown for some embodiments corresponding to action 2914.

[0206] At action 2916, the wafer is oriented such that a notch on the wafer is positioned at a second predetermined position, which is positioned at a predetermined degree distance from the first predetermined position. Figure 26 A top view 2600 showing some embodiments corresponding to action 2916 is provided.

[0207] At action 2918, the wafer is transported from the spin coating tool to the heating plate in the heating plate chamber, such that the notch of the wafer is in a second predetermined position in the heating plate chamber. Figure 27A A perspective view 2700A shows some embodiments corresponding to action 2918.

[0208] At action 2920, a second cycle of the baking process is performed in the heating plate chamber to dry, decompose and densify the second sol-gel solution layer, thereby forming a second piezoelectric layer on the first piezoelectric layer. Figure 28 A perspective view 2800 shows some embodiments corresponding to action 2920.

[0209] Figures 30 to 32 Various views 3000 to 3200 illustrate some embodiments of a method for forming a piezoelectric device from a piezoelectric structure formed on a wafer, wherein the wafer is arranged in different orientations during a baking process to form the piezoelectric structure. Although Figures 30 to 32 It is about explaining a method, but it should be understood that... Figures 30 to 32 The structure disclosed herein is not limited to this method, but can exist independently as a structure independent of the method.

[0210] like Figure 30 As shown in the cross-sectional view 3000, after forming the first piezoelectric layer 108a to the fourth piezoelectric layer 108d on the wafer, a top electrode 110 may be formed on the piezoelectric structure 108. In some embodiments, the top electrode 110 is formed directly on the piezoelectric structure 108. In some embodiments, the top electrode 110 may comprise, for example, copper, platinum, gold, silver, titanium, cobalt, titanium nitride, manganese, zinc, or some other suitable conductive material. In some embodiments, the top electrode 110 may be formed by a deposition process (e.g., PVD, CVD, PE-CVD, ALD, sputtering, etc.).

[0211] like Figure 31 As shown in the top view 3100, in some embodiments, the wafer 214 includes a plurality of die regions 218, and each die region 218 is separated to form a plurality of piezoelectric devices using a rotating blade and / or water slitting process.

[0212] as Figure 2 Top view 200, Figure 31The top view 3100 shows that each core region 218 may correspond to a piezoelectric device with a breakdown voltage, which corresponds to a low breakdown voltage 204, a medium breakdown voltage 206, or a high breakdown voltage 208, as indicated by a diagonal stripe pattern, a cross pattern, or a concentric circle pattern, respectively.

[0213] In some embodiments, the entire piezoelectric structure on wafer 214 can be quantized by the range between a and d. Figure 30 The overall breakdown voltage change of the piezoelectric structure (108). This can be achieved by reducing the range between a and d. Figure 30 The 108) can be configured to have a more uniform and therefore predictable breakdown voltage for each die region 218 to improve the piezoelectric structure ( Figure 30 The reliability of the 108) is thus ensured. This means that each piezoelectric device has a known breakdown voltage, making the control circuit system ( Figure 1 112) will not cross the piezoelectric structure in the piezoelectric device ( Figure 30 (108) Applying a voltage exceeding the known breakdown voltage irreversibly damages the piezoelectric structure. Figure 30 The voltage bias of 108). In some embodiments, by using the voltage bias of the piezoelectric structure ( Figure 30 The wafer 214 is rotated during the baking process of the sol-gel process of 108 to achieve a piezoelectric structure. Figure 30 The breakdown voltage of 108) reduces the range between a and d, allowing the wafer 214 to rotate through, for example... Figures 14 to 18 , Figures 20A to 23 or Figures 25A to 28 The method shown is used to achieve this.

[0214] like Figure 32As shown in the cross-sectional view 3200, in some embodiments, a removal process may be performed to form a first piezoelectric device 3202, a second piezoelectric device 3204, and a third piezoelectric device 3206 on wafer 214. In some embodiments, the removal process may remove portions of the bottom electrode 106, the piezoelectric structure 108, and the top electrode 110 via photolithography and removal processes. In other embodiments, the removal process may include a dicing process that utilizes blades and / or water to completely separate the first piezoelectric device 3202, the second piezoelectric device 3204, and the third piezoelectric device 3206 from each other, thereby removing / cutting through the passivation layer 104 and portions of wafer 214. However, in this embodiment, since the piezoelectric structure 108 is formed by rotating the wafer 214 throughout the baking process used to form the piezoelectric structure 108, the variation in the breakdown voltage between the first piezoelectric device 3202, the second piezoelectric device 3204, and the third piezoelectric device 3206 is reduced (e.g., less than 10 volts). Each of the first piezoelectric device 3202, the second piezoelectric device 3204, and the third piezoelectric device 3206 is more reliable by reducing the variation in breakdown voltage (e.g., less than 10 volts).

[0215] Figure 33 The flowchart illustrates some embodiments of a method 3300 for forming a piezoelectric device from a piezoelectric structure formed on a wafer by a sol-gel process, wherein the wafer is arranged in different orientations during the baking process of the sol-gel process to reduce the breakdown voltage variation between the resulting piezoelectric devices.

[0216] Although method 3300 is illustrated and described below as a series of actions or events, it should be understood that the order in which such actions or events are shown should not be construed as limiting. For example, some actions may occur in a different order and / or simultaneously with other actions or events besides those shown and / or described herein. Furthermore, not all of the shown actions may be required to implement one or more aspects or embodiments described herein. Additionally, one or more of the actions illustrated herein may be performed by one or more separate actions and / or stages.

[0217] At action 3302, a bottom electrode is formed on the wafer. Figure 8 A cross-sectional view 800 is shown for some embodiments corresponding to action 3302.

[0218] At action 3304, the wafer is transported to the cooling plate and a cooling process is performed on the wafer. Figure 10 A cross-sectional view 1000 is shown for some embodiments corresponding to action 3304.

[0219] At action 3306, a sol-gel solution layer is formed on the wafer using a spin coater. Figures 11 to 13Cross-sectional views 1100 to 1300 are shown for some embodiments corresponding to action 3306.

[0220] At action 3308, the wafer is transported from the spin coater to the heating plate in the heating plate chamber. Figure 14 A perspective view 1400 shows some embodiments corresponding to action 3308.

[0221] At action 3310, a baking process is performed in the heating plate chamber to dry, decompose and densify the sol-gel solution layer, thereby forming a piezoelectric layer on the wafer, wherein the wafer is rotated to be in different predetermined positions in the heating plate chamber during the baking process. Figure 15 and Figure 16 Cross-sectional view 1500 and top view 1600 are shown for some embodiments corresponding to action 3310.

[0222] At action 3312, a top electrode is formed on top of the piezoelectric layer. Figure 30 A cross-sectional view 3000 is shown for some embodiments corresponding to action 3312.

[0223] At action 3314, the wafer is diced to form multiple piezoelectric devices. Figure 32 A cross-sectional view 3200 is shown for some embodiments corresponding to action 3314.

[0224] Therefore, this disclosure relates to a method for forming a piezoelectric structure by forming a piezoelectric layer of the piezoelectric structure in different orientations within the heating plate cavity throughout the baking process, thereby reducing the compositional variation of the piezoelectric structure and thus the variation in its properties (e.g., breakdown voltage) to ultimately form a reliable piezoelectric device.

[0225] Therefore, in some embodiments, this disclosure relates to a processing tool comprising: a wafer chuck disposed within a heating plate chamber and having an upper surface configured to hold a semiconductor wafer; a heating element disposed within the wafer chuck and configured to increase the temperature of the wafer chuck; a motor coupled to the wafer chuck and configured to rotate the wafer chuck about a rotation axis extending through the upper surface of the wafer chuck; and a control circuit system coupled to the motor and configured to operate the motor to rotate the wafer chuck while the temperature of the wafer chuck is increased, thereby forming a piezoelectric layer on the semiconductor wafer by a sol-gel solution layer.

[0226] The aforementioned processing tool further includes: an air vent opening extending through the heating plate chamber; and an exhaust line disposed outside the heating plate chamber and coupled to the air vent opening.

[0227] In the aforementioned processing tool, the motor is configured to rotate the wafer chuck at least 360 degrees around the chuck.

[0228] The processing tool further includes: an additional heating plate chamber disposed below the heating plate chamber; an additional wafer chuck disposed within the additional heating plate chamber and configured to hold an additional semiconductor wafer; an additional heating element disposed within the additional wafer chuck and configured to increase the temperature of the additional wafer chuck; and an additional motor coupled to the additional wafer chuck and configured to rotate the additional wafer chuck about the rotation axis. The control circuitry is coupled to the additional motor and further configured to operate the additional motor to rotate the additional wafer chuck while the temperature of the additional wafer chuck is increased, thereby forming an additional piezoelectric layer on the additional semiconductor wafer by an additional sol-gel solution layer.

[0229] In other embodiments, this disclosure relates to a method comprising: forming a bottom electrode on a wafer; conveying the wafer to a cooling plate and performing a cooling process on the wafer; forming a first sol-gel solution layer on the wafer using a spin coater; conveying the wafer from the spin coater to a heating plate in a heating plate chamber; performing a baking process in the heating plate chamber to dry the first sol-gel solution layer, thereby forming a first piezoelectric layer from the first sol-gel solution layer; forming a top electrode on the first piezoelectric layer; and dicing the wafer to form a plurality of piezoelectric devices from the wafer, wherein the wafer is arranged in different orientations relative to the heating plate chamber throughout the baking process.

[0230] In the above method, during the first cycle of the baking process, the wafer is oriented to a first predetermined position, during the second cycle of the baking process, the wafer is oriented to a second predetermined position, during the third cycle of the baking process, the wafer is oriented to a third predetermined position, and during the fourth cycle of the baking process, the wafer is oriented to a fourth predetermined position.

[0231] In the above method, the wafer is arranged in different orientations relative to the heating plate chamber throughout the baking process by continuously rotating the heating plate while the heating plate chamber is closed during the baking process.

[0232] In the above method, the method further includes: repeating the following steps to form a plurality of piezoelectric layers on the bottom electrode: conveying the wafer to a cooling plate and performing a cooling process on the wafer; forming a first piezoelectric sol-gel layer on the wafer using a spin coater; conveying the wafer from the spin coater to a heating plate in a heating plate chamber; and performing a baking process in the heating plate chamber to dry the first piezoelectric sol-gel layer, thereby forming a first piezoelectric layer from the first piezoelectric sol-gel layer.

[0233] In the above method, the wafer is arranged in a different orientation relative to the heating plate chamber throughout the baking process by using an orientation device in the heating plate chamber before performing the baking process.

[0234] In the above method, the method further includes: when the wafer is located in the heating plate chamber, using the orienting device to identify the position of the notch on the wafer; orienting the wafer such that the notch is arranged at a first predetermined position in the heating plate chamber;

[0235] Perform a first cycle of the baking process; orient the wafer such that the notch is arranged at a second predetermined position in the heating plate cavity by rotating the wafer away from the first predetermined position by a predetermined amount of degree; perform a second cycle of the baking process; orient the wafer such that the notch is arranged at a third predetermined position in the heating plate cavity by rotating the wafer away from the second predetermined position by the predetermined amount of degree.

[0236] Perform the third cycle of the baking process; orient the wafer such that the notch is arranged at a fourth predetermined position in the heating plate cavity by rotating the wafer away from the third predetermined position by the predetermined amount of degree; and perform the fourth cycle of the baking process.

[0237] In the above method, the predetermined degree is equal to 90 degrees.

[0238] In the above method, the wafer is arranged in different orientations relative to the heating plate chamber throughout the baking process by using an orienting device within the spin coating tool.

[0239] In the above method, the method further includes: when the wafer is located in the spin coater, using the orienting device to identify the position of the notch on the wafer; orienting the wafer such that the notch is arranged at a first predetermined position; maintaining the wafer at the first predetermined position while conveying the wafer from the spin coater to the heating plate in the heating plate chamber; and when the wafer is at the first predetermined position, performing a first cycle of the baking process to form the first piezoelectric layer from the first piezoelectric sol-gel layer.

[0240] The wafer is transported back into the spin coater; a second piezoelectric sol-gel layer is formed on the first piezoelectric layer; the position of the notch is identified using the orienting device within the spin coater; the wafer is oriented such that the notch is positioned at a second predetermined position by rotating it away from the first predetermined position by a predetermined amount of degree; while maintaining the wafer at the second predetermined position, the wafer is transported from the spin coater to the heating plate in the heating plate chamber; and when the wafer is at the second predetermined position, a second cycle of the baking process is performed to form a second piezoelectric layer from the second piezoelectric sol-gel layer.

[0241] In some other embodiments, this disclosure relates to a method comprising: forming a bottom electrode on a wafer; forming a first piezoelectric layer on the bottom electrode using a sol-gel process, wherein the sol-gel process comprises: forming a first sol-gel solution layer on the wafer using a spin coater; conveying the wafer from the spin coater to a heating plate in a heating plate chamber; and performing a baking process in the heating plate chamber to dry, decompose, and densify the first sol-gel solution layer, thereby forming the first piezoelectric layer on the bottom electrode, wherein the wafer is rotated within the heating plate chamber during the baking process; forming a top electrode on the first piezoelectric layer; and forming a plurality of piezoelectric devices from the wafer.

[0242] In the above method, the wafer is continuously rotated within the heating plate cavity during the baking process.

[0243] In the above method, each of the plurality of piezoelectric devices has a breakdown voltage, and the difference between the minimum breakdown voltage of the plurality of piezoelectric devices and the maximum breakdown voltage of the plurality of piezoelectric devices is at most equal to 10 volts.

[0244] In the above method, the baking process includes multiple cycles, wherein the wafer is rotated between each cycle, and wherein the wafer is stationary during each cycle of the baking process.

[0245] In the above method, the wafer is rotated 90 degrees between each cycle of the baking process, and the baking process includes four cycles.

[0246] In the above method, the wafer is rotated using an orientation device arranged in the heating plate cavity, wherein the orientation device includes an optical imaging device and an alignment device.

[0247] In the above method, each cycle of the baking process includes a drying step at a first temperature and a gel decomposition step at a second temperature higher than the first temperature.

[0248] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art will understand that this disclosure can be readily used as a basis for designing or modifying other processes and structures to achieve the same purposes and / or realize the same advantages as the embodiments described herein. Those skilled in the art will also recognize that these equivalent constructions do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and modifications can be made thereto without departing from the spirit and scope of this disclosure.

Claims

1. A processing tool, characterized in that... include: A wafer chuck is disposed within a heated plate chamber and has an upper surface configured to hold a semiconductor wafer. A heating element is disposed within the wafer chuck and configured to increase the temperature of the wafer chuck; An orienting device, coupled to the wafer chuck and configured to position the semiconductor wafer held on the wafer chuck, wherein the orienting device includes an optical imaging device and an alignment device to rotate the semiconductor wafer to a different orientation relative to the heating plate chamber throughout the baking process; as well as A control circuit system, coupled to the orienter device, is configured to operate the orienter device to arrange the semiconductor wafer held on the wafer chuck at different predetermined positions before performing different cycles of the baking process, and after performing the baking process, to form a piezoelectric layer on the semiconductor wafer by a sol-gel solution layer.

2. The processing tool according to claim 1 further includes: The vent opening extends through the heating plate chamber; as well as An exhaust pipe is arranged outside the heating plate chamber and coupled to the vent opening.

3. The processing tool according to claim 1 further includes: An additional heating plate chamber is arranged below the heating plate chamber; An additional wafer chuck is disposed within the additional heating plate cavity and configured to hold an additional semiconductor wafer. An additional heating element is disposed within the additional wafer chuck and configured to increase the temperature of the additional wafer chuck; as well as An additional orientation device, coupled to the additional wafer chuck, is configured to position the additional semiconductor wafer held on the additional wafer chuck. The control circuitry is coupled to the additional oriented device and configured to operate the additional oriented device to arrange the additional semiconductor wafer held on the additional wafer chuck at different predetermined positions before performing different cycles of the baking process, and after performing the baking process, to form an additional piezoelectric layer on the additional semiconductor wafer by an additional sol-gel solution layer.

4. A method for forming a piezoelectric device, characterized in that... include: A bottom electrode is formed on the wafer; The wafer is transported to a cooling plate and a cooling process is performed on the wafer; A first sol-gel solution layer was formed on the wafer using a spin coater. The wafer is transported from the spin coating tool to the heating plate in the heating plate chamber; A baking process is performed in the heating plate chamber to dry the first sol-gel solution layer, thereby forming a first piezoelectric layer from the first sol-gel solution layer; A top electrode is formed on top of the first piezoelectric layer; as well as The wafer is diced to form multiple piezoelectric devices. Throughout the baking process, the wafer is arranged in different orientations relative to the heating plate chamber. The orientation device is operated by a control circuit system to arrange the wafer in different predetermined positions before different cycles of the baking process. The orientation device includes an optical imaging device and an alignment device to rotate the wafer to be in different orientations relative to the heating plate chamber throughout the baking process.

5. The piezoelectric device forming method according to claim 4, wherein during the first cycle of the baking process, the wafer is oriented to a first predetermined position, wherein during the second cycle of the baking process, the wafer is oriented to a second predetermined position, wherein during the third cycle of the baking process, the wafer is oriented to a third predetermined position, and wherein during the fourth cycle of the baking process, the wafer is oriented to a fourth predetermined position.

6. The piezoelectric device forming method according to claim 4, wherein the wafer is arranged in different orientations relative to the heating plate chamber throughout the baking process by continuously rotating the heating plate while the heating plate chamber is closed during the baking process.

7. The method for forming a piezoelectric device according to claim 4, wherein the method further comprises: The following steps are repeated to form multiple piezoelectric layers on the bottom electrode: the wafer is transported to a cooling plate and a cooling process is performed on the wafer; a first piezoelectric sol-gel layer is formed on the wafer using a spin coater; the wafer is transported from the spin coater to a heating plate in a heating plate chamber; and a baking process is performed in the heating plate chamber to dry the first piezoelectric sol-gel layer, thereby forming a first piezoelectric layer from the first piezoelectric sol-gel layer.

8. The method for forming a piezoelectric device according to claim 4 further includes: When the wafer is located in the heating plate chamber, the orienting device is used to identify the position of the notch on the wafer; The wafer is oriented such that the notch is positioned at a first predetermined location within the heating plate cavity; Perform the first cycle of the baking process; By rotating the wafer away from the first predetermined position by a predetermined amount of degree, the wafer is oriented such that the notch is arranged at a second predetermined position in the heating plate cavity; Perform the second cycle of the baking process; By rotating the wafer away from the second predetermined position by the predetermined amount of degree, the wafer is oriented such that the notch is arranged at a third predetermined position in the heating plate cavity; Perform the third cycle of the baking process; By rotating the wafer away from the third predetermined position by the predetermined amount of degrees, the wafer is oriented such that the notch is positioned at a fourth predetermined position within the heating plate cavity; and Perform the fourth cycle of the baking process.

9. The method for forming a piezoelectric device according to claim 8, wherein the predetermined degree is equal to 90 degrees.

10. The method of forming a piezoelectric device according to claim 7, wherein the wafer is arranged in a different orientation relative to the heating plate chamber throughout the baking process by using the orientation device within the spin coater.

11. The method for forming a piezoelectric device according to claim 10 further includes: When the wafer is in the spin coating tool, the orienting device is used to identify the location of the notch on the wafer; The wafer is oriented such that the notch is positioned at a first predetermined location; The wafer is held at the first predetermined position while being transported from the spin coating tool to the heating plate in the heating plate chamber; When the wafer is in the first predetermined position, the first cycle of the baking process is performed to form the first piezoelectric layer from the first piezoelectric sol-gel layer; The wafer is then transported back into the spin coating tool; A second piezoelectric sol-gel layer is formed on the first piezoelectric layer; The position of the notch is identified using the orienting device within the spin coating tool; By rotating the wafer away from the first predetermined position by a predetermined amount of degree, the wafer is oriented such that the notch is arranged at the second predetermined position; While maintaining the wafer at the second predetermined position, the wafer is transported from the spin coating tool to the heating plate in the heating plate chamber; as well as When the wafer is in the second predetermined position, the second cycle of the baking process is performed to form a second piezoelectric layer from the second piezoelectric sol-gel layer.

12. A method for forming a piezoelectric device, characterized in that... include: A bottom electrode is formed on the wafer; A first piezoelectric layer is formed on the bottom electrode using a sol-gel process, wherein the sol-gel process includes: A first sol-gel solution layer is formed on the wafer using a spin coater. The wafer is transported from the spin coater to a heating plate in a heating plate chamber, and an orientation device is operated by a control circuit system to position the wafer at different predetermined locations before different cycles of the baking process. The orientation device includes an optical imaging device and an alignment device to rotate the wafer to different orientations relative to the heating plate chamber throughout the baking process. The baking process is performed in the heating plate chamber to dry, decompose and densify the first sol-gel solution layer, thereby forming the first piezoelectric layer on the bottom electrode, wherein the wafer is rotated in the heating plate chamber during the baking process. A top electrode is formed on top of the first piezoelectric layer; and Multiple piezoelectric devices are formed from the wafer.

13. The method of forming a piezoelectric device according to claim 12, wherein each of the plurality of piezoelectric devices has a breakdown voltage, and the difference between the minimum breakdown voltage of the plurality of piezoelectric devices and the maximum breakdown voltage of the plurality of piezoelectric devices is at most equal to 10 volts.

14. The method of forming a piezoelectric device according to claim 12, wherein the baking process includes a plurality of cycles, wherein the wafer is rotated between each of the cycles, and wherein the wafer is stationary during each of the cycles of the baking process.

15. The method of forming a piezoelectric device according to claim 14, wherein the wafer is rotated 90 degrees between each cycle of the baking process, and wherein the baking process comprises four cycles.

16. The method for forming a piezoelectric device according to claim 14, wherein each cycle of the baking process includes a drying step at a first temperature and a gel decomposition step at a second temperature above the first temperature.

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