Motor protection circuit for electric door lock

Abstract

The present invention discloses a motor protection circuit for an electric door lock, which includes a motor and a motor driver chip. The motor is electrically connected to the control output pin of the motor driver chip. The motor driver chip is also provided with a ground pin. The circuit also includes a motor detection self-locking circuit for detecting the working status of the motor and automatically cutting off the input control or power supply of the motor driver chip when the motor abnormally generates a large current. The motor protection circuit of this electric door lock is provided with a motor detection self-locking circuit, which automatically detects the working status of the motor. When the motor abnormally generates a large current, the motor detection self-locking circuit will cut off the input control or power supply of the motor driver chip to protect the motor and the electronic lock circuit.

Description

Technical Field

[0001] The present invention relates to an electric-controlled door lock, in particular to a motor protection circuit of the electric-controlled door lock. Background Art

[0002] The smart lock motor is an essential component for its proper function. Much like the human heart, the smart lock motor plays the role of the heart. The motor is the power source for the smart door lock and consumes minimal power. When you unlock the door using a password, card, or fingerprint, you hear the motor turning. Like the human central nervous system, the motor connects electronics and mechanics, acting as a power hub and connecting the upper and lower levels. Its importance is self-evident. If the motor malfunctions, the smart lock will not open and close automatically. Generally speaking, smart locks are categorized into two types based on how the motor is activated: fully automatic and semi-automatic.

[0003] Semi-automatic smart door locks combine manual and mechanical operation. They activate via a motor-driven clutch, but manual operation of the handle is still required. Fully automatic smart door locks, on the other hand, fully automate the mechanical device and lock production process. These locks place high demands on the motor, requiring significant torque to operate properly. Fully automatic smart locks, on the other hand, rely solely on the motor to operate, unaffected by external forces. The motor's lifespan and response speed are also crucial. Furthermore, factors such as motor stability and error rates significantly impact user experience.

[0004] Commercially available electronic lock motor designs typically utilize a control chip + motor driver chip design, without any added protection. When the motor and mechanical connection become stuck (causing a jam), the motor generates its own maximum current, which can burn out the electronic circuitry and damage the motor itself, rendering the electronic lock useless and preventing the user from opening the door properly. Prolonged high current flow can also cause spontaneous combustion and fire risks.

[0005] Chinese patent document CN1773070A, published on May 17, 2006, discloses a control method for an electric door lock. The electric door lock includes a lock bolt, a drive mechanism powered by a motor, and a control circuit for controlling the drive mechanism. The control circuit detects changes in the motor's operating current to determine whether the motor is stalled, thereby obtaining a signal indicating whether the lock bolt has fully extended or retracted. The control circuit then controls the lock bolt's extension or retraction via the drive mechanism. A controller for the electric door lock implemented according to the control method includes a motor capable of forward and reverse rotation, a transmission mechanism including a rotating wheel with a receptacle for a transmission rod of a mechanical lock body, and a control circuit comprising a microprocessor circuit, a power supply circuit, a data acquisition and processing control circuit, and a motor control and drive circuit, as well as an AD detection circuit. This door lock utilizes the AD detection circuit to detect a stall signal and then feed it back to the microprocessor circuit, which then takes control measures. Although the prior art detects abnormal current signals using the AD detection circuit, the need to feed the signal back to the microprocessor circuit for control results in a significant delay. During this process, the abnormal current can damage various electrical components in the circuit. In addition, since the motor will generate its own maximum circulating current when it is stalled, the current will not only burn out the electronic circuit, but also damage the motor itself, making the electronic lock scrapped and the user unable to open the door lock normally. The long-term generation of large current may also cause the risk of spontaneous combustion and fire. Summary of the Invention

[0006] The purpose of the present invention is to provide a motor protection circuit for an electric door lock which has a simple and reasonable circuit and automatically cuts off the input control or power supply when a large current is generated by an abnormal motor.

[0007] The object of the present invention is achieved like this:

[0008] A motor protection circuit for an electric door lock includes a motor and a motor driver chip, the motor being electrically connected to a control output pin of the motor driver chip, and the motor driver chip also being provided with a ground pin. The circuit is characterized in that it also includes a motor detection self-locking circuit for detecting the working state of the motor and automatically cutting off the input control or power supply of the motor driver chip when the motor abnormally generates a large current; the ground pin serves as a signal feedback terminal, and the motor detection self-locking circuit includes a first field-effect transistor, a second field-effect transistor, a first resistor, a second resistor, and a third resistor. The source of the first field-effect transistor is electrically connected to the power input pin or the control pin of the motor driver chip, the gate of the first field-effect transistor is electrically connected to the drain of the second field-effect transistor, the gate of the first field-effect transistor is also grounded via the first resistor, the gate of the second field-effect transistor is electrically connected to the signal feedback terminal via the second resistor, a third resistor is further connected between the drain of the second field-effect transistor and its gate, and the drain of the first field-effect transistor and the source of the second field-effect transistor are respectively electrically connected to the power supply and / or the control signal terminal.

[0009] The purpose of the present invention can also be solved by the following technical measures:

[0010] As a more specific solution, the power input pin of the motor driving chip includes a main power input pin and an auxiliary power input pin.

[0011] As a further solution, the motor driver chip is provided with an enable pin, which serves as the control signal terminal and is electrically connected to the source of the second field effect transistor, the drain of the first field effect transistor is electrically connected to the power supply, and the source of the first field effect transistor is electrically connected to the auxiliary power input pin of the motor driver chip.

[0012] As a further solution, the motor drive chip is provided with an enable pin, which serves as the control pin and is electrically connected to the source of the first field effect transistor; and also includes a main control chip, which is provided with a current feedback signal terminal, which serves as the control signal terminal and is electrically connected to the drain of the first field effect transistor and the source of the second field effect transistor.

[0013] As a further solution, the main control chip is provided with an enable signal terminal, which serves as the control signal terminal and is electrically connected to the source of the second field effect transistor, the drain of the first field effect transistor is electrically connected to the power supply, and the source of the first field effect transistor is electrically connected to the main power input pin of the motor drive chip.

[0014] As a further solution, the enable pin of the motor driving chip is grounded through a fifth resistor.

[0015] As a further solution, it also includes a main control chip, which is provided with the control signal end, and the control signal end includes a first signal output end and a second signal output end. The control input pin of the motor drive chip includes a first control input pin and a second control input pin, and the first control input pin and the second control input pin are electrically connected to the first signal output end and the second signal output end respectively; the first signal output end and the second signal output end are electrically connected to the source of the second field effect transistor through a first diode and a second diode respectively; the drain of the first field effect transistor is electrically connected to the power supply, and the source of the first field effect transistor is electrically connected to the auxiliary power input pin or the main power input pin of the motor drive chip.

[0016] As a further solution, the model of the first field effect tube is AO3402, the model of the second field effect tube is AO3401; the resistance of the first resistor is 10KΩ, the resistance of the second resistor is 10KΩ, and the resistance of the third resistor is 100KΩ.

[0017] As a further solution, the ground pin of the motor driver chip is grounded via a fourth resistor, and the fourth resistor is connected in parallel with the first filter capacitor. The first filter capacitor can eliminate the large current generated by the instantaneous start of the motor.

[0018] As a further solution, the motor is connected in parallel with a second capacitor.

[0019] The beneficial effects of the present invention are as follows:

[0020] (1) The motor protection circuit of this electric door lock is equipped with a motor detection self-locking circuit to automatically detect the working status of the motor. When the motor abnormally generates a large current, the motor detection self-locking circuit will cut off the input control or power supply of the motor driver chip to protect the motor and the electronic lock circuit.

[0021] (2) The detection signal of the motor protection circuit of this electric door lock is derived from the ground pin of the motor driver chip. The high and low level signals fed back from this pin are used to trigger the motor detection self-locking circuit equipped with a field effect transistor, thereby cutting off the input control or power supply connected to the motor driver chip through the motor detection self-locking circuit. The motor driver chip stops working and the large current flowing through the motor disappears, thereby protecting the motor. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a circuit diagram of the first embodiment of the present invention.

[0023] Figure 2 This is a circuit diagram of the second embodiment of the present invention.

[0024] Figure 3 This is a circuit diagram of the third embodiment of the present invention.

[0025] Figure 4 This is a circuit diagram of the fourth embodiment of the present invention.

[0026] Figure 5 This is a circuit diagram of the fifth embodiment of the present invention. DETAILED DESCRIPTION

[0027] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0028] Example 1, see Figure 1 As shown, a motor protection circuit for an electric door lock includes a motor U2 and a motor driver chip U1 with an enable pin EN. The motor U2 is electrically connected to the control output pins OUT1 and OUT2 of the motor driver chip U1. The motor driver chip U1 is also provided with a power input pin and a ground pin GND. The ground pin GND serves as a signal feedback terminal TA. The signal feedback terminal TA is electrically connected to the power input pin through a motor detection self-locking circuit E to cut off the power supply of the motor driver chip U1 through the motor detection self-locking circuit E.

[0029] The power input pins of the motor driving chip U1 include a main power input pin VM and an auxiliary power input pin VCC.

[0030] The motor detection self-locking circuit E includes a first field-effect transistor Q1, a second field-effect transistor Q2, a first resistor R1 (pull-down resistor), a second resistor R2 and a third resistor R3. The source of the first field-effect transistor Q1 is electrically connected to the auxiliary power input pin VCC of the motor driver chip U1, the gate of the first field-effect transistor Q1 is electrically connected to the drain of the second field-effect transistor Q2, the gate of the first field-effect transistor Q1 is also grounded through the first resistor R1, the gate of the second field-effect transistor Q2 is electrically connected to the signal feedback terminal TA through the second resistor R2, and a third resistor R3 is further connected between the drain of the second field-effect transistor Q2 and its gate. The drain of the first field-effect transistor Q1 and the source of the second field-effect transistor Q2 are electrically connected to the electrical signal terminal.

[0031] The electrical signal end includes a power supply end IN_3.3V and an enable pin EN of the motor driver chip U1. The power supply end IN_3.3V and the enable pin EN are electrically connected to the drain of the first field effect transistor Q1 and the source of the second field effect transistor Q2, respectively; the source of the first field effect transistor Q1 is electrically connected to the auxiliary power input pin VCC of the motor driver chip U1.

[0032] The model of the first field effect transistor Q1 is AO3402, the model of the second field effect transistor Q2 is AO3401; the resistance of the first resistor R1 is 10KΩ, the resistance of the second resistor R2 is 10KΩ, and the resistance of the third resistor R3 is 100KΩ.

[0033] The ground pin GND of the motor driver chip U1 is grounded via a fourth resistor R4, which is connected in parallel with the first filter capacitor C1. The resistance of the fourth resistor R4 is 1R, and the capacitance of the first filter capacitor C1 is 100 nF.

[0034] The enable pin EN of the motor driving chip U1 is grounded via a fifth resistor R5 , and the resistance of the fifth resistor R5 is 100 KΩ.

[0035] The motor U2 is connected in parallel with a second capacitor C2 having a capacitance of 100 nF.

[0036] The input voltage of the main power input pin VM of the motor driver chip U1 is 6 V, and the input voltage of the auxiliary power input pin VCC is +3.3 V. The motor U2 is a DC motor (direct current motor).

[0037] The motor driver chip U1 has 9 pins, the main power input pin VM is pin 1, the control output pin OUT1 is pin 2, the control output pin OUT2 is pin 3, the ground pin GND is pin 4, the control input pin IN2 is pin 5, the control input pin IN1 is pin 6, the enable pin EN is pin 7, the auxiliary power input pin VCC is pin 8, and the fixed pin EP is pin 9 (ground).

[0038] It also includes a main control chip (not shown in the figure), which outputs a motor enable control signal MOTOR_EN. The main control chip is also provided with a first signal output terminal IN_A and a second signal output terminal IN_B. The first signal output terminal IN_A and the second signal output terminal IN_B are electrically connected to the control input pin IN1 and the control input pin IN2 of the motor driver chip U1, respectively.

[0039] Its working principle is: the drain of the first field effect transistor Q1 is always in the on state, the gate of the first field effect transistor Q1 is connected to the first resistor R1 (pull-down resistor), and the power supply terminal IN_3.3V flows through the first field effect transistor Q1 to generate a +3.3V voltage to power the auxiliary power input pin VCC of the motor driver chip U1.

[0040] When motor U2 is operating normally, the current flowing through the fourth resistor R4 is low, and the signal feedback terminal TA is low. When the motor is operating abnormally, the current flowing through the fourth resistor R4 is high, and the signal feedback terminal TA is high. The signal feedback terminal TA is connected to the gate A1 of the second FET Q2 via the second resistor R2. When gate A1 goes high, the second FET Q2 is triggered to turn on. The motor enable control signal MOTOR_EN (high) output by the main control chip flows through the second FET Q2 and is applied to A2 (the gate of the first FET Q1). Simultaneously, A2 feeds back a high signal to gate A1 through the third resistor. This creates a self-locking control at the gate of the first FET Q1, ensuring that the second FET Q2 remains on regardless of the signal at the signal feedback terminal TA. Furthermore, when A2 goes high, the first FET Q1 is turned off, disconnecting the auxiliary power input pin VCC of the motor driver chip U1. The motor driver chip U1 stops operating, and the high current flowing through the motor disappears, protecting the motor. Only when the motor enable control signal MOTOR_EN output by the main control chip becomes low level can the gate of the second field effect transistor Q2 be unlocked and the entire circuit returns to normal.

[0041] The difference between the second embodiment and the first embodiment is that: Figure 2 As shown, the signal feedback terminal TA is electrically connected to the enable pin EN through the motor detection self-locking circuit E, so as to cut off the input control of the motor driving chip U1 through the motor detection self-locking circuit E.

[0042] It also includes a main control chip (not shown in the figure), and the control signal end is the current feedback signal end MOTOR_CS of the main control chip. The current feedback signal end MOTOR_CS is electrically connected to the drain of the first field effect transistor Q1 and the source of the second field effect transistor Q2 at the same time; the source of the first field effect transistor Q1 is electrically connected to the enable pin EN of the motor drive chip U1.

[0043] Its working principle is: the drain of the first field effect transistor Q1 is always in the on state, the gate of the first field effect transistor Q1 is connected to the first resistor R1 (pull-down resistor), and the current feedback signal output by the main control chip flows through the first field effect transistor Q1 to generate a motor enable control signal MOTOR_EN and transmit it to the enable pin EN of the motor driver chip.

[0044] When motor U2 is operating normally, the current flowing through the fourth resistor R4 is low, and the signal feedback terminal TA is low. When the motor is operating abnormally, the current flowing through the fourth resistor R4 is high, and the signal feedback terminal TA is high. The signal feedback terminal TA is connected to the gate A1 of the second FET Q2 via the second resistor R2. When gate A1 goes high, the second FET Q2 is triggered to conduct. The current feedback signal MOTOR_CS (high) output by the main control chip flows through the second FET Q2 and is applied to A2 (the gate of the first FET Q1). Simultaneously, A2 feeds back a high signal to gate A1 through the third resistor. This creates a self-locking control at the gate of the first FET Q1, ensuring that the second FET Q2 remains on regardless of the signal at the signal feedback terminal TA. Furthermore, when A2 goes high, the first FET Q1 is turned off, disconnecting the enable pin EN of the motor driver chip U1, deactivating the motor driver chip U1 and eliminating the high current flowing through the motor, thus protecting the motor. Only when the current feedback signal MOTOR_CS output by the main control chip becomes low level can the gate of the second field effect transistor Q2 be unlocked and the entire circuit returns to normal state.

[0045] The difference between the third embodiment and the first embodiment is that: Figure 3 As shown, the power supply is the power supply terminal VCC_IN, the control signal terminal is the enable signal terminal MOTOR_EN of the main control chip, the power supply terminal VCC_IN and the enable signal terminal MOTOR_EN are electrically connected to the drain of the first field effect transistor Q1 and the source of the second field effect transistor Q2 respectively; the source of the first field effect transistor Q1 is electrically connected to the main power input pin VM.

[0046] Its working principle is: the drain of the first field effect transistor Q1 is always in the on state, the gate of the first field effect transistor Q1 is connected to the first resistor R1 (pull-down resistor), and the power supply terminal VCC_IN flows through the first field effect transistor Q1 to generate a +3.3V voltage to supply power to the main power input pin VM of the motor driver chip U1.

[0047] When motor U2 is operating normally, the current flowing through the fourth resistor R4 is low, and the signal feedback terminal TA is low. When the motor is operating abnormally, the current flowing through the fourth resistor R4 is high, and the signal feedback terminal TA is high. The signal feedback terminal TA is connected to the gate A1 of the second FET Q2 via the second resistor R2. When gate A1 goes high, the second FET Q2 is triggered to turn on. The motor enable control signal MOTOR_EN (high) output by the main control chip flows through the second FET Q2 and is applied to A2 (the gate of the first FET Q1). Simultaneously, A2 feeds back a high signal to gate A1 through the third resistor. This creates a self-locking control at the gate of the first FET Q1, ensuring that the second FET Q2 remains on regardless of the signal at the signal feedback terminal TA. Furthermore, when A2 goes high, the first FET Q1 is turned off, disconnecting the input power to the main power input pin VM of the motor driver chip U1. The motor driver chip U1 stops operating, and the high current flowing through the motor disappears, protecting the motor. Only when the motor enable control signal MOTOR_EN output by the main control chip becomes low level can the gate of the second field effect transistor Q2 be unlocked and the entire circuit returns to normal.

[0048] The fourth embodiment differs from the first embodiment in that: Figure 4 As shown, the signal feedback terminal TA is electrically connected to the power input pin through the motor detection self-locking circuit E. The motor detection self-locking circuit E is also electrically connected to the main control chip and the power supply. The motor detection self-locking circuit E is used to cut off the power input of the auxiliary power input pin VCC of the motor driver chip U1.

[0049] The drain of the first field effect transistor Q1 and the source of the second field effect transistor Q2 are electrically connected to the power supply IN_3.3V and the signal output terminal (control signal terminal) of the main control chip respectively.

[0050] The source of the first field effect transistor Q1 is electrically connected to the auxiliary power input pin VCC of the motor driver chip U1 .

[0051] The signal output end of the main control chip includes a first signal output end IN_A and a second signal output end IN_B, and the control input pin of the motor drive chip U1 includes a first control input pin IN1 and a second control input pin IN2. The first control input pin IN1 and the second control input pin IN2 are electrically connected to the first signal output end IN_A and the second signal output end IN_B respectively; the first signal output end IN_A and the second signal output end IN_B are electrically connected to the source of the second field effect transistor Q2 through the first diode D1 and the second diode D2 respectively.

[0052] The first diode D1 and the second diode D2 are both 1N4007W.

[0053] Its working principle is: the drain of the first field effect transistor Q1 is always in the on state, the gate of the first field effect transistor Q1 is connected to the first resistor R1 (pull-down resistor), and the power supply terminal IN_3.3V flows through the first field effect transistor Q1 to generate a +3.3V voltage to power the auxiliary power input pin VCC of the motor driver chip U1.

[0054] When motor U2 is operating normally, the current flowing through the fourth resistor R4 is low, and the signal feedback terminal TA is low. When the motor is operating abnormally, the current flowing through the fourth resistor R4 is high, and the signal feedback terminal TA is high. The signal feedback terminal TA is connected to the gate A1 of the second FET Q2 via the second resistor R2. When gate A1 goes high, the second FET Q2 is triggered to conduct. The high-level IN_A / IN_B outputs from the main control chip flow through the second FET Q2 and are loaded onto A2 (the gate of the first FET Q1). Simultaneously, A2 feeds back a high-level signal to gate A1 through the third resistor. This creates a self-locking control on the gate of the first FET Q1, ensuring that the second FET Q2 remains on regardless of the signal at the signal feedback terminal TA. Furthermore, when A2 goes high, the first FET Q1 is turned off, cutting off the power to the auxiliary power input pin VCC of the motor driver chip U1. The motor driver chip U1 stops operating, and the high current flowing through the motor disappears, protecting the motor. Only when IN_A / IN_B output by the main control chip becomes low level can the gate of the second field effect transistor Q2 be unlocked and the entire circuit returns to normal.

[0055] The difference between the fifth embodiment and the fourth embodiment is that: Figure 2 As shown, the drain of the first field effect transistor Q1 is electrically connected to the power source VCC_IN, and the source of the first field effect transistor Q1 is electrically connected to the main power input pin VM of the motor driver chip U1.

[0056] Its working principle is: the drain of the first field effect transistor Q1 is always in the on state, the gate of the first field effect transistor Q1 is connected to the first resistor R1 (pull-down resistor), and the power supply terminal VCC_IN flows through the first field effect transistor Q1 to generate a 6V voltage to supply power to the main power input pin VM of the motor driver chip U1.

[0057] When motor U2 is operating normally, the current flowing through the fourth resistor R4 is low, and the signal feedback terminal TA is low. When the motor is operating abnormally, the current flowing through the fourth resistor R4 is high, and the signal feedback terminal TA is high. The signal feedback terminal TA is connected to the gate A1 of the second FET Q2 via the second resistor R2. When gate A1 goes high, the second FET Q2 is triggered to conduct. The high-level IN_A / IN_B outputs from the main control chip flow through the second FET Q2 and are loaded onto A2 (the gate of the first FET Q1). Simultaneously, A2 feeds back a high-level signal to gate A1 through the third resistor. This creates a self-locking control on the gate of the first FET Q1, ensuring that the second FET Q2 remains on regardless of the signal at the signal feedback terminal TA. Furthermore, when A2 goes high, the first FET Q1 is turned off, disconnecting the input power to the main power input pin VM of the motor driver chip U1. The motor driver chip U1 stops operating, and the high current flowing through the motor disappears, protecting the motor. Only when IN_A / IN_B output by the main control chip becomes low level can the gate of the second field effect transistor Q2 be unlocked and the entire circuit returns to normal.

[0058] The above is a preferred embodiment of the present invention, which shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and improvements may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and improvements are intended to fall within the scope of the present invention as claimed, which is defined by the appended claims and their equivalents.

Claims

1. A motor protection circuit for an electric door lock, comprising a motor and a motor driver chip, wherein the motor is electrically connected to a control output pin of the motor driver chip, and the motor driver chip is further provided with a ground pin, characterized in that: It also includes a motor detection self-locking circuit for detecting the working status of the motor and automatically cutting off the input control or power supply of the motor driver chip when the motor abnormally generates a large current; the ground pin serves as a signal feedback end, and the motor detection self-locking circuit includes a first field effect transistor, a second field effect transistor, a first resistor, a second resistor and a third resistor. The source of the first field effect transistor is electrically connected to the power input pin or control pin of the motor driver chip, the gate of the first field effect transistor is electrically connected to the drain of the second field effect transistor, the gate of the first field effect transistor is also grounded through the first resistor, the gate of the second field effect transistor is electrically connected to the signal feedback end through the second resistor, and a third resistor is also connected between the drain of the second field effect transistor and its gate. The drain of the first field effect transistor and the source of the second field effect transistor are respectively electrically connected to the power supply and / or control signal end.

2. The motor protection circuit for an electric door lock according to claim 1, characterized in that: The power input pins of the motor driving chip include a main power input pin and an auxiliary power input pin.

3. The motor protection circuit for an electric door lock according to claim 2, characterized in that: The motor driver chip is provided with an enable pin, which serves as the control signal terminal and is electrically connected to the source of the second field effect transistor. The drain of the first field effect transistor is electrically connected to the power supply, and the source of the first field effect transistor is electrically connected to the auxiliary power input pin of the motor driver chip.

4. The motor protection circuit for an electric door lock according to claim 2, characterized in that: The motor drive chip is provided with an enable pin, which serves as the control pin and is electrically connected to the source of the first field effect transistor; it also includes a main control chip, which is provided with a current feedback signal terminal, which serves as the control signal terminal and is electrically connected to the drain of the first field effect transistor and the source of the second field effect transistor.

5. The motor protection circuit for an electric door lock according to claim 4, characterized in that: The main control chip is provided with an enable signal terminal, which serves as the control signal terminal and is electrically connected to the source of the second field effect transistor. The drain of the first field effect transistor is electrically connected to the power supply, and the source of the first field effect transistor is electrically connected to the main power input pin of the motor drive chip.

6. The motor protection circuit for an electric door lock according to claim 3, 4 or 5, characterized in that: The enable pin of the motor driving chip is grounded through a fifth resistor.

7. The motor protection circuit for an electric door lock according to claim 2, characterized in that: It also includes a main control chip, which is provided with the control signal end, and the control signal end includes a first signal output end and a second signal output end. The control input pin of the motor drive chip includes a first control input pin and a second control input pin, and the first control input pin and the second control input pin are electrically connected to the first signal output end and the second signal output end respectively; the first signal output end and the second signal output end are electrically connected to the source of the second field effect transistor through a first diode and a second diode respectively; the drain of the first field effect transistor is electrically connected to the power supply, and the source of the first field effect transistor is electrically connected to the auxiliary power input pin or the main power input pin of the motor drive chip.

8. The motor protection circuit for an electric door lock according to claim 1, characterized in that: The model of the first field effect tube is AO3402, the model of the second field effect tube is AO3401; the resistance value of the first resistor is 10KΩ, the resistance value of the second resistor is 10KΩ, and the resistance value of the third resistor is 100KΩ.

9. The motor protection circuit for an electric door lock according to claim 1, characterized in that: The ground pin of the motor driving chip is grounded via a fourth resistor, and the fourth resistor is connected in parallel with the first filter capacitor.

10. The motor protection circuit for an electric door lock according to claim 1, characterized in that: The motor is connected in parallel with the second capacitor.

Images