A Sturdy-MASH modulator based on noise coupling and a signal modulation method

Abstract

This invention relates to the field of signal modulation technology, proposing a noise-coupled Sturdy-MASH modulator and signal modulation method for converting analog input signals into digital output signals. The modulator comprises a first Delta-Sigma modulation module and a second Delta-Sigma modulation module cascaded sequentially. The first Delta-Sigma modulation module includes a quantizer Q1, and the second Delta-Sigma modulation module includes a quantizer Q2. The analog input signal is input to the first Delta-Sigma modulation module for modulation, and the quantizer Q1 generates a first quantization error and a first intermediate digital signal. The first quantization error is input to the second Delta-Sigma modulation module for modulation, and the quantizer Q2 generates a second quantization error and a second intermediate digital signal. The second quantization error is delayed by one unit before being fed to the input of the quantizer Q2 for subtraction, achieving noise coupling. This improves the first-order noise shaping capability without increasing the number of integrators, thereby enhancing the overall performance of the modulator while reducing circuit complexity.

Description

Technical Field

[0001] This invention relates to the field of signal modulation technology, and more specifically, to a noise-coupled Sturdy-MASH structure modulator and signal modulation method. Background Technology

[0002] Digital mobile fronthaul systems based on Delta-Sigma modulators utilize oversampling and noise shaping techniques to achieve high-precision data conversion with low quantization bits, thus addressing the low spectral efficiency issue of common public radio interface protocols in digital mobile fronthaul systems. In Delta-Sigma modulator-based digital mobile fronthaul systems, increasing the modulator order can effectively improve the performance of the error vector amplitude; however, for single-loop Delta-Sigma modulators, stability issues can easily arise when the order exceeds 4.

[0003] A novel Delta-Sigma modulator with a MASH structure is proposed. Based on the traditional fourth-order two-stage MASH (Multi-Stage Noise Shaping) Delta-Sigma modulator, it uses three analog signals (the useful signal is superimposed with the output of the first integrator and subtracted from the output of the second integrator) as the input to the second stage. Two feedforward paths are introduced into the second stage structure, feeding the signals into the second and third adders to form a feedforward structure. The improved modulator completely cancels the quantization noise in the first stage and performs fourth-order shaping on the quantization noise in the second stage, reducing it by one-third, thus improving the modulator's performance. However, while introducing the feedforward structure, this modulator also increases the number of integrators in the modulator circuit, increasing circuit complexity, reducing modulator efficiency, and raising operating costs. Summary of the Invention

[0004] This invention provides a noise-coupled Sturdy-MASH modulator and signal modulation method to improve the overall performance and efficiency of Sturdy-MASH modulators.

[0005] To solve the above-mentioned technical problems, the technical solution of the present invention is as follows:

[0006] In the first aspect, the present invention proposes a noise-coupled Sturdy-MASH structure modulator for converting analog input signals into digital output signals, comprising: a first Delta-Sigma modulation module and a second Delta-Sigma modulation module cascaded in sequence.

[0007] The first Delta-Sigma modulation module includes a quantizer Q1, and the second Delta-Sigma modulation module includes a quantizer Q2.

[0008] The analog input signal is input to the first Delta-Sigma modulation module for modulation, and the quantizer Q1 generates a first quantization error and a first intermediate digital signal.

[0009] The first quantization error is input to the second Delta-Sigma modulation module for modulation. The quantizer Q2 generates a second quantization error and a second intermediate digital signal, respectively. The second quantization error is delayed by one unit and then sent to the input of the quantizer Q2 for subtraction to achieve noise coupling.

[0010] The first intermediate digital signal is subtracted from the second intermediate digital signal to obtain the digital output signal.

[0011] Secondly, the present invention also proposes a signal modulation method using the above-mentioned noise-coupled Sturdy-MASH structure modulator, comprising:

[0012] The analog input signal is input to the first Delta-Sigma modulation module to obtain the first quantization error and the first intermediate digital signal.

[0013] The first quantization error is input into the second Delta-Sigma modulation module to obtain the second quantization error and the second intermediate digital signal. The second quantization error is then delayed by one unit and sent to the input of the quantizer Q2 for subtraction to achieve noise coupling.

[0014] The first intermediate digital signal is subtracted from the second intermediate digital signal to obtain the digital output signal.

[0015] Compared with the prior art, the beneficial effects of the technical solution of the present invention are as follows: The present invention achieves first-order noise shaping without increasing the number of integrators by cascading two-stage modulation modules and using the second quantization error for noise coupling in the second Delta-Sigma modulation module, thereby improving the first-order noise shaping capability and thus improving the overall performance of the modulator while reducing the circuit complexity. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the Sturdy-MASH structure modulator based on noise coupling of the present invention.

[0017] Figure 2 This is a Z-domain block diagram of the noise coupling structure in Example 2.

[0018] Figure 3 The above is the amplitude-frequency response curve corresponding to the noise transfer function of the noise coupling structure in Example 2.

[0019] Figure 4 This is a flowchart of the signal modulation method in Example 3.

[0020] Figure 5 This is a flowchart of the digital signal processing in Example 3.

[0021] Figure 6 The following are power spectral density diagrams of different modulators in Example 3.

[0022] Figure 7 The figure shows the experimental results of the error vector amplitude of different modulators as a function of the received optical power ROP in Example 3.

[0023] Figure 8 This is a schematic diagram of the error vector amplitude value of each component carrier at the receiving end in Example 3 when the received optical power is -13dBm.

[0024] The following amplifiers are included: First Delta-Sigma Modulation Module-1, First Amplifier-1001, Second Amplifier-1002, Third Amplifier-1003, Fourth Amplifier-1004, Fifth Amplifier-1005, Sixth Amplifier-1006, First Adder-1007, First Integrator-1008, Second Adder-1009, Second Integrator-1010, Third Adder-1011, Fourth Adder-1012, Second Delta... -Sigma modulation module-20, seventh amplifier-2001, eighth amplifier-2002, ninth amplifier-2003, tenth amplifier-2004, eleventh amplifier-2005, twelfth amplifier-2006, sixth adder-2007, third integrator-2008, seventh adder-2009, fourth integrator-2010, eighth adder-2011, ninth adder-2012, fifth adder-3, filter-4. Detailed Implementation

[0025] The accompanying drawings are for illustrative purposes only and are not to be construed as limiting this patent;

[0026] The technical solution of the present invention is further described below with reference to the accompanying drawings and embodiments.

[0027] Example 1

[0028] See Figure 1 This embodiment proposes a noise-coupled Sturdy-MASH modulator to convert analog input signals into digital output signals.

[0029] The Sturdy-MASH modulator described in this embodiment is a two-stage modulator, comprising: a first Delta-Sigma modulation module 1 and a second Delta-Sigma modulation module 2 cascaded in sequence.

[0030] The first Delta-Sigma modulation module 1 includes a quantizer Q1, and the second Delta-Sigma modulation module 2 includes a quantizer Q2.

[0031] In the specific implementation process, the analog input signal is first subjected to Delta-Sigma modulation by the first Delta-Sigma modulation module 1, where the quantizer Q1 generates a first quantization error and a first intermediate digital signal. The first quantization error is then input to the second Delta-Sigma modulation module 2 for Delta-Sigma modulation, where the quantizer Q2 generates a second quantization error and a second intermediate digital signal. The second quantization error is delayed by one unit before being sent to the input of the quantizer Q2 for subtraction, thereby achieving noise coupling.

[0032] Finally, the first intermediate digital signal and the second intermediate digital signal are subtracted to obtain the digital output signal.

[0033] This invention achieves first-order noise shaping without increasing the number of integrators by cascading two-stage modulation modules and using the second quantization error for noise coupling in the second Delta-Sigma modulation module. This improves the first-order noise shaping capability and thus enhances the overall performance of the modulator while reducing circuit complexity.

[0034] Example 2

[0035] See Figures 1-3 This embodiment improves upon the noise-coupled Sturdy-MASH structure modulator and signal modulation method proposed in Embodiment 1.

[0036] In this embodiment, the first Delta-Sigma modulation module 1 further includes a first amplifier 1001, a second amplifier 1002, a third amplifier 1003, a fourth amplifier 1004, a fifth amplifier 1005, and a sixth amplifier 1006, as well as a first adder 1007, a first integrator 1008, a second adder 1009, a second integrator 1010, a third adder 1011, and a fourth adder 1012 connected in sequence.

[0037] The analog input signal enters the first Delta-Sigma modulation module 1 through the input terminals of the first amplifier 1001, the second amplifier 1002 and the third amplifier 1003 respectively.

[0038] The output of the first amplifier 1001 is connected to the first input of the first adder 1007. The output of the second amplifier 1002 is connected to the first input of the second adder 1009. The output of the third amplifier 1003 is connected to the first input of the third adder 1011.

[0039] The output of the fifth adder 3 is connected to the input of the fourth amplifier 1004 and the input of the fifth amplifier 1005, respectively. The output of the fourth amplifier 1004 is connected to the second input of the first adder 1007, and the output of the fifth amplifier 1005 is connected to the second input of the second adder 1009.

[0040] The input terminal of the sixth amplifier 1006 is connected to the output terminal of the second integrator 1010, and the output terminal of the sixth amplifier 1006 is connected to the third input terminal of the first adder 1007.

[0041] The output of the first adder 1007 is connected to the input of the first integrator 1008, and the output of the first integrator 1008 is connected to the third input of the second adder 1009.

[0042] The output of the second adder 1009 is connected to the input of the second integrator 1010, and the output of the second integrator 1010 is connected to the second input of the third adder 1011.

[0043] The output of the third adder 1011 is connected to the first input of the fourth adder 1012 and the input of the quantizer Q1, respectively.

[0044] The output of quantizer Q1 is connected to the second input of the fourth adder 1012 and the first input of the fifth adder 3, respectively.

[0045] The fourth adder 1012 outputs the first quantization error and transmits it to the second Delta-Sigma modulation module 2. The quantizer Q1 outputs the first intermediate digital signal and transmits it to the fifth adder 3.

[0046] In this embodiment, the second Delta-Sigma modulation module 2 includes a seventh amplifier 2001, an eighth amplifier 2002, a ninth amplifier 2003, a tenth amplifier 2004, an eleventh amplifier 2005, a twelfth amplifier 2006, and a delay unit. It also includes a sixth adder 2007, a third integrator 2008, a seventh adder 2009, a fourth integrator 2010, an eighth adder 2011, and a ninth adder 2012 connected in sequence.

[0047] The first quantization error is fed into the second Delta-Sigma modulation module 2 via the input terminals of the seventh amplifier 2001, the eighth amplifier 2002 and the ninth amplifier 2003 respectively.

[0048] The output of the seventh amplifier 2001 is connected to the first input of the sixth adder 2007. The output of the eighth amplifier 2002 is connected to the first input of the seventh adder 2009. The output of the ninth amplifier 2003 is connected to the first input of the eighth adder 2011.

[0049] The input terminals of the tenth amplifier 2004 and the eleventh amplifier 2005 are connected to the output terminal of the quantizer Q2. The output terminal of the tenth amplifier 2004 is connected to the second input terminal of the sixth adder 2007, and the output terminal of the eleventh amplifier 2005 is connected to the second input terminal of the seventh adder 2009.

[0050] The input of the twelfth amplifier 2006 is connected to the output of the fourth integrator 2010, and the output of the twelfth amplifier 2006 is connected to the third input of the sixth adder 2007.

[0051] The output of the sixth adder 2007 is connected to the input of the third integrator 2008, and the output of the third integrator 2008 is connected to the third input of the seventh adder 2009.

[0052] The output of the seventh adder 2009 is connected to the input of the fourth integrator 2010, and the output of the fourth integrator 2010 is connected to the third input of the eighth adder 2011.

[0053] The output of the third adder 1011 is connected to the first input of the ninth adder 2012 and the input of the quantizer Q2, respectively.

[0054] The output of quantizer Q2 is connected to the second input of the ninth adder 2012 and the second input of the fifth adder 3, respectively.

[0055] The output of the ninth adder 2012 is connected to the input of the delay unit, and the output of the delay unit is connected to the second input of the eighth adder 2011.

[0056] Specifically, the second intermediate digital signal output by quantizer Q2 is transmitted to the fifth adder 3 and subtracted from the first intermediate digital signal to obtain the digital output signal. The second intermediate digital signal is then transmitted to the ninth adder 2012 and subtracted from the signal input to quantizer Q2 to obtain the second quantization error. This second quantization error is then delayed before being transmitted to the input of quantizer Q2 for subtraction, thus achieving noise coupling.

[0057] like Figure 2 As shown, Figure 2 The Z-domain block diagram of the noise coupling structure implemented in this embodiment shows that, in the forward loop, the input signal U' is quantized by quantizer Q2 to obtain the second intermediate digital signal. The second intermediate digital signal is subtracted from the signal at the input of quantizer Q2 by the ninth adder 2012 to obtain the second quantization error. Then, the second quantization error is delayed by one unit in the feedback loop and subtracted from the input signal U' in the eighth adder 2011. The result of the subtraction is sent to the forward loop to form a cyclic feedback structure, thereby realizing noise coupling.

[0058] Based on the above description, the following relationship can be obtained:

[0059] U′-z -1 E2+E2=V0

[0060] Transforming the above equation, we have:

[0061] V0=U′+(1-z -1 E2

[0062] It can be observed that the noise transfer function of the noise-coupled structure is (1-z) -1 The order is 1. The amplitude-frequency response curve corresponding to this noise transfer function is as follows: Figure 3 As shown, the amplitude-frequency response curve indicates that the noise-coupled structure has first-order high-pass characteristics.

[0063] In this embodiment, the first integrator 1008 and the third integrator 2008 are integrators without delay; the second integrator 1010 and the fourth integrator 2010 are integrators with delay. The transfer function of the integrator has low-pass characteristics. By setting different integrators with delay and integrators without delay, the noise transfer function of the modulator structure can have better filtering performance.

[0064] In this embodiment, the quantizer Q1 is a two-level quantizer, generating quantization levels 1 and -1; the quantizer Q2 is a three-level quantizer, generating quantization levels -2, 0, and 2. After passing through the fifth adder 3, the standard four-level PAM4 digital signal is obtained, which is a four-level pulse amplitude PAM4 digital signal. The PAM4 digital signal has high noise tolerance, is easy to achieve error-free transmission, and improves the signal transmission quality in the system.

[0065] The modulator's total output is the first intermediate digital signal output by quantizer Q1 minus the output of quantizer Q2, generating a four-level pulse-modulated PAM4 digital signal.

[0066] In this embodiment, the amplification factor of both the third amplifier 1003 and the ninth amplifier 2003 is 1. The value of the coefficients in the modulator determines the final noise shaping performance. In order to keep the signal transfer function (STF) constant at 1, that is, to ensure that the designed modulator structure does not change the spectrum of the original effective signal, the amplifier coefficients are set as follows:

[0067] The amplification factor b1 of the first amplifier 1001 is equal to the amplification factor a1 of the fourth amplifier 1004; the amplification factor b2 of the second amplifier 1002 is equal to the amplification factor a2 of the fifth amplifier 1005; the amplification factor b3 of the seventh amplifier 2001 is equal to the amplification factor a3 of the tenth amplifier 2004; and the amplification factor b4 of the eighth amplifier 2002 is equal to the amplification factor a4 of the eleventh amplifier 2005. That is, b... n It should be equal to a n n = 1, 2, 3, 4, a n and g n The values ​​of are shown in Table 1.

[0068] Table 1 Amplifier Coefficient Values

[0069] coefficient <![CDATA[a1]]> <![CDATA[a2]]> <![CDATA[a3]]> <![CDATA[a4]]> <![CDATA[g1]]> <![CDATA[g2]]> Value 0.1254 0.5816 0.0733 0.3097 0.02 0.113

[0070] As shown in Table 1, in this embodiment, the amplification factors of the first amplifier 1001, the second amplifier 1002, the third amplifier 1003, the fourth amplifier 1004, the fifth amplifier 1005, the sixth amplifier 1006, the seventh amplifier 2001, the eighth amplifier 2002, the ninth amplifier 2003, the tenth amplifier 2004, the eleventh amplifier 2005, and the twelfth amplifier 2006 are all greater than 0 and less than 1.

[0071] In the specific implementation process, the oversampled analog input signal U is scaled by amplifiers with different amplification coefficients to adjust the amplitude, and then sent to multiple multi-input adders to enter the first Delta-Sigma modulation module 1 for Delta-Sigma modulation, generating the first quantization error E1 and the first intermediate digital signal.

[0072] The first quantization error E1 is input to the second Delta-Sigma modulation module 2 for Delta-Sigma modulation, resulting in the second quantization error E2 and the second intermediate digital signal. In the noise-coupled structure, the second intermediate digital signal is subtracted from the signal at the input of quantizer Q2 by the ninth adder 2012 to obtain the second quantization error. Then, the second quantization error is delayed by one unit in the feedback loop and transmitted to the input of quantizer Q2 to form a cyclic feedback structure, thereby achieving noise coupling. Finally, the total output of the modulator is the first intermediate digital signal output by quantizer Q1 minus the output of quantizer Q2, generating a four-level pulse-modulated PAM4 digital signal.

[0073] In this embodiment, the equivalent noise propagation function (NTF) expression of the Sturdy-MASH modulator is as follows:

[0074] NTF = (1-z) -1 )×NTF1×NTF2;

[0075]

[0076]

[0077] Wherein, NTF1(z) is the equivalent noise propagation function of the first Delta-Sigma modulation module 1, g1 is the amplification factor of the sixth amplifier 1006, a2 is the amplification factor of the fifth amplifier 1005, and a1 is the amplification factor of the fourth amplifier 1004; NTF2(z) is the equivalent noise propagation function of the second Delta-Sigma modulation module 2, where g2 is the amplification factor of the twelfth amplifier 2006, a4 is the amplification factor of the eleventh amplifier 2005, and a3 is the amplification factor of the tenth amplifier 2004.

[0078] Because the quantizer in the modulator has a low bit depth, the modulated signal will contain a large amount of quantization noise, which will affect the signal quality. Therefore, it is necessary to set an appropriate noise propagation function to shape the spectrum of the quantization error generated in the first Delta-Sigma modulation module 1 and the second Delta-Sigma modulation module 2, so as to reduce the quantization noise in the signal band.

[0079] In this embodiment, the output of the Sturdy-MASH modulator is further connected to a filter 4 for filtering the digital output signal. The filter 4 filters the digital output signal to obtain a high-precision digital signal. The filter 4 is a low-pass filter.

[0080] Example 3

[0081] This embodiment proposes a signal modulation method, such as... Figure 4 As shown, Figure 4 The flowchart of the signal modulation method in this embodiment includes:

[0082] The analog input signal is input to the first Delta-Sigma modulation module 1 to obtain the first quantization error and the first intermediate digital signal.

[0083] The first quantization error is input into the second Delta-Sigma modulation module 2 to obtain the second quantization error and the second intermediate digital signal. The second quantization error is then delayed by one unit and sent to the input of the quantizer Q2 for subtraction to achieve noise coupling.

[0084] The first intermediate digital signal is subtracted from the second intermediate digital signal to obtain the digital output signal.

[0085] The first intermediate digital signal and the second intermediate digital signal are combined and processed to obtain the digital output signal of the Sturdy-MASH modulator.

[0086] This embodiment further compares the performance of the traditional Sturdy-MASH modulator SMASH, the novel topology modulator SMASH-FB with interstage feedback, and the noise-coupled Sturdy-MASH modulator SMASH-NC.

[0087] like Figure 5 and Figure 6 As shown, Figure 5 This is a flowchart of the digital signal processing in this embodiment. Figure 6 The power spectral density plots are for different modulators, where, Figure 6 (a) is the power spectral density diagram of a traditional Sturdy-MASH modulator after power adjustment and carrier aggregation. Figure 6 (b) is the power spectral density diagram of the novel topology modulator with interstage feedback after power adjustment and carrier aggregation. Figure 6 (c) is the power spectral density diagram of the Sturdy-MASH modulator of the present invention after power adjustment and carrier aggregation. Figure 6 (d) is the power spectral density diagram of the PAM4 signal modulated by the noise-coupled Sturdy-MASH modulator, which is implemented offline using SIMULINK.

[0088] At the transmitter of the Sturdy-MASH modulator, twelve 20MHz orthogonal frequency division multiplexing (OFDM) component carriers (CCs) are aggregated using a multi-carrier aggregation method, with each component carrier employing a 512QAM modulation format. Due to significant out-of-band power leakage in the OFDM signal, a 228.9kHz guard interval is inserted between adjacent component carriers to reduce the impact of power leakage on the aggregated signal. Because the quantization noise after noise shaping is unevenly distributed within the signal band, resulting in significant differences in the SNR of each component carrier's frequency band, dynamic power adjustment is performed on different component carriers at the transmitter.

[0089] The specific adjustment method is to multiply the data after mapping each component carrier by a coefficient. The value of the coefficient for each component carrier is proportional to the error vector amplitude (EVM) value of the component carrier obtained without dynamic adjustment.

[0090] After power adjustment and aggregation, the signal is sent to the three different modulators mentioned above. First, it undergoes 8x oversampling, then quantization into a 4-Gbaud four-level pulse-modulated digital signal. Finally, noise shaping techniques are used to push the quantization noise outside the signal band. The four-level pulse-modulated digital signal is then loaded into an M8190A arbitrary waveform generator with a sampling rate of 4GSa / s to generate an electrical signal. This signal is amplified by a 23dB gain amplifier and then used to drive an FTM-7938 electro-optic modulator for electro-optic conversion. The resulting optical signal will be transmitted over a 20km single-mode optical fiber.

[0091] At the modulator receiver, a variable optical attenuator (VOA) is used to change the received optical power. Then, a 40Gb / s high-gain photodetector (PD) converts the optical signal into an electrical signal. Finally, a wideband modular oscilloscope (LABMASTER10-36ZI-A) is used to capture the signal for offline processing, with the oscilloscope's sampling rate set to 20GSa / s. In digital signal processing, the received signal is first equalized and a decision is made to obtain the PAM4 signal. Then, a low-pass filter (LPF) is used to filter out high-frequency quantization noise. Next, the signal is downsampled by 8 times to obtain the original aggregated signal. Finally, the signal is deaggregated, and the error vector amplitude value of each component carrier is calculated.

[0092] Results Analysis: The performance of three modulators—a traditional Sturdy-MASH modulator, a novel topology modulator with inter-stage feedback, and a Sturdy-MASH modulator based on noise coupling—was experimentally compared in a digital mobile fronthaul system. For example... Figure 7 As shown, Figure 7The graph shows the experimental results of the error vector amplitude of different modulators varying with the received optical power (ROP), corresponding to back-to-back optical OBTB and 20km fiber transmission, respectively. From... Figure 6 As can be seen, the minimum error vector amplitude of the traditional Sturdy-MASH modulator is 4.1%, which is higher than the 3% error vector amplitude threshold for 512QAM specified in the 3GPP protocol, making it impossible to achieve correct transmission of 512QAM symbols. The minimum error vector amplitudes achievable by the novel topology modulator with interstage feedback and the noise-coupled Sturdy-MASH modulator are 1.8% and 1.16%, respectively, both less than the 3% threshold. Compared to the novel topology modulator with interstage feedback, the noise-coupled Sturdy-MASH modulator can achieve a 0.6dB increase in received optical power after transmission over 20km of optical fiber.

[0093] Figure 8 This diagram illustrates the error vector amplitude values ​​of each component carrier at the receiver when the received optical power is -13dBm. It shows the error vector amplitude values ​​of each component carrier at the receiver when transmitting over 20km of optical fiber with a received optical power of -13dBm. It can be seen that at a received optical power of -13dBm, only the noise-coupled Sturdy-MASH modulator structure can meet the requirement that the error vector amplitude of all component carriers is less than 3%, while the traditional Sturdy-MASH modulator and the novel topology modulator with interstage feedback cannot meet this requirement. Experimental results show that the proposed noise-coupled Sturdy-MASH modulator has better noise shaping performance than the traditional Sturdy-MASH modulator and the novel topology modulator with interstage feedback, and can support the correct transmission of high-order quadrature amplitude modulation (QAM).

[0094] The terms used in the drawings to describe positional relationships are for illustrative purposes only and should not be construed as limiting this patent;

[0095] Obviously, the above embodiments of the present invention are merely examples for the purpose of clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Those skilled in the art will appreciate that other variations or modifications can be made based on the above description. It is not necessary and impossible to enumerate all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the claims of the present invention.

Claims

1. A noise-coupled Sturdy-MASH modulator for converting analog input signals into digital output signals, characterized in that, include: The first Delta-Sigma modulation module (1) and the second Delta-Sigma modulation module (2) are cascaded in sequence. The first Delta-Sigma modulation module (1) includes a quantizer Q1, and the second Delta-Sigma modulation module (2) includes a quantizer Q2; The analog input signal is input to the first Delta-Sigma modulation module (1) for modulation, and the quantizer Q1 generates the first quantization error and the first intermediate digital signal respectively. The first quantization error is input to the second Delta-Sigma modulation module (2) for modulation. The quantizer Q2 generates the second quantization error and the second intermediate digital signal respectively. The second quantization error is delayed by one unit and then sent to the input of the quantizer Q2 for subtraction to achieve noise coupling. The first intermediate digital signal is subtracted from the second intermediate digital signal to obtain the digital output signal; The second Delta-Sigma modulation module (2) further includes a seventh amplifier (2001), an eighth amplifier (2002), a ninth amplifier (2003), a tenth amplifier (2004), an eleventh amplifier (2005), a twelfth amplifier (2006), and a delay unit; as well as a sixth adder (2007), a third integrator (2008), a seventh adder (2009), a fourth integrator (2010), an eighth adder (2011), and a ninth adder (2012) connected in sequence. The first quantization error is fed into the second Delta-Sigma modulation module (2) through the input terminals of the seventh amplifier (2001), the eighth amplifier (2002) and the ninth amplifier (2003). The output of the seventh amplifier (2001) is connected to the first input of the sixth adder (2007); the output of the eighth amplifier (2002) is connected to the first input of the seventh adder (2009); and the output of the ninth amplifier (2003) is connected to the first input of the eighth adder (2011). The input terminals of the tenth amplifier (2004) and the eleventh amplifier (2005) are respectively connected to the output terminal of the quantizer Q2; the output terminal of the tenth amplifier (2004) is connected to the second input terminal of the sixth adder (2007), and the output terminal of the eleventh amplifier (2005) is connected to the second input terminal of the seventh adder (2009); The input of the twelfth amplifier (2006) is connected to the output of the fourth integrator (2010), and the output of the twelfth amplifier (2006) is connected to the third input of the sixth adder (2007). The output of the sixth adder (2007) is connected to the input of the third integrator (2008), and the output of the third integrator (2008) is connected to the third input of the seventh adder (2009). The output of the seventh adder (2009) is connected to the input of the fourth integrator (2010), and the output of the fourth integrator (2010) is connected to the third input of the eighth adder (2011). The output of the third adder (1011) is connected to the first input of the ninth adder (2012) and the input of the quantizer Q2, respectively. The output of quantizer Q2 is connected to the second input of the ninth adder (2012) and the second input of the fifth adder (3), respectively; The output of the ninth adder (2012) is connected to the input of the delay unit, and the output of the delay unit is connected to the second input of the eighth adder (2011). The second intermediate digital signal output by quantizer Q2 is transmitted to the fifth adder (3) and subtracted from the first intermediate digital signal to obtain a digital output signal. The signal is also transmitted to the ninth adder (2012) and subtracted from the signal at the input of quantizer Q2 to obtain a second quantization error. The second quantization error is transmitted to the input of quantizer Q2 after passing through a delay unit for subtraction to achieve noise coupling.

2. The Sturdy-MASH modulator based on noise coupling according to claim 1, characterized in that, The first Delta-Sigma modulation module (1) further includes a first amplifier (1001), a second amplifier (1002), a third amplifier (1003), a fourth amplifier (1004), a fifth amplifier (1005), and a sixth amplifier (1006); and a first adder (1007), a first integrator (1008), a second adder (1009), a second integrator (1010), a third adder (1011), and a fourth adder (1012) connected in sequence. The analog input signal enters the first Delta-Sigma modulation module (1) through the input terminals of the first amplifier (1001), the second amplifier (1002) and the third amplifier (1003). The output of the first amplifier (1001) is connected to the first input of the first adder (1007); the output of the second amplifier (1002) is connected to the first input of the second adder (1009); and the output of the third amplifier (1003) is connected to the first input of the third adder (1011). The output of the fifth adder (3) is connected to the input of the fourth amplifier (1004) and the input of the fifth amplifier (1005), respectively; the output of the fourth amplifier (1004) is connected to the second input of the first adder (1007), and the output of the fifth amplifier (1005) is connected to the second input of the second adder (1009); The input terminal of the sixth amplifier (1006) is connected to the output terminal of the second integrator (1010), and the output terminal of the sixth amplifier (1006) is connected to the third input terminal of the first adder (1007). The output of the first adder (1007) is connected to the input of the first integrator (1008), and the output of the first integrator (1008) is connected to the third input of the second adder (1009). The output of the second adder (1009) is connected to the input of the second integrator (1010), and the output of the second integrator (1010) is connected to the second input of the third adder (1011). The output of the third adder (1011) is connected to the first input of the fourth adder (1012) and the input of the quantizer Q1, respectively. The output of quantizer Q1 is connected to the second input of the fourth adder (1012) and the first input of the fifth adder (3), respectively; Among them, the fourth adder (1012) outputs the first quantization error and transmits it to the second Delta-Sigma modulation module (2); the quantizer Q1 outputs the first intermediate digital signal and transmits it to the fifth adder (3).

3. The Sturdy-MASH modulator based on noise coupling according to claim 2, characterized in that, The first integrator (1008) and the third integrator (2008) are integrators without delay; the second integrator (1010) and the fourth integrator (2010) are integrators with delay.

4. The Sturdy-MASH modulator based on noise coupling according to claim 2, characterized in that, The amplification factor of both the third amplifier (1003) and the ninth amplifier (2003) is 1; The first amplifier (1001) and the fourth amplifier (1004) have the same amplification factor; The second amplifier (1002) and the fifth amplifier (1005) have the same amplification factor; The amplification factors of the seventh amplifier (2001) and the tenth amplifier (2004) are equal; The eighth amplifier (2002) and the eleventh amplifier (2005) have the same amplification factor.

5. The Sturdy-MASH modulator based on noise coupling according to claim 4, characterized in that, The amplification factor of the first amplifier (1001), the second amplifier (1002), the third amplifier (1003), the fourth amplifier (1004), the fifth amplifier (1005), the sixth amplifier (1006), the seventh amplifier (2001), the eighth amplifier (2002), the ninth amplifier (2003), the tenth amplifier (2004), the eleventh amplifier (2005), and the twelfth amplifier (2006) is greater than 0 and less than 1.

6. The Sturdy-MASH modulator based on noise coupling according to claim 1, characterized in that, The quantizer Q1 is a two-level quantizer; the quantizer Q2 is a three-level quantizer.

7. The Sturdy-MASH modulator based on noise coupling according to claim 2, characterized in that, The equivalent noise propagation function of the Sturdy-MASH modulator NTF The expression is as follows: ； in, NTF 1(z) is the equivalent noise propagation function of the first Delta-Sigma modulation module (1). This is the amplification factor of the sixth amplifier (1006). a 2 represents the amplification factor of the fifth amplifier (1005). a 1 represents the amplification factor of the fourth amplifier (1004); NTF 2(z) is the equivalent noise propagation function of the second Delta-Sigma modulation module (2), where, This represents the amplification factor of the twelfth amplifier (2006). a 4 represents the gain of the eleventh amplifier (2005). a 3 is the amplification factor of the tenth amplifier (2004).

8. The Sturdy-MASH modulator based on noise coupling according to any one of claims 1-7, characterized in that, The output of the Sturdy-MASH modulator is also connected to a filter (4) for filtering the digital output signal.

9. A signal modulation method using a noise-coupled Sturdy-MASH structure modulator as described in any one of claims 1-8, characterized in that, include: The analog input signal is input into the first Delta-Sigma modulation module (1) to obtain the first quantization error and the first intermediate digital signal; The first quantization error is input into the second Delta-Sigma modulation module (2) to obtain the second quantization error and the second intermediate digital signal. The second quantization error is delayed by one unit and then sent to the input of the quantizer Q2 for subtraction to achieve noise coupling. The first intermediate digital signal is subtracted from the second intermediate digital signal to obtain the digital output signal.

Images