Analog-to-digital conversion circuit, control method, chip and electronic device

Abstract

The present application provides an analog-to-digital conversion circuit, a control method, a chip and an electronic device, belonging to the field of electronic technology. The analog-to-digital conversion circuit includes a main digital-to-analog conversion module and an auxiliary digital-to-analog conversion module, and the auxiliary digital-to-analog conversion module has the same circuit type as the main digital-to-analog conversion module; the main digital-to-analog conversion module is used to receive an input signal, convert the input signal based on a reference voltage signal, and obtain a first conversion voltage; the auxiliary digital-to-analog conversion module is used to receive a reference digital signal, and process the reference digital signal based on the reference voltage signal to obtain a second conversion voltage; the comparison module and the logic module are used to determine a target digital signal code value based on the first conversion voltage and the second conversion voltage, and the target digital signal code value is the conversion result of the input signal. By adopting the present application, the conversion accuracy of the analog-to-digital conversion circuit can be improved.

Description

Technical Field

[0001] The present application relates to the field of electronic technology, and in particular to an analog-to-digital conversion circuit, a control method, a chip and an electronic device. Background Art

[0002] The main function of the analog-to-digital converter (ADC) circuit is to convert electrical signals (such as voltage and current) into digital signals to quantify the electrical signals. ADC is an important functional module for communication, instrument measurement, and sensor control systems, and is widely used in the fields of analog integrated circuits and mixed analog-digital integrated circuits.

[0003] In the conversion process, quantization is generally achieved based on a reference voltage signal. When the reference voltage signal has noise or interference, it may cause errors in the quantization result and reduce the conversion accuracy of the ADC. Summary of the invention

[0004] In order to solve the problems of the prior art, the embodiments of the present application provide an analog-to-digital conversion circuit, a control method, a chip, and an electronic device, which can improve the conversion accuracy of the analog-to-digital conversion circuit. The technical solution is as follows:

[0005] According to one aspect of the present application, an analog-to-digital conversion circuit is provided, the analog-to-digital conversion circuit comprising a main digital-to-analog conversion module, an auxiliary digital-to-analog conversion module, a comparison module and a logic module, wherein the auxiliary digital-to-analog conversion module has the same circuit type as the main digital-to-analog conversion module;

[0006] The main digital-to-analog conversion module is used to receive an input signal, and convert the input signal based on a reference voltage signal to obtain a first conversion voltage;

[0007] The auxiliary digital-to-analog conversion module is used to receive a reference digital signal, and process the reference digital signal based on the reference voltage signal to obtain a second conversion voltage;

[0008] The comparison module and the logic module are used to determine a target digital signal code value based on the first conversion voltage and the second conversion voltage, and the target digital signal code value is a conversion result of the input signal.

[0009] Optionally, the reference digital signal is configured as a first preset value.

[0010] Optionally, the reference digital signal is determined in the current conversion cycle based on the target digital signal code value in the previous conversion cycle.

[0011] Optionally, if the number of bits i of the reference digital signal is equal to the number of bits n of the target digital signal code value of the previous conversion cycle, the reference digital signal is configured as the target digital signal code value of the previous conversion cycle, wherein i and n are integers greater than 1;

[0012] If the number of bits i of the reference digital signal is less than the number of bits n of the target digital signal code value of the previous conversion cycle, the reference digital signal is configured as the upper i bits of the target digital signal code value of the previous conversion cycle.

[0013] Optionally, when determining the high k bits of the digital signal code value of the current conversion cycle, the auxiliary digital-to-analog conversion module is used to receive a first reference digital signal, and process the first reference digital signal based on the reference voltage signal to obtain a second conversion voltage, wherein k is an integer greater than 1;

[0014] When determining the remaining bits of the digital signal code value of the current conversion cycle, the auxiliary digital-to-analog conversion module is used to receive at least one second reference digital signal, and process the at least one second reference digital signal based on the reference voltage signal to obtain a second conversion voltage, wherein the at least one second reference digital signal is determined based on the determined high k bits.

[0015] Optionally, the first reference digital signal is configured as a second preset value; or

[0016] The first reference digital signal is determined based on a target digital signal code value of a previous conversion cycle.

[0017] Optionally, the output end of the main digital-to-analog conversion module is connected to the first input end of the comparison module, and the output end of the auxiliary digital-to-analog conversion module is connected to the second input end of the comparison module.

[0018] Optionally, the main digital-to-analog conversion module includes a first main digital-to-analog conversion module and a second main digital-to-analog conversion module, and the auxiliary digital-to-analog conversion module includes a first auxiliary digital-to-analog conversion module and a second auxiliary digital-to-analog conversion module, wherein the first main digital-to-analog conversion module and the first auxiliary digital-to-analog conversion module are respectively connected to the input end of the comparison module, and the second main digital-to-analog conversion module and the second auxiliary digital-to-analog conversion module are respectively connected to the input end of the comparison module.

[0019] Optionally, the output end of the first main digital-to-analog conversion module is connected to the first input end of the comparison module, and the output end of the first auxiliary digital-to-analog conversion module is connected to the second input end of the comparison module;

[0020] The output end of the second main digital-to-analog conversion module is connected to the second input end of the comparison module, and the output end of the second auxiliary digital-to-analog conversion module is connected to the first input end of the comparison module.

[0021] According to another aspect of the present application, a control method for an analog-to-digital conversion circuit is provided, wherein the analog-to-digital conversion circuit includes a main digital-to-analog conversion module, an auxiliary digital-to-analog conversion module, a comparison module, and a logic module, wherein the auxiliary digital-to-analog conversion module has the same circuit type as the main digital-to-analog conversion module, and the method includes:

[0022] obtaining an input signal and a reference digital signal;

[0023] In the main digital-to-analog conversion module, the input signal is converted based on a reference voltage signal to obtain a first conversion voltage;

[0024] In the auxiliary digital-to-analog conversion module, the reference digital signal is processed based on the reference voltage signal to obtain a second conversion voltage;

[0025] In the comparison module and the logic module, a target digital signal code value is determined based on the first conversion voltage and the second conversion voltage, and the target digital signal code value is a conversion result of the input signal.

[0026] According to another aspect of the present application, a chip is provided, wherein the chip includes the above analog-to-digital conversion circuit.

[0027] According to another aspect of the present application, an electronic device is provided, wherein the electronic device includes the above analog-to-digital conversion circuit.

[0028] In the present application, the analog-to-digital conversion circuit may include an auxiliary digital-to-analog conversion module for counteracting interference, and the reference digital signal is converted into a corresponding second conversion voltage through the auxiliary digital-to-analog conversion module, and the input signal is converted into a corresponding first conversion voltage through the main digital-to-analog conversion module. Since the circuit types of the auxiliary digital-to-analog conversion module and the main digital-to-analog conversion module are the same, the crosstalk generated by the reference voltage signal in the auxiliary digital-to-analog conversion module and the main digital-to-analog conversion module is similar, so the second conversion voltage can be used to compensate the first conversion voltage, counteracting the noise or interference of the reference voltage signal in the first conversion voltage, and thus the accuracy can be improved in the process of determining the digital signal code value by the comparison module and the logic module, and the conversion accuracy of the analog-to-digital conversion circuit can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Further details, features and advantages of the present application are disclosed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which:

[0030] Figure 1A schematic diagram of an analog-to-digital conversion circuit provided according to an exemplary embodiment of the present application is shown;

[0031] Figure 2 A schematic diagram of an analog-to-digital conversion circuit provided according to an exemplary embodiment of the present application is shown;

[0032] Figure 3 A schematic diagram of an analog-to-digital conversion circuit provided according to an exemplary embodiment of the present application is shown;

[0033] Figure 4 A flow chart of a control method of an analog-to-digital conversion circuit provided according to an exemplary embodiment of the present application is shown;

[0034] Figure 5 A schematic diagram of an analog-to-digital conversion workflow provided according to an exemplary embodiment of the present application is shown;

[0035] Figure 6 A schematic diagram of an analog-to-digital conversion circuit provided according to an exemplary embodiment of the present application is shown.

[0036] In the figure,

[0037] 1. Main digital-to-analog conversion module; 11. First main digital-to-analog conversion module; 12. Second main digital-to-analog conversion module; 2. Auxiliary digital-to-analog conversion module; 21. First auxiliary digital-to-analog conversion module; 22. Second auxiliary digital-to-analog conversion module; 3. Comparison module; 4. Logic module. DETAILED DESCRIPTION

[0038] The embodiments of the present application will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be construed as being limited to the embodiments described herein. Instead, these embodiments are provided to provide a more thorough and complete understanding of the present application. It should be understood that the drawings and embodiments of the present application are only for exemplary purposes and are not intended to limit the scope of protection of the present application.

[0039] The term "including" and its variations used in this document are open inclusions, that is, "including but not limited to". The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one other embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions of other terms will be given in the description below. It should be noted that the concepts of "first", "second", etc. mentioned in this application are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0040] It should be noted that the modifications of "one" and "plurality" mentioned in the present application are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more".

[0041] The names of the messages or information exchanged between multiple devices in the embodiments of the present application are only used for illustrative purposes and are not used to limit the scope of these messages or information.

[0042] The embodiment of the present application provides an analog-to-digital conversion circuit. The analog-to-digital conversion circuit can be integrated in a chip or arranged in an electronic device.

[0043] First, the analog-to-digital conversion circuit is introduced. The analog-to-digital conversion circuit may include a main digital-to-analog conversion module 1, an auxiliary digital-to-analog conversion module 2, a comparison module 3 and a logic module 4, wherein the main digital-to-analog conversion module 1 and the auxiliary digital-to-analog conversion module 2 are respectively connected to the input end of the comparison module 3. Figure 1 The schematic diagram of the analog-to-digital conversion circuit shown in FIG. 1 shows, when the above analog-to-digital conversion circuit adopts a single-ended structure, the circuit structure can be as follows:

[0044] The first input terminal of the main digital-to-analog conversion module 1 is used to receive an input signal, the second input terminal is used to receive a reference voltage signal, the third input terminal is used to receive a digital signal code value fed back by the logic module 4, and the output terminal is connected to the first input terminal of the comparison module 3.

[0045] The first input terminal of the auxiliary digital-to-analog conversion module 2 is used to receive a reference voltage signal, the second input terminal is used to receive a reference digital signal, and the output terminal is connected to the second input terminal of the comparison module 3 .

[0046] The first input terminal of the comparison module 3 is connected to the output terminal of the main digital-to-analog conversion module 1 , the second input terminal is connected to the output terminal of the auxiliary digital-to-analog conversion module 2 , and the output terminal is connected to the input terminal of the logic module 4 .

[0047] The input end of the logic module 4 is connected to the output end of the comparison module 3, and the corresponding digital signal code value can be fed back to the main digital-to-analog conversion module 1 during the conversion process. After a conversion cycle, the final digital signal code value can be output, which is the target digital signal code value of the current conversion cycle.

[0048] Reference Figure 2 The schematic diagram of the analog-to-digital conversion circuit shown in the figure, when the above analog-to-digital conversion circuit adopts a differential structure, the main digital-to-analog conversion module 1 can include a first main digital-to-analog conversion module 11 and a second main digital-to-analog conversion module 12, and the auxiliary digital-to-analog conversion module 2 can include a first auxiliary digital-to-analog conversion module 21 and a second auxiliary digital-to-analog conversion module 22, and the circuit structure can be as follows:

[0049] The first input end of the first main digital-to-analog conversion module 11 is used to receive the first signal of the input signal, the second input end is used to receive the reference voltage signal, the third input end is used to receive the first digital signal code value fed back by the logic module 4, and the output end is connected to the first input end of the comparison module 3. The first digital signal code value is used to quantize the above-mentioned first signal.

[0050] The first input terminal of the first auxiliary digital-to-analog conversion module 21 is used to receive a reference voltage signal, the second input terminal is used to receive a corresponding reference digital signal, and the output terminal is connected to the second input terminal of the comparison module 3 .

[0051] The first input terminal of the second main digital-to-analog conversion module 12 is used to receive the second signal of the input signal, the second input terminal is used to receive the reference voltage signal, the third input terminal is used to receive the second digital signal code value fed back by the logic module 4, and the output terminal is connected to the second input terminal of the comparison module 3. The second digital signal code value is used to quantize the above-mentioned second signal.

[0052] The first input terminal of the second auxiliary digital-to-analog conversion module 22 is used to receive a reference voltage signal, the second input terminal is used to receive a corresponding reference digital signal, and the output terminal is connected to the first input terminal of the comparison module 3 .

[0053] The output of the comparison module 3 is connected to the input of the logic module 4 .

[0054] The circuit type of the main digital-to-analog conversion module 1 and the auxiliary digital-to-analog conversion module 2 are the same, and the circuit structure is the same or similar. On this basis, it can be ensured that the conversion voltages output by the two are uniform, that is, when the same digital signal code value is input, the same or similar conversion voltages can be output. The circuit structure of the digital-to-analog conversion module is adapted to the input digital signal code value. When the number of bits of the reference digital signal and the digital signal code value output by the analog-to-digital conversion circuit is the same, the circuit structure of the main digital-to-analog conversion module 1 and the auxiliary digital-to-analog conversion module 2 can be the same; when the number of bits of the reference digital signal and the digital signal code value output by the analog-to-digital conversion circuit is different, the main digital-to-analog conversion module 1 and the auxiliary digital-to-analog conversion module 2 can belong to the same circuit type, and are used to adapt to circuit structures with different number of bits.

[0055] This embodiment does not limit the specific circuit types of the main digital-to-analog conversion module 1 and the auxiliary digital-to-analog conversion module 2. For example, the main digital-to-analog conversion module 1 can adopt a circuit type such as a capacitor type, a resistor type, or a capacitor-resistance type, and the auxiliary digital-to-analog conversion module 2 adopts the same circuit type as the main digital-to-analog conversion module, that is, the main digital-to-analog conversion module 1 and the auxiliary digital-to-analog conversion module 2 are both capacitor-type digital-to-analog conversion circuits, or both are resistor-type digital-to-analog conversion circuits, or both are capacitor-resistance digital-to-analog conversion circuits, etc. Exemplarily, assuming that the main digital-to-analog conversion module 1 is a capacitor-type digital-to-analog conversion circuit, then the auxiliary digital-to-analog conversion module 2 is also a capacitor-type digital-to-analog conversion circuit. If the number of bits of the reference digital signal and the digital signal code value output by the analog-to-digital conversion circuit is 12, then the circuit structures of the main digital-to-analog conversion module 1 and the auxiliary digital-to-analog conversion module 2 are the same, and can both include a 12-bit capacitor array; if the number of bits of the digital signal code value output by the analog-to-digital conversion circuit is 12, and the number of bits of the reference digital signal is 6, then the main digital-to-analog conversion module 1 may include a 12-bit capacitor array, and the auxiliary digital-to-analog conversion module 2 may include a 6-bit capacitor array.

[0056] In a specific embodiment, referring to Figure 3 The schematic diagram of the analog-to-digital conversion circuit shown in the figure can be a successive approximation analog-to-digital conversion circuit (SAR ADC, Successive Approximation Register Analog-to-Digital Converter), wherein DAC (Digital-to-Analog Converter) corresponds to the above-mentioned main digital-to-analog conversion module 1, auxDAC (Auxiliary Digital-to-Analog Converter, auxiliary analog-to-digital converter) corresponds to the above-mentioned auxiliary digital-to-analog conversion module 2, the comparator CMP corresponds to the above-mentioned comparison module 3, and the logic circuit Logic corresponds to the above-mentioned logic module 4.

[0057] In addition, two switches sw connected in series can be set between the two input terminals of the comparator CMP, and the common mode signal Vcm can be connected between the two switches. During the sampling period, the two switches sw are turned on to connect the common mode signal Vcm to the main digital-to-analog conversion module and the auxiliary digital-to-analog conversion module; during the conversion period, the two switches sw are turned off.

[0058] The analog-to-digital conversion circuit can also be a hybrid structure ADC based on SAR ADC and other ADCs, such as Pipeline-SAR ADC (combination of pipeline type and successive approximation type), Incremental-SAR ADC (combination of incremental type and successive approximation type), Delta-Sigma-SAR ADC (combination of Σ-Δ type and successive approximation type), Flash-SAR ADC (combination of parallel comparison type and successive approximation type), etc. This embodiment does not limit this.

[0059] The following will refer to Figure 4 The control method flow chart of the analog-to-digital conversion circuit shown in FIG. 4 introduces the implementation principle of the analog-to-digital conversion circuit in steps 401-405.

[0060] Step 401: Obtain an input signal.

[0061] Among them, the input signal is an analog signal.

[0062] In a possible implementation, after power-on, the input end of the analog-to-digital conversion circuit can receive a corresponding input signal, so that the analog-to-digital conversion circuit can convert the input signal into a corresponding target digital signal in each conversion cycle, and output the corresponding target digital signal code value after a conversion cycle. For example, when the analog-to-digital conversion circuit is a 12-bit SAR ADC, the input signal can be converted into a 12-bit digital signal in each conversion cycle, and the corresponding 12-bit digital signal code value can be output.

[0063] The input signal may be a single-ended signal or a differential signal. Correspondingly, the analog-to-digital conversion circuit may adopt a circuit structure applicable to a single-ended signal, or a circuit structure applicable to a differential signal, or a circuit structure applicable to both a single-ended signal and a differential signal. This embodiment does not limit this.

[0064] Step 402: Acquire a reference digital signal.

[0065] The role of the reference digital signal in the auxiliary digital-to-analog conversion module is the same as the role of the digital signal code value in the main digital-to-analog conversion module, that is, it is converted into an analog voltage through the digital-to-analog conversion module. Since the auxiliary digital-to-analog conversion module and the main digital-to-analog conversion module have the same circuit type, and the module input includes both the reference voltage signal and the digital signal, on this basis, the second conversion voltage (output by the auxiliary digital-to-analog conversion module) can carry the noise or interference of the reference voltage signal that is equal to or similar to that in the first conversion voltage (output by the main digital-to-analog conversion module), and can achieve the effect of mutual cancellation in the subsequent conversion process.

[0066] To adapt to different application scenarios, this embodiment provides different ways to obtain reference digital signals. The analog-to-digital conversion method provided in this embodiment may include multiple conversion cycles. The following takes one conversion cycle as an example to introduce the way to obtain reference digital signals in this conversion cycle.

[0067] Method 1: Determine that the reference digital signal is a first preset value.

[0068] In a possible implementation, the first preset value can be set based on the digital signal code value determined by the analog-to-digital conversion circuit for the same or similar input signal, so that the reference digital signal can meet the regularity, voltage range and other properties of the input signal.

[0069] The reference digital signal obtained in this way is fixed, which can reduce the difficulty of circuit design and improve the stability of the auxiliary digital-to-analog conversion module.

[0070] Method 2: In the current conversion cycle, the reference digital signal is determined based on the target digital signal code value of the previous conversion cycle.

[0071] In a possible implementation, the target digital signal code value output by the logic module in the previous conversion cycle can be fed back to the auxiliary digital-to-analog conversion module, and the reference digital signal can be adjusted according to the target digital signal code value of the previous conversion cycle.

[0072] This method is suitable for applications with small input signal bandwidth or no channel switching.

[0073] Specifically, according to the number of bits of the reference digital signal, the second method may have the following two situations:

[0074] Case 1: if the number of bits i of the reference digital signal is equal to the number of bits n of the target digital signal code value of the previous conversion cycle, then the reference digital signal is determined to be the target digital signal code value of the previous conversion cycle;

[0075] In case 2, if the number i of bits of the reference digital signal is less than the number n of bits of the target digital signal code value in the previous conversion cycle, the reference digital signal is determined to be the high i bits of the target digital signal code value in the previous conversion cycle.

[0076] Wherein, i and n are integers greater than 1.

[0077] For example, the reference digital signal can be represented as Din[i-1:0], and the target digital signal code value of the previous conversion cycle can be represented as D t-1 [n-1:0], the subscript t is used to indicate the current conversion cycle, and the subscript t-1 is used to indicate the previous conversion cycle. When the number of bits i of the reference digital signal is equal to the number of bits n of the target digital signal code value, Din[i-1:0] can be set to D t-1When the number of bits i of the reference digital signal is less than the number of bits n of the target digital signal code value, Din[i-1:0]=D t-1 [n-1:ni].

[0078] For example, suppose the target digital signal code value output by the analog-to-digital conversion circuit is 12 bits, and the output D t-1 [11:0]=001101010101, if i=12, then Din[11:0]=001101010101; if i=6, then Din[5:0]=D t-1 [11:6]=001101.

[0079] Method three: Determine the reference digital signal based on the digital signal code value of the current conversion cycle.

[0080] The digital signal code value of the current conversion cycle is determined bit by bit from high to low. Mode 3 can include two stages:

[0081] In the first stage, in the current conversion cycle, a first reference digital signal is obtained, and the first reference digital signal is used to input the auxiliary digital-to-analog conversion module when determining the high k bits of the digital signal code value of the current conversion cycle;

[0082] In the second stage, after determining the high k bits of the digital signal code value of the current conversion cycle, at least one second reference digital signal is obtained based on the above high k bits, and the second reference digital signal is used to input the auxiliary digital-to-analog conversion module when determining the remaining bits of the digital signal code value of the current conversion cycle.

[0083] Here, k is an integer greater than 1.

[0084] This method is suitable for applications with a small input signal bandwidth or no channel switching, and is also suitable for applications with a large input signal bandwidth or channel switching. Compared with the above method 2, it expands the application range.

[0085] In the first stage, the first reference digital signal can be determined by the first or second method, that is, the first reference digital signal is determined to be the second preset value, or the first reference digital signal is determined based on the target digital signal code value of the previous conversion cycle. The second preset value is similar to the first preset value, and can be equal to the first preset value or not.

[0086] The second stage is executed after determining the high k bits of the digital signal code value of the current conversion cycle, that is, when the conversion of the high k bits of the digital signal code value is completed, the currently determined high k bits of the code value can be used as a reference digital signal.

[0087] In the second stage, a second reference digital signal can be determined. In this case, if the value of k is less than the number of bits n of the digital signal code value and equal to the number of bits i of the reference digital signal, the second reference digital signal can be determined to be the code value of the currently determined high k bits. If the value of k is less than the number of bits n of the target digital signal code value and greater than the number of bits i of the reference digital signal, the second reference digital signal can be determined to be the code value of the currently determined high i bits.

[0088] For example, the reference digital signal can be represented as Din[i-1:0], and the digital signal code value of the current conversion cycle can be represented as D t [n-1:0], the subscript t is used to indicate the current conversion cycle. t If the number of bits i of the reference digital signal is equal to k, then Din[i-1:0]=D t [n-1:nk]; if the number of bits i of the reference digital signal is less than k, let Din[i-1:0] = D t [n-1:ni].

[0089] For example, assuming that the target digital signal code value output by the analog-to-digital conversion circuit is 12 bits, the code value of the upper 6 bits is determined in the first stage, and in the current conversion cycle, the current code value D of the upper 6 bits is determined after 6 clock cycles. t [11:6] = 001101, if the number of bits of the reference digital signal i = 6, then Din[5:0] = D t [11:6] = 001101; if the number of bits of the reference digital signal i = 3, then Din[2:0] = D t [11:9]=001.

[0090] In some implementations, multiple second reference digital signals may also be determined in the second stage. In this case, if the value of k is less than the number of bits n of the digital signal code value and equal to the number of bits i of the reference digital signal, the first second reference digital signal may be determined to be the high k bits of the digital signal code value of the current conversion cycle. If the value of k is less than the number of bits n of the digital signal code value and greater than the number of bits i of the reference digital signal, the first second reference digital signal may be determined to be the high i bits of the digital signal code value of the current conversion cycle. Thereafter, whenever one or more bits of the digital signal code value are determined, the second reference digital signal may be updated based on the most recently determined one or more bits.

[0091] For example, the reference digital signal can be represented as Din[i-1:0], and the digital signal code value of the current conversion cycle can be represented as D t [n-1:0], assuming that the number of bits i of the reference digital signal is equal to k. tAfter D[n-1:nk], we can set Din[i-1:0]=D t [n-1:nk]. After that, when determining D t When Din[i-1:0]=D t [n-2:nk-1]; in determining D t When Din[i-1:0]=D t [n-3:nk-2], and so on.

[0092] For example, assuming that the target digital signal code value output by the analog-to-digital conversion circuit is 12 bits, the code value of the upper 6 bits is determined in the first stage, and the number of bits of the reference digital signal i=6. In the current conversion cycle, after 6 clock cycles, the logic module determines the code value D of the upper 6 bits of the current digital signal code value. t [11:6] = 001101, then the first reference digital signal Din1[5:0] = D t [11:6] = 001101, and Din1[5:0] is input into the auxiliary digital-to-analog conversion module in the 7th clock cycle; after the 7th clock cycle, the logic module can determine the code value D of the upper 7 bits of the current digital signal code value t [11:5]=0011010, then the second reference digital signal Din2[5:0]=D t [10:5]=011010, and Din2[5:0] is input into the auxiliary digital-to-analog conversion module in the 8th clock cycle, and so on.

[0093] Step 403: In the main digital-to-analog conversion module, convert the input signal based on the reference voltage signal to obtain a first conversion voltage.

[0094] In a possible implementation, the main digital-to-analog conversion module can be used to sample and hold the input signal, and then the main digital-to-analog conversion module, the comparison module and the logic module form a loop, and the main digital-to-analog conversion module can convert the intermediate digital signal code value fed back by the logic module into a corresponding analog voltage, i.e., a first conversion voltage, based on a reference voltage signal. Among them, the intermediate digital signal code value is a digital signal code value determined during the conversion process. Taking SAR ADC as an example, the intermediate digital signal code value fed back by the logic module may refer to a digital signal code value determined by the principle of successive approximation in each clock cycle. Since the digital signal code value has not been fully determined and has not yet been used as an output signal of the analog-to-digital conversion circuit, it is referred to as an intermediate digital signal code value in this embodiment.

[0095] Specifically, taking the single-ended SAR ADC as an example, refer to Figure 3 The analog-to-digital conversion circuit shown and Figure 5 The analog-to-digital conversion workflow shown introduces the working principle of the main digital-to-analog conversion module. First, the switch sw is turned on, and the common-mode signal Vcm is connected to the main digital-to-analog conversion module, and the input signal is sampled and held by the DAC. Secondly, the two switches sw are turned off. At this time, the intermediate digital signal code value D[n-1:0] can be the initial value, and the output voltage of the DAC Vdac = Vref / 2-Vin+Vcm is connected to the inverting input of the comparator CMP. In the next clock cycle, the DAC can adjust the switches in the DAC based on the currently received intermediate digital signal code value D[n-1:0], so that the output voltage is updated to Vdac+(2*D[j]-1)Vref / 2 (n-j+1) , j is the bit of the currently determined digital signal code value, at this time, j=n-1, that is, the highest bit. In each subsequent clock cycle, the output voltage Vdac can be adjusted in the above manner until the conversion cycle ends. When there is noise or interference in Vref, Vdac includes the interference of the reference voltage signal Vref.

[0096] It should be noted that Figure 5 The analog-to-digital conversion workflow and the formulas involved are merely mathematical modeling of the working principle of the analog-to-digital conversion circuit, and do not mean software-based implementation of the execution workflow and calculation of the formulas.

[0097] Step 404: In the auxiliary digital-to-analog conversion module, the reference digital signal is processed based on the reference voltage signal to obtain a second conversion voltage.

[0098] In a possible implementation, the auxiliary digital-to-analog conversion module can convert the input reference digital signal into a corresponding analog voltage, ie, a second conversion voltage, based on the reference voltage signal. The conversion principle is the same as the principle of the main digital-to-analog conversion module converting the digital signal code value.

[0099] Furthermore, the auxiliary digital-to-analog conversion module and the main digital-to-analog conversion module have the same circuit type and similar module inputs. On this basis, the second conversion voltage output by the auxiliary digital-to-analog conversion module can generate the same or similar crosstalk as the reference voltage signal in the main digital-to-analog conversion module, thereby offsetting the interference generated by the reference voltage signal in the main digital-to-analog conversion module.

[0100] The working principle of the auxiliary digital-to-analog conversion module will be introduced below with respect to the above-mentioned methods of obtaining the reference digital signal.

[0101] Corresponding to the first method, the reference digital signal is the first preset value. Then, in one conversion cycle, the second conversion voltage output by the auxiliary digital-to-analog conversion module may be fixed, and the second conversion voltage used by the analog-to-digital conversion circuit in each conversion cycle may be the same.

[0102] Corresponding to the above-mentioned method 2, the reference digital signal is the target digital signal code value of the previous conversion cycle, or the high i bits of the target digital signal code value of the previous conversion cycle. Then, in one conversion cycle, the second conversion voltage output by the auxiliary digital-to-analog conversion module can be fixed, but the second conversion voltage adopted by the analog-to-digital conversion circuit in each conversion cycle can be adjusted according to the target digital signal code value of the previous conversion cycle.

[0103] Corresponding to the above-mentioned method 3, in a conversion cycle, in the first stage, the auxiliary digital-to-analog conversion module can convert the first reference digital signal into a second conversion voltage, and in the second stage, the auxiliary digital-to-analog conversion module can convert at least one second reference digital signal into a corresponding second conversion voltage. It can be seen that in a conversion cycle, the second conversion voltage can be dynamically adjusted according to the digital signal code value determined in the current conversion cycle.

[0104] Specifically, taking the single-ended SAR ADC as an example, refer to Figure 3 The analog-to-digital conversion circuit shown and Figure 5 The analog-to-digital conversion workflow shown introduces the working principle of the auxiliary digital-to-analog conversion module. First, the switch sw is turned on, and the common-mode signal Vcm is connected to the auxiliary digital-to-analog conversion module. Secondly, the two switches sw are turned off, and at this time, the auxDAC can adjust the switches in the auxDAC based on Din, and the auxDAC can output the voltage Vaux. The output voltage Vaux is equivalent to the interference including the common-mode signal Vcm and the reference voltage signal Vref.

[0105] Step 405 : In the comparison module and the logic module, a target digital signal code value is determined based on the first conversion voltage and the second conversion voltage. The target digital signal code value is a conversion result of the input signal.

[0106] In a possible implementation, the comparison module can compare the first conversion voltage and the second conversion voltage it receives, and output a corresponding comparison result, and connect the comparison result to the logic module. After receiving the comparison result, the logic module can determine whether the current bit of the digital signal code value is "0" or "1" based on the comparison result, that is, quantize the sampled input signal to obtain a corresponding quantization result. After a conversion cycle, the final quantization result can be obtained, and the analog-to-digital conversion circuit can output the target digital signal code value of the current conversion cycle. The working principle of each conversion cycle is the same, and this embodiment will not be listed one by one.

[0107] Specifically, taking the single-ended SAR ADC as an example, refer to Figure 3 The analog-to-digital conversion circuit shown and Figure 5 The analog-to-digital conversion workflow shown introduces the working principles of the comparison module and the logic module.

[0108] The non-inverting input terminal of the comparator CMP is used to receive Vaux, and the inverting input terminal is used to receive Vdac. The comparator CMP is used to compare whether Vaux is greater than Vdac. If so, it indicates that the current digital signal code value D[n-1:0] is less than the digital signal code value that should be output, and the comparator CMP can output a high level; if not, it indicates that the current digital signal code value D[n-1:0] is greater than the digital signal code value that should be output, and the comparator CMP can output a low level.

[0109] The logic circuit Logic can set D[n-1:0] to the initial value "100...00", that is, the highest bit is set to "1" and the remaining bits are set to "0". In addition, the initial D[n-1:0] is connected to the main digital-to-analog conversion module, so that the main digital-to-analog conversion module can output the corresponding Vdac, and the above comparison result is determined by the comparator CMP. When the main digital-to-analog conversion module receives the high level output by the comparator CMP, that is, the current digital signal code value D[n-1:0] is less than the digital signal code value that should be output, then the highest bit can be retained as "1" and the next bit can be set to "1", increasing the digital signal code value D[n-1:0]; when the main digital-to-analog conversion module receives the low level output by the comparator CMP, that is, the current digital signal code value D[n-1:0] is greater than the digital signal code value that should be output, then the highest bit can be changed to "0" and the next bit can be set to "1", reducing the digital signal code value D[n-1:0]. Similarly, the digital signal code value D[n-1:0] is determined bit by bit from high to low. That is, through the "binary search", the DAC output signal Vdac gradually approaches the common mode signal Vcm. After n approximations, the digital signal code value D[n-1:0] is the final quantization result and is output as the target digital signal code value.

[0110] The above text takes the single-ended structure as an example to introduce the working principle of a group of main digital-to-analog conversion modules and auxiliary digital-to-analog conversion modules. For the differential structure, the first main digital-to-analog conversion module and the first auxiliary digital-to-analog conversion module can be used as a group of modules, respectively connected to the input end of the comparison module; the second main digital-to-analog conversion module and the second auxiliary digital-to-analog conversion module can be used as another group of modules, which are also respectively connected to the input end of the comparison module. Among them, the working principle of each group of modules is the same as above, and it is not repeated here. That is to say, the conversion voltage output by the first auxiliary digital-to-analog conversion module can generate the same or similar crosstalk as the reference voltage signal in the first main digital-to-analog conversion module, which is used to compensate the conversion voltage output by the first main digital-to-analog conversion module to offset the interference generated by the reference voltage signal in the first main digital-to-analog conversion module; the conversion voltage output by the second auxiliary digital-to-analog conversion module can generate the same or similar crosstalk as the reference voltage signal in the second main digital-to-analog conversion module, which is used to compensate the conversion voltage output by the second main digital-to-analog conversion module to offset the interference generated by the reference voltage signal in the second main digital-to-analog conversion module.

[0111] In a specific embodiment, referring to Figure 6 The schematic diagram of the analog-to-digital conversion circuit shown in the figure can be a fully differential SAR ADC, wherein Vip is the positive input signal of the SAR ADC, Vin is the negative input signal of the SAR ADC, DACp is the positive DAC inside the SAR ADC, DACn is the negative DAC inside the SAR ADC, auxDACp is the positive auxiliary DAC, and auxDACn is the negative auxiliary DAC. The input of DACp includes Vip, the reference voltage signal Vref, and the positive digital signal code value Dp[n-1:0] fed back by the logic circuit Logic, the input of auxDACn includes Vref and the corresponding reference digital signal Din_n, Din_n is related to the above Dp[n-1:0], and auxDACn is used to offset the interference generated by Vref in DACp. The input of DACn includes Vin, Vref and the negative end digital signal code value Dn[n-1:0] fed back by the logic circuit Logic. The input of auxDACp includes Vref and the corresponding reference digital signal Din_p. Din_p is related to the above Dn[n-1:0]. auxDACp is used to offset the interference generated by Vref in DACn.

[0112] The embodiments of the present application can achieve the following beneficial effects:

[0113] (1) The analog-to-digital conversion circuit may include an auxiliary digital-to-analog conversion module for canceling interference, and the reference digital signal is converted into a corresponding second conversion voltage through the auxiliary digital-to-analog conversion module, and the input signal is converted into a corresponding first conversion voltage through the main digital-to-analog conversion module. Since the auxiliary digital-to-analog conversion module and the main digital-to-analog conversion module have the same circuit type, the crosstalk generated by the reference voltage signal in the auxiliary digital-to-analog conversion module and the main digital-to-analog conversion module is similar, so the second conversion voltage can be used to compensate the first conversion voltage, cancel the noise or interference of the reference voltage signal in the first conversion voltage, and then the accuracy can be improved in the process of determining the digital signal code value by the comparison module and the logic module, and the conversion accuracy of the analog-to-digital conversion circuit can be improved.

[0114] (2) It provides multiple ways to obtain reference digital signals, which can adapt to various application scenarios.

[0115] The embodiment of the present application also provides an analog-to-digital conversion circuit, which can be used to implement the above analog-to-digital conversion method. The implementation principle of the analog-to-digital conversion circuit has been introduced above and will not be repeated in this embodiment.

[0116] The analog-to-digital conversion circuit may include a main digital-to-analog conversion module, an auxiliary digital-to-analog conversion module, a comparison module and a logic module. The main digital-to-analog conversion module and the auxiliary digital-to-analog conversion module are respectively connected to the input end of the comparison module, and the auxiliary digital-to-analog conversion module has the same circuit type as the main digital-to-analog conversion module.

[0117] The main digital-to-analog conversion module is used to receive an input signal, and convert the input signal based on a reference voltage signal to obtain a first conversion voltage;

[0118] The auxiliary digital-to-analog conversion module is used to receive a reference digital signal, and process the reference digital signal based on the reference voltage signal to obtain a second conversion voltage;

[0119] The comparison module and the logic module are used to determine a target digital signal code value based on the first conversion voltage and the second conversion voltage, and the target digital signal code value is a conversion result of the input signal.

[0120] Optionally, the output end of the main digital-to-analog conversion module is connected to the first input end of the comparison module, and the output end of the auxiliary digital-to-analog conversion module is connected to the second input end of the comparison module.

[0121] Optionally, the main digital-to-analog conversion module includes a first main digital-to-analog conversion module and a second main digital-to-analog conversion module, and the auxiliary digital-to-analog conversion module includes a first auxiliary digital-to-analog conversion module and a second auxiliary digital-to-analog conversion module, wherein the first main digital-to-analog conversion module and the first auxiliary digital-to-analog conversion module are respectively connected to the input end of the comparison module, and the second main digital-to-analog conversion module and the second auxiliary digital-to-analog conversion module are respectively connected to the input end of the comparison module.

[0122] Optionally, the output end of the first main digital-to-analog conversion module is connected to the first input end of the comparison module, and the output end of the first auxiliary digital-to-analog conversion module is connected to the second input end of the comparison module;

[0123] The output end of the second main digital-to-analog conversion module is connected to the second input end of the comparison module, and the output end of the second auxiliary digital-to-analog conversion module is connected to the first input end of the comparison module.

[0124] Optionally, the reference digital signal is configured as a first preset value.

[0125] Optionally, the reference digital signal is determined in the current conversion cycle based on the target digital signal code value in the previous conversion cycle.

[0126] Optionally, if the number of bits i of the reference digital signal is equal to the number of bits n of the target digital signal code value of the previous conversion cycle, the reference digital signal is configured as the target digital signal code value of the previous conversion cycle, wherein i and n are integers greater than 1;

[0127] If the number of bits i of the reference digital signal is less than the number of bits n of the target digital signal code value of the previous conversion cycle, the reference digital signal is configured as the upper i bits of the target digital signal code value of the previous conversion cycle.

[0128] Optionally, when determining the high k bits of the digital signal code value of the current conversion cycle, the auxiliary digital-to-analog conversion module is used to receive a first reference digital signal, and perform processing based on the reference voltage signal and the first reference digital signal to obtain a second conversion voltage, wherein k is an integer greater than 1;

[0129] When determining the remaining bits of the digital signal code value of the current conversion cycle, the auxiliary digital-to-analog conversion module is used to receive at least one second reference digital signal, and process based on the reference voltage signal and the at least one second reference digital signal to obtain a second conversion voltage, wherein the at least one second reference digital signal is determined based on the determined high k bits.

[0130] Optionally, the first reference digital signal is configured as a second preset value; or

[0131] The first reference digital signal is determined based on a target digital signal code value of a previous conversion cycle.

[0132] In an embodiment of the present application, the analog-to-digital conversion circuit may include an auxiliary digital-to-analog conversion module for counteracting interference, and the reference digital signal is converted into a corresponding second conversion voltage through the auxiliary digital-to-analog conversion module, and the input signal is converted into a corresponding first conversion voltage through the main digital-to-analog conversion module. Since the reference digital signal is related to the digital signal code value that can be received by the main digital-to-analog conversion module, the auxiliary digital-to-analog conversion module and the main digital-to-analog conversion module have the same circuit type, so that the crosstalk generated by the reference voltage signal in the auxiliary digital-to-analog conversion module and the main digital-to-analog conversion module is similar, so the second conversion voltage can be used to compensate the first conversion voltage, counteract the noise or interference of the reference voltage signal in the first conversion voltage, and then the accuracy can be improved in the process of determining the digital signal code value by the comparison module and the logic module, and the conversion accuracy of the analog-to-digital conversion circuit can be improved.

[0133] The embodiment of the present application also provides a chip, including the analog-to-digital conversion circuit provided in the embodiment of the present application. A chip (Integrated Circuit, IC) is also called a chip, and the chip can be, but is not limited to, a SOC (System on Chip) chip or a SIP (system in package) chip. The chip is configured with the above analog-to-digital conversion circuit, so that the conversion accuracy of the analog-to-digital conversion circuit is improved, and the chip performance is also improved accordingly.

[0134] The embodiment of the present application also provides an electronic device, which includes a device body and a chip as described above that is provided in the device subject. The electronic device may be, but is not limited to, a weight scale, a body fat scale, a nutrition scale, an infrared electronic thermometer, a pulse oximeter, a human body composition analyzer, a mobile power supply, a wireless charger, a fast charging charger, a car charger, an adapter, a display, a USB (Universal Serial Bus) docking station, a stylus, a true wireless headset, a car central control screen, a car, a smart wearable device, a mobile terminal, and a smart home device. Smart wearable devices include, but are not limited to, smart watches, smart bracelets, and cervical massagers. Mobile terminals include, but are not limited to, smart phones, laptops, tablet computers, and POS (point of sales terminal). Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart sweepers, and smart lights. The electronic device is configured with the above-mentioned analog-to-digital conversion circuit to improve the conversion accuracy of the analog-to-digital conversion circuit, and thus the performance of the electronic device is also improved accordingly.

[0135] The above are only preferred embodiments of the present application, and are not intended to limit the present application in any form. Although the present application has been disclosed as above with preferred embodiments, it is not intended to limit the present application. Any technical personnel in the field can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present application. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. An analog-to-digital conversion circuit, characterized in that: The analog-to-digital conversion circuit includes a main digital-to-analog conversion module, an auxiliary digital-to-analog conversion module, a comparison module and a logic module, wherein the auxiliary digital-to-analog conversion module has the same circuit type as the main digital-to-analog conversion module; The main digital-to-analog conversion module is used to receive an input signal, and convert the input signal based on a reference voltage signal to obtain a first conversion voltage; The auxiliary digital-to-analog conversion module is used to receive a reference digital signal, and process the reference digital signal based on the reference voltage signal to obtain a second conversion voltage, wherein the reference digital signal is determined in a current conversion cycle based on a target digital signal code value of a previous conversion cycle, including: if the number of bits i of the reference digital signal is equal to the number of bits n of the target digital signal code value of the previous conversion cycle, then the reference digital signal is configured as the target digital signal code value of the previous conversion cycle, wherein i and n are integers greater than 1; if the number of bits i of the reference digital signal is less than the number of bits n of the target digital signal code value of the previous conversion cycle, then the reference digital signal is configured as the high i bits of the target digital signal code value of the previous conversion cycle; The comparison module and the logic module are used to determine a target digital signal code value based on the first conversion voltage and the second conversion voltage, and the target digital signal code value is a conversion result of the input signal.

2. The analog-to-digital conversion circuit according to claim 1, characterized in that: The reference digital signal is also configured as a first preset value.

3. The analog-to-digital conversion circuit according to claim 1, characterized in that: When determining the high k bits of the digital signal code value of the current conversion cycle, the auxiliary digital-to-analog conversion module is used to receive a first reference digital signal, and process the first reference digital signal based on the reference voltage signal to obtain a second conversion voltage, wherein k is an integer greater than 1; When determining the remaining bits of the digital signal code value of the current conversion cycle except the high k bits, the auxiliary digital-to-analog conversion module is used to receive at least one second reference digital signal, and process the at least one second reference digital signal based on the reference voltage signal to obtain a second conversion voltage, wherein the at least one second reference digital signal is determined based on the determined high k bits.

4. The analog-to-digital conversion circuit according to claim 3, characterized in that: The first reference digital signal is configured as a second preset value; or The first reference digital signal is determined based on a target digital signal code value of a previous conversion cycle.

5. The analog-to-digital conversion circuit according to claim 1, characterized in that: The output end of the main digital-to-analog conversion module is connected to the first input end of the comparison module, and the output end of the auxiliary digital-to-analog conversion module is connected to the second input end of the comparison module.

6. The analog-to-digital conversion circuit according to claim 1, characterized in that: The main digital-to-analog conversion module includes a first main digital-to-analog conversion module and a second main digital-to-analog conversion module, and the auxiliary digital-to-analog conversion module includes a first auxiliary digital-to-analog conversion module and a second auxiliary digital-to-analog conversion module, wherein the first main digital-to-analog conversion module and the first auxiliary digital-to-analog conversion module are respectively connected to the input end of the comparison module, and the second main digital-to-analog conversion module and the second auxiliary digital-to-analog conversion module are respectively connected to the input end of the comparison module.

7. The analog-to-digital conversion circuit according to claim 6, characterized in that: The output end of the first main digital-to-analog conversion module is connected to the first input end of the comparison module, and the output end of the first auxiliary digital-to-analog conversion module is connected to the second input end of the comparison module; The output end of the second main digital-to-analog conversion module is connected to the second input end of the comparison module, and the output end of the second auxiliary digital-to-analog conversion module is connected to the first input end of the comparison module.

8. A control method for an analog-to-digital conversion circuit, characterized in that: The analog-to-digital conversion circuit includes a main digital-to-analog conversion module, an auxiliary digital-to-analog conversion module, a comparison module and a logic module, wherein the auxiliary digital-to-analog conversion module has the same circuit type as the main digital-to-analog conversion module, and the method includes: Acquire an input signal and a reference digital signal, wherein the method of acquiring the reference digital signal includes: the reference digital signal is determined in the current conversion cycle based on the target digital signal code value of the previous conversion cycle, including: if the number of bits i of the reference digital signal is equal to the number of bits n of the target digital signal code value of the previous conversion cycle, then the reference digital signal is configured as the target digital signal code value of the previous conversion cycle, wherein i and n are integers greater than 1; if the number of bits i of the reference digital signal is less than the number of bits n of the target digital signal code value of the previous conversion cycle, then the reference digital signal is configured as the high i bits of the target digital signal code value of the previous conversion cycle; In the main digital-to-analog conversion module, the input signal is converted based on a reference voltage signal to obtain a first conversion voltage; In the auxiliary digital-to-analog conversion module, the reference digital signal is processed based on the reference voltage signal to obtain a second conversion voltage; In the comparison module and the logic module, a target digital signal code value is determined based on the first conversion voltage and the second conversion voltage, and the target digital signal code value is a conversion result of the input signal.

9. A chip, characterized in that: The chip includes the analog-to-digital conversion circuit according to any one of claims 1-7.

10. An electronic device, characterized in that: The electronic device comprises the analog-to-digital conversion circuit according to any one of claims 1-7.

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