Data processing method, device and equipment

Abstract

The embodiment of the present application provides a data processing method, device and equipment, including: determining a first task to be executed, the first task including multiple key logics; executing the first task to obtain the execution result of the first task; wherein, after executing each key logic, waiting for a random delay time within a fixed range; performing redundancy processing on the first task to obtain the redundant processing result corresponding to the first task; and determining the target processing result of the first task according to the execution result and the redundant processing result. The effect of resisting fault injection attacks is improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of information security, and in particular to a data processing method, device and equipment. Background Art

[0002] Electronic devices can be equipped with security chips, which must be able to resist fault injection attacks to ensure information security. Fault injection attacks are a type of side channel attack method, which usually include temperature attacks, light attacks, and electromagnetic attacks.

[0003] Multiple tasks can be preset in the security chip for electronic devices to call. In the related art, the security chip and its firmware can be designed to protect the tasks in the security chip from fault injection attacks. However, the above-mentioned hardware-based fault injection protection method can only resist part of the fault injection attack, resulting in poor effect in resisting the fault injection attack. Summary of the invention

[0004] The embodiments of the present application provide a data processing method, apparatus and device to improve the effect of resisting fault injection attacks.

[0005] In a first aspect, an embodiment of the present application provides a data processing method, including:

[0006] Determining a first task to be performed, wherein the first task includes a plurality of key logics;

[0007] Execute the first task to obtain the execution result of the first task; wherein, after executing each key logic, wait for a random delay time within a fixed range;

[0008] Performing redundancy processing on the first task to obtain a redundant processing result corresponding to the first task;

[0009] A target processing result of the first task is determined according to the execution result and the redundant processing result.

[0010] In a possible implementation manner, executing the first task to obtain an execution result of the first task includes:

[0011] Execute the i-th operation logic in the first task;

[0012] If the i-th operation logic is the key logic, after executing the i-th operation logic, wait for a random delay time within the i-th fixed range;

[0013] The i is 1, 2, ..., N in sequence, where N is the number of operation logics included in the first task, and N is a positive integer;

[0014] After executing the Nth operation logic in the first task, an execution result of the first task is obtained.

[0015] In a possible implementation, after executing the i-th operation logic, waiting for a random delay time within the i-th fixed range includes:

[0016] After executing the i-th operation logic, a random delay time value within the i-th fixed range is generated using a random number generator built into the security chip;

[0017] Wait for a random delay time within the fixed range.

[0018] In a possible implementation manner, waiting for the random delay time within the i-th fixed range includes:

[0019] According to the random delay duration value within the i-th fixed range, a preset delay statement is called to wait for the random delay duration within the fixed range.

[0020] In a possible implementation manner, performing redundancy processing on the first task to obtain a redundancy processing result corresponding to the first task includes:

[0021] An inverse operation or a secondary operation is performed on the first task to obtain the redundant processing result.

[0022] In a possible implementation manner, performing an inverse operation or a secondary operation on the first task to obtain the redundant processing result includes:

[0023] If the first task is an Advanced Encryption Standard AES algorithm, a Triple Data Encryption 3DES algorithm, an RSA algorithm, or an Elliptic Curve Encryption ECC algorithm, then an inverse operation is performed on the first task to obtain the redundant processing result; and / or,

[0024] If the first task is a hash algorithm, a hash-based message authentication code HMAC algorithm, or a symmetric encryption-based message authentication CMAC algorithm, a secondary operation is performed on the first task to obtain the redundant processing result.

[0025] In a possible implementation manner, the redundant processing is an inverse operation; and determining a target processing result of the first task according to the execution result and the redundant processing result includes:

[0026] If the redundant processing result and the input parameter corresponding to the execution result are the same, then the target processing result is determined to be the execution result.

[0027] In a possible implementation manner, the redundant processing is a secondary operation; and determining a target processing result of the first task according to the execution result and the redundant processing result includes:

[0028] If the redundant processing result is the same as the execution result, the target processing result is determined to be the execution result.

[0029] In a possible implementation, determining a first task to be performed includes:

[0030] Obtaining a business processing request, wherein the business processing request includes an identifier of the business;

[0031] Determine a preset corresponding relationship, wherein the preset corresponding relationship includes a plurality of service identifiers and a task identifier corresponding to each service identifier;

[0032] The first task is determined according to the business processing request and the preset corresponding relationship.

[0033] In a possible implementation manner, after determining the target processing result of the first task according to the execution result and the redundant processing result, the method further includes:

[0034] According to the target processing result, a business processing result corresponding to the business processing request is determined.

[0035] In a second aspect, an embodiment of the present application provides a data processing device, including: a first determination module, an execution module, a processing module, and a second determination module, wherein:

[0036] The first determination module is used to determine a first task to be executed, wherein the first task includes a plurality of key logics;

[0037] The execution module is used to execute the first task and obtain the execution result of the first task; wherein, after executing each key logic, wait for a random delay time within a fixed range;

[0038] The processing module is used to perform redundancy processing on the first task to obtain a redundant processing result corresponding to the first task;

[0039] The second determination module is used to determine a target processing result of the first task according to the execution result and the redundant processing result.

[0040] In a possible implementation manner, the execution module is specifically configured to:

[0041] Execute the i-th operation logic in the first task;

[0042] If the i-th operation logic is the key logic, after executing the i-th operation logic, wait for a random delay time within the i-th fixed range;

[0043] The i is 1, 2, ..., N in sequence, where N is the number of operation logics included in the first task, and N is a positive integer;

[0044] After executing the Nth operation logic in the first task, an execution result of the first task is obtained.

[0045] In a possible implementation manner, the execution module is specifically configured to:

[0046] After executing the i-th operation logic, a random delay time value within the i-th fixed range is generated using a random number generator built into the security chip;

[0047] Wait for a random delay time within the i-th fixed range.

[0048] In a possible implementation manner, the execution module is specifically configured to:

[0049] According to the value of the random delay duration within the i-th fixed range, a preset delay statement is called to wait for the random delay duration within the i-th fixed range.

[0050] In a possible implementation manner, the processing module is specifically used to:

[0051] An inverse operation or a secondary operation is performed on the first task to obtain the redundant processing result.

[0052] In a possible implementation manner, the processing module is specifically used to:

[0053] If the first task is an Advanced Encryption Standard AES algorithm, a Triple Data Encryption 3DES algorithm, an RSA algorithm, or an Elliptic Curve Encryption ECC algorithm, then an inverse operation is performed on the first task to obtain the redundant processing result; and / or,

[0054] If the first task is a hash algorithm, a hash-based message authentication code HMAC algorithm, or a symmetric encryption-based message authentication CMAC algorithm, a secondary operation is performed on the first task to obtain the redundant processing result.

[0055] In a possible implementation manner, the second determining module is specifically configured to:

[0056] If the redundant processing result and the input parameter corresponding to the execution result are the same, then the target processing result is determined to be the execution result.

[0057] In a possible implementation manner, the second determining module is specifically configured to:

[0058] If the redundant processing result is the same as the execution result, the target processing result is determined to be the execution result.

[0059] In a possible implementation manner, the first determining module is specifically configured to:

[0060] Obtaining a business processing request, wherein the business processing request includes an identifier of the business;

[0061] Determine a preset corresponding relationship, wherein the preset corresponding relationship includes a plurality of service identifiers and a task identifier corresponding to each service identifier;

[0062] The first task is determined according to the business processing request and the preset corresponding relationship.

[0063] In a possible implementation manner, the data processing device further includes a third determining module.

[0064] The third determination module is used to determine the business processing result corresponding to the business processing request according to the target processing result.

[0065] In a third aspect, an embodiment of the present application provides an electronic device, including: a memory and a processor;

[0066] The memory stores computer-executable instructions;

[0067] The processor executes the computer-executable instructions stored in the memory, so that the processor executes the data processing method described in any one of the first aspects.

[0068] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer execution instructions, and when the computer execution instructions are executed by a processor, they are used to implement the data processing method described in any one of the first aspects.

[0069] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the data processing method shown in any one of the first aspects.

[0070] In an embodiment of the present application, an electronic device can determine a first task to be executed. In the process of executing the first task, after executing each key logic, it can randomly wait for a random delay time within a fixed range, and then execute the next key logic until the first task is executed to obtain an execution result. After executing the first task, the first task can be redundantly processed to obtain a redundant processing result. The electronic device can determine the target processing result corresponding to the first task based on the execution result and the redundant processing result. Since the first task can be protected by waiting for a random delay time and redundant processing, accurate fault injection attacks can be prevented, and the risk of being attacked by fault injection can be reduced, thereby ensuring data security when running programs on security chips and preventing attacks that obtain sensitive information by stealing the corresponding calculation results of fault injection. Compared with the method of resisting fault injection based on pure hardware, the effect of resisting fault injection attacks is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0071] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0072] Figure 1 A schematic diagram of an application scenario provided in an embodiment of the present application;

[0073] Figure 2 A flowchart of a data processing method provided in an embodiment of the present application;

[0074] Figure 3 A flowchart of another data processing method provided in an embodiment of the present application;

[0075] Figure 4 A flowchart of another data processing method provided in an embodiment of the present application;

[0076] Figure 5 A schematic diagram of the structure of a data processing device provided in an embodiment of the present application;

[0077] Figure 6 A schematic diagram of the structure of another data processing device provided in an embodiment of the present application;

[0078] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0079] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0080] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar tasks, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0081] Figure 1 For a schematic diagram of an application scenario provided in an embodiment of the present application, see Figure 1 , a security chip may be installed in the electronic device, and the security chip may include multiple tasks. For example, the security chip may include task-1, task-2, task-3, ..., task-n. Each task may include multiple key logics. For example, task-n may include key logic-1, key logic-2, ..., key logic-n.

[0082] The electronic device may obtain a business processing request, and determine the task to be executed in the security chip according to the business processing request, obtain the execution result of the task, and then obtain the business processing result. For example, the electronic device may determine the task to be executed in the security chip as task-n according to the business processing request. Task-n may be executed, the execution result of task-n may be obtained, and the business processing result may be obtained according to the execution result of task-n.

[0083] When executing tasks in the security chip, in order to improve the protection of the tasks, a random delay time can be set after the key logic in the task to prevent precise fault injection attacks. For example, after executing the key logic-1 in task-n, the delay statement-1 can be executed to wait for the random delay time.

[0084] After the electronic device completes the task, it can perform redundant processing on the task to obtain a redundant processing result. Based on the redundant processing result, it can be determined whether a fault injection attack has been performed during the task execution, and further processing can be performed. For example, after the task-n is executed, redundant processing can be performed on the task-n to obtain a redundant processing result. Based on the redundant processing result, it can be determined whether a fault injection attack has been performed during the task execution, and the fault injection attack can be effectively identified.

[0085] In the related art, security chips and firmware can be designed to protect tasks in the security chip from fault injection attacks. However, the above-mentioned hardware-based fault injection protection method can only resist some fault injection attacks, resulting in poor protection against fault injection attacks and failure to fully protect against fault injection attacks.

[0086] In the embodiment of the present application, the task execution process can be protected in the security chip through random delay and redundant processing, ensuring the safety of the running process on the security chip. Compared with the method based on pure hardware to resist fault injection, the protection scope can be expanded and the effect of resisting fault injection attacks can be improved.

[0087] The technical solutions shown in the present application are described in detail below through specific embodiments. It should be noted that the following embodiments can exist independently or in combination with each other, and the same or similar contents will not be described repeatedly in different embodiments.

[0088] Figure 2 A flowchart of a data processing method provided in an embodiment of the present application. Figure 2 , the method may include:

[0089] S201: Determine a first task to be executed.

[0090] The execution subject of the embodiment of the present application may be an electronic device, or a data processing device provided in the electronic device. The data processing device may be implemented by software, or by a combination of software and hardware. The data processing device may be a processor in the electronic device. For ease of understanding, the following description is made by taking the execution subject as an electronic device as an example.

[0091] The electronic device can run the software program based on the security chip. During the running of the software program, the electronic device can determine the first task to be performed.

[0092] The first task may be an algorithm, for example, the first task may be an Advanced Encryption Standard (AES) algorithm, a Triple Data Encryption Standard (3DES) algorithm, an RSA algorithm or an Ellipse Curve Cryptography (ECC) algorithm, a Hash (HASH) algorithm, a Hash-based Message Authentication Code (HMAC) algorithm, a Cypher-Based Message Authentication Code (CMAC) algorithm based on symmetric encryption, etc.

[0093] In an optional embodiment, the first task can be determined in the following manner: obtaining a business processing request, the business processing request including a business identifier; determining a preset correspondence, the preset correspondence including multiple business identifiers and a task identifier corresponding to each business identifier; determining the first task based on the business processing request and the preset correspondence.

[0094] The service processing request may be a service processing request generated when the electronic device runs its own software program, or may be a service processing request sent by the first device. For example, the service processing request may be a decryption of an encrypted file, or may be a transfer message sent by the first device.

[0095] The service processing request may include a service identifier. For example, if the service processing request obtained by the electronic device is to decrypt an encrypted file, the service processing request may include a decryption operation identifier.

[0096] The preset corresponding relationship may be a corresponding relationship preset by a staff member in a software program. The preset corresponding relationship may include multiple business identifiers and task identifiers corresponding to each business identifier. The business identifier and the task identifier correspond one to one, and the task identifier may be determined based on the business identifier.

[0097] For example, if the preset corresponding relationship includes a decryption operation identifier and a decryption algorithm identifier corresponding to the decryption operation identifier, after the electronic device obtains the decryption operation identifier, it can determine the decryption algorithm identifier according to the preset corresponding relationship.

[0098] The electronic device may determine the first task to be executed according to the business processing request and the preset corresponding relationship. For example, if the business processing request is to decrypt an encrypted file, and the business processing request includes an AES decryption operation identifier, the electronic device may determine the corresponding AES decryption algorithm identifier in the preset corresponding relationship according to the AES decryption operation identifier, and then determine the AES algorithm to be executed according to the AES decryption algorithm identifier.

[0099] S202, executing the first task and obtaining the execution result of the first task; wherein, after executing each key logic, waiting for a random delay time within a fixed range.

[0100] The first task may include multiple key logics. For example, the first task may include key logic-1, key logic-2, key logic-3, ..., key logic-n.

[0101] The fixed range refers to the range of the delay time, which can be preset by the staff according to the requirements of the first task. For example, the fixed range can be 10ms.

[0102] The unit of the delay time may be milliseconds, for example, the delay time may be 5 ms.

[0103] When the electronic device is executing the first task, it can randomly wait for a corresponding delay time after executing each key logic, and then execute the next key logic until the entire first task is executed to obtain the execution result of the first task.

[0104] For example, if the first task is an algorithm, and the algorithm includes key logic-1, key logic-2, key logic-3, key logic-4, and key logic-5, then the electronic device can randomly wait for 5ms after executing key logic-1; then continue to execute key logic-2, and after execution is completed, it can randomly wait for 2ms; and so on, until key logic-5 is executed, that is, the entire algorithm is executed, and the execution result of the algorithm can be obtained.

[0105] S203: Perform redundancy processing on the first task to obtain a redundant processing result corresponding to the first task.

[0106] Redundant processing may include inverse operations and secondary operations. Inverse operations refer to calculating the input parameters of the first task based on the execution result of the first task. Secondary operations refer to performing operations on the first task again based on the input parameters of the first task.

[0107] Illustratively, in the embodiment of the present application, the electronic device may determine the redundant processing corresponding to the first task according to the characteristics of the first task, and then perform redundant processing on the first task to obtain the redundant processing result corresponding to the first task.

[0108] For example, the first task may be an algorithm, and the first task may be divided into a reversible algorithm and an irreversible algorithm according to the characteristics of the first task. Reversible algorithms may include: AES algorithm, 3DES algorithm, RSA algorithm, ECC algorithm; irreversible algorithms may include: HASH algorithm, HMAC algorithm, CMAC algorithm. The electronic device may determine the redundant processing corresponding to the first task according to whether the first task is reversible, and then perform redundant processing on the first task to obtain the redundant processing result corresponding to the first task.

[0109] Optionally, the electronic device may also identify scenarios for important data in the first task, add secondary operations, and increase the ability to identify fault injection attacks.

[0110] S204: Determine a target processing result of the first task according to the execution result and the redundant processing result.

[0111] The electronic device may compare the execution result and the redundant processing result to determine the target processing result of the first task. If the redundant processing is an inverse operation, and the redundant processing result is the same as the input parameter corresponding to the execution result, then the target processing result may be determined to be the execution result; if the redundant processing is a secondary operation, and the redundant processing result is the same as the execution result, then the target processing result may be determined to be the execution result.

[0112] Optionally, after determining the target processing result, the business processing result corresponding to the business processing request may be determined according to the target processing result.

[0113] In an embodiment of the present application, the electronic device can determine the first task to be executed according to the business processing request. In the process of executing the first task, after executing each key logic, the delay time can be randomly waited, and then the next key logic is executed until the first task is executed and the execution result is obtained. After the first task is executed, the first task can be redundantly processed to obtain a redundant processing result. The electronic device can determine the target processing result corresponding to the first task based on the execution result and the redundant processing result, and then determine the business processing result. Since the first task can be protected by randomly waiting for the delay time and redundant processing, accurate fault injection attacks can be prevented, and the risk of being attacked by fault injection can be reduced, thereby ensuring data security when running the program on the security chip, and preventing the attack method of obtaining sensitive information by stealing the calculation results corresponding to the fault injection attack. Compared with the method of resisting fault injection based on pure hardware, the effect of resisting fault injection attacks is improved.

[0114] Below, in Figure 2 Based on the embodiment shown, combined Figure 3 , the above step 202 is further described in detail. Figure 3A flowchart of another data processing method provided in an embodiment of the present application. Figure 3 , the method may include:

[0115] S301: Initialize the first task and initialize i to 1.

[0116] The electronic device determines that before executing the first task, the parameters in the first task may be initialized, that is, the parameters may be assigned initial values ​​to initialize the context of the first task.

[0117] The parameter data format can be hexadecimal. For example, parameter -1 can be 0x5a5a5a5a.

[0118] i may be initialized to 1, indicating that execution starts from the first key logic in the first task.

[0119] S302, executing the i-th operation logic in the first task.

[0120] The electronic device may determine N operation logics included in the first task, where N is a positive integer.

[0121] According to the order of the operation logics, the i-th operation logic to be executed can be determined, wherein i can be 1, 2, ..., N in sequence. For example, if i=1, the first operation logic can be executed.

[0122] S303: Generate a random delay duration value within the i-th fixed range.

[0123] The random delay duration value may be generated in the following manner: a random delay seed may be generated using a random number generator built into the security chip, and the random delay seed may be randomly changed to generate a random delay duration value.

[0124] Among them, the random number generator is a device that generates random numbers based on physical hardware such as electronic circuits and converters in the chip.

[0125] The random delay seed may be used as an initial value of the random delay duration. For example, the random delay seed may be the current system time.

[0126] For example, the current system time 2022 / 4 / 21 14:32 can be used as the random delay seed, and the hardware random generator can randomly change 2022 / 4 / 21 14:32 to obtain a random number 5, and 5 can be used as the value of the random delay duration.

[0127] In an optional embodiment, if the i-th operation logic is a critical logic, after executing the i-th operation logic, a random delay duration value within the i-th fixed range can be generated using a random number generator built into the security chip. For example, if i=1, after executing the first operation logic, a random delay duration value 5 corresponding to the first operation logic can be generated.

[0128] It should be noted that after executing the same operation logic for different times, the random delay duration value generated is also random. For example, after executing the second operation logic for the first time, the random delay duration value generated may be 5; after executing the second operation logic for the second time, the random delay duration value generated may be 3.

[0129] S304: Call a preset delay statement and wait for a random delay time within the i-th fixed range.

[0130] After the electronic device generates a random delay duration value, it can call the preset delay statement according to the random delay duration value to wait for the random delay duration within the i-th fixed range corresponding to the i-th operation logic. For example, if the generated random delay duration value is 5, the electronic device can call the preset delay statement according to the random delay duration value 5 to wait for the random delay duration of 5ms.

[0131] S305. Update i to i+1.

[0132] After the electronic device completes executing the i-th operation logic, i can be updated and i+1 is used as the new i.

[0133] For example, if i=1, after executing the first operation logic, i can be updated to 2, indicating that the second operation logic starts to be executed.

[0134] S306: Determine whether i is greater than N.

[0135] Since i is 1, 2, ..., N in sequence, the maximum value of i is N. The last operation logic executed by the electronic device in the first task is the Nth operation logic.

[0136] When the electronic device determines that i is less than or equal to N, S302 is executed; when the electronic device determines that i is greater than N, it means that the electronic device has completed the Nth operation logic, and the execution of the first task is completed, and the execution result can be obtained.

[0137] In an embodiment of the present application, the electronic device can determine to initialize the first task and determine the i-th operation logic to be executed. After executing the i-th operation logic, a random delay duration value within the i-th fixed range can be generated, and then a preset delay statement can be called to wait for the random delay duration within the i-th fixed range corresponding to the i-th operation logic, and then the next operation logic is executed until the first task is executed to obtain the execution result. Since a random delay duration value can be generated and a preset delay statement can be called to wait for a random delay duration, it is possible to resist precise fault injection attacks, ensure data security when running programs on security chips, and prevent attacks that steal the operation results corresponding to fault injection to obtain sensitive information. Compared with the method of resisting fault injection based on pure hardware, the effect of resisting fault injection attacks is greatly improved.

[0138] Below, in Figure 2 Based on the embodiment shown, combined Figure 4 , step 203 and step 204 are further described in detail. Figure 4 A flowchart of another data processing method provided in an embodiment of the present application. Figure 4 , the method may include:

[0139] S401: Determine redundant processing corresponding to a first task.

[0140] The redundant processing corresponding to the first task may be determined according to the type of the first task, which may specifically include the following two situations:

[0141] Case 1: If the first task is a reversible algorithm, the redundant processing corresponding to the first task may be an inverse operation.

[0142] For example, if the first task is an AES algorithm, since the AES algorithm is a reversible algorithm, the redundant processing corresponding to the first task may be an inverse operation.

[0143] Case 2: If the first task is an irreversible algorithm, the redundant processing corresponding to the first task may be a secondary operation.

[0144] For example, if the first task is a HASH algorithm, since the HASH algorithm is an irreversible algorithm, the redundant processing corresponding to the first task may be a secondary operation.

[0145] S402: Perform redundancy processing on the first task to obtain a redundant processing result corresponding to the first task.

[0146] After the redundant processing corresponding to the first task is determined, the redundant processing may be performed on the first task, and the redundant processing result corresponding to the first task may be calculated.

[0147] The calculation of redundant processing results may include the following two situations:

[0148] Case 1: If the redundant processing is an inverse operation, the redundant processing result can be calculated according to the execution result corresponding to the first task.

[0149] For example, if the first task is the AES algorithm, the corresponding redundant processing is an inverse operation, and the execution result of the AES algorithm is 1EDC, then the inverse operation of the AES algorithm can be performed based on the execution result 1EDC of the AES algorithm. Assuming that the input parameter of the AES algorithm is calculated to be 2AF5, the calculated input parameter 2AF5 can be used as the redundant processing result.

[0150] Case 2: If the redundant processing is a secondary operation, the redundant processing result can be calculated based on the input parameters of the first task.

[0151] For example, if the first task is a HASH algorithm, the corresponding redundant processing is a secondary operation, and the input parameter of the HASH algorithm is 2AF1, then the HASH algorithm can be subjected to a secondary operation according to the input parameter 2AF1 of the HASH algorithm to obtain a redundant processing result.

[0152] S403: Determine a target processing result of the first task according to the execution result and the redundant processing result.

[0153] Determining the target processing result of the first task may include the following four situations:

[0154] Case 1: If the redundant processing is an inverse operation, the redundant processing result and the input parameter corresponding to the execution result are the same.

[0155] If the redundant processing result and the input parameter corresponding to the execution result are the same, it means that the first task has not been subjected to a fault injection attack, and the target processing result of the first task can be determined to be the execution result.

[0156] For example, if the first task is the AES algorithm, the corresponding redundant processing is an inverse operation, the input parameter of the AES algorithm is 2AF5, and the execution result is 1EDC, then the AES algorithm can be inversely operated according to the execution result 1EDC of the AES algorithm. If the redundant processing result calculated is 2AF5, it can be determined that the redundant processing result 2AF5 is the same as the input parameter 2AF5 of the AES algorithm, which means that the AES algorithm has not been subjected to a fault injection attack, and the execution result is valid, then it can be determined that the target processing result of the AES algorithm is the execution result 1EDC.

[0157] Case 2: If the redundant processing is an inverse operation, the redundant processing result and the input parameter corresponding to the execution result are different.

[0158] If the redundant processing result is different from the input parameter corresponding to the execution result, it means that the first task has been attacked by fault injection and the execution result is unreliable, and it can be determined that the target processing result of the first task is an error.

[0159] For example, if the first task is the AES algorithm, the corresponding redundant processing is an inverse operation, and the input parameter of the AES algorithm is 2AF5, if the correct execution result should be 1EDC, but the actual execution result is 1ED2, then the AES algorithm can be inversely operated according to the actual execution result 1ED2 of the AES algorithm. If the redundant processing result calculated is 2FD3, it can be determined that the redundant processing result 2FD3 is different from the input parameter 2AF5 of the AES algorithm, which means that in the process of calculating the input parameter 2AF5 through the AES algorithm and obtaining the actual execution result 1ED2, the AES algorithm has been tampered with, and the actual execution result 1ED2 is unreliable, then the target processing result of the AES algorithm can be error. Error can be returned to indicate that the AES algorithm has been tampered with.

[0160] Case 3: If the redundant processing is a secondary operation, the redundant processing result is the same as the execution result.

[0161] If the redundant processing result is the same as the execution result, it means that the first task has not been tampered with, and it can be determined that the target processing result of the first task is the execution result.

[0162] For example, if the first task is a HASH algorithm, the corresponding redundant processing is a secondary operation, the input parameter of the HASH algorithm is 2AF1, and the execution result is 2CF5, then the HASH algorithm can be subjected to a secondary operation according to the input parameter 2AF1 of the HASH algorithm to obtain a redundant processing result. If the redundant processing result calculated is 2CF5, it can be determined that the redundant processing result 2CF5 is the same as the execution result 2CF5, which means that the HASH algorithm has not been subjected to a fault injection attack, and the execution result is valid, and it can be determined that the target processing result of the HASH algorithm is the execution result 2CF5.

[0163] Case 4: If the redundant processing is a secondary operation, the redundant processing result is different from the execution result.

[0164] If the redundant processing result is different from the execution result, it means that the first task has been tampered with, and it can be determined that the target processing result of the first task is an error.

[0165] For example, if the first task is the HASH algorithm, the corresponding redundant processing is a secondary operation, and the input parameter of the HASH algorithm is 2AF1. If the correct execution result should be 2CF5, but the actual execution result is 2CE3, then the HASH algorithm can be subjected to secondary operation according to the input parameter 2AF1 of the HASH algorithm to obtain the redundant processing result. If the redundant processing result calculated is 2DE6, it can be determined that the redundant processing result 2DE6 is different from the actual execution result 2CE3, indicating that the HASH algorithm has been subjected to a fault injection attack, and the actual execution result 2CE3 is unreliable, then it can be determined that the target processing result of the HASH algorithm is error. Error can be returned to indicate that the HASH algorithm has been subjected to a fault injection attack.

[0166] Optionally, in the above-mentioned cases 1 and 3, the electronic device may determine the target processing result as the business processing result, or may determine the business processing result based on the target processing result.

[0167] The service processing result may include displaying the service processing result and / or sending the service processing result to other devices.

[0168] For example, if the business processing request is to decrypt encrypted information, the electronic device can perform a decryption operation on the encrypted information through the AES algorithm to obtain the target processing result, i.e., the decrypted information. The electronic device can then use the target processing result as the business processing result, i.e., display the decrypted information.

[0169] If the business processing request is an encrypted transfer message sent by the first device, the electronic device can decrypt the encrypted transfer message through the AES algorithm to obtain the target processing result, that is, the decrypted transfer message. The electronic device can determine the business processing result based on the target processing result, that is, it can send a message of transfer success or failure to the first device based on the decrypted transfer information.

[0170] In an embodiment of the present application, the electronic device can determine the redundant processing corresponding to the first task, and perform redundant processing on the first task to obtain a redundant processing result. The electronic device can determine the target processing result corresponding to the first task based on the execution result and the redundant processing result, and can also determine the business processing result based on the target processing result. Since the first task can be verified through redundant processing, the ability to detect fault injection attacks is improved, ensuring data security when running programs on a security chip and preventing attacks that obtain sensitive information by stealing the calculation results corresponding to fault injection. Compared with the method of resisting fault injection based on pure hardware, the effect of resisting fault injection attacks is greatly improved.

[0171] Based on any one of the above embodiments, the data processing method is further described in detail below by taking the AES algorithm processing 10 data packets as an example.

[0172] If the service processing request obtained by the electronic device is to decrypt 10 data packets, the service identifier is the decryption operation identifier-1, and the corresponding task identifier is the AES algorithm, then it can be determined that the first task to be executed is the AES algorithm, and it is determined that there are 10 data packets to be processed. The 10 data packets can be data packet-1, data packet-2, data packet-3, ..., data packet-10. Assume that the data of data packet-1 to data packet-9 are all 16-byte aligned data packets, and data packet-10 is a non-16-byte aligned data packet.

[0173] The electronic device can process the 10 data packets by executing the AES algorithm.

[0174] Before calling the AES algorithm, you can define the AES algorithm interface, which can include multiple parameters. For example, you can define the algorithm interface as ise_crypto_err_t crypto_aes, and the parameters can include: algorithm (algo), decryption identifier (decrypt), keyword (key), initial vector (iv), input parameter (in), character length of input parameter (in_len), buffer (chk_buf), output parameter (out), character length of output parameter (out_len), etc.

[0175] The in data area can be used to store input parameters; the out data area can be used to store execution results; and the chk_buf data area can be used to store redundant processing results. Hardware random numbers can be used to fill the memory space of chk_buf to prevent external personnel from presetting erroneous data.

[0176] Optionally, an inverse operation flag may be set in the AES algorithm to perform an inverse operation. For example, the inverse operation flag may be invert_decrypt.

[0177] Before calling the AES algorithm, you can also perform validity checks on parameters such as algo, decrypt, key, and iv to ensure the validity of the parameters.

[0178] Next, the specific process of calling the AES algorithm and performing an inverse operation on the AES algorithm is described, which may include process 1, process 2, process 3, process 4, and process 5.

[0179] In an optional embodiment, the AES algorithm function can be implemented in a syllogistic manner. For example, sub-functions such as aes_begin, aes_update, and aes_final can be set for the electronic device to call. For example, aes_begin can be called to initialize the AES algorithm context; aes_update can be called to perform encryption operations on non-last packet data; and aes_final can be called to perform encryption operations on the last packet of data (non-16-byte aligned).

[0180] Process 1: The electronic device can call aes_begin to initialize the context of the AES algorithm, that is, different initial values ​​can be assigned to the parameters in the AES algorithm according to actual needs. For example, the initial value can be 0x5a5a5a5a.

[0181] aes_begin can be set as the key logic. After aes_begin is executed, the hardware random number generator can be used to generate a delay time of 5ms corresponding to aes_begin, and the preset delay statement can be called to achieve a wait of 5ms.

[0182] Process 2: The electronic device can call aes_update to perform encryption operations on the first 9 data packets and set aes_begin as the key logic.

[0183] For any data packet, the electronic device can call aes_update to perform encryption operations on the data packet, and after each execution of aes_update, it can use the hardware random number generator to generate the delay duration corresponding to aes_update, and call the preset delay statement to achieve the waiting delay duration.

[0184] For example, the electronic device can call aes_update to perform encryption operations on data packet -1, and after executing aes_update, it can use the hardware random number generator to generate a delay time of 3ms corresponding to aes_update, and call the preset delay statement to achieve waiting for 3ms; then, the electronic device can call aes_update to perform encryption operations on data packet -2, and after executing aes_update, it can use the hardware random number generator to generate a delay time of 7ms corresponding to aes_update, and call the preset delay statement to achieve waiting for 7ms; and so on, until data packet -9 is processed, the hardware random number generator can also be used to generate a delay time of 1ms corresponding to aes_update, and the preset delay statement can be called to achieve waiting for 1ms.

[0185] Process 3: Since data packet -10 is not 16-byte aligned, the processing method is slightly different from the first 9 data packets, so the electronic device can call aes_final to perform encryption operation on data packet -10 and set aes_final as the key logic. After executing aes_final, the hardware random number generator can be used to generate a delay time of 4ms corresponding to aes_final, and the preset delay statement can be called to achieve a 4ms wait.

[0186] Through the above process 1, process 2 and process 3, the AES algorithm can be executed to realize the encryption operation of the 10 data packets, and the execution result can be obtained, and the execution result can be stored in the out data area.

[0187] Next, the process of inverse operation of the AES algorithm is described in detail.

[0188] Process 4: Since the AES algorithm is a reversible algorithm, it can be determined that the redundancy processing corresponding to the AES algorithm is an inverse operation, and the AES inverse operation can be performed, that is, according to the execution result, the process 1, process 2 and process 3 can be executed again to calculate the input parameters of the AES algorithm, that is, the redundancy processing result. The redundancy processing result can be stored in the chk_buf data area.

[0189] Process 5: Since the in data area stores the input parameters of the AES algorithm, and the chk_buf data area stores the redundant processing results, that is, the calculated input parameters of the AES algorithm, the data in the in data area can be compared with the data in the chk_buf data area to determine the comparison result. If the comparison results are the same, it means that the AES algorithm has not been attacked by a fault injection, and the target processing result of the AES algorithm can be determined as the execution result. Furthermore, the electronic device can determine the business processing result corresponding to the business processing request based on the execution result. If the comparison results are not the same, it means that the AES algorithm has been attacked by a fault injection, and the processing result of the AES algorithm can be determined to be an error (error), and an error can be returned to indicate that the AES algorithm has been attacked by a fault injection.

[0190] Optionally, when comparing the data in the in data area with the data in the chk_buf data area, the comparison operation may be set as a key logic, and the comparison operation may be performed a second time to improve the ability to identify fault injection attacks.

[0191] Optionally, if the comparison result is not the same and the target processing result of the AES algorithm is determined to be an error, a hardware random number generator can be used to generate random numbers to fill the out data area and the chk_buf data area to prevent the execution results and redundant processing results from being used by outsiders.

[0192] It should be noted that the implementation of sub-functions such as aes_begin, aes_update, and aes_final can all be used Figure 2 , Figure 3 and Figure 4 The data processing method described in the embodiment prevents the AES algorithm from being attacked by fault injection at any location and at any time.

[0193] In an embodiment of the present application, the electronic device can determine the first task to be executed, the data packet to be executed and the number of data packets according to the business processing request. The electronic device can set the key logic in the first task, and after each key logic is executed, it can randomly generate a delay time, call a preset delay statement to wait for the delay time, and then execute the next key logic until the first task is executed and the execution result is obtained. After the first task is executed, the first task can be redundantly processed to obtain a redundant processing result. The electronic device can determine the target processing result of the first task according to the redundant processing result and the execution result, and then determine the business processing result. Since the key logic in the first task can be set with a random delay time, accurate fault injection attacks can be prevented; the correctness of the execution result can be verified by redundant processing of the first task, and the ability to identify fault injection attacks is improved. Therefore, the data security when running the program on the security chip is ensured by the random waiting delay time and redundant processing data processing method, and the attack method of obtaining sensitive information by stealing the operation result corresponding to the fault injection is prevented. Compared with the method of resisting fault injection based on pure hardware, the effect of resisting fault injection attacks is greatly improved.

[0194] Figure 5 This is a schematic diagram of the structure of a data processing device provided in an embodiment of the present application. The data processing device may be a chip or a chip module. Figure 5 The data processing device may include: a first determination module 11, an execution module 12, a processing module 13, and a second determination module 14, wherein:

[0195] The first determination module 11 is used to determine a first task to be executed, wherein the first task includes a plurality of key logics;

[0196] The execution module 12 is used to execute the first task and obtain the execution result of the first task; wherein, after executing each key logic, wait for a random delay time within a fixed range;

[0197] The processing module 13 is used to perform redundancy processing on the first task to obtain a redundant processing result corresponding to the first task;

[0198] The second determination module 14 is used to determine a target processing result of the first task according to the execution result and the redundant processing result.

[0199] The data processing device provided in the embodiment of the present application can execute the technical solution shown in the above method embodiment, and its implementation principle and beneficial effects are similar, which will not be repeated here.

[0200] In a possible implementation manner, the execution module 12 is specifically configured to:

[0201] Execute the i-th operation logic in the first task;

[0202] If the i-th operation logic is the key logic, after executing the i-th operation logic, wait for a random delay time within the i-th fixed range;

[0203] The i is 1, 2, ..., N in sequence, where N is the number of operation logics included in the first task, and N is a positive integer.

[0204] After executing the Nth operation logic in the first task, an execution result of the first task is obtained.

[0205] In a possible implementation manner, the execution module 12 is specifically configured to:

[0206] After executing the i-th operation logic, a random delay time value within the i-th fixed range is generated using a random number generator built into the security chip;

[0207] Wait for the delay time corresponding to the i-th operation logic.

[0208] In a possible implementation manner, the execution module 12 is specifically configured to:

[0209] According to the value of the random delay duration within the i-th fixed range, a preset delay statement is called to wait for the random delay duration within the i-th fixed range.

[0210] In a possible implementation manner, the processing module 13 is specifically used to:

[0211] An inverse operation or a secondary operation is performed on the first task to obtain the redundant processing result.

[0212] In a possible implementation manner, the processing module 13 is specifically used to:

[0213] If the first task is an Advanced Encryption Standard AES algorithm, a Triple Data Encryption 3DES algorithm, an RSA algorithm, or an Elliptic Curve Encryption ECC algorithm, then an inverse operation is performed on the first task to obtain the redundant processing result; and / or,

[0214] If the first task is a hash algorithm, a hash-based message authentication code HMAC algorithm, or a symmetric encryption-based message authentication CMAC algorithm, a secondary operation is performed on the first task to obtain the redundant processing result.

[0215] In a possible implementation manner, the second determining module 14 is specifically configured to:

[0216] If the redundant processing result and the input parameter corresponding to the execution result are the same, then the target processing result is determined to be the execution result.

[0217] In a possible implementation manner, the second determining module 14 is specifically configured to:

[0218] If the redundant processing result is the same as the execution result, the target processing result is determined to be the execution result.

[0219] In a possible implementation manner, the first determining module 11 is specifically configured to:

[0220] Obtaining a business processing request, wherein the business processing request includes an identifier of the business;

[0221] Determine a preset corresponding relationship, wherein the preset corresponding relationship includes a plurality of service identifiers and a task identifier corresponding to each service identifier;

[0222] The first task is determined according to the business processing request and the preset corresponding relationship.

[0223] The data processing device provided in the embodiment of the present application can execute the technical solution shown in the above method embodiment, and its implementation principle and beneficial effects are similar, which will not be repeated here.

[0224] Figure 6 This is a schematic diagram of the structure of another data processing device provided in an embodiment of the present application. The data processing device may be a chip or a chip module. Figure 5 Based on the embodiment shown, the data processing device further includes a third determination module 15,

[0225] The third determination module 15 is used to determine the business processing result corresponding to the business processing request according to the target processing result.

[0226] The data processing device provided in the embodiment of the present application can execute the technical solution shown in the above method embodiment, and its implementation principle and beneficial effects are similar, which will not be repeated here.

[0227] The present application embodiment provides a structural diagram of an electronic device, see Figure 7 The electronic device 20 may include a processor 21 and a memory 22. Exemplarily, the processor 21 and the memory 22 are interconnected via a bus 23.

[0228] The memory 22 stores computer-executable instructions;

[0229] The processor 21 executes the computer-executable instructions stored in the memory 22, so that the processor 21 performs the data processing method shown in the above method embodiment.

[0230] All or part of the steps of the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a readable memory. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned memory (storage medium) includes: read-only memory (English: read-only memory, abbreviated: ROM), RAM, flash memory, hard disk, solid state drive, magnetic tape (English: magnetic tape), floppy disk (English: floppy disk), optical disk (English: optical disk) and any combination thereof.

[0231] Accordingly, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the data processing method described in the above method embodiment.

[0232] Accordingly, an embodiment of the present application may also provide a computer program product, including a computer program, which, when executed by a processor, can implement the data processing method shown in the above method embodiment.

[0233] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0234] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0235] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

[0236] In the present application, the term "include" and its variations may refer to non-restrictive inclusion; the term "or" and its variations may refer to "and / or". The terms "first", "second", etc. in the present application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. In the present application, "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previously associated objects are in an "or" relationship.

Claims

1. A data processing method, characterized in that: include: Determining a first task to be performed, wherein the first task includes a plurality of key logics; Execute the first task to obtain the execution result of the first task; wherein, after executing each key logic, wait for a random delay time within a fixed range; performing redundancy processing on the first task to obtain a redundant processing result corresponding to the first task, wherein the redundant processing includes an inverse operation and a secondary operation, the inverse operation refers to calculating an input parameter of the first task according to the execution result of the first task, and the secondary operation refers to performing another operation on the first task according to the input parameter of the first task; A target processing result of the first task is determined according to the execution result and the redundant processing result.

2. The method according to claim 1, characterized in that Executing the first task and obtaining an execution result of the first task includes: Execute the i-th operation logic in the first task; If the i-th operation logic is the key logic, after executing the i-th operation logic, wait for a random delay time within the i-th fixed range; The i is 1, 2, ..., N in sequence, where N is the number of operation logics included in the first task, and N is a positive integer; After executing the Nth operation logic in the first task, an execution result of the first task is obtained.

3. The method according to claim 2, characterized in that After executing the i-th operation logic, waiting for a random delay time within the i-th fixed range includes: After executing the i-th operation logic, a random delay time value within the i-th fixed range is generated using a random number generator built into the security chip; Wait for a random delay time within the i-th fixed range.

4. The method according to claim 3, characterized in that Waiting for the random delay time within the i-th fixed range includes: According to the value of the random delay duration within the i-th fixed range, a preset delay statement is called to wait for the random delay duration within the i-th fixed range.

5. The method according to claim 4, characterized in that Performing redundancy processing on the first task to obtain a redundancy processing result corresponding to the first task includes: An inverse operation or a secondary operation is performed on the first task to obtain the redundant processing result.

6. The method according to claim 5, characterized in that Performing an inverse operation or a secondary operation on the first task to obtain the redundant processing result includes: If the first task is an Advanced Encryption Standard AES algorithm, a Triple Data Encryption 3DES algorithm, an RSA algorithm, or an Elliptic Curve Encryption ECC algorithm, then an inverse operation is performed on the first task to obtain the redundant processing result; and / or, If the first task is a hash algorithm, a hash-based message authentication code HMAC algorithm, or a symmetric encryption-based message authentication CMAC algorithm, a secondary operation is performed on the first task to obtain the redundant processing result.

7. The method according to any one of claims 1 to 6, characterized in that: The redundant processing is an inverse operation; determining a target processing result of the first task according to the execution result and the redundant processing result, including: If the redundant processing result and the input parameter corresponding to the execution result are the same, then the target processing result is determined to be the execution result.

8. The method according to any one of claims 1 to 6, characterized in that: The redundant processing is a secondary operation; Determining a target processing result of the first task according to the execution result and the redundant processing result includes: If the redundant processing result is the same as the execution result, the target processing result is determined to be the execution result.

9. The method according to any one of claims 1 to 6, characterized in that: Determine the first task to be performed, including: Obtaining a business processing request, wherein the business processing request includes an identifier of the business; Determine a preset corresponding relationship, wherein the preset corresponding relationship includes a plurality of service identifiers and a task identifier corresponding to each service identifier; The first task is determined according to the business processing request and the preset corresponding relationship.

10. The method according to claim 9, characterized in that After determining the target processing result of the first task according to the execution result and the redundant processing result, the method further includes: According to the target processing result, a business processing result corresponding to the business processing request is determined.

11. A data processing device, characterized in that: include: A first determining module, an execution module, a processing module, and a second determining module, wherein: The first determination module is used to determine a first task to be executed, wherein the first task includes a plurality of key logics; The execution module is used to execute the first task and obtain the execution result of the first task; wherein, after executing each key logic, wait for a random delay time within a fixed range; The processing module is used to perform redundant processing on the first task to obtain a redundant processing result corresponding to the first task, wherein the redundant processing includes an inverse operation and a secondary operation, the inverse operation refers to calculating the input parameters of the first task according to the execution result of the first task, and the secondary operation refers to performing another operation on the first task according to the input parameters of the first task; The second determination module is used to determine a target processing result of the first task according to the execution result and the redundant processing result.

12. An electronic device, characterized in that: include: Memory and processor; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory, so that the processor performs the data processing method according to any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, which are used to implement the data processing method according to any one of claims 1 to 10 when executed by a processor.

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