Testing device for encapsulating a chip tester
By designing a metal test base and test circuit board, it provides a good grounding environment and thermal conductivity, and solves the instability problem caused by grounding inductance and heat accumulation in the test of RF chips, achieving more stable and consistent test results.
Patent Information
- Application Number
- CN202210660534.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-06-13
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2042-06-13
AI Technical Summary
During the production and manufacturing of integrated circuits, RF chips are easily affected by ground inductor during testing, resulting in instability and oscillation problems. At the same time, the heat accumulation of multi-layer printed circuit boards also affects the chip's test environment and performance.
A test device for packaging chip test machines was designed, using a metallic test base and test circuit board, providing a good grounding environment through raised cylinders and surface-mounted element placement slots, and improving heat dissipation performance through conductive adhesive bonding.
The test device can effectively reduce the ground inductance, improve test stability and data consistency, and at the same time avoid heat accumulation through good thermal conductivity, ensuring the stability of RF performance.
Smart Images

Figure CN115015737B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of integrated circuit manufacturing, and particularly relates to a test device for a packaged chip tester. Background Art
[0002] In the field of integrated circuit manufacturing, it is an essential production process to use machines to automatically test and screen packaged chips. Automatic screening tests can quickly and effectively screen out good and defective products, with a stable test environment, controllable test conditions, and avoid damage caused by human factors (such as electrostatic damage). To meet the requirements of machine batch testing, a chip socket (Socket) is needed to test the chip. To carry the Socket, a multi-layer printed circuit board (PCB) with a certain thickness is required to meet the hardness requirements. This will introduce additional ground inductance. Since radio frequency (RF) chips have a signal amplification function, they are easily affected by ground inductance. Under the interference of ground inductance, the higher the operating frequency of RF chips, the more unstable they are during the test, and even cause problems such as oscillation and self-oscillation, making it impossible to complete the test. At the same time, during long-term testing, heat accumulation will occur on the multi-layer PCB. Heat accumulation causes changes in the chip's test environment, leading to performance degradation and data deviation between the same batch of chips before and after, affecting the yield analysis.
[0003] Generally, choosing a Socket with a larger contact surface can reduce the ground inductance; reducing the dielectric thickness of the RF signal layer can appropriately reduce the ground inductance of the PCB. At the same time, filling copper powder in the ground vias of the PCB can increase the contact surface between the PCB and the Socket, thereby improving the grounding performance; reducing the dielectric thickness can reduce the ground inductance but cannot completely eliminate it; filling copper powder is limited by the process, the fillable aperture is small, and it is easily oxidized when exposed to air for a long time, with limited actual improvement effect; the above methods have limited effect on improving the heat dissipation effect. Summary of the Invention
[0004] Technical Problem to be Solved: Aiming at the above technical problems, the present invention provides a test device for a packaged chip tester, which can provide a good grounding environment for the chip socket (Socket), reduce the ground inductance, and at the same time has good thermal conductivity, can avoid the influence of heat accumulation on the RF performance of power tubes, and improve the consistency of test results.
[0005] Technical solution: A test device for encapsulating a chip tester, including a test base and a test circuit board. The test base is made of metal and includes an upper connection area, a middle placement area, and a lower power supply area. The front of the upper connection area is provided with threaded holes for connecting the machine platform of the tester; the front of the middle placement area is provided with a protruding cylinder for connecting the ground pin of the chip socket. Surface mount component placement grooves are provided on both the upper and lower sides of the protruding cylinder. The back of the middle placement area is provided with an SMA connector placement groove, and a plurality of through holes are provided in the SMA connector placement groove; the lower power supply area is provided with a through groove for installing a female header; the test circuit board is attached to the front of the test base, and surface mount components, as well as threaded holes and through holes corresponding to the test base, are provided on the test circuit board.
[0006] Preferably, the surface of the test base is gold-plated.
[0007] Preferably, the surface of the test circuit board is copper-clad.
[0008] Preferably, when the test circuit board is a single-layer structure, the size of the through groove is smaller than the size of the female header; when the test circuit board is a multi-layer structure, the size of the through groove is larger than the size of the female header.
[0009] Preferably, a limiting slide rail is provided on the back of the upper connection area.
[0010] Preferably, the through hole corresponding to the protruding cylinder on the test circuit board is gold-plated.
[0011] Preferably, the test circuit board and the test base are bonded together by conductive adhesive.
[0012] Preferably, on the middle placement area, a plurality of groups, each group having two or more through threaded holes and through holes, are uniformly provided along the circumference of the protruding cylinder for installing the chip socket.
[0013] Preferably, the height of the protruding cylinder is equal to the thickness of the test circuit board.
[0014] Preferably, the surface mount component is a filter capacitor.
[0015] Beneficial effects: The test base provided by the present invention selects a metal material in terms of material, which can reduce the risk of the power tube being sintered during testing, and improve the heat dissipation ability of the test device; the protruding cylinder is provided on the test base provided by the present invention, which can directly contact the chip socket, can provide a good grounding environment, eliminate the grounding inductance from the test circuit board, improve the stability of the test, and improve the consistency of the data. Description of the drawings
[0016] Figure 1 is the exploded combined structure schematic diagram of the test device of the present invention;
[0017] Figure 2 This is a schematic structural diagram of the test base of the present invention. The left figure is the front of the test base, and the right figure is the back of the test base;
[0018] Figure 3 This is a schematic structural diagram of the front and back sides of a test circuit board of the present invention;
[0019] The numbers and labels in the figure represent the following: 1. Test circuit board; 2. Test base; 21. Upper connection area; 22. Middle placement area; 23. Lower power supply area; 211. Limit slide rail; 221. Raised cylinder; 222. SMT component placement groove; 223. SMA connector placement groove; 231. Through groove. Detailed implementation mode
[0020] The present invention will be further described in detail below with reference to the accompanying drawings. These drawings are all simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, so they only show the components related to the present invention.
[0021] Embodiment 1
[0022] As Figure 1 shown, the present invention provides a test device for a chip tester, including a test base 2 and a test circuit board 1.
[0023] As Figure 2 shown, the test base 2 is made of metal and its surface is gold-plated. It includes an upper connection area 21, a middle placement area 22 and a lower power supply area 23. Among them, the cross-section of the upper connection area 21 is an asymmetric trapezoid with a thickness of 9.8 mm; the cross-section of the middle placement area 22 is a rectangle with a thickness of 5 mm; the cross-section of the lower power supply area 23 is a rectangle with a thickness of 2 mm, and it is powered by direct current.
[0024] Next, the structure of the test base 2 will be specifically described in combination with Figure 2 The front of the upper connection area 21 is provided with threaded holes for connecting the machine table of the tester. Two threaded holes are provided here, and each threaded hole includes a non-through hole with a diameter of 7.4 mm and a depth of 3 mm and a through hole with a diameter of 4.2 mm concentric with it, which can be fixed on the machine table of the tester by matching hexagon head screws; on the back of the upper connection area 21, a trapezoidal limit slide rail 211 with a width of 11 mm is provided to facilitate alignment with the machine table of the tester.
[0025]
[0026] On the front of the middle placement area 22, there is a raised cylinder 221 with a diameter of 0.23 mm and a height of 0.33 mm. Its height is equal to the thickness of the test circuit board 1, and it can be directly connected to the ground pin of the chip socket to eliminate the ground inductance from the test circuit board 1. On the upper and lower sides of the raised cylinder 221, there are surface mount component placement grooves 222 with a depth of 2 mm, a width of 5.2 mm, and a length of 5 mm, which can ensure that surface mount components (filter capacitors in this embodiment) are placed in them. Centered on the raised cylinder 221, a set of through threaded holes and through holes are placed along the 45° / 135° / 225° / 315° directions respectively; the through holes are the limit holes of the chip socket for alignment during placement; an M2 screw is applicable to cooperate with the through threaded holes to fix the chip socket on the test base 2, and the hole positions can be flexibly selected according to different chip socket sizes. On the back sides of the middle placement area 22, there are rectangular SMA connector placement grooves 223 with a length of 15 mm, a width of 7 mm, and a depth of 4 mm, which can install SMA connectors and leave space to connect 50-ohm impedance cables. There are 5 through holes in each SMA connector placement groove, and the specific positions and sizes are as follows: a through hole with a diameter of 2.3 mm is placed at an interval of 15 mm along the same horizontal line on the left side of the center of the raised cylinder 221, and four through holes with a diameter of 1.3 mm are evenly placed on the circumference of this through hole.
[0027] The lower power supply area 23 is provided with a rectangular through groove 231 with a size of 30.8 mm x 8.4 mm for installing a 20-pin female header. There are four threaded holes near the through groove 231, and an M2 screw is applicable for fixing the test circuit board 1.
[0028] As Figure 3 As shown, the surface of the test circuit board 1 is copper-clad and is arranged to fit the front of the test base 2. Conductive glue can be used to bond the test circuit board 1 and the test base 2 to obtain a better effect. Surface mount components are soldered on the test circuit board 1 through pads. The test circuit board 1 is provided with threaded holes and through holes corresponding to the test base 2, and the through hole corresponding to the raised cylinder 221 is gold-plated, so that the test circuit board 1 and the test base 2 form a flat interface to be connected to the chip socket, eliminating the ground inductance from the test circuit board 1.
[0029] During installation, align the test circuit board 1 with the raised cylinder 221, fix it through the threaded holes and through holes, and then press the chip socket Socket on the test circuit board 1.
[0030] The present invention can provide a good grounding environment for the chip socket Socket, reduce the ground inductance. At the same time, the metal test base 2 has good heat conduction performance, avoiding the influence of heat accumulation on the radio frequency performance of the power tube and improving the consistency of the test results.
Claims
1. A test device for encapsulating a chip tester, characterized in that, It includes a test base (2) and a test circuit board (1). The test base (2) is made of metal and includes an upper connection area (21), a middle placement area (22), and a lower power supply area (23). The front of the upper connection area (21) is provided with threaded holes for connecting the machine platform of the testing machine; the front of the middle placement area (22) is provided with a raised cylinder (221) for connecting the ground pin of the chip socket. On both the upper and lower sides of the raised cylinder (221), there are surface-mounted component placement grooves (222). The back of the middle placement area (22) is provided with an SMA connector placement groove (223), and there are a plurality of through holes in the SMA connector placement groove (223); the lower power supply area (23) is provided with a through groove (231) for installing a female header; the test circuit board (1) is disposed in contact with the front of the test base (2). The test circuit board (1) is provided with surface-mounted components, as well as threaded holes and through holes corresponding to the test base (2); the height of the raised cylinder (221) is equal to the thickness of the test circuit board (1).
2. The test device for encapsulating a chip tester according to claim 1, characterized in that, The surface of the test base (2) is gold-plated.
3. The test device for encapsulating a chip tester according to claim 1, wherein The surface of the test circuit board (1) is copper-clad.
4. The test device for encapsulating a chip tester according to claim 1, characterized in that When the test circuit board (1) is a single-layer structure, the size of the through groove (231) is smaller than the size of the female header; when the test circuit board (1) is a multi-layer structure, the size of the through groove (231) is larger than the size of the female header.
5. The test device for encapsulating a chip tester according to claim 1, characterized in that, A limiting slide rail (211) is provided on the back of the upper connection area (21).
6. The test device for encapsulating a chip tester according to claim 1, characterized in that, The through holes corresponding to the raised cylinder (221) on the test circuit board (1) are gold-plated.
7. The test device for encapsulating a chip tester according to claim 1, wherein, The test circuit board (1) and the test base (2) are bonded together by conductive adhesive.
8. The test device for encapsulating a chip tester according to claim 1, characterized in that, On the middle placement area (22), a plurality of groups, each group having two or more through threaded holes and through holes, are evenly provided along the circumference of the raised cylinder (221) for installing the chip socket.
9. The test device for encapsulating a chip tester according to claim 1, wherein, The surface-mounted component is a filter capacitor.
Citation Information
Patent Citations
Semiconductor chip test board card
CN112327142A
Semiconductor chip testing device
CN112327143A