A switched-capacitor converter and its drive control method

Abstract

The present invention relates to a switched-capacitor converter and its driving control method. This converter combines the advantages of switched-capacitor and BUCK circuits. By connecting the switched-capacitor circuit and two inductors in series respectively, and using out-of-phase control to switch the charging and discharging timing of the switched-capacitor, two inductors can output in an interleaved manner. When the output current and other circuit parameters are the same, the output ripple of the circuit can be greatly reduced, improving the output voltage ripple performance. At the same time, the frequency of the output current ripple increases, raising the ripple current frequency, reducing the design requirements for the inductance value of the inductor and the capacitance of the output filter capacitor, and overall improving the dynamic response speed of the circuit, making it suitable for applications with low-voltage and high-current output.

Description

Technical Field

[0001] The present invention relates to a switching power supply, and particularly to a switched-capacitor converter and its drive control method. Background Art

[0002] Due to the increasingly widespread application of portable mobile communication devices, in order to reduce the volume of portable electronic products and extend the usage time of the devices, how to implement a high-efficiency and high-step-down DC-DC converter has become the research focus in the field of power electronics technology and is also a competitive hot spot in communication power supplies and consumer electronics.

[0003] Conventional non-isolated step-down converters such as Figure 1 shown, a typical step-down converter composed of two power switch elements Q1, Q2, a filter inductor L, and an output capacitor Co. Although this converter has a simple circuit structure and convenient control, since the voltage gain of the converter is only determined by the duty cycle of the power switch tube, in high-step-down conversion scenarios, such as in a consumer electronics power supply voltage regulation module with a 12V input and a 1V output, the duty cycle of the power switch tube is very small, resulting in a very large peak current in the power device, increasing the switching loss of the power device. And during the dynamic adjustment process, the duty cycle change range of the converter is limited, restricting the bandwidth of the converter, affecting the dynamic characteristics of the converter, and the voltage stress of the power device is equal to the input voltage, making it difficult to use low-voltage and high-performance power devices to reduce the conduction loss of the circuit.

[0004] In order to expand the duty cycle of the converter in high-step-down conversion scenarios, scholars at home and abroad have done a lot of research work and achieved a series of research results. One solution is to utilize the transformer effect of the coupled inductor to achieve high-step-down conversion of the circuit. However, in order to absorb the leakage inductance energy of the coupled inductor, additional active or passive clamping circuits need to be added. At the same time, the transformer loss of the coupled inductor is larger than that of the inductor, resulting in low efficiency of the converter. Another solution is to adopt the method of an internal transformer to expand the duty cycle of the circuit. However, this solution requires adding additional magnetic core components, increasing the volume of the converter. There is also a solution to use a switched-capacitor converter to achieve voltage or current conversion by switching the charging and discharging of the capacitor. However, the switched-capacitor converter can only achieve a fixed ratio conversion of the input and output voltages. At the same time, due to the large current ripple on devices such as the input power supply, the output voltage obtained also has ripple. In the prior art, in order to change the ratio conversion of the input and output voltages and at the same time obtain a stable and smooth output voltage, a solution of cascading a switched-capacitor converter and a traditional BUCK switched converter as Figure 2 shown is adopted. During the working process, capacitor C FLY is in series with the inductor. In an ideal state, the duty cycles of power transistor Q1 and power transistor Q2 are the same, and the flying capacitor C FLYThe voltage is 1 / 2*Vin, and the voltage applied to the inductor L is 1 / 2*Vin - Vout. Compared with the traditional buck converter, the duty cycle of this scheme is twice that of the traditional buck converter. The filter inductor L and the output capacitor C out are also reduced, improving the power density. However, in the working timing of one cycle of this scheme, there are always two switching transistors conducting in series simultaneously (the flying capacitor C FLY is charged through the power transistor Q1 and the power transistor Q3 at the same time, or the flying capacitor C FLY is discharged through the power transistor Q2 and the power transistor Q4 at the same time. The inductor L continues to conduct current through the power transistor Q3 and the power transistor Q4 at the same time), which will lead to large conduction losses of the switching transistors and low efficiency of the converter. Moreover, in practical applications, due to the slight differences in the driving circuit and the control circuit, the conduction times of the power transistor Q1 and the power transistor Q2 cannot be exactly the same, and the conduction voltage drops and switching characteristics of each power transistor will not be exactly the same either. This will cause the voltage of the flying capacitor C FLY to deviate from 1 / 2 of the input voltage, resulting in an increase in the voltage stress of each power transistor, an increase in the inductor current ripple and the output voltage ripple. At the same time, in order to stabilize the voltage of the flying capacitor C FLY to be 1 / 2 of the input voltage, it is necessary to detect the voltage of the flying capacitor C FLY and perform closed-loop control regulation. However, since the voltage of the flying capacitor C FLY is in a floating ground state, there will be problems such as a complex voltage detection circuit and low detection accuracy. This scheme directly adopts the method of paralleling power devices for large current output applications, the same as the traditional buck scheme. The disadvantage is that the current sharing effect of the power devices is poor, the temperature rise difference is large, resulting in low reliability. If multiple paths are paralleled, a current sharing control circuit needs to be added, etc., resulting in a complex circuit system. Summary of the Invention

[0005] In view of this, the present invention provides a switched-capacitor converter and its drive control method to solve the problems of large conduction losses and low efficiency of the power switching elements caused by the cascaded traditional buck converter scheme in the prior art, solve the difficulties in dynamically stabilizing and regulating the voltage detection of the flying capacitor, and the problems of poor current sharing effect, low reliability, and complex control circuit caused by parallel applications with large current output.

[0006] The technical solution adopted by the present invention is as follows:

[0007] In a first aspect, a driving control method for a switched-capacitor converter is provided, which is applied to a switched-capacitor converter. The switched-capacitor converter includes: power switching elements Q1 to Q5, capacitors C1, C2, inductors L1, L2. Each power switching element includes a first terminal, a second terminal, and a control terminal; the first terminal of the power switching element Q5 is used to connect to the positive terminal of the input power supply, and the second terminal of the power switching element Q5 is connected to the first terminal of the power switching element Q4 and the first terminal of the capacitor C1; the second terminal of the power switching element Q4 is connected to the first terminal of the power switching element Q3 and the first terminal of the capacitor C2; the second terminal of the power switching element Q3 is connected to the first terminal of the inductor L2 and the first terminal of the power switching element Q1; after the second terminal of the power switching element Q1 is connected to the second terminal of the power switching element Q2 and the second terminal of the capacitor C2, it is used to connect to the negative terminal of the input power supply; the second terminal of the capacitor C1 is connected to the second terminal of the inductor L1 and the first terminal of the power switching element Q2; after the second terminal of the inductor L2 is connected to the first terminal of the inductor L1, it is used to connect to the load; the control terminals of each power switching element are all used to connect a control signal, and each control signal is different;

[0008] The driving control method includes, within a single cycle:

[0009] A step of exciting inductor L1 and demagnetizing inductor L2, controlling the power switching elements Q1 and Q5 to conduct, and controlling the power switching elements Q2 to Q4 to turn off, so as to excite inductor L1 and demagnetize inductor L2;

[0010] A step of simultaneously demagnetizing inductor L1 and inductor L2, controlling the power switching element Q5 to disconnect, and controlling the power switching element Q1 to conduct. After a fixed dead time, controlling the power switching elements Q2 and Q4 to conduct, so as to simultaneously demagnetize inductor L1 and inductor L2 and make the voltages of capacitors C1 and C2 equal;

[0011] A step of demagnetizing inductor L1 and exciting inductor L2, controlling the power switching elements Q1 and Q4 to turn off, controlling the power switching element Q2 to conduct. After a fixed dead time, controlling the power switching element Q3 to conduct, so as to demagnetize inductor L1 and excite inductor L2.

[0012] Further, the driving control method further includes:

[0013] A step of adjusting the voltage bias of capacitors C1 and C2:

[0014] After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply;

[0015] If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q5 according to a preset adjustment method to reduce the duty cycle of the power switch element Q5, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply;

[0016] If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q5 according to a preset adjustment method to increase the duty cycle of the power switch element Q5, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply.

[0017] Further, the drive control method further includes:

[0018] Steps for adjusting the voltage bias of the capacitors C1 and C2:

[0019] After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply;

[0020] If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q3 according to a preset adjustment method to increase the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply;

[0021] If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q3 according to a preset adjustment method to reduce the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply.

[0022] Further, the drive control method further includes:

[0023] Steps for adjusting the voltage bias of the capacitors C1 and C2:

[0024] After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply;

[0025] If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signals connected to the power switch element Q5 and the power switch element Q3 according to a preset adjustment method to reduce the duty cycle of the power switch element Q5 and increase the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply;

[0026] If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, the control signals connected to the power switch element Q5 and the power switch element Q3 are adjusted according to a preset adjustment method to increase the duty cycle of the power switch element Q5 and decrease the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply.

[0027] Further, the power switch elements Q3 to Q5 are all MOS transistors, and the power switch elements Q1 to Q2 are MOS transistors or diodes.

[0028] In a second aspect, a driving control method for a switched capacitor converter is provided, which is applied to a switched capacitor converter. The switched capacitor converter includes: power switch elements Q1 to Q5, a capacitor C1, a capacitor C2, an inductor L1, and an inductor L2. Each power switch element includes a first terminal, a second terminal, and a control terminal; the first terminal of the power switch element Q5 is used to connect to the positive terminal of the input power supply, and the second terminal of the power switch element Q5 is connected to the first terminal of the power switch element Q4 and the first terminal of the capacitor C1; the second terminal of the power switch element Q4 is connected to the first terminal of the power switch element Q3 and the first terminal of the capacitor C2; the second terminal of the power switch element Q3 is connected to the first terminal of the inductor L2 and the first terminal of the power switch element Q1; after the second terminal of the power switch element Q1 is connected to the second terminal of the power switch element Q2 and the second terminal of the capacitor C2, it is used to connect to the negative terminal of the input power supply; the second terminal of the capacitor C1 is connected to the second terminal of the inductor L1 and the first terminal of the power switch element Q2; after the second terminal of the inductor L2 is connected to the first terminal of the inductor L1, it is used to connect to a load; the control terminals of each power switch element are all used to connect a control signal;

[0029] The driving control method includes, within a single cycle:

[0030] A step of simultaneously exciting the inductor L1 and the inductor L2, controlling the power switch elements Q3 and Q5 to conduct, and keeping the power switch elements Q1, Q2, and Q4 off, so that the inductor L1 and the inductor L2 are simultaneously excited;

[0031] A step of simultaneously demagnetizing the inductor L1 and the inductor L2, controlling the power switch elements Q3 and Q5 to turn off, and after a fixed dead time, controlling the power switch elements Q1, Q2, and Q4 to conduct, so that the inductor L1 and the inductor L2 are simultaneously demagnetized.

[0032] Further, the control terminals of the power switch element Q3 and the power switch element Q5 are used to connect the same control signal, and the control terminals of the power switch elements Q1, Q2, and Q4 are used to connect the same control signal.

[0033] Furthermore, the power switching elements Q3 to Q5 are all MOS transistors, and the power switching elements Q1 to Q2 are MOS transistors or diodes.

[0034] In a third aspect, a switched-capacitor converter is provided, including: power switching elements Q1 to Q5, a capacitor C1, a capacitor C2, an inductor L1, and an inductor L2. Each power switching element includes a first terminal, a second terminal, and a control terminal; the first terminal of the power switching element Q5 is used to connect to the positive terminal of the input power supply, and the second terminal of the power switching element Q5 is connected to the first terminal of the power switching element Q4 and the first terminal of the capacitor C1; the second terminal of the power switching element Q4 is connected to the first terminal of the power switching element Q3 and the first terminal of the capacitor C2; the second terminal of the power switching element Q3 is connected to the first terminal of the inductor L2 and the first terminal of the power switching element Q1; after the second terminal of the power switching element Q1 is connected to the second terminal of the power switching element Q2 and the second terminal of the capacitor C2, it is used to connect to the negative terminal of the input power supply; the second terminal of the capacitor C1 is connected to the second terminal of the inductor L1 and the first terminal of the power switching element Q2; the second terminal of the inductor L2 is connected to the first terminal of the inductor L1 and is used to connect to a load; the control terminals of each power switching element are all used to connect a control signal, and each control signal is different.

[0035] Compared with the prior art, the present invention has the following beneficial effects:

[0036] 1. The switched-capacitor converter adopted in the present invention combines the advantages of switched-capacitor and BUCK circuits. By connecting the switched-capacitor circuit in series with two inductors respectively, and adopting a phase-shifted or in-phase driving method, through circuit device reuse, the utilization rate of devices is improved, thereby reducing the circuit scale, making the relevant driving circuit simple and further reducing the system cost and circuit complexity. At the same time, in the working timing of one cycle, there is always only one power switching element in series in the working loop. For low-voltage and high-current output applications, the conduction loss of the power switching element is greatly reduced.

[0037] 2. By adopting phase-shifted control of the charging and discharging timing of the switched-capacitor, the interleaved output of the currents of the two inductors is realized. It is equivalent that the output ripple frequency of the entire converter is twice the working frequency of the converter. In this way, the current ripple is greatly reduced. Therefore, when the output current and other circuit parameters of the switched-capacitor converter of the present invention are the same as those of the existing switched-capacitor converter, the output ripple of the circuit can be greatly reduced, improving the output voltage ripple performance. At the same time, the frequency of the output current ripple increases, improving the ripple current frequency. Under the same input-output and product specification requirements, the design requirements for the inductance value of the inductor and the capacitance of the output filter capacitor can be greatly reduced, thereby improving the power density and system efficiency, greatly saving the product material cost, and overall improving the dynamic response speed of the circuit, which is suitable for low-voltage and high-current output applications.

[0038] 3. By comparing the voltage of capacitor C2 with the input voltage, the on-time of the power switch element is adjusted, and the charge and discharge time of the capacitor is controlled to achieve voltage balancing between capacitors C1 and C2, so that the switched capacitor converter has an adjustable smooth voltage output and an adjustable gain. Since capacitor C2 is a ground capacitor, the detection circuit is simpler and more accurate.

[0039] 4. The power switch element is connected in parallel with two inductors in a time-sequential manner for output. The two power circuits have a good current balancing effect, and the current balancing output is not affected by the difference in device parameters. The system has high efficiency, low temperature rise and high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 The buck circuit schematic diagram provided by the prior art;

[0041] Figure 2 A schematic diagram of a conventional switched capacitor converter cascaded BUCK switch converter;

[0042] Figure 3 A schematic diagram of a switched capacitor converter circuit provided in the first embodiment of the present application;

[0043] Figure 4 A timing diagram of driving phase mismatch control provided in the second embodiment of the present application;

[0044] Figure 5 A timing diagram of driving same-phase control provided in the third embodiment of the present application;

[0045] Figure 6 This is a schematic block diagram of the voltage equalization control method provided in the fourth embodiment of the present application. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto. The specific embodiments of the present invention will now be described more fully with reference to the accompanying drawings. However, the specific embodiments can be implemented in various forms and should not be construed as being limited to the embodiments described herein; on the contrary, these embodiments are provided so that the present invention will be comprehensive and complete, and the concepts of the specific embodiments will be fully conveyed to those skilled in the art. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. The same reference numerals in the figures represent the same or similar structures, and their detailed descriptions will be omitted.

[0047] First embodiment

[0048] like Figure 3The following is the circuit schematic diagram of the first embodiment of the present invention. The switched-capacitor converter described in this embodiment includes a positive input power supply V in , a positive output voltage Vo, power switch elements Q1, Q2, Q3, Q4, Q5, inductors L1, L2, and capacitors C1, C2; each power switch element includes a first terminal, a second terminal, and a control terminal; the first terminal of power switch element Q5 is used to connect to the positive terminal of the input power supply, and the second terminal of power switch element Q5 is connected to the first terminal of power switch element Q4 and the first terminal of capacitor C1; the second terminal of power switch element Q4 is connected to the first terminal of power switch element Q3 and the first terminal of capacitor C2; the second terminal of power switch element Q3 is connected to the first terminal of inductor L2 and the first terminal of power switch element Q1; after the second terminal of power switch element Q1 is connected to the second terminal of power switch element Q2 and the second terminal of capacitor C2, it is used to connect to the negative terminal of the input power supply; the second terminal of capacitor C1 is connected to the second terminal of inductor L1 and the first terminal of power switch element Q2; after the second terminal of inductor L2 is connected to the first terminal of inductor L1, it is used to connect to the load; the control terminals of each power switch element are all used to connect a control signal, and each control signal is different.

[0049] Specifically, each power switch element can be an MOS transistor, or power switch elements Q1 and Q2 are diodes, and power switch elements Q3 to Q5 are MOS transistors; in the specific implementation process, each power switch element is an MOS transistor, and the first terminal of each power switch element is the drain, the second terminal is the source, and the control terminal is the gate. The drain of power switch element Q5 is connected to the positive input power supply V in , the source of power switch element Q5 and the drain of power switch element Q4 are connected to the first terminal of capacitor C1, the second terminal of capacitor C1 is connected to the drain of power switch element Q2 and the second terminal of inductor L1, the first terminal of inductor L1 is connected to the load, the source of power switch element Q2 is connected to the power common ground GND (negative terminal of the input power supply), the source of power switch element Q4 and the drain of power switch element Q3 are connected to the first terminal of capacitor C2, and the second terminal of capacitor C2 is connected to the power common ground GND. The source of power switch element Q3 and the drain of power switch element Q1 are connected to the first terminal of inductor L2, the second terminal of inductor L2 is connected to the load, and the source of power switch element Q1 is connected to the power common ground GND.

[0050] The power switch element of the switched-capacitor circuit in this embodiment is composed of a switching transistor, a parasitic diode connected in reverse parallel, and a parasitic capacitor connected in parallel; the inductor is composed of an ideal inductor, an iron loss equivalent resistance, and a distributed capacitor connected in parallel and then connected in series with a copper loss resistance, and the capacitor is composed of an ideal capacitor and an equivalent series resistance connected in series.

[0051] Among them, each power switch element Q1 to Q5 respectively has parasitic diodes D1 to D5 that are reversely connected in parallel with the power switch elements Q1 to Q5, or are called body diodes and parasitic capacitances C11, C21, C31, C41, and C51.

[0052] The drive control method includes, within a single cycle:

[0053] The step of exciting inductor L1 and demagnetizing inductor L2, controlling power switch element Q1 and power switch element Q5 to conduct, and controlling power switch elements Q2 to Q4 to remain off, so as to excite inductor L1 and demagnetize inductor L2.

[0054] Specifically, a fixed dead time is provided between adjacent cycles. During the fixed dead time of adjacent cycles, all power switch elements are in the off state;

[0055] The step of simultaneously demagnetizing inductor L1 and inductor L2, controlling power switch element Q5 to disconnect, and controlling power switch element Q1 to conduct. After the fixed dead time, controlling power switch elements Q2 and Q4 to conduct and keeping power switch element Q3 off, so as to simultaneously demagnetize inductor L1 and inductor L2 and make the voltages of capacitor C1 and capacitor C2 equal.

[0056] Specifically, in each cycle, by simultaneously conducting power switch elements Q2 and Q4 and turning off power switch elements Q3 and Q5, after capacitor C1 is connected in series with power switch element Q2 and then in parallel with the series-connected capacitor C2 and power switch element Q4, capacitor C1 and capacitor C2 discharge each other to complete voltage equalization adjustment, so that the voltages of capacitor C1 and capacitor C2 are equal in each cycle.

[0057] The step of demagnetizing inductor L1 and exciting inductor L2, controlling power switch elements Q1, Q4, and Q5 to turn off and keeping power switch element Q2 on. After the fixed dead time, controlling power switch element Q3 to conduct, so as to demagnetize inductor L1 and excite inductor L2.

[0058] Specifically, as Figure 4 shown is the misaligned phase drive control timing sequence and output inductor current waveform diagram provided by this embodiment. Hereinafter, taking the power switch element as a MOS transistor as an example for illustration. Among them, power switch element Q1 is MOS transistor Q1, power switch element Q2 is MOS transistor Q2, power switch element Q3 is MOS transistor Q3, power switch element Q4 is MOS transistor Q4, and power switch element Q5 is MOS transistor Q5. The circuit includes the following working stage processes within one switching cycle:

[0059] From t0 to t1 (dead time between adjacent periods): MOS transistor Q2 and MOS transistor Q3 are turned off, and the parasitic capacitance C11 of MOS transistor Q1 discharges until the parasitic diode D1 of MOS transistor Q1 starts to conduct.

[0060] From t1 to t2: At this time, the parasitic diode D1 has been fully conducting for freewheeling. At this time, MOS transistor Q1 is turned on, and ZVS (zero voltage) turn-on of MOS transistor Q1 is achieved. MOS transistor Q5 is turned on, the inductor L1 is magnetized, and the inductor L2 is demagnetized.

[0061] By turning on the power switch elements Q1 and Q5, and turning off the power switch elements Q2, Q3, and Q4, using the series voltage division of capacitor C1 and inductor L1, the same input-output step-down ratio is achieved, and the voltage applied to the inductor and the output is halved (1 / 2V in ), so that the magnetization time of inductor L1 doubles under the condition of obtaining the same transfer power, and the reduction of the inductor size improves the power density of the converter. It can also solve the problem that the switching frequency cannot be further increased due to the minimum duty cycle limit in high voltage change ratio applications (such as 12V to 1V).

[0062] From t2 to t3: At this time, MOS transistor Q5 is turned off, and the parasitic capacitance C21 of MOS transistor Q2 discharges until the parasitic diode D2 starts to conduct.

[0063] From t3 to t4: At this time, the parasitic diode D2 has been fully conducting for freewheeling. At this time, MOS transistors Q2 and Q4 are turned on, and ZVS turn-on of MOS transistor Q2 is achieved. MOS transistor Q1 continues to conduct, and inductors L1 and L2 are demagnetized simultaneously.

[0064] From t4 to t5: At this time, MOS transistors Q1 and Q4 are turned off for a fixed dead time.

[0065] From t5 to t6: At this time, MOS transistor Q3 is hard turned on, MOS transistor Q2 continues to conduct, inductor L1 is demagnetized, and inductor L2 is magnetized.

[0066] In this embodiment, by the method of series voltage division of the switched-capacitor circuit with inductors L1 and L2 respectively, the magnetizing voltage applied to inductors L1 and L2 is 1 / 2V in minus the output voltage Vo, while the voltage applied to the inductor L in the traditional BUCK converter is V inSubtract the output voltage Vo. Thus, under the same input and output conditions, the effective duty cycle of the switching device in this scheme is approximately twice that of the traditional BUCK circuit, greatly improving the performance of this converter. By using out-of-phase control to switch the charging and discharging timing of the capacitor, the interleaved output of the currents of the two inductors is achieved, which is equivalent to the output ripple frequency of the entire converter being twice the operating frequency of the existing converter. This greatly reduces the current ripple. Therefore, when the output current and other circuit parameters of the switched-capacitor converter in this embodiment are the same as those of the existing switched-capacitor converter, the circuit output ripple can be greatly reduced, improving the output voltage ripple performance. At the same time, the frequency of the output current ripple increases, raising the ripple current frequency, reducing the design requirements for the inductance value of the inductor and the capacitance of the output filter capacitor. To achieve the same output ripple performance, the inductor size and the number of output filter capacitors can be greatly reduced, thereby improving the power density and system efficiency, greatly saving the product material cost, and overall improving the dynamic response speed of the circuit. At the same time, for the two-way interleaved control output, the current sharing effect of the power circuit is better than that of directly paralleling the power devices in the traditional scheme, solving the problem of uneven temperature rise caused by uneven distribution of the parallel losses of the power devices in the traditional scheme. This scheme is suitable for low-voltage and high-current output applications.

[0067] The second embodiment

[0068] Different from the first embodiment, in this embodiment, the in-phase drive control method is used to control the switched-capacitor converter described in this embodiment. That is, the control terminals of the power switch elements can be connected to different control signals, and one power switch element is connected to one control signal. Or, the control terminals of the power switch element Q3 and the power switch element Q5 are used to connect to the same control signal, and the control terminals of the power switch element Q1, the power switch element Q2, and the power switch element Q4 are used to connect to the same control signal.

[0069] The drive control method includes, within a single cycle:

[0070] The step of simultaneously exciting the inductor L1 and the inductor L2, controlling the power switch elements Q3 and Q5 to conduct, and keeping the power switch elements Q1, Q2, and Q4 off, so as to simultaneously excite the inductor L1 and the inductor L2;

[0071] The step of simultaneously demagnetizing the inductor L1 and the inductor L2, controlling the power switch elements Q3 and Q5 to turn off, and after a fixed dead time, controlling the power switch elements Q1, Q2, and Q4 to conduct, so as to simultaneously demagnetize the inductor L1 and the inductor L2.

[0072] Specifically, between adjacent cycles, there is a fixed dead time, and within this fixed dead time, all power switch elements are controlled to turn off.

[0073] Specifically, as Figure 5 shown in the schematic diagram of the in-phase drive control timing and inductor current waveform of the switched-capacitor converter according to this embodiment, the circuit includes the following working processes within one switching period:

[0074] From t0 to t1: After the MOS transistors Q1, Q2, and Q4 are turned off, they wait for a fixed dead time.

[0075] From t1 to t2: At this time, the MOS transistors Q3 and Q5 are turned on, and the inductors L1 and L2 are magnetized simultaneously.

[0076] From t2 to t3: At this time, all the MOS transistors are turned off. The current of the inductor L1 discharges the parasitic capacitor C21 of the MOS transistor Q2, and the current of the inductor L2 discharges the parasitic capacitor C11 of the MOS transistor Q1 until the parasitic diodes D1 and D2 start to conduct.

[0077] From t3 to t4: At this time, the parasitic diodes D1 and D2 are fully conducting for freewheeling. At this time, the MOS transistors Q1, Q2, and Q4 are turned on, realizing the ZVS turn-on of the MOS transistors Q1 and Q2. The inductors L1 and L2 are demagnetized simultaneously. The capacitor C1 and the MOS transistor Q2 in series are connected in parallel with the capacitor C2 through the MOS transistor Q4, and the capacitor C1 charges the capacitor C2, realizing the equality of the voltages of the capacitor C1 and the capacitor C2.

[0078] Among them, the MOS transistors Q3 and Q5 are under the same control signal, and the MOS transistors Q1, Q2, and Q4 are under the same control signal. The two groups of signals are complementary outputs, and a fixed dead time is added between the level switches of the two groups of signals to prevent simultaneous conduction; this control method is simple, the relevant drive circuit is simple, and the switched-capacitor circuit is connected in series with the inductors L1 and L2 for voltage division respectively, so that the magnetizing voltage applied to the inductors L1 and L2 is 1 / 2V in minus the output voltage Vo, while the voltage applied to the inductor L in the traditional BUCK converter is V in minus the output voltage Vo. Therefore, under the same input and output conditions, the effective duty cycle of this scheme is twice that of the traditional BUCK circuit, greatly improving the performance of the converter; at the same time, the two-way in-phase parallel control output has a better current sharing effect of the power circuit than the direct parallel connection of the power devices in the existing scheme, solving the problem of uneven temperature rise caused by uneven distribution of the parallel losses of the power devices in the existing scheme. This scheme can further reduce the system cost and circuit complexity, and the reliable performance of the product.

[0079] The third embodiment

[0080] In this embodiment, after the misphase drive control method described in the first embodiment is adopted and ended, that is, after the output voltage is established, the drive control method of the switched-capacitor converter described in this embodiment further includes: a step of adjusting the voltage bias of capacitors C1 and C2;

[0081] Specifically, the step of adjusting the voltage bias of capacitors C1 and C2 can be achieved only by adjusting the duty cycle of power switch element Q5. The specific steps are as follows:

[0082] After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply;

[0083] If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q5 in a preset adjustment manner to reduce the duty cycle of the power switch element Q5 so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply;

[0084] If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q5 in a preset adjustment manner to increase the duty cycle of the power switch element Q5 so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply.

[0085] In one embodiment, the step of adjusting the voltage bias of capacitors C1 and C2 can be achieved only by adjusting the duty cycle of power switch element Q3. The specific steps are as follows:

[0086] After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply;

[0087] If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q3 in a preset adjustment manner to increase the duty cycle of the power switch element Q3 so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply;

[0088] If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q3 in a preset adjustment manner to reduce the duty cycle of the power switch element Q3 so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply.

[0089] In another embodiment, the step of adjusting the voltage bias of capacitors C1 and C2 can be achieved by simultaneously adjusting the duty cycles of power switch element Q3 and power switch element Q5. The specific steps are as follows:

[0090] After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply;

[0091] If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signals connected to the power switch element Q5 and the power switch element Q3 according to a preset adjustment method to reduce the duty cycle of the power switch element Q5 and increase the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply;

[0092] If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, adjust the control signals connected to the power switch element Q5 and the power switch element Q3 according to a preset adjustment method to increase the duty cycle of the power switch element Q5 and reduce the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply.

[0093] Such as Figure 6 This embodiment is a schematic block diagram of the voltage equalization control method for the capacitors C1 and C2 in the circuit. In the specific implementation process of this embodiment, after the output voltage is established, the voltage bias adjustment process of the capacitors C1 and C2 is performed in each cycle as follows:

[0094] The detection output signal is obtained by comparing the acquired input voltage and the voltage value of capacitor C2 respectively. When the voltage VC2 of capacitor C2 is greater than half of the input voltage Vin, that is, the voltage VC2 of capacitor C2 is too large, the detection output signal circuit and the output voltage loop together determine the duty cycle change of MOS transistor Q5 and MOS transistor Q3. The duty cycle is adjusted based on the control of the output voltage loop by reducing the duty cycle of MOS transistor Q5 or increasing the duty cycle of MOS transistor Q3, or by simultaneously reducing the duty cycle of MOS transistor Q5 and increasing the duty cycle of MOS transistor Q3 to reduce the voltage VC2 of capacitor C2. When the voltage VC2 of capacitor C2 is equal to half of the input voltage Vin, the duty cycles of MOS transistor Q5 and MOS transistor Q3 are only controlled by the output voltage loop; when the voltage VC2 of capacitor C2 is less than half of the input voltage Vin, that is, the voltage VC2 of capacitor C2 is too small, the detection output signal circuit and the output voltage loop together determine the duty cycle change of MOS transistor Q5 and MOS transistor Q3. The duty cycle is adjusted based on the control of the output voltage loop by reducing the duty cycle of MOS transistor Q3 or increasing the duty cycle of MOS transistor Q5, or by simultaneously reducing the duty cycle of MOS transistor Q3 and increasing the duty cycle of MOS transistor Q5 to adjust the voltage VC2 of capacitor C2. It can be seen from the timing diagram that in each cycle of operation, MOS transistors Q2 and Q4 are both conducting in one timing stage. Capacitor C1 and MOS transistor Q2 are connected in series and then connected in parallel with capacitor C2 through MOS transistor Q4. Capacitor C1 discharges to capacitor C2 through MOS transistors Q4 and Q2, making the voltage of capacitor C1 equal to the voltage of capacitor C2, thereby periodically and dynamically ensuring that the voltage of capacitor C2 is equal to half of the input voltage Vin, enabling the switched-capacitor converter described in this embodiment to have an adjustable smooth voltage output and an adjustable gain.

[0095] It should be emphasized that the embodiments described in the present invention are illustrative rather than restrictive. Therefore, the present invention includes but is not limited to the embodiments described in the specific implementation manners. Any other implementation manners obtained by those skilled in the art based on the technical solutions of the present invention also fall within the scope of protection of the present invention.

Claims

1. A driving control method for a switched-capacitor converter, characterized in that Applied to a switched capacitor converter, the switched capacitor converter includes: power switch elements Q1 to Q5, capacitors C1, C2, inductors L1, L2. Each power switch element includes a first terminal, a second terminal, and a control terminal; the first terminal of power switch element Q5 is used to connect to the positive terminal of the input power supply, the second terminal of power switch element Q5 is connected to the first terminal of power switch element Q4 and the first terminal of capacitor C1; the second terminal of power switch element Q4 is connected to the first terminal of power switch element Q3 and the first terminal of capacitor C2; the second terminal of power switch element Q3 is connected to the first terminal of inductor L2 and the first terminal of power switch element Q1; after the second terminal of power switch element Q1 is connected to the second terminal of power switch element Q2 and the second terminal of capacitor C2, it is used to connect to the negative terminal of the input power supply; the second terminal of capacitor C1 is connected to the second terminal of inductor L1 and the first terminal of power switch element Q2; after the second terminal of inductor L2 is connected to the first terminal of inductor L1, it is used to connect to the load; the control terminals of each power switch element are all used to connect a control signal, and each control signal is different; The driving control method includes, within a single cycle: The step of exciting inductor L1 and demagnetizing inductor L2, controlling power switch elements Q1 and Q5 to conduct, and controlling power switch elements Q2 to Q4 to turn off, so as to excite inductor L1 and demagnetize inductor L2; The step of demagnetizing inductor L1 and inductor L2 simultaneously, controlling power switch element Q5 to disconnect, and controlling power switch element Q1 to conduct. After a fixed dead time, controlling power switch elements Q2 and Q4 to conduct, so as to demagnetize inductor L1 and inductor L2 simultaneously and make the voltages of capacitors C1 and C2 equal; The step of demagnetizing inductor L1 and exciting inductor L2, controlling power switch elements Q1 and Q4 to turn off, controlling power switch element Q2 to conduct. After a fixed dead time, controlling power switch element Q3 to conduct, so as to demagnetize inductor L1 and excite inductor L2.

2. The drive control method according to claim 1, characterized in that The driving control method further includes: The step of adjusting the voltage bias of capacitors C1 and C2: After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply; If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signal connected to power switch element Q5 according to a preset adjustment method to reduce the duty cycle of power switch element Q5, so that the voltage of capacitor C2 is equal to half of the input voltage of the input power supply; If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, adjust the control signal connected to power switch element Q5 according to a preset adjustment method to increase the duty cycle of power switch element Q5, so that the voltage of capacitor C2 is equal to half of the input voltage of the input power supply.

3. The drive control method according to claim 1, wherein The driving control method further includes: The step of adjusting the voltage bias of capacitors C1 and C2: After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply; If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q3 according to a preset adjustment method to increase the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply; If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, adjust the control signal connected to the power switch element Q3 according to a preset adjustment method to decrease the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply.

4. The drive control method according to claim 1, wherein The drive control method further includes: A voltage bias adjustment step for capacitors C1 and C2: After the end of the previous switching cycle, compare the voltage of the current capacitor C2 with half of the input voltage of the input power supply; If the voltage of the current capacitor C2 is greater than half of the input voltage of the input power supply, adjust the control signals connected to the power switch element Q5 and the power switch element Q3 according to a preset adjustment method to decrease the duty cycle of the power switch element Q5 and increase the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply; If the voltage of the current capacitor C2 is less than half of the input voltage of the input power supply, adjust the control signals connected to the power switch element Q5 and the power switch element Q3 according to a preset adjustment method to increase the duty cycle of the power switch element Q5 and decrease the duty cycle of the power switch element Q3, so that the voltage of the capacitor C2 is equal to half of the input voltage of the input power supply.

5. The drive control method according to claim 1, characterized in that The power switch elements Q3 to Q5 are all MOS transistors, and the power switch elements Q1 to Q2 are MOS transistors or diodes.

6. A driving control method for a switched capacitor converter, characterized in that, Applied to a switched capacitor converter, the switched capacitor converter includes: power switch elements Q1 to Q5, capacitors C1, C2, inductors L1, L2. Each power switch element includes a first end, a second end, and a control end; the first end of the power switch element Q5 is used to connect to the positive terminal of the input power supply, the second end of the power switch element Q5 is connected to the first end of the power switch element Q4 and the first end of the capacitor C1; the second end of the power switch element Q4 is connected to the first end of the power switch element Q3 and the first end of the capacitor C2; the second end of the power switch element Q3 is connected to the first end of the inductor L2 and the first end of the power switch element Q1; after the second end of the power switch element Q1 is connected to the second end of the power switch element Q2 and the second end of the capacitor C2, it is used to connect to the negative terminal of the input power supply; the second end of the capacitor C1 is connected to the second end of the inductor L1 and the first end of the power switch element Q2; the second end of the inductor L2 is connected to the first end of the inductor L1 and is used to connect to the load; the control ends of each power switch element are all used to connect control signals; The drive control method within a single cycle includes: A step of simultaneously exciting inductors L1 and L2, controlling the power switch elements Q3 and Q5 to conduct, and keeping the power switch elements Q1, Q2, and Q4 off, so as to simultaneously excite inductors L1 and L2; The inductor demagnetization step for inductor L1 and inductor L2 controls the power switch elements Q3 and Q5 to turn off, and after a fixed dead time, controls the power switch elements Q1, Q2, and Q4 to turn on, so that the inductor L1 and the inductor L2 are demagnetized simultaneously.

7. The drive control method according to claim 6, wherein The control terminals of the power switch elements Q3 and Q5 are used to connect to the same control signal, and the control terminals of the power switch elements Q1, Q2, and Q4 are used to connect to the same control signal.

8. The drive control method according to claim 6, characterized in that The power switch elements Q3 to Q5 are all MOS transistors, and the power switch elements Q1 to Q2 are MOS transistors or diodes.

9. A switched-capacitor converter, characterized in that, It includes: Power switch elements Q1 to Q5, capacitors C1, C2, inductor L1, and inductor L2. Each power switch element includes a first terminal, a second terminal, and a control terminal. The first terminal of the power switch element Q5 is used to connect to the positive terminal of the input power supply, and the second terminal of the power switch element Q5 is connected to the first terminal of the power switch element Q4 and the first terminal of the capacitor C1. The second terminal of the power switch element Q4 is connected to the first terminal of the power switch element Q3 and the first terminal of the capacitor C2. The second terminal of the power switch element Q3 is connected to the first terminal of the inductor L2 and the first terminal of the power switch element Q1. After the second terminal of the power switch element Q1 is connected to the second terminal of the power switch element Q2 and the second terminal of the capacitor C2, it is used to connect to the negative terminal of the input power supply. The second terminal of the capacitor C1 is connected to the second terminal of the inductor L1 and the first terminal of the power switch element Q2. The second terminal of the inductor L2 is connected to the first terminal of the inductor L1 and then used to connect to the load. The control terminals of each power switch element are all used to connect to a control signal, and each control signal is different.

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