Beat frequency suppression method, system, device, equipment and readable storage medium

Abstract

The present invention discloses a beat frequency suppression method, system, device, equipment and readable storage medium. The method includes collecting the mains voltage of the compressor, and calculating the mains frequency according to the positive level timing and negative level timing of the mains voltage to obtain the mains frequency; obtaining the bus voltage of the compressor, calculating the low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency, and obtaining the sin component and cos component in the low-frequency pulsation phase; synthesizing the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude; calculating the compensation time of the MOS tube opening based on the low-frequency pulsation amplitude and the preset PI controller parameters to obtain the compensation time of the MOS tube opening. The method eliminates the vibration caused by the compressor beat frequency, avoids the generation of unnecessary noise, and does not require offline parameter setting, which greatly reduces the work of parameter setting.

Description

Technical Field

[0001] The present invention relates to the field of controller technology, and in particular to a beat frequency suppression method, system, device, equipment and readable storage medium. Background Art

[0002] In the field of modern electrolytic capacitor-free control, refrigerator compressors, air conditioner compressors, and other components are rated for 220V. However, in regions like North America and Japan, the mains voltage is 110V. Therefore, in practical applications, the 110V voltage needs to be boosted to 220V to meet the needs of household appliances such as refrigerators and air conditioners. However, the conversion process from 110V to 220V involves beat frequency. When the operating frequency of the compressor is a multiple of the grid frequency, the busbar will experience periodic low-frequency fluctuations, which in turn causes low-frequency fluctuations in the compressor phase current. This can lead to severe compressor vibration and a significant increase in the sound of the airflow during operation, generating unnecessary noise and seriously affecting system stability. Therefore, suppressing beat frequency in boost control is one of the issues that need to be addressed in electrolytic capacitor-free control. Summary of the Invention

[0003] Embodiments of the present invention provide a beat frequency suppression method, system, device, equipment, and readable storage medium, which aim to solve the problem of beat frequency during voltage boosting in traditional control technology without electrolytic capacitors.

[0004] In a first aspect, an embodiment of the present invention provides a beat frequency suppression method, which includes:

[0005] Collecting the mains voltage of the compressor, and calculating the mains frequency according to the positive level timing and negative level timing of the mains voltage to obtain the mains frequency;

[0006] Obtaining a bus voltage of the compressor, calculating a low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency, and obtaining a sin component and a cos component in the low-frequency pulsation phase;

[0007] synthesizing the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude;

[0008] The compensation time for turning on the MOS tube is calculated based on the low-frequency pulsation amplitude and the preset PI controller parameters to obtain the compensation time for turning on the MOS tube.

[0009] In a second aspect, an embodiment of the present invention provides a beat frequency suppression system, comprising:

[0010] A frequency detection module is used to collect the mains voltage of the compressor and calculate the mains frequency according to the positive level timing and negative level timing of the mains voltage to obtain the mains frequency;

[0011] A component calculation module is used to obtain the bus voltage of the compressor, calculate the low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency, and obtain the sin component and cos component of the low-frequency pulsation phase;

[0012] an amplitude synthesis module, configured to synthesize the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude;

[0013] The time calculation module is used to calculate the compensation time of the MOS tube opening based on the low-frequency pulsation amplitude and the preset PI controller parameters to obtain the compensation time of the MOS tube opening.

[0014] In a third aspect, an embodiment of the present invention further provides a compressor device, comprising a control circuit and a compressor, wherein the control circuit is provided with the beat frequency suppression system as described in the second aspect above;

[0015] The control loop adjusts the on-time of the MOS tube in the circuit according to the compensation time.

[0016] In a fourth aspect, an embodiment of the present invention further provides a computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the beat frequency suppression method described in the first aspect when executing the computer program.

[0017] In a fifth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the processor executes the beat frequency suppression method described in the first aspect above.

[0018] Embodiments of the present invention provide a beat frequency suppression method, system, device, equipment, and readable storage medium. The method includes collecting the mains voltage of the compressor and calculating the mains frequency based on the positive level timing and negative level timing of the mains voltage to obtain the mains frequency; obtaining the bus voltage of the compressor, calculating the low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency to obtain the sin component and cos component in the low-frequency pulsation phase; synthesizing the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude; calculating the compensation time of the MOS tube opening based on the low-frequency pulsation amplitude and preset PI controller parameters to obtain the compensation time of the MOS tube opening. In this method, Fourier decomposition is performed based on the mains frequency and bus voltage to extract the low-frequency pulsation phase and low-frequency pulsation phase amplitude in the bus voltage. The compensation amount of the on-off time of the MOS tube is calculated based on the low-frequency pulsation amplitude and the proportional parameter and integral parameter control of the PI controller. The on-time of the MOS is compensated to achieve compressor beat frequency suppression, eliminate the vibration caused by the compressor beat frequency, avoid unnecessary noise, and do not require offline parameter tuning, which greatly reduces the parameter tuning work. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 1 is a flow chart of a beat frequency suppression method according to an embodiment of the present invention;

[0021] Figure 2 is a schematic block diagram of a beat frequency suppression system of the present invention;

[0022] Figure 3 Schematic diagram of the control circuit of the beat frequency suppression method of the present invention. DETAILED DESCRIPTION

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0024] It will be understood that when used in this specification and the appended claims, the terms “comprises” and “comprising” indicate the presence of described features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0025] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the present invention. As used in the specification and appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise.

[0026] It should be further understood that the term "and / or" used in the present description and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0027] Reference Figure 1 , Figure 1 1 is a flow chart of an embodiment of a beat frequency suppression method of the present invention. In this embodiment, the method includes steps S110 to S140:

[0028] Step S110: collecting the mains voltage of the compressor, and calculating the mains frequency according to the positive level timing and negative level timing of the mains voltage to obtain the mains frequency;

[0029] In this embodiment, in the electrolysis-free control system, in order to fully utilize the physical quantities in vector control, the mains voltage of the compressor is detected in real time during operation. The mains frequency is calculated based on the positive and negative level timings of the mains voltage to obtain the mains frequency. Specifically, the mains frequency is determined according to the following process:

[0030] Step 1: Initialization, mains positive level time t H =0, mains negative level time t L =0, temporary variable temp H =0, temp L =0, jump to step 2;

[0031] Step 2: If the current mains voltage U ac (n)>0, then update temp H =temp H +1, otherwise update temp L =temp L +1;

[0032] Step 3: If the product of the current and previous mains voltages is less than 0, that is, U ac(n)*U ac (n-1)<0, then return to step 2. If the product of the current and previous mains voltages is greater than 0, that is, U ac (n)*U ac (n-1)>0, jump to step 4;

[0033] Step 4: If the current mains voltage U ac (n)>0, then update t L =temp L ,temp L =0, if the current mains voltage U ac (n)<0, mains positive level time t H =temp H ,temp H =0, then update the mains frequency T s Indicates the control cycle and returns to step 2.

[0034] Step S120: Obtain the bus voltage of the compressor, calculate the low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency, and obtain the sin component and cos component of the low-frequency pulsation phase;

[0035] In this embodiment, to calculate the low-frequency pulsation phase in the bus voltage, the bus voltage of the compressor is obtained, and the low-frequency pulsation phase in the bus voltage is calculated based on the collected bus and mains frequencies, thereby obtaining the sin and cos components of the low-frequency pulsation phase. The sin and cos components of the low-frequency pulsation phase are calculated according to the following formula:

[0036] U csin (n)=(U dc (n)*sin(2π(f ac -f e )-U csin (n-1))*τ+U csin (n-1),

[0037] U ccos (n)=(U dc (n)*cos(2π(f ac -f e )-U ccos (n-1))*τ+U ccos (n-1),

[0038] Among them, U dc (n) represents the bus voltage at the current moment, f e Indicates the operating frequency of the compressor, U csin (n) represents the sin component of the low-frequency pulsation at the current moment, Ucsin (n-1) represents the sin component of the low-frequency pulsation at the current moment, U ccos (n) represents the cosine component of the low-frequency pulsation at the current moment, U ccos (n-1) represents the cosine component of the low-frequency pulsation at the current moment, τ represents the time filter factor, f ac Indicates the mains frequency.

[0039] Step S130: synthesizing the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude;

[0040] In this embodiment, the low-frequency pulsation amplitude is synthesized based on the sin component and the cos component to obtain the low-frequency pulsation amplitude.

[0041] Calculate the low-frequency pulsation amplitude U according to the following formula c (n):

[0042] U c (n) = U ccos (n-1)*cos(2π(f ac -f e )+U csin (n-1)*sin(2π(f ac -f e ).

[0043] Step S140 : Calculate the compensation time for turning on the MOS tube based on the low-frequency pulsation amplitude and preset PI controller parameters to obtain the compensation time for turning on the MOS tube.

[0044] In this embodiment, the compensation time of the MOS transistor is calculated based on the proportional parameter, integral parameter and low-frequency pulsation amplitude of the PI controller to obtain the compensation time of the MOS transistor. The compensation time of the MOS transistor is calculated according to the following formula:

[0045] T com (n) = -K p U c (n)-K i ∫U c (n),

[0046] Where K p and K i Represent the proportional parameter and integral parameter of the PI controller respectively;

[0047] Among them, the proportional parameter and integral parameter of the PI controller are calculated according to the following formula:

[0048]

[0049] Where h represents the intermediate frequency bandwidth, h = 5, T s Represents the control period, T b Indicates the MOS opening time calibration coefficient, U b Indicates the bus voltage scaling factor.

[0050] This method uses Fourier decomposition based on the mains frequency and bus voltage to extract the phase and amplitude of the low-frequency pulsation in the bus voltage. Based on the low-frequency pulsation amplitude and the proportional and integral parameters of the PI controller, the compensation for the on-off time of the MOS transistor is calculated. This compensates the MOS on-time and achieves beat frequency suppression, eliminating the need for offline parameter tuning and significantly reducing the workload. Furthermore, by detecting the mains frequency, the method can adapt to different grid frequencies and amplitudes, significantly improving its adaptability.

[0051] The embodiment of the present invention further provides a beat frequency suppression system, which is used to execute any embodiment of the aforementioned beat frequency suppression method. Figure 2 , Figure 2 FIG1 is a schematic block diagram of a beat frequency suppression system provided by an embodiment of the present invention. The beat frequency suppression system 100 can be configured in a server.

[0052] like Figure 2 As shown, the beat frequency suppression system 100 includes a frequency detection module 110 , a component calculation module 120 , an amplitude synthesis module 130 , and a time calculation module 140 .

[0053] The frequency detection module 110 is used to collect the mains voltage of the compressor and calculate the mains frequency according to the positive level timing and negative level timing of the mains voltage to obtain the mains frequency;

[0054] A component calculation module 120 is configured to obtain the bus voltage of the compressor, calculate the low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency, and obtain the sin component and cos component of the low-frequency pulsation phase;

[0055] an amplitude synthesis module 130 for synthesizing the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude;

[0056] The time calculation module 140 is configured to calculate the compensation time for turning on the MOS tube based on the low-frequency pulsation amplitude and preset PI controller parameters to obtain the compensation time for turning on the MOS tube.

[0057] An embodiment of the present invention further provides a compressor device, comprising a control circuit and a compressor, wherein the control circuit is provided with the beat frequency suppression system as described above;

[0058] The control loop adjusts the on-time of the MOS tube in the circuit according to the compensation time.

[0059] In this embodiment, the compressor device consists of a control loop and a compressor. The control loop can be a microcomputer such as a single-chip microcomputer. A beat frequency suppression system is provided in the control loop. The beat frequency suppression system calculates the compensation time for the MOS tube to be turned on. Finally, the control loop adjusts the turn-on time of the MOS tube in the circuit according to the compensation time, thereby achieving the beat frequency suppression of the compressor, eliminating the vibration caused by the compressor beat frequency, avoiding unnecessary noise, and eliminating the need for offline parameter setting, which greatly reduces the parameter setting work.

[0060] Further, such as Figure 3 The figure shows the control circuit used in this application, wherein S1-S7 represent MOS tubes, C1 represents a thin film capacitor, D1 represents a diode, DB1 represents a rectifier bridge, L1 represents an inductor, and CN1 and CN2 represent connection terminals. By controlling the on-time of S7, the voltage of the bus capacitor C1 is controlled. The longer the on-time of S7 is, the higher the bus voltage is. However, when the operating frequency of the compressor is in a multiple frequency relationship with the grid frequency, the bus will produce low-frequency pulsation. By detecting the amplitude and phase of the low-frequency pulsation, the compensation time of S7 opening is calculated based on the control parameters of the PI controller and the low-frequency pulsation amplitude, and the on-time of S7 is appropriately compensated, so as to achieve the goal of eliminating the low-frequency pulsation of the bus voltage and further realize beat frequency suppression.

[0061] An embodiment of the present invention further provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the beat frequency suppression method described above when executing the computer program.

[0062] In another embodiment of the present invention, a computer-readable storage medium is provided. The computer-readable storage medium may be a non-volatile computer-readable storage medium. The computer-readable storage medium stores a computer program that, when executed by a processor, causes the processor to perform the beat frequency suppression method described above.

[0063] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described equipment, devices and units can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented with electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0064] In the several embodiments provided by the present invention, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, or units with the same function may be combined into one unit. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices or units, or may be an electrical, mechanical or other form of connection.

[0065] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected according to actual needs to achieve the objectives of the embodiments of the present invention.

[0066] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0067] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the existing technology, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a magnetic disk, or an optical disk.

[0068] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and such modifications or substitutions are intended to be within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of protection of the claims.

Claims

1. A beat frequency suppression method, characterized in that: include: Collecting the mains voltage of the compressor, and calculating the mains frequency according to the positive level timing and negative level timing of the mains voltage to obtain the mains frequency; Obtaining a bus voltage of the compressor, calculating a low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency, and obtaining a sin component and a cos component in the low-frequency pulsation phase; synthesizing the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude; The compensation time for turning on the MOS tube is calculated based on the low-frequency pulsation amplitude and the preset PI controller parameters to obtain the compensation time for turning on the MOS tube; wherein, by controlling the turn-on time of the MOS tube, the bus voltage is controlled, and the longer the turn-on time of the MOS tube is, the higher the bus voltage is.

2. The beat frequency suppression method according to claim 1, wherein: The calculating the frequency of the mains power according to the positive level timing and the negative level timing of the mains power voltage to obtain the mains power frequency includes: Step 1: Initialization, mains positive level time t H =0, mains negative level time t L =0, temporary variable temp H =0, temp L =0, jump to step 2; Step 2: If the current mains voltage U ac (n)>0, then update temp H =temp H +1, otherwise update temp L =temp L +1; Step 3: If the product of the current and previous mains voltages is less than 0, that is, U ac (n)*U ac (n-1)<0, then return to step 2. If the product of the current and previous mains voltages is greater than 0, that is, U ac (n)*U ac (n-1)>0, jump to step 4; Step 4: If the current mains voltage U ac (n)>0, then update t L =temp L ,temp L =0, if the current mains voltage U ac (n)<0, mains positive level time t H =temp H ,temp H =0, then update the mains frequency T s Indicates the control cycle and returns to step 2.

3. The beat frequency suppression method according to claim 1, wherein: The calculating the low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency to obtain the sin component and cos component in the low-frequency pulsation phase includes: The sin component and cos component are calculated according to the following formula: U csin (n)=U dc (n)*sin(2π(f ac -f e )-U csin (n-1))*τ+U csin (n-1), U ccos (n)=U dc (n)*cos(2π(f ac -f e )-U ccos (n-1))*τ+U ccos (n-1), Among them, U dc (n) represents the bus voltage at the current moment, f e Indicates the operating frequency of the compressor, U csin (n) represents the sin component of the low-frequency pulsation at the current moment, U csin (n-1) represents the sin component of the low-frequency pulsation at the current moment, U ccos (n) represents the cosine component of the low-frequency pulsation at the current moment, U ccos (n-1) represents the cosine component of the low-frequency pulsation at the current moment, τ represents the time filter factor, f ac Indicates the mains frequency.

4. The beat frequency suppression method according to claim 3, wherein: The synthesizing the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude includes: Calculate the low-frequency pulsation amplitude U according to the following formula c (n): U c (n)=U ccos (n-1)*cos(2π(f ac -f e )+U csin (n-1)*sin(2π(f ac -f e )。 5. The beat frequency suppression method according to claim 4, wherein: The calculating the compensation time of the MOS tube opening based on the low-frequency pulsation amplitude and the preset PI controller parameters to obtain the compensation time of the MOS tube opening includes: Calculate the compensation time T of MOS tube opening according to the following formula com (n): T com (n)=-K p U c (n)-K i ∫U c (n), Among them, K p and K i Represent the proportional parameter and integral parameter of the PI controller respectively.

6. The beat frequency suppression method according to claim 4, wherein: The calculation process of the PI controller parameters includes: Calculate K as follows p and K i : Where h represents the intermediate frequency bandwidth, T s Represents the control period, T b Indicates the MOS opening time calibration coefficient, U b Indicates the bus voltage scaling factor.

7. A beat frequency suppression system, characterized in that: include: A frequency detection module is used to collect the mains voltage of the compressor and calculate the mains frequency according to the positive level timing and negative level timing of the mains voltage to obtain the mains frequency; A component calculation module is used to obtain the bus voltage of the compressor, calculate the low-frequency pulsation phase in the bus voltage based on the bus voltage and the mains frequency, and obtain the sin component and cos component of the low-frequency pulsation phase; an amplitude synthesis module, configured to synthesize the low-frequency pulsation amplitude based on the sin component and the cos component to obtain the low-frequency pulsation amplitude; A time calculation module is used to calculate the compensation time of the MOS tube turn-on based on the low-frequency pulsation amplitude and preset PI controller parameters to obtain the compensation time of the MOS tube turn-on; wherein, the bus voltage is controlled by controlling the turn-on time of the MOS tube, and the longer the turn-on time of the MOS tube, the higher the bus voltage.

8. A beat frequency suppression device, characterized in that: comprising a control circuit and a compressor, wherein the control circuit is provided with the beat frequency suppression system according to claim 7; The control loop adjusts the on-time of the MOS tube in the circuit according to the compensation time.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the beat frequency suppression method according to any one of claims 1 to 6 is implemented.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, which, when executed by a processor, causes the processor to perform the beat frequency suppression method according to any one of claims 1 to 6.

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