Light-receiving element, optical device, and electronic device

Abstract

Provided is an optical receiving element capable of reducing power consumption and / or dead time while reducing the input voltage of a readout circuit. Provided is an optical receiving element (200) including: a photon response multiplication unit (210) including a charge multiplication region capable of multiplying charge generated in response to the incidence of a photon; a first resistance unit (211) connected at one end to one end of the photon response multiplication unit, having a resistance value greater than the resistance value of the photon response multiplication unit; a second resistance unit (212) connected at one end to the other end of the first resistance unit; and a readout unit (230) connected to the other end of the first resistance unit and reading out an output from the photon response multiplication unit via the first resistance unit.

Description

TECHNICAL FIELD

[0001] The present application relates to a light-receiving element, an optical device, and an electronic apparatus. BACKGROUND

[0002] As one of optical elements configured to photoelectrically convert received light into an electric signal and output the electric signal, a single-photon avalanche diode (hereinafter, referred to as SPAD) using avalanche multiplication is known. Avalanche multiplication refers to a phenomenon in which an electron and a hole generated by photon incidence are accelerated by a high electric field, and new electrons and holes are successively generated. Since a group of electrons and holes increases many times and a large current can flow, the SPAD using it has an advantage that it can detect weak light.

[0003] LIST OF CITATIONS

[0004] NON-PATENT LITERATURE

[0005] Non-Patent Literature 1: APPLIED OPTICS, Vol. 35, No. 12, 20 April 1996 SUMMARY

[0006] Technical problem to be solved by the application

[0007] During operation of the SPAD, a reverse bias voltage of, for example, several 10 V is applied between the cathode and the anode of the SPAD. Therefore, a change in the cathode potential caused by a large current generated by the SPAD can also be large. Since the change in the cathode potential is read by the readout circuit, a large change also occurs in the input voltage of the readout circuit. In this case, it is necessary to suppress the change to be less than the withstand voltage of the readout circuit. In addition, since a large current flows due to avalanche amplification in the SPAD, power consumption tends to increase.

[0008] In order to make the input voltage of the readout circuit less than the withstand voltage and reduce the power consumption, a resistance division can be used (Non-Patent Literature 1). However, the time constant determined by the resistance value of the resistor for the resistance division and the time constant determined by the cathode parasitic capacitance of the SPAD and the input parasitic capacitance of the readout circuit become large, and the recharging period of the SPAD can become long. The recharging period is a so-called dead time in which the SPAD cannot detect photons. That is, in the resistance division, even though it is possible to make the input voltage of the readout circuit less than the withstand voltage and reduce the power consumption, there is a disadvantage that the dead time becomes long.

[0009] Therefore, the present application proposes a light-receiving element, an optical device, and an electronic apparatus capable of at least reducing the power consumption or the dead time while reducing the input voltage of the readout circuit.

[0010] Technical solution to solve the technical problem

[0011] According to the present application, there is provided a light-receiving element including: a photon response multiplication section including a charge multiplication region capable of multiplying a charge generated in response to the incidence of a photon; a first resistance section connected at one end to one end of the photon response multiplication section and having a resistance value greater than a resistance value of the photon response multiplication section; a second resistance section connected at one end to the other end of the first resistance section; and a readout unit connected to the other end of the first resistance section and reading out an output from the photon response multiplication section via the first resistance section.

[0012] Further, according to the present application, there is provided an optical device including a plurality of light-receiving elements arranged in a matrix, wherein the plurality of light-receiving elements each include: a photon response multiplication section including a charge multiplication region capable of multiplying a charge generated in response to the incidence of a photon; a first resistance section connected at one end to one end of the photon response multiplication section and having a resistance value greater than a resistance value of the photon response multiplication section; a second resistance section connected at one end to the other end of the first resistance section; and a connection point to which the other end of the first resistance section, the one end of the second resistance section, and a readout unit reading out an output from the photon response multiplication section are connected.

[0013] Further, according to the present application, there is provided an electronic device including an optical system and an optical device in which a plurality of light-receiving elements are arranged in a matrix, wherein the plurality of light-receiving elements each include: a photon response multiplication section including a charge multiplication region capable of multiplying a charge generated in response to the incidence of a photon that has transmitted through the optical system; a first resistance section connected at one end to one end of the photon response multiplication section and having a resistance value greater than a resistance value of the photon response multiplication section; a second resistance section connected at one end to the other end of the first resistance section; and a connection point to which the other end of the first resistance section, the one end of the second resistance section, and a readout unit reading out an output from the photon response multiplication section are connected. BRIEF DESCRIPTION OF DRAWINGS

[0014] FIG. 1 is a block diagram showing a schematic configuration example of an electronic device to which an optical device according to the related art is applied.

[0015] FIG. 2 is a block diagram showing a schematic configuration example of an optical device according to the related art.

[0016] FIG. 3A is a block diagram showing one example of a schematic configuration of a pixel of an optical device according to the related art.

[0017] FIG. 3Bis a block diagram showing another example of a schematic configuration of a pixel of an optical device according to the related art.

[0018] FIG. 3C is a graph schematically showing a change in cathode potential when one photon is incident on a photodiode of a pixel of an optical device according to the related art.

[0019] FIG. 3D is a graph schematically showing a voltage-current characteristic of a photodiode of a pixel of an optical device according to the related art.

[0020] FIG. 4A is a block diagram showing a schematic configuration example of an optical device according to the first embodiment.

[0021] FIG. 4B is a block diagram showing a schematic configuration example of a pixel of a pixel array unit of an optical device according to the first embodiment.

[0022] FIG. 5A is a graph schematically showing a change in cathode voltage when one photon is incident on a single-photon avalanche diode included in a pixel of a pixel array unit of an optical device according to the first embodiment.

[0023] FIG. 5B is a graph for explaining an operation of a pixel of an optical device according to the first embodiment.

[0024] FIG. 5C is a graph for explaining a subsequent operation of a pixel of an optical device according to the first embodiment. FIG. 5B is a graph for explaining a subsequent operation of a pixel of an optical device according to the first embodiment.

[0025] FIG. 5D is a graph for explaining a subsequent operation of a pixel of an optical device according to the first embodiment. FIG. 5C is a graph for explaining a subsequent operation of a pixel of an optical device according to the first embodiment.

[0026] FIG. 5E is a graph for explaining a subsequent operation of a pixel of an optical device according to the first embodiment. FIG. 5D is a graph for explaining a subsequent operation of a pixel of an optical device according to the first embodiment.

[0027] FIG. 6A is a graph showing a configuration example of a pixel according to a conventional example.

[0028] FIG. 6B is a graph showing a configuration example of a pixel according to a conventional example.

[0029] FIG. 7A is a block diagram showing a specific example 1 of a shield resistance portion of a pixel of an optical device according to the first embodiment.

[0030] FIG. 7Bis a block diagram showing a specific example 2 of a shield resistor part of a pixel of the optical device according to the first embodiment.

[0031] FIG. 8A is a block diagram showing a specific example 1 of a quench resistor part of a pixel of the optical device according to the first embodiment.

[0032] FIG. 8B is a block diagram showing a specific example 2 of a quench resistor part of a pixel of the optical device according to the first embodiment.

[0033] FIG. 8C is a graph for explaining an operation of a pixel of the specific example 2 of the quench resistor part shown in FIG. 8B

[0034] FIG. 9A is a block diagram showing a specific example 1 of a readout circuit of a pixel of the optical device according to the first embodiment.

[0035] FIG. 9B is a graph for explaining an operation of a readout circuit of a pixel of the optical device according to the first embodiment.

[0036] FIG. 9C is a block diagram showing a specific example 2 of a readout circuit of a pixel of the optical device according to the first embodiment.

[0037] FIG. 10A is a block diagram showing a schematic configuration example of a pixel of the optical device according to the second embodiment.

[0038] FIG. 10B is a graph for explaining an operation of a pixel of the optical device according to the second embodiment.

[0039] FIG. 10C is a block diagram showing a specific example 3 of a shield resistor part of a pixel of the optical device according to the second embodiment.

[0040] FIG. 11 is a block diagram showing a schematic configuration example of a pixel of the optical device according to the third embodiment.

[0041] FIG. 12 is a block diagram showing a stack structure example of the optical device according to the fourth embodiment.

[0042] FIG. 13 is a block diagram showing a schematic configuration example of a pixel of the optical device according to the fourth embodiment.

[0043] FIG. 14 ​is a vertical sectional view showing a cross-sectional structure example of a face perpendicular to a light incident face of the optical device according to the fourth embodiment.

[0044] FIG. 15 is a horizontal sectional view showing a cross-sectional structure example of an A-A face of FIG. 14

[0045] FIG. 16 is a schematic view showing a pixel included in the optical device according to the comparative example.

[0046] FIG. 17A is a block diagram showing a modification example 1 of a pixel of the optical device according to the fourth embodiment.

[0047] FIG. 17B is a block diagram showing a modification example 2 of a pixel of the optical device according to the fourth embodiment.

[0048] FIG. 17C is a block diagram showing a modification example 3 of a pixel of the optical device according to the fourth embodiment.

[0049] FIG. 17D is a block diagram showing a modification example 4 of a pixel of the optical device according to the fourth embodiment.

[0050] FIG. 17E is a block diagram showing a modification example 5 of a pixel of the optical device according to the fourth embodiment.

[0051] FIG. 18A is a block diagram showing a modification example 6 of a pixel of the optical device according to the fourth embodiment.

[0052] FIG. 18B is a block diagram showing a modification example 7 of a pixel of the optical device according to the fourth embodiment.

[0053] FIG. 19A is a block diagram showing a modification example 8 of a pixel of the optical device according to the fourth embodiment.

[0054] FIG. 19B is a block diagram showing a modification example 9 of a pixel of the optical device according to the fourth embodiment.

[0055] FIG. 19C is a block diagram showing a modification example 10 of a pixel of the optical device according to the fourth embodiment.

[0056] FIG. 20 is a schematic view showing an imaging device as an electronic device to which the optical device according to the embodiment of the present application can be applied.

[0057] FIG. 21 ​is a block diagram showing a configuration example of a ranging device as an electronic device to which an optical device according to an embodiment of the present application can be applied.

[0058] FIG. 22 is a block diagram showing a schematic configuration example of a pixel of a pixel array unit of an optical device of a ranging device as an electronic device to which the present technology is applied.

[0059] FIG. 23 is a diagram schematically showing ranging by a direct time-of-flight (ToF) method in a ranging device as an electronic device to which the present technology is applied.

[0060] FIG. 24 is a diagram showing an example of a histogram based on light reception times generated in a ranging device as an electronic device to which the present technology is applied.

[0061] FIG. 25 is a block diagram showing an example of a schematic configuration of an in-vivo information acquisition system.

[0062] FIG. 26 is a diagram showing an example of a schematic configuration of an endoscopic surgery system.

[0063] FIG. 27 is a block diagram showing an example of a functional configuration of a camera head and a CCU.

[0064] FIG. 28 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0065] FIG. 29 is a diagram showing an example of a mounting position of an outside information detection section and an imaging section. DETAILED DESCRIPTION

[0066] Hereinafter, embodiments of the present application will be described in detail based on the accompanying drawings. Note that, in each of the following embodiments, the same portions are denoted by the same reference numerals, and overlapping descriptions will be omitted.

[0067] In order to facilitate understanding of the embodiments of the present application, prior art related to the embodiments of the present application will be described before the embodiments of the present application are described.

[0068] FIG. 1 is a block diagram showing a schematic configuration example of an electronic device to which an optical device according to prior art is applied. As shown in FIG. 1 , the electronic device 1 includes, for example, an imaging lens 30, an optical device 10, a storage unit 40, and a processor 50.

[0069] The imaging lens 30 is an example of an optical system that converges incident light and forms an image of the incident light on a light-receiving surface of the optical device 10. The light-receiving surface can be a surface on which pixels are arranged in a matrix in the optical device 10. The optical device 10 photoelectrically converts the incident light to generate image data. Furthermore, the optical device 10 performs predetermined signal processing such as noise removal and white balance adjustment on the generated image data.

[0070] The storage unit 40 includes, for example, a flash memory, a dynamic random access memory (DRAM), or a static random access memory (SRAM), and records image data and the like input from the optical device 10.

[0071] The processor 50 is configured using, for example, a central processing unit (CPU) and the like, and can include an application processor that executes an operating system and various application software and the like, a graphics processing unit (GPU), a baseband processor, and the like. The processor 50 performs various processing on image data input from the optical device 10 or image data read out from the storage unit 40 and the like as necessary, performs display to a user, and transmits image data to the outside through a predetermined network.

[0072] FIG. 2 is a block diagram showing a schematic configuration example of the above-described optical device 10. As shown in the drawing, the optical device 10 includes a pixel array unit 11, a timing control circuit 15, a drive circuit 12, and an output circuit 13.

[0073] The pixel array unit 11 includes a plurality of pixels 20 arranged in a matrix. For the plurality of pixels 20, a pixel drive line LD (vertical direction in the drawing) is connected for each column, and an output signal line LS (horizontal direction in the drawing) is connected for each row. One end of the pixel drive line LD is connected to an output terminal of the drive circuit 12 corresponding to each column, and one end of the output signal line LS is connected to an input terminal of the output circuit 13 corresponding to each row.

[0074] The drive circuit 12 includes a shift register and an address decoder and the like, and drives the pixels 20 of the pixel array unit 11 all at once or in units of columns and the like. The drive circuit 12 applies a selection control voltage to the pixel drive line LD corresponding to the column to be read out, thereby selecting the pixels 20 to be used for detecting the photon incidence in units of columns. Signals (referred to as detection signals) output from the respective pixels 20 of the column selectively scanned by the drive circuit 12 are input to the output circuit 13 through each of the output signal lines LS. The output circuit 13 outputs the detection signals input from the respective pixels 20 as pixel signals to the storage unit 40 or the processor 50.

[0075] The timing control circuit 15 includes a timing generator that generates various timing signals and the like, and controls the drive circuit 12 and the output circuit 13 based on the various timing signals generated by the timing generator.

[0076] FIG. 3A is a block diagram showing one example of a schematic configuration of a pixel 20 of a pixel array unit 11. As shown in the drawing, the pixel 20 includes a photodiode 21 and a quenching resistor 22. In this pixel 20, the photodiode 21 is a single-photon avalanche diode (hereinafter, referred to as a SPAD 21). In the SPAD 21, even if one photon is incident, a larger current is generated by avalanche multiplication, and the current is output as an electric signal. The operation of the SPAD 21 will be described later.

[0077] In the example shown, the anode of the SPAD 21 is connected to a predetermined power supply, and the cathode of the SPAD 21 is connected to one end of the quenching resistor 22. The other end of the quenching resistor 22 is grounded. Thus, as described later, a reverse bias voltage VDDL can be applied between the SPADs 21. Further, a cathode parasitic capacitance CK as a parasitic capacitance is generated on the cathode side of the SPAD 21. The cathode parasitic capacitance CK corresponds to a synthetic capacitance of a capacitance of the SPAD 21, a capacitance generated between the quenching resistor 22 and a surrounding insulating layer, a capacitance generated by a wiring connecting the SPAD 21 and the quenching resistor 22, and a capacitance of an element included in the readout circuit 23 such as an inverter, and the like.

[0078] Referring to FIG. 3B , the readout circuit 23 is connected to a connection point between the SPAD 21 and the quenching resistor 22 of the pixel 20. The readout circuit 23 can include, for example, an inverter circuit, and as described later, changes in potential (i.e., cathode potential) at the connection point between the SPAD 21 and the quenching resistor 22 are read out.

[0079] Further, in the pixel 20, a post-stage circuit 24 is connected to an output terminal of the readout circuit 23. The post-stage circuit 24 can include, for example, a digital counter circuit, and with this digital counter circuit, the pixel 20 can be used as a photon counter element. In this case, image data can be generated based on an output signal corresponding to the number of photons detected in each pixel 20. That is, the optical device 10 can be used as an imaging sensor.

[0080] Further, the post-stage circuit 24 can include a time-to-digital converter (TDC) circuit instead of the digital counter circuit. The TDC circuit can generate a digital signal representing a time difference between a predetermined reference signal having a predetermined reference frequency and a detection signal based on the reference signal. For example, in the case where the post-stage circuit 24 includes the TDC circuit, the optical device 10 can be used as a distance measuring element employing a time-of-flight (ToF) method.

[0081] Next, reference will be made to FIG. 3C and FIG. 3DThe operation of the SPAD 21 is explained. FIG. 3C is a graph schematically showing a change in the cathode potential VK of the SPAD 21 when a photon is incident on the SPAD 21. FIG. 3D is a graph schematically showing a voltage-current characteristic of the SPAD 21. In FIG. 3D , the horizontal axis represents a voltage applied between the anode and the cathode of the SPAD 21. The applied voltage is represented by V An -V Ca , where the anode potential of the SPAD 21 is V An , and the cathode potential is V Ca . Further, in FIG. 3D , the vertical axis represents a current I An flowing through the SPAD 21 in the positive direction (the direction from the anode to the cathode).

[0082] As shown in FIG. 3D , in the case where a forward bias voltage is applied to the SPAD 21, the current I An flows in the positive direction and its current value increases as the applied voltage increases. On the other hand, in the case where a reverse bias voltage is applied to the SPAD 21, when the voltage is low, the current I An does not flow due to the rectifying action of the SPAD 21. However, when the reverse bias voltage becomes equal to or lower than the breakdown voltage -Vbd, avalanche multiplication occurs, and a large current I An flows in the reverse direction. Here, a region between the breakdown voltage (-Vbd) and a voltage (-Vbd-Ve) that is lower than the breakdown voltage by a voltage Ve (also referred to as an overvoltage Ve) is referred to as a Geiger region. The gain due to avalanche multiplication is theoretically infinite in the Geiger region. By applying a reverse bias voltage of, for example, several 10 V to both ends of the SPAD 21, the SPAD 21 can be operated in the Geiger region.

[0083] Here, in the case where a predetermined voltage corresponding to the Geiger region is applied from a predetermined power source between the anode of the SPAD 21 and the ground terminal of the quenching resistor 22, when a photon (may be one photon) is incident on the SPAD 21 (at t0 of FIG. 3C ), an electron-hole pair is generated from the photon, the electron-hole pair is accelerated by a high electric field due to the reverse bias voltage, and such electron-hole pairs are successively generated. That is, avalanche multiplication occurs. Thus, a large current flows in the reverse direction.

[0084] This current also flows through the quenching resistor 22, and thus a voltage drop of the quenching resistor 22 occurs. Thus, the applied voltage applied to the SPAD 21 is reduced. Here, when the voltage (absolute value) applied between the cathode and the anode of the SPAD 21 becomes lower than the breakdown voltage (absolute value |Vbd|), the avalanche multiplication stops (time tl). The phenomenon that the avalanche multiplication stops is called quenching.

[0085] Thereafter, the current is supplied to the SPAD 21 through the quenching resistor 22, and the SPAD 21 is charged. This charging is called recharging. The recharging is performed for a certain period of time (time tl to time t2) with a time constant determined by the cathode parasitic capacitance CK FIG. 3A and FIG. 3B ) of the SPAD 21. When the recharging is completed (time t2), the voltage applied to the SPAD 21 returns to the voltage corresponding to the Geiger region, and the SPAD 21 can operate in the region again. As described above, in a case where a photon is incident on the SPAD 21, as shown in FIG. 2B, the cathode potential VK of the SPAD 21 changes in a pulse shape. This change is read by the read circuit 23, and thus the photon is detected. Note that, since the SPAD 21 cannot detect a photon during the recharging period, the period is called a dead time. FIG. 3C

[0086] (First Embodiment)

[0087] [Configuration of Optical Device According to First Embodiment]

[0088] Next, a configuration example of an optical device according to the first embodiment of the present application will be described. FIG. 4A is a block diagram illustrating a schematic configuration example of the optical device according to the first embodiment. As illustrated in the drawing, the optical device 100 includes a pixel array unit PAR, a column circuit 310, a row scan circuit 320, and an interface circuit 330.

[0089] The pixel array unit PAR includes a plurality of pixels (light receiving elements) 200 arranged in a matrix shape. For the plurality of pixels 200, a bit line BL0, a bit line BL1, …, and a bit line BL S (in the following, referred to as a bit line BL without particular distinction), and a word line WL0, a word line WL1, …, and a word line WL N (in the following, referred to as a word line WL without particular distinction) are connected for each column. One end of the bit line BL is connected to an output terminal of the column circuit 310 corresponding to each column, and one end of the word line WL is connected to an input terminal of the row scan circuit 320 corresponding to each row. Note that, for convenience of explanation, in the drawing, the vertical direction is referred to as a column direction, and the horizontal direction is referred to as a row direction.

[0090] ​The row scanning circuit 320 drives the pixels 200 of the pixel array unit PAR all at once or in units of columns, and the like. The row scanning circuit 320 applies a selection control voltage to the word line WL corresponding to the column to be read out, thereby selecting the pixels 200 to be used for detecting the incidence of photons in units of columns. The signals (referred to as detection signals) output from the respective pixels 200 of the column selected by the row scanning circuit 320 are input to the column circuit 310 through the bit lines BL. The column circuit 310 generates a digital signal by digitally converting the detection signals. The generated digital signal is output to the outside through the interface circuit 330. Note that the column circuit 310 and the row scanning circuit 320 are controlled by a timing signal from a timing control circuit (not shown).

[0091] [Configuration of pixel of optical device according to first embodiment]

[0092] FIG. 4B is a block diagram illustrating an example of the schematic configuration of the pixel 200 of the pixel array unit PAR of the optical device 100 according to the present embodiment. As illustrated, the pixel 200 includes a photodiode 210, a shield resistance portion 211, and a quench resistance portion 212. In the present embodiment, the photodiode 210 is a SPAD, and will be referred to as a SPAD 210 hereinafter. The SPAD 210 multiplies the charge generated by photoelectric conversion in response to the incidence of one photon by avalanche multiplication (also referred to as avalanche amplification) to generate a large current, and outputs the current as an electric signal. However, the photodiode 210 is not limited to a SPAD and can be a silicon photomultiplier.

[0093] One end of the shield resistance portion 211 is connected to the cathode of the SPAD 210, and the other end of the shield resistance portion 211 is connected to one end of the quench resistance portion 212. That is, in the pixel 200, a series circuit in which the SPAD 210, the shield resistance portion 211, and the quench resistance portion 212 are connected in series is formed.

[0094] The shield resistance portion 211 and the quench resistance portion 212 can be formed of, for example, high-resistance polysilicon. Furthermore, the shield resistance portion 211 and the quench resistance portion 212 can be formed as a metal resistor. As a material for a metal resistor, a so-called metal ceramic material such as TaSiO2 and NbSiO2 is exemplified. Here, when the resistance value of the shield resistance portion 211 is denoted by Rsh and the resistance value between the cathode and the anode of the SPAD 210 is denoted by R ON , the relationship R ON < Rsh is satisfied. That is, the shield resistance portion 211 is formed to have a larger resistance value than the resistance value between the cathode and the anode of the SPAD 210. The effect caused by this relationship will be described later.

[0095] Further, when the resistance value of the quenching resistance portion 212 is denoted by Rq, the relationship of Rsh < Rq is satisfied. That is, the shielding resistance portion 211 and the quenching resistance portion 212 are formed so that the resistance value Rq of the quenching resistance portion 212 is larger than the resistance value Rsh of the shielding resistance portion 211. The effect caused by this relationship will be described later.

[0096] Further, as FIG. 4B indicated, a parasitic capacitance C1 is generated on the cathode side of the SPAD 210. The parasitic capacitance C1 corresponds to a synthetic capacitance such as a capacitance of the SPAD 210 and a capacitance generated by a wiring connecting the SPAD 210 and the shielding resistance portion 211. Further, a parasitic capacitance C2 is generated between the shielding resistance portion 211 and the quenching resistance portion 212. The parasitic capacitance C2 corresponds to a synthetic capacitance of a capacitance generated between the shielding resistance portion 211 and the surrounding insulating layer, a capacitance generated between the quenching resistance portion 212 and the surrounding insulating layer, a capacitance generated by a wiring connecting the shielding resistance portion 211 and the quenching resistance portion 212, and a capacitance of an element such as an inverter included in the readout circuit 230. Note that since there are many circuit elements such as the shielding resistance portion 211, the quenching resistance portion 212, and the readout circuit 230 (to be described later) around the parasitic capacitance C2 compared to the surroundings of the parasitic capacitance C1, the capacitance (value) of the parasitic capacitance C2 tends to be larger than the capacitance (value) of the parasitic capacitance C1.

[0097] One end of the readout circuit 230 is connected to the connection point between the shielding resistance portion 211 and the quenching resistance portion 212. The readout circuit 230 can include, for example, an inverter circuit. As described later, the readout circuit 230 reads a change in potential of the connection point between the shielding resistance portion 211 and the quenching resistance portion 212.

[0098] Further, in the pixel 200, a digital counter circuit 240 is connected to the output end of the readout circuit 230. The digital counter circuit 240 counts the number of times of change in potential of the connection point between the shielding resistance portion 211 and the quenching resistance portion 212 read by the readout circuit 230 (that is, the number of photons incident on the SPAD 210), and outputs an output signal corresponding to the counted number. When a selection signal is input from the row scan circuit 320 FIG. 4A ) to the pixel 200 through the word line WL, the output signal is output from the digital counter circuit 240 to the column circuit 310 through the bit line BL. By converting the output signal into luminance, the optical device 100 can be used as an imaging element.

[0099] Note that a TDC circuit can be connected to the rear stage of the readout circuit 230 instead of the digital counter circuit. With this configuration, based on the output from the readout circuit 230, and based on the difference between the light emission timing and the light reception timing, distance measurement using a direct ToF method can be performed.

[0100] In addition, the optical device 100 can also be used as a ranging unit for ranging using the indirect ToF method. In the indirect ToF method, the light receiving unit receives light of each phase according to the emission of a predetermined light source unit, and calculates distance information based on the light receiving signals of each phase output by the light receiving unit through the light receiving of each phase.

[0101] like FIG. 4B As shown, a series circuit including SPAD 210, shielding resistor 211, and quenching resistor 212 is connected to a predetermined power supply. The anode of SPAD 210 is maintained at potential VDDL, and the other end of quenching resistor 212 (the end opposite to the end connected to shielding resistor 211) is maintained at potential VDDH. That is, a voltage corresponding to potential VDDH-potential VDDL is applied to the series circuit including SPAD 210, shielding resistor 211, and quenching resistor 212. Here, since potential VDDH is higher than potential VDDL, SPAD 210 is subjected to a reverse bias voltage. During the operation of pixel 200, this applied voltage is set to a predetermined voltage corresponding to the aforementioned Geiger region.

[0102] [Operation of pixels in the optical device according to the first embodiment]

[0103] Next, we will refer to FIG. 5A to FIG. 5E Explain the operation of pixel 200. In FIG. 5B to FIG. 5E In, with FIG. 4B Similarly, pixel 200 is schematically shown, but the digital counter circuit 240 (or TDC circuit), word line WL, and bit line BL are omitted.

[0104] First, a predetermined voltage is applied to the series circuit consisting of SPAD 210, shielding resistor 211, and quenching resistor 212 using a predetermined power supply. That is, a (reverse bias) voltage corresponding to the Geiger region is applied to SPAD 210. When a photon is incident on SPAD 210 in this state ( FIG. 5A At time t0), avalanche multiplication occurs, and a large current flows from the cathode to the anode of the SPAD 210. Here, in FIG. 5B In the diagram, when the thin arrow schematically represents the current I2 flowing from parasitic capacitor C2, and the thick line schematically represents the current I1 flowing from parasitic capacitor C1, the large current flowing from the cathode to the anode of SPAD 210 is mainly supplied from parasitic capacitor C1. This is because a resistance R with a higher resistance than that between the cathode and anode of SPAD 210 is provided between parasitic capacitor C2 and SPAD 210. ONThe shielding resistor 211 has a large resistance value Rsh. In other words, while the charge accumulated in the parasitic capacitance C1 easily moves to the SPAD 210, the charge accumulated in the parasitic capacitance C2 is hindered by the shielding resistor 211 and hardly moves to the SPAD 210. Therefore, during avalanche multiplication, current is mainly supplied to the SPAD 210 from the parasitic capacitance C1.

[0105] During avalanche multiplication, such as FIG. 5A As shown in the time period t0~t1, due to the large current generated by avalanche multiplication, the cathode potential VK1 of SPAD 210 decreases. When the voltage applied between SPAD 210 becomes lower than the breakdown voltage as the cathode potential VK1 decreases, quenching occurs. FIG. 5A (Time t1). Furthermore, at this time, the charge accumulated in the parasitic capacitance C1 has been discharged, and as... FIG. 5C As shown, the supply of current I1 from parasitic capacitance C1 to SPAD 210 also stops.

[0106] Note that, as FIG. 5A As shown, during the avalanche multiplication period (t0~t1), the potential VK2 between the shielding resistor 211 and the quenching resistor 212 does not drop as much as the potential VK1. This is because, as mentioned above, almost no current flows out of the parasitic capacitance C2.

[0107] Quenching occurs, and charge redistribution begins between parasitic capacitances C1 and C2. FIG. 5A (Time t1). That is, as... FIG. 5D As shown, the charge remaining in parasitic capacitor C2 moves to parasitic capacitor C1 through shielding resistor 211. Here, since the resistance value Rq of quenching resistor 212 is greater than the resistance value Rsh of shielding resistor 211, the current I3 flowing through quenching resistor 212 only slightly contributes to charge redistribution. Therefore, charge redistribution mainly occurs between parasitic capacitor C2 and parasitic capacitor C1. When the voltage between parasitic capacitors C1 and C2 becomes equal (when potential VK1 and potential VK2 become equal), the redistribution ends (time t2).

[0108] When redistribution ends, recharging begins. That is, since the current I2 from the parasitic capacitance C2 does not flow, therefore... FIG. 5EAs shown, the recharging of the SPAD 210 is performed by the current I3 flowing through the quenching resistor section 212. Here, there is no loss of charge in the charge redistribution between the parasitic capacitance C2 and the parasitic capacitance C1, and thus the amount of charge required for the recharging is equal to C1ΔVK1 consumed by the avalanche multiplication. That is, the amount of charge equal to C1ΔVK1 is supplied to the SPAD 210 by the current I3. When the recharging ends (time t3), the SPAD 210 becomes capable of detecting photons again.

[0109] [Operation effect of pixel of optical device according to first embodiment]

[0110] Next, the effect resulting from the operation of the pixel 200 of the optical device according to the first embodiment will be described in comparison with a conventional example. FIG. 6A is a diagram showing a configuration example of a pixel according to a conventional example, and the configuration example is basically the same as that disclosed in Non-Patent Literature 1. As shown, in the pixel of the conventional example, an avalanche photodiode PD1, a resistor R L , and a resistor R S are connected in series. Further, an inverter IVT is connected to a connection point between the resistor R L and the resistor R S . In this configuration, one end of the resistor R S (opposite to the connection point between the resistor R S and the resistor R L ) is grounded, and a reverse bias voltage (for example, several 10 V) is applied to the avalanche photodiode PD1. When a photon is incident on the avalanche photodiode PD1 and avalanche multiplication occurs, as shown by a curve CL1, a voltage drop occurs in the avalanche photodiode PD1. On the other hand, with this voltage drop, the voltage at the connection point between the resistor R L and the resistor R S , that is, the voltage V IVT applied to the input terminal of the inverter IVT also drops (curve CL2). FIG. 6A FIG. 6A

[0111] Here, when the voltage drop of the avalanche photodiode PD1 due to the avalanche multiplication is Vd, the resistance value of the resistor R L is RQ1, and the resistance value of the resistor R S is represented by RQ2, the voltage V IVT is represented by the following formula.

[0112] V IVT = Vd x {1 / (1+RQ1 / RQ2)}

[0113] ​​That is, the voltage V applied to the input terminal of the inverter IVT is determined by the ratio of resistor values ​​RQ1 and RQ2, RQ1 / RQ2. IVT It has a lower voltage drop Vd than the avalanche photodiode PD1. Specifically, the voltage V... IVT The voltage drop decreases as the ratio of RQ1 / RQ2 increases. For example, the voltage applied to the avalanche photodiode PD1 typically reaches tens of V, so the voltage drop Vd during avalanche amplification may exceed the withstand voltage of the inverter IVT. However, by appropriately adjusting the resistor R... L The resistance value RQ1 and resistor R S The ratio between the resistance values ​​RQ2 can make the voltage V IVT It has a lower withstand voltage than the inverter IVT and can protect the inverter IVT.

[0114] However, in actual circuits, such as FIG. 6B As shown, a cathode parasitic capacitance C01 is generated at the cathode terminal of the avalanche photodiode PD1, and an input parasitic capacitance C02 is generated at the input terminal of the inverter IVT. Here, when the resistor R is increased to increase the ratio RQ1 / RQ2... L When the resistance value is RQ1, the time constant determined by the resistance value RQ1, the cathode parasitic capacitance C01, and the input parasitic capacitance C02 increases. Therefore, the recharge time becomes longer, and the dead time also becomes longer.

[0115] On the other hand, in the first embodiment of the present invention, in FIG. 5B to FIG. 5E During the series of operations shown, including avalanche multiplication, quenching, redistribution, and recharging, the cathode potential VK1 of SPAD 210 decreases by ΔVK1, and the potential VK2 at the other end of the shielding resistor section 211 (the end opposite to the end connected to SPAD 210) decreases by ΔVK2. Here, when the capacitance (value) of parasitic capacitance C1 is CC1 and the capacitance (value) of parasitic capacitance C2 is CC2, ΔVK2 is expressed by the following formula.

[0116] ΔVK2=ΔVK1×{1 / (1+CC2 / CC1)}

[0117] That is, due to the capacitance ratio CC2 / CC1, the voltage ΔVK2 generated at the other end of the shielding resistor 211 during a series of operations is lower than the voltage ΔVK1 generated between the SPADs 210. The voltage ΔVK2 at the other end of the shielding resistor 211 is the input voltage of the readout circuit 230, and is lower than the voltage ΔVK1 generated between the SPADs 210. This allows the readout circuit 230 to be protected. In other words, it can be said that the readout circuit 230 is protected by the ratio CC2 / CC1 of the capacitance (value) CC2 of the parasitic capacitor C2 and the capacitance (value) CC1 of the parasitic capacitor C1.

[0118] Further, as described with reference to FIG. 5B the resistance value Rsh of the shielding resistance portion 211 is greater than the resistance value R ON Therefore, during avalanche multiplication of the SPAD 210, only a slight current I2 flows from the parasitic capacitance C2, and a main current I1 flows from the parasitic capacitance C1. Further, since the following relation

[0119] the capacitance (value) CC1 of the parasitic capacitance C1 is smaller than the capacitance (value) CC2 of the parasitic capacitance C2, and

[0120] the resistance value R ON <the resistance value Rsh,

[0121] Therefore, the time constant determined by the capacitance (value) CC1 and the resistance value R ON is smaller than the time constant determined by the capacitance (value) CC2 and the resistance value Rsh. Since the current I1 is supplied from the parasitic capacitance C1 to the SPAD 210 through the circuit having a smaller time constant, it is possible to shorten the period in which avalanche multiplication occurs. Therefore, it is possible to shorten the time (general dead time) from when a photon is incident on the SPAD 210 until the photon can be detected again.

[0122] Further, during avalanche amplification, the current I1 mainly flows from the parasitic capacitance C1, and the current I2 only slightly flows from the parasitic capacitance C2, and thus it is possible to reduce the current flowing. Therefore, compared to the case where the current I2 also flows from the parasitic capacitance C2, it is possible to reduce power consumption.

[0123] Further, quenching occurs, and charge redistribution from the parasitic capacitance C2 to the parasitic capacitance C1 occurs, and only after the redistribution ends, the current I3 flowing through the quenching resistance portion 212 contributes to recharge. Therefore, the time required for recharge by the current I3 is shortened, and it is possible to shorten the dead time. Further, since the charge is redistributed from the parasitic capacitance C2 to the parasitic capacitance C1, it is possible to reduce the current I3 required for recharge. That is, it is possible to reduce power consumption.

[0124] As described above, in the pixel 200 of the optical device according to the present embodiment, by the ratio CC2 / CC1 of the capacitance (value) CC2 of the parasitic capacitance C2 to the capacitance (value) CC1 of the parasitic capacitance C1, it is possible to reduce the input voltage of the readout circuit 230 to be lower than the withstand voltage of the readout circuit 230. Further, since the resistance value R ONThe shielding resistor 211, with its large resistance value Rsh, exhibits effects such as reduced dead time and power consumption. Furthermore, since the resistance value Rq of the quenching resistor 212 is greater than the resistance value Rsh of the shielding resistor 211, recharging begins with current I3 after the charge redistribution from parasitic capacitance C2 to parasitic capacitance C1 is complete. That is, the power required for recharging can be reduced, and power consumption can be further reduced.

[0125] [Specific example of shielding resistor section]

[0126] Next, we will refer to FIG. 7A and FIG. 7B A specific example illustrating the shielding resistor section 211 is shown. (Note: The last part, "omitted," is likely an error and can be omitted.) FIG. 4B The digital counter circuit 240 (or TDC circuit) shown includes word line WL and bit line BL.

[0127] FIG. 7A This is a block diagram illustrating a specific example 1 of the shielding resistor section 211 of the pixel 200 of the optical device 100 according to the first embodiment. As shown, the shielding resistor section 211 can be implemented by a resistor element 211A. The resistor element 211A can be formed, for example, by a high-resistance polysilicon or a metal resistor. The high-resistance polysilicon or metal resistor is formed during wiring formation using known semiconductor manufacturing processes such as thin film formation, photolithography, or etching.

[0128] In addition, such as FIG. 7B As shown, in specific example 2, the shielding resistor section 211 may include, for example, a P-channel metal-oxide-semiconductor (MOS) transistor 211B. In this case, a bias voltage generating unit 250 is provided to apply a bias voltage to the gate of the MOS transistor 211B. For example, the bias voltage is generated by the row scan circuit 320 ( FIG. 4A The voltage applied from the bias voltage generation unit 250 to the gate of the MOS transistor 211B is adjusted by the instruction signal, thereby adjusting the resistance value between the source and drain of the MOS transistor 211B, i.e., the resistance value Rsh of the shielding resistor 211. Through this adjustment, the resistance value R of the SPAD 210 can be appropriately adjusted. ON The R value between the shielding resistor 211 and the shielding resistor 211 is R ON The relationship between <Rsh>. Therefore, dead time can be reliably shortened and power consumption reduced.

[0129] Note that, although in FIG. 7B The diagram shows a single MOS transistor 211B, but the overall resistance value Rsh of the shielding resistor section 211 can be adjusted by arranging multiple MOS transistors 211B in series and applying a gate voltage to each of them. Furthermore, FIG. 7Aand FIG. 7B Pixel 200 in the first embodiment is shown, but this specific example 1 can also be applied to pixel 200B in the third embodiment.

[0130] Furthermore, during the avalanche multiplication of SPAD 210, the resistance between the source and drain of MOS transistor 211B is increased to suppress the outflow of current I2 from parasitic capacitance C2 and reduce power consumption. On the other hand, as quenching occurs, the resistance between the source and drain of MOS transistor 211B is decreased, thereby promoting charge redistribution and shortening the dead time.

[0131] [Specific examples of quenching resistance]

[0132] Next, a specific example of the quenching resistance section 212 will be explained. FIG. 8A This is a block diagram illustrating a specific example 1 of the quenching resistance section of the pixel 200 of the optical device according to the first embodiment.

[0133] like FIG. 8A As shown, the quenching resistor section 212 can have a constant current source 212A. Since the constant current source 212A has a large internal resistance, it is easy to satisfy the relationship Rsh < Rq between the resistance value Rq of the quenching resistor section 212 and the resistance value Rsh of the shielding resistor section 211. Therefore, during avalanche amplification or during charge redistribution between parasitic capacitance C2 and parasitic capacitance C1, the current from the quenching resistor section 212 can be reduced (corresponding to...). FIG. 5B This reduces the contribution of the current I3 (equal to the current I3) and also reduces power consumption. Furthermore, the current during recharging (corresponding to current I3) can be maintained at a predetermined value by a constant current source 212A. Therefore, by appropriately adjusting the recharging current, recharging can be performed efficiently.

[0134] Next, a specific example 2 of the quenching resistance section 212 will be described. In pixel 200C of specific example 2, as FIG. 8B As shown, an active recharge circuit 212B is provided to replace the quenching resistor section 212 of the pixel 200 in the first embodiment. However, the active recharge circuit 212B can also be applied to pixels 200A and 200B.

[0135] The active recharge circuit 212B includes a switch 212S and a control unit 212C that controls the switch 212S to be on / off (ON / OFF). Under the control of the control unit 212C, the switch 212S electrically connects and disconnects a predetermined power supply (VDDH) from the shielding resistor 211. One end of the control unit 212C is connected to the output terminal of the readout circuit 230. Therefore, the control unit 212C detects the output voltage of the readout circuit 230. Specifically, when a drop in the pulsed output voltage from the output circuit 230 is detected, the control unit 212C outputs an on signal to the switch 212S to turn on the switch 212S after a predetermined delay time. Furthermore, after a predetermined time period has elapsed after outputting the on signal, the control unit 212C outputs an off signal to the switch 212S to turn off the switch 212S.

[0136] The active recharge circuit 212B constructed as described above operates as follows. FIG. 8C As shown, when avalanche amplification occurs at time t0 due to photon incident, the cathode potential VK1 decreases. When quenching occurs and charge redistribution begins from parasitic capacitance C2 to parasitic capacitance C1, the cathode potential VK1 rises again. That is, the cathode potential VK1 changes in a negative pulse shape. On the other hand, during avalanche amplification (time period t0~t1) and redistribution (time period t1~t2), the potential VK2 at the connection point between the shielding resistor 211 and the active recharge circuit 212B decreases. This potential change is detected by the readout circuit 230. Here, when the potential VK2 drops below a predetermined first threshold potential, the readout circuit 230 outputs an output voltage, and when the potential VK2 drops below a predetermined second threshold potential V... th When the voltage drops below a certain threshold, the readout circuit 230 stops outputting the voltage. That is, the readout circuit 230 stops outputting the voltage when the potential VK2 changes from the first threshold potential to the second threshold potential V. th During the specified time period, a pulsed output voltage is output. When a drop in the output voltage of the readout circuit 230 is detected (time t),... D Control unit 212C, after a predetermined delay time (time period t) D After t3, an on signal is output to switch 212S. Therefore, switch 212S is turned on (time t3), and current is supplied to SPAD 210 from a predetermined power supply through shielding resistor 211.

[0137] In the active recharge circuit 212B, as described above, the switch 212S is turned off until the potential VK2 becomes lower than the second threshold potential V. th (Until the pulsed output signal from the readout circuit 230 decreases). Therefore, during the time period from the moment the photon is incident until the pulsed output signal from the readout circuit 230 decreases, the supply of current from the power supply to the shielding resistor 211 is stopped (corresponding to...).FIG. 5B The current I3 is equal to the current. Therefore, during avalanche amplification, current flows from parasitic capacitance C1, and during charge redistribution, current flows from parasitic capacitance C2 to parasitic capacitance C1. Since switch 212S is open, no current flows through shielding resistor 211, thus reliably reducing power consumption.

[0138] Furthermore, when a drop in the pulsed output signal from the readout circuit 230 is detected and a predetermined delay time has elapsed, switch 212S (time t3) is turned on. Therefore, current is supplied from the power supply to the shielding resistor 211, promoting recharging. Thus, the dead time can be shortened. Here, if the timing of turning on switch 212S coincides with the time point from the end of charge redistribution from parasitic capacitor C2 to parasitic capacitor C1, the dead time can be shortened more appropriately. Note that a constant current source can be used instead of a power supply. Therefore, after switch 212S is turned on, the current value of the flowing current can be appropriately adjusted, thus allowing recharging to end in a short time.

[0139] Note that at time t3, when switch 212S is turned on and current is supplied from the power supply to shielding resistor 211, potential VK2 quickly returns to the potential before photon incidence, and simultaneously... FIG. 8C As shown, the cathode potential VK1 of SPAD 210 recovers to the potential before photon incidence with a delay compared to the potential VK2. This is because the resistance value of the shielding resistor 211 increases the time constant of the potential VK1.

[0140] [Specific example of a readout circuit]

[0141] Next, a specific example of the readout circuit 230 will be described. FIG. 9A This is a block diagram illustrating a specific example 1 of the readout circuit of the pixel 200 of the optical device according to the first embodiment.

[0142] like FIG. 9A As shown, the readout circuit 230 may include an inverter 230A. The input terminal of the inverter 230A is connected to the connection point between the shielding resistor section 211 and the quenching resistor section 212. Furthermore, the inverter 230A is powered through predetermined wiring.

[0143] like FIG. 9B As shown, the inverter 230A operates as follows: when the potential VK2 at the connection point between the shielding resistor section 211 and the quenching resistor section 212 becomes lower than a predetermined threshold V... th When the voltage Vout becomes high, and when the potential VK2 exceeds the predetermined threshold V... thThe output voltage Vout becomes low (LOW) at this time. Therefore, even in the case where the potential VK2 changes in a V-letter shape, the change can be output as a rectangular wave-shaped pulse wave. By employing the inverter 230A as the readout circuit 230, the change in the potential VK2 at the connection point between the shield resistance section 211 and the quench resistance section 212 can be read out.

[0144] Further, in the specific example 2 of the readout circuit, as shown in FIG. 9C , the readout circuit 230 includes a P-channel MOS transistor 230B and a current source 230C. Therefore, during a period in which the potential VK2 is equal to or less than a predetermined voltage, the MOS transistor 230B is turned on, and a predetermined pulse-shaped output voltage Vout corresponding to the period is output. Therefore, like the inverter 230A of FIG. 9A , the change in the potential VK2 can be read out.

[0145] (Second Embodiment)

[0146] Next, an optical device according to a second embodiment of the present application will be described with reference to FIG. 10A and FIG. 7B . FIG. 10A is a block diagram showing a schematic configuration example of a pixel 200A of the optical device according to the second embodiment. Although a digital counter circuit 240 (or a TDC circuit), a word line WL, a bit line BL, and the like are omitted in FIG. 10A , the pixel 200A is similar to the pixel 200 of the optical device 100 according to the first embodiment except for the configuration shown. Further, the optical device according to the present embodiment can have the same configuration as the optical device 100 according to the first embodiment, and like the optical device 100, can be replaced with the optical device 10 in the electronic device 1 FIG. 1 .

[0147] With reference to FIG. 10A , one end of the shield resistance section 211 is connected to the anode of the SPAD 210A, and one end of the quench resistance section 212 is connected to the other end of the shield resistance section 211. That is, in the pixel 200A of the present embodiment, unlike the pixel 200 of the first embodiment in which the shield resistance section 211 and the quench resistance section 212 are connected in series on the cathode side of the SPAD 210, the shield resistance section 211 and the quench resistance section 212 are connected in series on the anode side of the SPAD 210A. On the other hand, the pixel 200A is similar to the pixel 200 in that the resistance value R ON of the SPAD 210A and the resistance value Rsh of the shield resistance section 211 satisfy R ONthe relationship of Rsh, and the resistance value Rsh of the shield resistor portion 211 and the resistance value Rq of the quench resistor portion 212 satisfy the relationship of Rsh < Rq.

[0148] As illustrated, a parasitic capacitance CI is generated between the anode of the SPAD 210A and the shield resistor portion 211. The parasitic capacitance CI corresponds to a synthetic capacitance of, for example, a capacitance of the SPAD 210A and a capacitance generated by a wiring connecting the SPAD 210A and the shield resistor portion 211. Further, a parasitic capacitance C2 is generated between the shield resistor portion 211 and the quench resistor portion 212. The parasitic capacitance C2 corresponds to a synthetic capacitance of, for example, a capacitance generated by the shield resistor portion 211, a capacitance generated by the quench resistor portion 212, a capacitance generated by a wiring connecting the shield resistor portion 211 and the quench resistor portion 212, and a capacitance of an element included in the readout circuit 230 such as an inverter. Further, an input terminal of the readout circuit 230 is connected to a connection point between the shield resistor portion 211 and the quench resistor portion 212.

[0149] The cathode of the SPAD 210A is connected to a high potential terminal of a predetermined power supply, and the other end (an end opposite to the connection point between the quench resistor portion 212 and the shield resistor portion 211) of the quench resistor portion 212 is connected to a low potential terminal of the predetermined power supply. During operation, a predetermined reverse bias voltage (a potential VDDH - a potential VDDL) corresponding to a Geiger region is applied between the SPAD 210A by the predetermined power supply.

[0150] Next, the operation of the SPAD 210A of the present embodiment will be described. FIG. 10B is a graph schematically showing a change between the anode potential VAl of the SPAD 210A and the potential VA2 of the connection point between the shield resistor portion 211 and the quench resistor portion 212 (an input terminal of the readout circuit 230) when one photon is incident on the SPAD 210A of the pixel 200A.

[0151] In a case where a predetermined voltage corresponding to a Geiger region is applied from a predetermined power supply to the SPAD 210A, when one photon is incident on the SPAD 210A (time t0), avalanche multiplication occurs in the SPAD 210A, and a large current flows from the cathode toward the anode. Therefore, as illustrated in FIG. 10B the anode potential VAl of the SPAD 210A (with respect to the potential VDDL) rises in the time period t0-tl.

[0152] At this time, since the resistance value Rsh of the shield resistor portion 211 is larger than the resistance value R ONTherefore, the current I1 mainly flows from the parasitic capacitance C1 to the SPAD 210A. Since the current I2 flows only slightly from the parasitic capacitance C2, the current flowing to the SPAD 210A can be reduced during avalanche amplification. Therefore, power consumption can be reduced.

[0153] Further, since the capacitance (value) CC1 of the parasitic capacitance C1 is smaller than the capacitance (value) CC2 of the parasitic capacitance C2, and the resistance value R ON is smaller than the resistance value Rsh of the shield resistance portion 211, the time constant determined by the capacitance (value) CC1 and the resistance value R ON is smaller than the time constant determined by the capacitance (value) CC2 and the resistance value Rsh. Since the current I1 from the parasitic capacitance C1 is supplied to the SPAD 210A through the circuit having a smaller time constant, the period in which avalanche multiplication occurs can be shortened. Therefore, the time (general dead time) from when a photon is incident on the SPAD 210A until the photon can be detected again can be shortened.

[0154] Further, as the anode potential VA1 of the SPAD 210A increases during avalanche amplification, the potential VA2 at the connection point between the shield resistance portion 211 and the quenching resistance portion 212 also increases. Here, when the increase in the potential VA1 is denoted by ΔVA1, the increase in the potential VA2 is denoted by ΔVA2, the capacitance (value) of the parasitic capacitance C1 is denoted by CC1, and the capacitance (value) of the parasitic capacitance C2 is denoted by CC2, the following is expressed:

[0155] ΔVA2 = ΔVA1 x {1 / (1 + CC2 / CC1)}

[0156] That is, the voltage (ΔVA2) applied to the input terminal of the readout circuit 230 is lower than ΔVA1. Therefore, the input voltage (ΔVA2) can be kept lower than the withstand voltage of the readout circuit 230, and the readout circuit 230 can be protected.

[0157] When the absolute value of the voltage applied to the SPAD 210A becomes smaller than the absolute value of the breakdown voltage as the anode potential VA1 increases, quenching occurs (time t1). Quenching occurs, and charge redistribution starts between the parasitic capacitance C2 and the parasitic capacitance C1 (time t1). That is, the charge remaining in the parasitic capacitance C2 moves to the parasitic capacitance C1 through the shield resistance part 211. Here, since the resistance value Rq of the quenching resistance part 212 is larger than the resistance value Rsh of the shield resistance part 211, the current I3 flowing through the quenching resistance part 212 only slightly contributes to the redistribution of the charge. Therefore, the redistribution of the charge mainly occurs between the parasitic capacitance C1 and the parasitic capacitance C2. When the voltage between the parasitic capacitance C1 and the voltage between the parasitic capacitance C2 become equal, the redistribution ends (time t2).

[0158] When the redistribution ends, recharging starts. That is, when the redistribution of the charge ends, no current flows out from the parasitic capacitance C2, and thus the SPAD 210A is recharged by the current I3 flowing through the quenching resistance part 212. When the recharging ends (time t3), the SPAD 210A becomes capable of detecting a photon again.

[0159] As described above, with the pixel 200A of the optical device according to the second embodiment, even in a case where the shield resistance part 211 and the quenching resistance part 212 are arranged on the anode side of the SPAD 210A, the resistance value R ON and the resistance value Rsh of the shield resistance part 211 also satisfy the relationship Rsh < Rq, and further, the capacitance (value) CC1 of the parasitic capacitance C1 and the capacitance (value) CC2 of the parasitic capacitance C2 satisfy the relationship CC1 < CC2, and thus similar effects to the pixel 200 of the optical device according to the first embodiment are exhibited. ON <Rsh of the shield resistance part 211 and the resistance value Rq of the quenching resistance part 212 also satisfy the relationship Rsh < Rq, and further, the capacitance (value) CC1 of the parasitic capacitance C1 and the capacitance (value) CC2 of the parasitic capacitance C2 satisfy the relationship CC1 < CC2, and thus similar effects to the pixel 200 of the optical device according to the first embodiment are exhibited.

[0160] Further, as FIG. 10C indicated, in the pixel 200A of the optical device according to the second embodiment, the shield resistance part 211 can include, for example, an N-channel MOS transistor 211C. In this case, a bias voltage generation unit 250 that applies a bias voltage to the gate of the MOS transistor 211C is provided. Even in a case where the MOS transistor 211C is used as the shield resistance part 211 in the pixel 200A, similar effects to a case where the P-channel MOS transistor 211B is used as the shield resistance part 211 in the pixel 200 of the optical device according to the first embodiment are exhibited. Further, also in this case, a plurality of MOS transistors 211C can be used. FIG. 7B

[0161] ​Note, refer to FIG. 8A to FIG. 8C Specific examples and references for the quenching resistance section are explained. FIG. 9A to FIG. 9C The specific example of the readout circuit described can also be appropriately applied to the second implementation scheme.

[0162] (Third Implementation Plan)

[0163] Next, we will refer to FIG. 11 An optical device according to a third embodiment of the present invention is described. As shown in the figure, pixel 200 (...) is compared with the optical device according to the first embodiment. FIG. 4B Similarly, in the pixel 200B of the optical device according to this embodiment, a SPAD 210, a shielding resistor 211, a quenching resistor 212, and a readout circuit 230 are arranged. The pixel 200B is similar to the pixel 200 in that the resistance value R of the SPAD 210 is... ON There is an R value between the shielding resistor 211 and the shielding resistor 211. ON The relationship between Rsh and Rq exists, and there is a relationship between Rsh < Rq between the resistance value Rsh of the shielding resistor 211 and the resistance value Rq of the quenching resistor 212. Note that although in FIG. 11 The middle part is omitted FIG. 4B The digital counter circuit 240 (or TDC circuit), word line WL, and bit line BL shown are included, but pixel 200B can be constructed similarly to pixel 200 and pixel 200A described above. Furthermore, the optical device according to this embodiment can have the same construction as the optical device 100 according to the first embodiment, and similar to the optical device 100, it can be used in electronic device 1 (…). FIG. 1 The optical device 10 is replaced in the middle.

[0164] On the other hand, the pixel 200B of this embodiment is provided with variable capacitor elements VC1 and VC2. Specifically, the variable capacitor element VC1 is provided such that one end is grounded and the other end is connected to the cathode of SPAD 210. In addition, the variable capacitor element VC2 is provided such that one end is grounded and the other end is connected to the wiring connecting the shielding resistor 211 and the quenching resistor 212. That is, the variable capacitor element VC1 is provided to replace the parasitic capacitance C1 of the pixel 200 of the optical device according to the first embodiment, and the variable capacitor element VC2 is provided to replace the parasitic capacitance C2.

[0165] Each of the variable capacitor elements VC1 and VC2 can be formed, for example, by a MOS transistor. In this case, a bias voltage generating unit is provided to apply a gate voltage to the gate of the MOS transistor. For example, the capacitance of the variable capacitor elements VC1 and VC2 can be adjusted by adjusting the gate voltage applied from the bias voltage generating unit to the gate electrode of the MOS transistor under the control of the row scan circuit 320.

[0166] Furthermore, each of the variable capacitor elements VC1 and VC2 can be formed from multiple MOS transistors. In this case, a bias voltage generating unit is provided to apply a gate voltage to the gate of each MOS transistor. Using this configuration, for example, the capacitance of the variable capacitor elements VC1 and VC2 can be adjusted by adjusting the number of MOS transistors to which the gate voltage is applied under the control of the row scan circuit 320. Note that the variable capacitor elements VC1 and VC2 can be formed from complementary metal-oxide-semiconductor (CMOS) transistors.

[0167] Similarly, in pixel 200B of the optical device according to this embodiment, as with pixel 200 of the optical device according to the first embodiment, the resistance value R of SPAD 210 is... ON There is an R value between the shielding resistor 211 and the shielding resistor 211. ON The relationship between Rsh and Rq exists, and there is a relationship between Rsh < Rq between the resistance value of the shielding resistor 211 and the resistance value of the quenching resistor 212. Therefore, if the capacitance of the variable capacitor element VC1 and the variable capacitor element VC2 is adjusted so that the capacitance of the latter increases, then pixel 200B will exhibit the same effect as pixel 200.

[0168] Furthermore, in the pixel 200B of the optical device according to this embodiment, variable capacitor elements VC1 and VC2 are provided, and their respective capacitances can be adjusted. Therefore, the amount of charge accumulated in the variable capacitor elements VC1 and VC2 can also be adjusted. Thus, the amount of current flowing from the variable capacitor element VC1 to the SPAD 210 during avalanche multiplication and the amount of charge moving from the variable capacitor element VC2 to the variable capacitor element VC1 during charge redistribution after quenching can be adjusted. Therefore, dead time can be reliably shortened and power consumption reduced.

[0169] Note, refer to FIG. 7A and FIG. 7B Specific examples and references for the shielding resistor section are provided. FIG. 8A to FIG. 8C Specific examples and references for the quenching resistance section are provided. FIG. 9A to FIG. 9C The specific example of the readout circuit described can also be appropriately applied to the third implementation scheme.

[0170] (Fourth Implementation Plan)

[0171] Next, we will refer to FIG. 12 to FIG. 16 An optical device according to a fourth embodiment of the present invention will be described. FIG. 12 This is a schematic diagram illustrating an example of a stacked structure of an optical device according to a fourth embodiment. FIG. 12As shown, the optical device 100 includes a first substrate 71 and a second substrate 72 bonded to the first substrate 71.

[0172] The first substrate 71 includes, for example, pixel array units PAR in which pixels 200 are arranged in a matrix (see reference). FIG. 4A ).like FIG. 13 As shown, a SPAD 210, a wiring layer 120, and a connection pad 125 are formed for each pixel on the first substrate 71. As described later, the wiring layer 120 includes a shielding resistor 211. One end of the shielding resistor 211 is connected to the cathode of the SPAD 210. The other end of the shielding resistor 211 is connected to the connection pad 125 via a predetermined wiring. Before the first substrate 71 and the second substrate 72 are bonded, the connection pad 125 is bonded to one surface of the first substrate 71. FIG. 12 The surface is exposed on the upper surface in the vertical direction. For example, the connection pad 125 is formed of copper (Cu).

[0173] Note that SPAD 210 is disposed on the lower surface side of the first substrate 71. That is, FIG. 12 The lower surface of the first substrate 71 is the light incident surface, and photons are incident on the SPAD 210 from the lower side in the figure.

[0174] like FIG. 13 As shown, the second substrate 72 includes a readout circuit 230, a quench resistor section 212, and a wiring layer 130 for each pixel. The readout circuit 230 and the quench resistor section 212 are connected to the connection pad 135 via the wiring layer 130. Before the first substrate 71 and the second substrate 72 are bonded, the connection pad 135 is connected to one surface of the second substrate 72. FIG. 12 The lower surface of the substrate is exposed. For example, the connection pad 135 is formed of Cu. Note that a substrate 72 can be provided on the second substrate 72. FIG. 4B The digital counter circuit 240 (or TDC circuit), column circuit 310, row scanning circuit 320, and interface circuit 330 shown are described. FIG. 4A ).

[0175] Here, as FIG. 13As shown on the right side of FIG. 10, the number of layers of the wiring layer 130 formed in the second substrate 72 tends to be larger than the number of layers of the wiring layer 120 formed in the first substrate 71. This is because, since the readout circuit 230, the digital counter circuit 240 (or the TDC circuit), the word line WL, the bit line BL, and the like are formed in the second substrate 72, the number of circuit elements and wirings formed in the second substrate 72 is larger than the number of circuit elements and wirings formed in the first substrate 71. Therefore, the parasitic capacitance C2 generated between the connection pad 135 of the second substrate 72 and the quenching resistance part 212 is larger than the parasitic capacitance Cl on the cathode side of the SPAD 210 of the first substrate 71. Further, the junction part 260 (i.e., the junction between the connection pad 125 and the connection pad 135) also generates a parasitic capacitance, but since the parasitic capacitance is prevented by the shielding resistance part 211 in combination with the parasitic capacitance Cl, the parasitic capacitance is included in the parasitic capacitance C2. Therefore, the ratio CC2 / CC1 of the capacitance (value) CC1 of the parasitic capacitance Cl to the capacitance (value) CC2 of the parasitic capacitance C2 increases, and the input voltage of the readout circuit 230 can be further reduced.

[0176] Referring to FIG. 12 to FIG. 14 The junction part 260 that junctions (so-called Cu-Cu junction) the connection pad 125 of the first substrate 71 and the connection pad 135 of the second substrate 72 is formed. Therefore, the SPAD 210 formed in the first substrate 71 and the readout circuit 230 formed in the second substrate 72 are electrically connected. Further, the first substrate 71 and the second substrate 72 are mechanically junctioned by the junction part 260.

[0177] However, the first substrate 71 and the second substrate 72 can also be electrically connected and mechanically junctioned by junctioning (so-called bump junction) the connection pads 125 and 135 using a metal bump. Further, in order to junction the first substrate 71 and the second substrate 72, for example, a so-called direct junction in which the junction faces of the substrates are planarized and the substrates are junctioned to each other by electronic interatomic force can be used.

[0178] Further, for example, the first substrate 71 and the second substrate 72 can be electrically connected by a junction part such as a through silicon via (TSV) that penetrates a semiconductor substrate. For the connection using the TSV, for example, a so-called double TSV system in which two TSVs, a TSV provided on the first substrate 71 and a TSV provided from the first substrate 71 to the second substrate 72, are connected on the outer surface of the chip; a so-called common TSV system in which the two TSVs are connected by a TSV that penetrates from the first substrate 71 to the second substrate 72; and the like can be employed.

[0179] Next, the specific structure of the optical device according to the fourth embodiment will be described. FIG. 14is a vertical sectional view showing a cross-sectional structure example of a face perpendicular to the light incident face of the optical device according to the fourth embodiment. FIG. 15 is a horizontal sectional view showing a cross-sectional structure example of the A-A face of FIG. 14 . Note that, FIG. 14 focuses on the cross-sectional structure of the SPAD 210.

[0180] As FIG. 14 indicated, the SPAD 210 of the pixel 200 is provided, for example, on a semiconductor substrate 101 constituting the first substrate 71. In the semiconductor substrate 101, for example, when viewed from the lower face in the light incident face (Z direction) of the pixel 200, it is divided into a plurality of element regions by an element isolation portion 110 (refer to FIG. 12 ). The SPAD 210 is provided in each element region defined by the element isolation portion 110. Note that the element isolation portion 110 can include the anode electrode 122 and the insulating film 109 in the first trench explained later. FIG. 15

[0181] Each SPAD 210 includes a photoelectric conversion region 102, a P-type semiconductor region 104, an N-type semiconductor region 103, a P+-type semiconductor region 105, an N+-type semiconductor region 106, a cathode contact 107, and an anode contact 108.

[0182] The photoelectric conversion region 102 is, for example, an N-type well region or a region containing a lower concentration of donors, and photoelectrically converts incident light to generate electron-hole pairs (hereinafter, referred to as charges).

[0183] The P-type semiconductor region 104 is, for example, a region containing P-type acceptors, and is provided in a region surrounding the photoelectric conversion region 102 as indicated in FIG. 14 and FIG. 15 . The P-type semiconductor region 104 forms an electric field for guiding the charges generated in the photoelectric conversion region 102 to the N-type semiconductor region 103 by applying a reverse bias voltage to the anode contact 108 explained later.

[0184] The N-type semiconductor region 103 is, for example, a region containing donors at a higher concentration than the photoelectric conversion region 102. As indicated in FIG. 14 and FIG. 15 , the N-type semiconductor region 103 is arranged in a central portion of the photoelectric conversion region 102, receives the charges generated in the photoelectric conversion region 102, and guides the charges to the P+-type semiconductor region 105. Note that the N-type semiconductor region 103 is not an essential component, and can be omitted.

[0185] ​The P+ semiconductor region 105 is, for example, a region containing an acceptor at a higher concentration than the P-type semiconductor region 104, and a part thereof is in contact with the P-type semiconductor region 104. Further, the N+ semiconductor region 106 is, for example, a region containing a donor at a higher concentration than the N-type semiconductor region 103, and is in contact with the P+ semiconductor region 105.

[0186] The P+ semiconductor region 105 and the N+ semiconductor region 106 form a PN junction, and function as an amplification region that accelerates an inflow charge to generate avalanche current.

[0187] The cathode contact 107 is, for example, a region containing a donor at a higher concentration than the N+ semiconductor region 106, and is provided in a region in contact with the N+ semiconductor region 106.

[0188] The anode contact 108 is, for example, a region containing an acceptor at a higher concentration than the P+ semiconductor region 105. The anode contact 108 is provided in a region in contact with the outer periphery of the P-type semiconductor region 104. The width of the anode contact 108 can be, for example, about 40 nm (nanometers). Thus, by making the anode contact 108 in contact with the entire outer periphery of the P-type semiconductor region 104, a uniform electric field can be formed in the photoelectric conversion region 102.

[0189] Further, as shown in FIG. 14 and FIG. 15 the anode contact 108 is provided on the bottom surface of a trench (hereinafter referred to as a first trench) provided in a matrix shape along the element isolation portion 110 on the front surface (lower surface in the drawing) side of the semiconductor substrate 101. With this structure, as described later, the formation position of the anode contact 108 is offset in the height direction with respect to the formation positions of the cathode contact 107 and the N+ semiconductor region 106.

[0190] The insulating film 109 covers the front surface (lower surface in the drawing) side of the semiconductor substrate 101. The film thickness (thickness in the substrate width direction) of the insulating film 109 in the first trench depends on the voltage value of the reverse bias voltage applied between the anode and the cathode, but can be, for example, about 150 nm.

[0191] The insulating film 109 is provided with openings for exposing the cathode contact 107 and the anode contact 108 on the surface of the semiconductor substrate 101, and a cathode electrode 121 in contact with the cathode contact 107 and an anode electrode 122 in contact with the anode contact 108 are provided in each of the openings.

[0192] The element isolation portion 110 that defines each SPAD 210 is provided in a trench (hereinafter, referred to as a second trench) that penetrates the semiconductor substrate 101 from the front surface to the rear surface. The second trench is connected to the first trench on the front surface side of the semiconductor substrate 101. The inner diameter of the second trench is narrower than the inner diameter of the first trench, and the anode contact 108 is formed in a step portion formed by the second trench.

[0193] Each element isolation portion 110 includes an insulating film 112 that covers the inner surface of the second trench and a light-blocking film 111 that fills the inside of the second trench. The film thickness (thickness in the substrate width direction) of the insulating film 112 depends on the voltage value of the reverse bias voltage applied between the anode and the cathode, but can be, for example, about 10 nm to 20 nm. Further, the film thickness (thickness in the substrate width direction) of the light-blocking film 111 depends on the material used for the light-blocking film 111 and the like, but can be, for example, about 150 nm.

[0194] Here, by using a conductive material having light-blocking properties for the light-blocking film 111 and the anode electrode 122, the light-blocking film 111 and the anode electrode 122 can be formed in the same process. Further, by using the same conductive material as the light-blocking film 111 and the anode electrode 122 for the cathode electrode 121, the light-blocking film 111, the anode electrode 122, and the cathode electrode 121 can be formed in the same process.

[0195] As the conductive material having such light-blocking properties, for example, tungsten (W) or the like can be used. However, the material is not limited to tungsten (W), and various modifications can be made as long as it is a conductive material having properties of reflecting or absorbing visible light or light required for each element, such as aluminum (Al), an aluminum alloy, or copper (Cu).

[0196] However, the light-blocking film 111 in the second trench is not limited to a conductive material, and, for example, a high refractive index material having a higher refractive index than the semiconductor substrate 101 or a low refractive index material having a lower refractive index than the semiconductor substrate 101 or the like can be used.

[0197] Further, since the material used for the cathode electrode 121 does not need to have light-blocking properties, a conductive material such as copper (Cu) or the like can be used instead of a conductive material having light-blocking properties.

[0198] Note that, in the present embodiment, a so-called front full trench isolation (FFTI) type element isolation portion 110 in which the second trench penetrates the semiconductor substrate 101 from the front surface side is exemplified, but the present technology is not limited thereto, and a full trench isolation (FTI) type element isolation portion in which the second trench penetrates the semiconductor substrate 101 from the back surface and / or the front surface side, or a deep trench isolation (DTI) type or a reverse deep trench isolation (RDTI) type element isolation portion in which the second trench is formed from the front surface or the back surface of the semiconductor substrate 101 to the middle can also be employed.

[0199] In the case where the second trench is of the FTI type that penetrates the semiconductor substrate 101 from the back surface side, the material of the light shielding film 111 can be embedded in the second trench from the back surface side of the semiconductor substrate 101.

[0200] The upper portion of the cathode electrode 121 and the upper portion of the anode electrode 122 protrude on the surface (lower surface in the drawing) of the insulating film 109. For example, the wiring layer 120 is provided on the surface (lower surface in the drawing) of the insulating film 109.

[0201] The wiring layer 120 includes an interlayer insulating film 123 and a wiring 124 provided in the interlayer insulating film 123. The wiring 124 is in contact with, for example, the cathode electrode 121 that protrudes on the surface (lower surface in the drawing) of the insulating film 109. In addition, the wiring 124 is in contact with a connection pad 125 via a predetermined via hole or the like. Here, the wiring 124 can include a shielding resistance portion 211 FIG. 13 ). Specifically, a part or all of the wiring 124 can be formed of a high-resistance polysilicon or a metal resistor or the like. In this case, the wiring 124 is formed so that the resistance value Rsh of the shielding resistance portion 211 is larger than the resistance value R ON .

[0202] Note that, although omitted in FIG. 14 , a wiring that is in contact with the anode electrode 122 is also provided in the wiring layer 120. This wiring is connected to a predetermined wiring layer (not shown), and this wiring layer is connected to a connection pad (not shown) provided in the peripheral edge portion of the optical device 100 FIG. 4A . By connecting this connection pad and a low potential terminal of a predetermined power supply, it is possible to hold the anode electrode 122 at a negative potential during the operation of the optical device 100.

[0203] The wiring layer 130 of the second substrate 72 is joined to the lower surface of the wiring layer 120. As described above, the joining is achieved by, for example, Cu-Cu joining between the connection pad 125 and the connection pad 135. The wiring layer 130 includes an interlayer insulating film 131 and a wiring 132 provided in the interlayer insulating film 131. The wiring 132 is electrically connected to a circuit element 142 formed on the semiconductor substrate 141. The circuit element 142 includes the readout circuit 230. Thus, the cathode electrode 121 of the semiconductor substrate 101 is connected to the readout circuit 230 via the wiring 124, the connection pad 125, the connection pad 135, and the wiring 132. FIG. 13 The readout circuit 230 is shown.

[0204] In addition, the wiring 133 is also connected to the connection pad 135. The wiring 133 can include a quenching resistance portion 212 FIG. 13 ). Specifically, a part or all of the wiring 133 is formed of a high-resistance polysilicon or a metal resistor, or the like, thereby forming the quenching resistance portion 212. In this case, the wiring 133 is formed so that the resistance value Rq of the quenching resistance portion 212 is larger than the resistance value Rsh of the shielding resistance portion 211. In addition, the wiring 133 is connected to a predetermined wiring layer (not shown), and the wiring layer is connected to a connection pad (not shown) provided in the peripheral edge portion of the optical device 100. The connection pad is connected to the high-potential terminal of the above-described power supply. Thus, during the operation of the optical device 100, a (reverse bias) voltage corresponding to the Geiger region can be applied to the quenching resistance portion 212, the shielding resistance portion 211, and the SPAD 210.

[0205] In addition, a pinning layer 113 and a planarization film 114 are provided on the rear surface (upper surface in the drawing) of the semiconductor substrate 101. In addition, a color filter 115 and an on-chip lens 116 for each pixel 200 are provided on the planarization film 114. Note that, although the color filter 115 and the on-chip lens 116 are provided in the present embodiment, a configuration in which the color filter and / or the on-chip lens are not provided is also possible depending on the use purpose and the object of the optical device 100.

[0206] The pinning layer 113 is, for example, a fixed charge film including a hafnium oxide (Hf02) film or an aluminum oxide (AI2O3) film containing an acceptor at a predetermined concentration. The planarization film 114 is, for example, an insulating film formed of an insulating material such as silicon oxide (Si02) or silicon nitride (SiN), and is a film for planarizing the surface on which the color filter 115 and the on-chip lens 116 of the upper layer are formed.

[0207] In the structure as described above, when a voltage corresponding to the Geiger region (reverse bias) is applied between the cathode contact 107 and the anode contact 108, an electric field for guiding the electric charge generated in the photoelectric conversion region 102 to the N-type semiconductor region 103 is formed by the potential difference between the P-type semiconductor region 104 and the N+-type semiconductor region 106. Further, in the PN junction region between the P+-type semiconductor region 105 and the N+-type semiconductor region 106, a strong electric field that generates an avalanche current by accelerating the incoming electric charge is formed. Therefore, the SPAD 210 is allowed to operate as an avalanche photodiode.

[0208] Next, the effect of the optical device according to the present embodiment will be described in comparison with the comparative example. FIG. 16 is a schematic view showing the configuration of a pixel included in the optical device according to the comparative example. Referring to FIG. 16 In the pixel 20A of the optical device according to the comparative example, the SPAD 21 is connected to the resistors R L and R S through the junction 260, which are connected in series to each other. The readout circuit 230 is connected to the junction between the resistors R L and R S . Here, the SPAD 21 and the connection pad 125 are formed in the first substrate 710, and the connection pad 135, the resistors R L and R S are formed in the second substrate 720.

[0209] In the junction 260, the two connection pads 135 and 125 are joined, for example, by Cu-Cu joining, and a parasitic capacitance C1b is generated by this joining. Therefore, when a reverse bias voltage corresponding to the Geiger region is applied to the SPAD 21, if a photon is incident on the SPAD 21 and avalanche amplification occurs, a current flows from both the parasitic capacitance C1a and the parasitic capacitance C1b to the SPAD 21.

[0210] On the other hand, in the pixel 200 of the optical device according to the fourth embodiment, as FIG. 13 shown in FIG. 2, the shield resistor portion 211 is provided between the SPAD 210 and the connection pad 135. Since the shield resistor portion 211 has a resistance value Rshlarger than the resistance value R ON of the SPAD 210, the current from the parasitic capacitance generated by the junction 260 (in FIG. 13In this case, the current flowing from the parasitic capacitance C2 (including the current flowing in the parasitic capacitance C2) is hindered, and the current mainly flows from the parasitic capacitance C1 to the SPAD 210. As compared with the case where the current flows from both the parasitic capacitance C1a and the parasitic capacitance C1b to the SPAD 21 in the above-described comparative example, the amount of current can be less in the case where the current flows from the parasitic capacitance C1 to the SPAD 210, and thus it is possible to reduce power consumption. In addition, since the time constant determined by the resistance value R ON of the SPAD 210 and the parasitic capacitance C1 is smaller than the time constant determined by the resistance value Rsh of the shield resistance portion 211 and the parasitic capacitance C2, it is possible to shorten the period in which avalanche multiplication occurs without the contribution of the current from the parasitic capacitance C2.

[0211] In addition, in the optical device according to the fourth embodiment, the SPAD 210 and the readout circuit 230 are arranged vertically. Therefore, as compared with the case where the SPAD 210 and the readout circuit 230 are juxtaposed, it is possible to reduce the pixel area observed from the light incident direction. Thus, it is possible to increase the density of pixels.

[0212] [Variants of the fourth embodiment]

[0213] Hereinafter, variants of the fourth embodiment will be described with reference to FIG. 17A to FIG. 17E the drawings. These variants have in common with the fourth embodiment that the first substrate 71 and the second substrate 72 are joined by the joining portion 260, and differ from the fourth embodiment in that a plurality of SPADs 210 are electrically connected to one readout circuit 230.

[0214] [Variant 1]

[0215] FIG. 17A is a block diagram showing variant 1 of a pixel of the optical device according to the fourth embodiment. With reference to FIG. 17A , the first substrate 71 is provided with a plurality of connection pads 125. The upper surfaces of the plurality of connection pads 125 are flush with the upper surface of the first substrate 71. In addition, inside the first substrate 71, the SPAD 210 and the shield resistance portion 211 are connected in series to each of the plurality of connection pads 125. Here, as with the embodiments explained so far, the resistance value R ON of the SPAD 210 and the resistance value Rsh of the shield resistance portion 211 have the relationship of R ON <Rsh.

[0216] On the other hand, the second substrate 72 is provided with a plurality of connection pads 135. The lower surfaces of the plurality of connection pads 135 are flush with the lower surface of the second substrate 72. In addition, the plurality of connection pads 135 are connected in parallel to each other, and the plurality of connection pads 135 connected in parallel are connected to the quenching resistance portion 212 and the readout circuit 230. Here, the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71 have a relationship of Rsh < Rq.

[0217] In addition, the plurality of connection pads 135 of the second substrate 72 are Cu-Cu bonded with the corresponding connection pads 125 of the first substrate 71. Thus, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0218] With this configuration, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230 via the shielding resistance portion 211 and the bonding portion 260 provided for each SPAD 210. In other words, the plurality of SPADs 210 share one readout circuit 230. In addition, since one readout circuit 230 is formed in one pixel, it can be said in this modified example that the plurality of SPADs 210 are provided in one pixel. By providing the plurality of SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0219] In addition, as with the above-described embodiments (including specific examples and modified examples), the resistance value R ON and the resistance value Rsh of the shielding resistance portion 211 have a relationship of R ON < Rsh, and the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71 have a relationship of Rsh < Rq. Thus, this modified example also exhibits effects such as a shortened dead time and reduced power consumption.

[0220] [Modified Example 2]

[0221] FIG. 17B is a block diagram showing Modified Example 2 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 17B , the plurality of SPADs 210 are connected in parallel on the first substrate 71, and the plurality of SPADs 210 connected in parallel are connected to one shielding resistance portion 211. That is, the plurality of SPADs 210 are connected in parallel with the shielding resistance portion 211. In addition, the shielding resistance portion 211 is connected to the connection pad 125. The upper surface of the connection pad 125 is flush with the upper surface of the first substrate 71. Here, the resistance value R ON and the resistance value Rsh of the shielding resistance portion 211 have a relationship of R ONRelationship between Rsh.

[0222] On the other hand, a connection pad 135 is provided in the second substrate 72. The lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72. Further, the quenching resistance part 212 and the readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quenching resistance part 212 and the resistance value Rsh of the shielding resistance part 211 of the first substrate 71 have a relationship of Rsh < Rq.

[0223] Further, the connection pad 135 is Cu-Cu bonded with the connection pad 125 of the first substrate 71. Thus, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0224] With this configuration, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230 via a set of shielding resistance parts 211 and bonding parts 260. The present modified example is the same as the above-described modified example 1 in that a plurality of SPADs 210 share one readout circuit 230. Further, since one readout circuit 230 is formed in one pixel, it can be said in the present modified example that a plurality of SPADs 210 can be provided in one pixel. By providing a plurality of SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0225] Further, as with the above-described embodiments (including specific examples and modified examples), the resistance value R ON and the resistance value Rsh of the shielding resistance part 211 have a relationship of R ON < Rsh, and the resistance value Rq of the quenching resistance part 212 and the resistance value Rsh of the shielding resistance part 211 of the first substrate 71 have a relationship of Rsh < Rq. Thus, the present modified example also exhibits effects such as shortening of dead time and reduction of power consumption.

[0226] [Modified Example 3]

[0227] FIG. 17C is a block diagram showing a modified example 3 of a pixel of an optical device according to the fourth embodiment. Refer to the above-described description of the fourth embodiment for the configuration of the pixel. FIG. 17C In the first substrate 71, a plurality of pairs of SPADs 210 and shielding resistance parts 211 connected in series with each other are connected in parallel to the connection pad 125. The connection pad 125 is formed so that its upper surface is flush with the upper surface of the first substrate 71. Here, the resistance value R ON and the resistance value Rsh of the shielding resistance part 211 connected in series with the SPAD 210 have a relationship of R ON < Rsh.

[0228] A connection pad 135 is formed in the second substrate 72 so that its lower surface is flush with the lower surface of the second substrate 72. Further, the quenching resistance part 212 and the readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quenching resistance part 212 and the resistance value Rsh of the shielding resistance part 211 of the first substrate 71 have a relationship of Rsh < Rq.

[0229] The connection pad 135 is Cu-Cu bonded with the connection pad 125 of the first substrate 71. Thus, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0230] In Modification 3, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230 via a set of shielding resistance parts 211 and bonding parts 260. Modification 3 is the same as the above-described Modification 1 in that a plurality of SPADs 210 share one readout circuit 230. Further, since one readout circuit 230 is formed in one pixel, it can be said in this modification that a plurality of SPADs 210 can be provided in one pixel. By providing a plurality of SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0231] Further, as with the above-described embodiments (including specific examples and modifications), the resistance value R ON and the resistance value Rsh of the shielding resistance part 211 have a relationship of R ON < Rsh, and the resistance value Rq of the quenching resistance part 212 and the resistance value Rsh of the shielding resistance part 211 of the first substrate 71 have a relationship of Rsh < Rq. Thus, this modification also exhibits effects such as shortening of dead time and reduction of power consumption.

[0232] [Modification 4]

[0233] FIG. 17D is a block diagram showing Modification 4 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 17D , as with the above-described embodiments (including specific examples and modifications), the resistance value R FIG. 17BAs with Modification Example 2, the plurality of SPADs 210 are connected in parallel on the first substrate 71, and the plurality of SPADs 210 connected in parallel are connected to one shielding resistance portion 211. However, in Modification Example 4, a plurality of groups of the plurality of SPADs 210 and the shielding resistance portion 211 connected in this way are assumed to be one group, and a plurality of groups of the plurality of SPADs 210 and the shielding resistance portion 211 are provided. The shielding resistance portion 211 of each group is connected to the connection pad 125 at the end opposite the connection portion to the SPAD 210. The connection pad 125 is formed so that its upper surface is flush with the upper surface of the first substrate 71. Also in Modification Example 4, the resistance value R ON and the resistance value Rsh of the shielding resistance portion 211 connected in series with the SPAD 210 have the relationship R ON <Rsh.

[0234] One connection pad 135 is formed in the second substrate 72 so that its lower surface is flush with the lower surface of the second substrate 72. Furthermore, the quenching resistance portion 212 and the readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of each shielding resistance portion 211 of the first substrate 71 have the relationship Rsh < Rq.

[0235] The connection pad 135 is Cu-Cu bonded with the connection pad 125 of the first substrate 71. Thus, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0236] Also in Modification Example 4, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230. Modification Example 4 is the same as Modification Example 1 described above in that the plurality of SPADs 210 share one readout circuit 230. Furthermore, since one readout circuit 230 is formed in one pixel, in this modification example as well, the plurality of SPADs 210 are provided in one pixel. By providing the plurality of SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0237] Furthermore, as with the above-described embodiments (including the specific examples and modification examples), the resistance value R ON and the resistance value Rsh of the shielding resistance portion 211 connected with the SPAD 210 have the relationship R ON <Rsh, and the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of each shielding resistance portion 211 of the first substrate 71 have the relationship Rsh < Rq. Thus, this modification example also exhibits effects such as a shortened dead time and reduced power consumption.

[0238] [Modification Example 5]

[0239] FIG. 17E is a block diagram showing Modification 5 of a pixel of the optical device according to the fourth embodiment. Referring to FIG. 17E As with Modification 4 shown in FIG. 17D In the first substrate 71, the plurality of SPADs 210 are connected in parallel, and the plurality of SPADs 210 connected in parallel are connected to one shield resistor portion 211, as with Modification 4. Further, in a case where the plurality of SPADs 210 and the shield resistor portion 211 connected in this way are assumed to be one group, it is similar to Modification 4 in that a plurality of groups are provided. However, in Modification 5, a plurality of connection pads 125 are provided, and the shield resistor portion 211 of each group is connected to the corresponding connection pad 125. The connection pad 125 is formed so that its upper surface is flush with the upper surface of the first substrate 71. Further, also in Modification 5, the resistance value R ON and the resistance value Rsh of the shield resistor portion 211 connected to the SPAD 210 is R ON < Rsh.

[0240] The connection pad 135 is Cu-Cu bonded with the connection pad 125 of the first substrate 71. Thus, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0241] Also in Modification 5, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230. Modification 5 is similar to Modification 1 described above in that the plurality of SPADs 210 share one readout circuit 230. Further, since one readout circuit 230 is formed in one pixel, also in this modification, the plurality of SPADs 210 are provided in one pixel. By providing the plurality of SPADs 210 for each pixel, photon detection of each pixel can be reliably performed.

[0242] Further, as with the above-described embodiments (including specific examples and modifications), there is a relationship of R ON and the resistance value Rsh of the shield resistor portion 211 connected to the SPAD 210 is R ON < Rsh, and there is a relationship of Rsh < Rq between the resistance value Rq of the quenching resistor portion 212 and the resistance value Rsh of each shield resistor portion 211 of the first substrate 71. Thus, this modification also exhibits effects such as shortening of dead time and reduction of power consumption.

[0243] [Modification 6]

[0244] Next, referring to FIG. 18A and FIG. 18BExplain variations 6 and 7 of the fourth implementation scheme. FIG. 18A This is a block diagram illustrating a modified example 6 of the pixels of the optical device according to the fourth embodiment. (Refer to...) FIG. 18A In the first substrate 71, the cathode of SPAD 210 is connected to one end of the shielding resistor 211, and the other end of the shielding resistor 211 is connected to the bonding pad 125. Similarly, in Modification 6, the resistance value R of SPAD 210... ON There exists an R value between the shielding resistor 211 connected to the SPAD 210 and the resistance Rsh. ON <Rsh relationship.

[0245] Furthermore, in Modification 6, unlike the fourth embodiment (and its modifications 1 to 5), the quenching resistance portion 212 is formed in the first substrate 71 instead of the second substrate 72. For example, by... FIG. 14 A predetermined wiring is provided in the region between the wiring 124 and the connecting pad 125 of the first substrate 71 to form such a quenching resistor section 212. This wiring may partially or entirely comprise a polysilicon resistor or a metal resistor. Furthermore, this wiring is electrically connected at one end to the wiring 124 where the shielding resistor section 211 is provided (e.g., a predetermined via, etc.), and at the other end to a predetermined pad on the peripheral edge of the first substrate 71. By electrically connecting this pad to a high-potential terminal of a predetermined power supply, a reverse bias voltage can be applied between the quenching resistor section 212 and the anode of the SPAD 210. Furthermore, even when the quenching resistor section 212 is formed in the first substrate 71, the quenching resistor section 212 is formed such that the resistance value Rq of the quenching resistor section 212 and the resistance value Rsh of the shielding resistor section 211 satisfy the relationship Rsh < Rq.

[0246] Even with the configuration described above, during avalanche amplification, the current from the parasitic capacitor C2 is impeded by the shielding resistor 211 and flows only slightly. Furthermore, due to the obstruction from the quenching resistor 212 and the shielding resistor 211, the current flowing to the SPAD 210 through the quenching resistor 212 is also very small. That is, during avalanche amplification, the current mainly flows from the parasitic capacitor C1 to the SPAD 210. Moreover, after quenching occurs, charge moves from the parasitic capacitor C2 to the parasitic capacitor C1, and after the voltage between the parasitic capacitors C1 and C2 becomes equal, current is supplied through the quenching resistor 212, and recharging occurs. That is, similarly, in Modification 6, operations such as avalanche amplification, quenching, charge redistribution, and recharging, similar to those in the first to fourth embodiments (including the modifications), are performed. Therefore, Modification 6 also exhibits effects such as reduced dead time and reduced power consumption.

[0247] [Variation Example 7]

[0248] FIG. 18B This is a block diagram illustrating a modified example 7 of the pixels of the optical device according to the fourth embodiment. (Refer to...) FIG. 18B Similarly, in Modification 7, as in Modification 6, the quenching resistor section 212 is provided in the first substrate 71. However, in Modification 7, one end of the quenching resistor section 212 is connected to the connection point between the cathode and the shielding resistor section 211 of the SPAD 210.

[0249] For example, through FIG. 14 A predetermined wiring is provided in the region between the wiring 124 of the first substrate 71 and the cathode electrode 121 to form a quenching resistor section 212. This wiring may partially or entirely comprise a polysilicon resistor or a metal resistor. Furthermore, this wiring is electrically connected at one end to the cathode electrode 121 and at the other end to a predetermined pad on the peripheral edge of the first substrate 71. By electrically connecting this pad to a high-potential terminal of a predetermined power supply and electrically connecting the anode and low-potential terminal of the SPAD 210, a reverse bias voltage can be applied between the quenching resistor section 212 and the anode of the SPAD 210. Furthermore, even when the quenching resistor section 212 is formed in the first substrate 71, the quenching resistor section 212 is formed such that the resistance value Rq of the quenching resistor section 212 and the resistance value Rsh of the shielding resistor section 211 satisfy the relationship Rsh < Rq.

[0250] In addition, the resistance value R of SPAD 210 ON There exists an R value between the shielding resistor 211 connected to the SPAD 210 and the resistance Rsh. ON <Rsh relationship.

[0251] Even with the configuration described above, during avalanche amplification, current mainly flows from parasitic capacitance C1 to SPAD 210, and the current from parasitic capacitance C2 is hindered by shielding resistor 211 and quenching resistor 212, and flows only slightly. Furthermore, after quenching, charge moves from parasitic capacitance C2 to parasitic capacitance C1, and after the voltage between parasitic capacitances C1 and C2 becomes equal, current is supplied through quenching resistor 212, and recharging occurs. That is, similarly, in Modification 7, operations such as avalanche amplification, quenching, charge redistribution, and recharging are performed as in the first to fourth embodiments (including modifications). Therefore, Modification 7 also exhibits effects such as reduced dead time and reduced power consumption.

[0252] Even in the case of the configuration as described above, during avalanche multiplication, the current from the parasitic capacitance C2 is impeded by the shield resistance part 211 and only slightly flows. Further, since it is impeded by the quench resistance part 212, the current flowing to the SPAD 210 through the quench resistance part 212 is also very small. That is, during avalanche multiplication, the current mainly flows from the parasitic capacitance C1 to the SPAD 210. Further, after quenching occurs, the charge moves from the parasitic capacitance C2 to the parasitic capacitance C1, and after the voltage between the parasitic capacitances C1 and the voltage between the parasitic capacitances C2 become equal, the current is supplied through the quench resistance part 212, and recharging is performed. That is, also in the modified example 7, similar operations to the series of operations such as avalanche multiplication, quenching, charge redistribution, and recharging of the first to fourth embodiments (including the modified examples) are performed. Therefore, the modified example 7 also exhibits effects such as shortening of the dead time and reduction of power consumption.

[0253] [Modified Example 8]

[0254] Next, the fourth embodiment will be described below with reference to FIG. 19A to FIG. 19C Other modified examples 8 to 10 of the fourth embodiment will be described. As FIG. 19A shown, the pixel of the modified example 8 includes a first substrate 71, a second substrate 72A, and a third substrate 73. The first substrate 71 includes the SPAD 210 and the shield resistance part 211 connected in series thereto, similarly to the first substrate 71 of the fourth embodiment. The readout circuit 230 is provided in the second substrate 72A. The quench resistance part 212 is provided in the third substrate 73.

[0255] The second substrate 72A further includes a connection pad 135 in the lower surface of FIG. 19A In the present modified example, the lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72A. Further, the second substrate 72A includes a connection pad 135A in the upper surface (the upper surface of FIG. 19A In the present modified example, the upper surface of the connection pad 135A is flush with the upper surface of the second substrate 72A. The connection pad 135 and the connection pad 135A are connected by a predetermined wiring, and the wiring is also connected to the readout circuit 230. The second substrate 72A can be, for example, a silicon substrate, and the readout circuit 230 can include transistors, wirings, and other circuit elements, and the like formed on the silicon substrate. Further, the connection pad 135 and the connection pad 135A can be connected by, for example, a via hole or a wiring, and the like.

[0256] The third substrate 73 includes a connection pad 136 in the lower surface of FIG. 19A In the present modified example, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73. The connection pad 136 is connected to the quench resistance part 212 by, for example, a via hole or a wiring, and the like.

[0257] Here, the connection pad 125 of the first substrate 71 is joined with the connection pad 135 of the second substrate 72A by, for example, Cu-Cu joining, thereby forming a joining portion 260. Then, the shield resistance portion 211 of the first substrate 71 and the readout circuit 230 of the second substrate 72A are electrically connected via the joining portion 260. Further, the first substrate 71 and the second substrate 72A are mechanically joined by the joining portion 260.

[0258] The connection pad 135A of the second substrate 72A is joined with the connection pad 136 of the third substrate 73 by, for example, Cu-Cu joining, thereby forming a joining portion 260A. Then, the readout circuit 230 of the second substrate 72A and the quench resistance portion 212 of the third substrate 73 are electrically connected via the joining portion 260A. Further, the second substrate 72A and the third substrate 73 are mechanically joined by the joining portion 260A. Further, the quench resistance portion 212 is electrically connected to the shield resistance portion 211 of the first substrate 71 via the joining portion 260 and the joining portion 260A.

[0259] The modified example 8 having the above-described configuration differs from the fourth embodiment in that the quench resistance portion 212 and the readout circuit 230 are formed in different substrates and connected by the joining portion 260A. However, the present embodiment is similar to the fourth embodiment in that the shield resistance portion 211 has a resistance value Rsh larger than a resistance value R of the SPAD 210, and the quench resistance portion 212 has a resistance value Rq larger than the resistance value Rsh of the shield resistance portion 211. ON

[0260] Further, a parasitic capacitance C2 is generated between the connection pad 135 and the readout circuit 230, and a parasitic capacitance C1 is generated at the cathode of the SPAD 210. The parasitic capacitance C2 is a combined capacitance of a capacitance generated by the joining portion 260, a capacitance generated by a wiring connecting the connection pad 135 and the connection pad 135A, and a capacitance generated by the readout circuit 230. Since a plurality of connection pads, wirings, and circuit elements are formed on the second substrate 72A, the capacitance of the parasitic capacitance C2 tends to be larger than the capacitance of the parasitic capacitance C1.

[0261] Therefore, also in the modified example 8, similarly to the fourth embodiment, it is possible to shorten the dead time and reduce the power consumption while reducing the input voltage of the readout circuit 230.

[0262] [Modified Example 9]

[0263] FIG. 19B ​is a block diagram showing Modification 9 of the pixel of the optical device according to the fourth embodiment. As shown in the figure, the pixel of Modification 9 includes the first substrate 71A, the second substrate 72B, and the third substrate 73A. The SPAD 210 is provided in the first substrate 71, the shield resistance part 211 is provided in the second substrate 72A, and the quenching resistance part 212 and the readout circuit 230 are provided in the third substrate 73A.

[0264] The first substrate 71A further includes a connection pad 125 on the upper surface of FIG. 19B In this modification, the upper surface of the connection pad 125 is flush with the upper surface of the first substrate 71A. The connection pad 125 is connected to the cathode of the SPAD 210.

[0265] The second substrate 72B includes a connection pad 135 in the lower surface of FIG. 19B In this modification, the lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72B. The connection pad 135 is connected to the shield resistance part 211 by, for example, a via hole or a wiring, or the like. Further, the second substrate 72B includes a connection pad 135A on the upper surface (a surface opposite to the lower surface). In this modification, the upper surface of the connection pad 135A is flush with the upper surface of the second substrate 72B.

[0266] The third substrate 73A includes a connection pad 136 in the lower surface of FIG. 19B In this modification, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73A. The connection pad 136 is connected to the quenching resistance part 212 and the readout circuit 230 by, for example, a via hole or a wiring, or the like.

[0267] Here, the connection pad 125 of the first substrate 71A is joined to the connection pad 135 of the second substrate 72B by, for example, Cu-Cu joining, thereby forming a joining part 260. Then, the SPAD 210 of the first substrate 71A and the shield resistance part 211 of the second substrate 72B are electrically connected via the joining part 260. Further, the first substrate 71A and the second substrate 72B are mechanically joined by the joining part 260.

[0268] The connection pad 135A of the second substrate 72B is joined to the connection pad 136 of the third substrate 73A by, for example, Cu-Cu joining, thereby forming a joining part 260A. Then, the shield resistance part 211 of the second substrate 72B and the quenching resistance part 212 and the readout circuit 230 of the third substrate 73A are electrically connected via the joining part 260A. Further, the second substrate 72B and the third substrate 73A are mechanically joined by the joining part 260A.

[0269] In Modification Example 9 having the above-described configuration, the SPAD 210, the shield resistance part 211, and the readout circuit 230 are formed in different substrates, and the SPAD 210 and the shield resistance part 211 are electrically connected via the bonding part 260, and the shield resistance part 211 and the quenching resistance part 212 and the readout circuit 230 are electrically connected via the bonding part 260A. Here, the present embodiment is similar to the fourth embodiment in that the shield resistance part 211 has a resistance value Rsh larger than a resistance value R ON of the SPAD 210, and the quenching resistance part 212 has a resistance value Rq larger than the resistance value Rsh of the shield resistance part 211.

[0270] Further, when comparing a parasitic capacitance C1 generated on the one end side of the shield resistance part 211 electrically connected to the SPAD 210 with a parasitic capacitance C2 generated on the opposite end side, the capacitance of the parasitic capacitance C2 becomes larger than the capacitance of the parasitic capacitance C1. This is because the parasitic capacitance C2 includes a capacitance generated by the shield resistance part 211, a capacitance generated by a wiring connecting the shield resistance part 211 and the connection pad 135A, a capacitance generated by the bonding part 260A, and a capacitance generated by a wiring connecting the connection pad 136, the quenching resistance part 212, and the readout circuit 230, whereas the parasitic capacitance C1 includes only a capacitance generated by the SPAD 210, a capacitance generated by a wiring connecting the SPAD 210 and the connection pad 125, and a capacitance generated by the bonding part 260.

[0271] Therefore, since the relationship of the capacitance of the parasitic capacitance C1 < the capacitance of the parasitic capacitance C2, the resistance value R ON < the resistance value Rsh and the resistance value Rsh < the resistance value Rq is satisfied, the same effects as those exhibited by the above-described embodiments (including Modification Examples) are also exhibited in Modification Example 9.

[0272] [Modification Example 10]

[0273] FIG. 19C is a block diagram showing Modification Example 10 of a pixel of an optical device according to the fourth embodiment. As shown in the drawing, the pixel of Modification Example 10 includes a first substrate 71, a second substrate 72C, and a third substrate 73B. The SPAD 210 and the shield resistance part 211 are provided in the first substrate 71, the quenching resistance part 212 is provided in the second substrate 72C, and the readout circuit 230 is provided in the third substrate 73B. The first substrate 71 of the present Modification Example has the same configuration as the first substrate 71 of the fourth embodiment and Modification Example 8 thereof.

[0274] The second substrate 72C has the same configuration as the second substrate 72B of the fourth embodiment and Modification Example 8 thereof. FIG. 19CThe lower surface of the second substrate 72C includes a connection pad 135A. In the present modification, the upper surface of the connection pad 135A is flush with the upper surface of the second substrate 72C. The connection pad 135 and the connection pad 135A are connected to each other by, for example, a via hole or a wiring, and the like. Further, the connection pad 135 and the connection pad 135A are electrically connected to the quenching resistance part 212.

[0275] The third substrate 73B includes a connection pad 136 in the lower surface thereof. In the present modification, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73B. The connection pad 136 is connected to the readout circuit 230 by, for example, a via hole or a wiring, and the like. FIG. 19C

[0276] Here, the connection pad 125 of the first substrate 71 is joined to the connection pad 135 of the second substrate 72C by, for example, Cu-Cu joining, thereby forming a joining part 260. Then, the shielding resistance part 211 of the first substrate 71 and the quenching resistance part 212 of the second substrate 72C are electrically connected via the joining part 260. Further, the first substrate 71 and the second substrate 72C are mechanically joined by the joining part 260.

[0277] The connection pad 135A of the second substrate 72C is joined to the connection pad 136 of the third substrate 73B by, for example, Cu-Cu joining, thereby forming a joining part 260A. Then, the quenching resistance part 212 of the second substrate 72C and the readout circuit 230 of the third substrate 73B are electrically connected via the joining part 260A. Further, the second substrate 72C and the third substrate 73B are mechanically joined by the joining part 260A.

[0278] In the modification 10 having the above-described configuration, the SPAD 210, the quenching resistance part 212, and the readout circuit 230 are formed in different substrates, the shielding resistance part 211 and the quenching resistance part 212 are electrically connected via the joining part 260, and the quenching resistance part 212 and the readout circuit 230 are electrically connected via the joining part 260A. Here, the present embodiment is similar to the fourth embodiment in that the shielding resistance part 211 has a resistance value Rsh larger than the resistance value R of the SPAD 210, and the quenching resistance part 212 has a resistance value Rq larger than the resistance value Rsh of the shielding resistance part 211. ON

[0279] ​​Further, a parasitic capacitance C2 is generated between the connection pad 135 and the readout circuit 230, and a parasitic capacitance C1 is generated at the cathode of the SPAD 210. The parasitic capacitance C2 can include not only a capacitance generated by the bonding portion 260, a capacitance generated by a wiring connecting the connection pad 135 and the connection pad 135A, and a capacitance generated by the quenching resistance portion 212, but also a capacitance generated by the bonding portion 260A and a capacitance generated by the readout circuit 230. On the other hand, the parasitic capacitance C1 includes only a capacitance generated by the SPAD 210, a capacitance generated by a wiring connecting the SPAD 210 and the shielding resistance portion 211, and the like. Therefore, the parasitic capacitance C2 is larger than the parasitic capacitance C1.

[0280] Therefore, also in Modification 10, similarly to the fourth embodiment, it is possible to shorten the dead time and reduce the power consumption while reducing the input voltage of the readout circuit 230.

[0281] Note that, in Modifications 8 to 10 of the fourth embodiment, the bonding of the connection pads by Cu-Cu bonding has been exemplified, but the connection pads can also be connected to each other by metal pads. Further, the specific examples of the shielding resistance portion described with reference to FIG. 7A and FIG. 7B the specific examples of the quenching resistance portion described with reference to FIG. 8A to FIG. 8C the specific examples of the readout circuit described with reference to FIG. 9A to FIG. 9C may also be appropriately applied to the fourth embodiment (including Modifications).

[0282] <Application Example 1>

[0283] For example, the optical device according to the embodiment of the present application described above can be applied to various electronic devices such as an imaging device (such as a digital camera or a digital video camera, and the like), a mobile phone having an imaging function, or other devices having an imaging function, and the like.

[0284] FIG. 20 is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied. FIG. 20 The imaging device 201 shown includes an optical system 202, a shutter device 203, the optical device 100, a drive circuit 205, a signal processing circuit 206, a monitor 207, and a memory 208, and can capture still images and moving images.

[0285] The optical system 202 includes one or more lenses that guide light (incident light) from a subject to the optical device 100, and forms an image on a light-receiving surface of the optical device 100.

[0286] The shutter device 203 is arranged between the optical system 202 and the optical device 100, and controls a light irradiation period and a light shielding period of the optical device 100 in accordance with the control of the drive circuit 205.

[0287] The drive circuit 205 outputs a drive signal for controlling the transfer operation of the optical device 100 and the shutter operation of the shutter device 203, to drive the optical device 100 and the shutter device 203.

[0288] The optical device 100 includes a light-receiving element (pixel) according to each of the above-described embodiments (including modifications). For an application to an image pickup apparatus, the optical device 100 includes a digital counter circuit 240 at the output end of the readout circuit 230. FIG. 4B Under the control of the drive circuit 205, the optical device 100 counts the number of photons for each pixel by the digital counter circuit 240 in accordance with light formed on the light-receiving surface by the optical system 202 and the shutter device 203 during a predetermined exposure time period. The count value is converted into a luminance signal, and the luminance signal is transferred to the column circuit 310 through the bit line BL in accordance with a selection signal of the word line WL supplied to each pixel from the row scanning circuit 320 FIG. 4A ) under the control of the drive circuit 205. The column circuit 310 converts the luminance signal from each pixel into a digital signal, and outputs the converted digital signal to the signal processing circuit 206 through the interface circuit 330.

[0289] The signal processing circuit 206 performs various signal processing on the digital signal output from the optical device 100. An image (image data) obtained by the signal processing by the signal processing circuit 206 is supplied to and displayed on the monitor 207, or is supplied to and stored (recorded) in the memory 208.

[0290] In the image pickup apparatus 201 configured as described above, since the optical device 100 includes a light-receiving element according to each of the above-described embodiments (including modifications), the image pickup apparatus 201 also can exhibit the effects of shortening of dead time and reduction of power consumption. Note that a color filter can be provided on the light-receiving surface of the optical device 100. In the color filter, a red filter that transmits red wavelength region light, a green filter that transmits green wavelength region light, and a blue filter that transmits blue wavelength region light are formed corresponding to the light-receiving elements (pixels) of the optical device 100. For example, as the color filter, a Bayer filter is exemplified. By using such a color filter, the image pickup apparatus 201 can be configured as an image pickup apparatus capable of acquiring a color image.

[0291] <Application Example 2>

[0292] Next, a distance measuring device that performs distance measurement by a direct ToF method will be described as an electronic device to which the present technology is applied. FIG. 21 is a block diagram showing a configuration example of a distance measuring device 600 as an electronic device to which the present technology is applied. As shown in the drawing, the distance measuring device 600 includes an optical device 100A, a light source unit 602, a storage unit 603, a control unit 604, and an optical system 605.

[0293] The light source unit 602 can be, for example, a vertical cavity surface emitting laser (VCSEL) array that emits laser light as a surface light source. However, the present application is not limited to this, and the light source unit 602 can be a laser diode array in which laser diodes are arranged in a line. In this case, the laser diode array is supported by a predetermined drive unit (not shown) and is scanned in a direction perpendicular to the arrangement direction of the laser diodes. Further, the light source unit 602 can be a single laser diode. In this case, the single laser diode is supported by a predetermined drive unit (not shown) and is scanned in the horizontal direction and the vertical direction.

[0294] In the example of the distance measuring device 600, FIG. 22 the optical device 100A includes the pixel (light receiving element) 200 of the first embodiment. However, the optical device 100A can include a pixel (light receiving element) according to other embodiments (including modified examples). In the case of being applied to a distance measuring device, as shown in FIG. 22 the optical device 100A includes, instead of the above-described digital counter circuit 240, a TDC circuit 241, a generation unit 242, and a signal processing unit 243 that are connected in series to the output end of the readout circuit 230. FIG. 4B The functions of the TDC circuit 241, the generation unit 242, and the signal processing unit 243 will be described later.

[0295] The signal processing unit 243 performs predetermined arithmetic processing based on the data of the histogram (described later) generated by the generation unit 242, and calculates, for example, distance information. For example, the signal processing unit 243 creates a curve approximation of the histogram based on the data of the histogram generated by the generation unit 242. The signal processing unit 243 can detect a peak value of the curve approximated by the histogram and obtain a distance D based on the detected peak value.

[0296] The storage unit 603 FIG. 21 includes, for example, a flash memory, a DRAM, or an SRAM, and stores data and the like input from the optical device 100A.

[0297] The control unit 604 controls the entire operation of the distance measuring device 600. For example, the control unit 604 supplies a predetermined reference signal having a predetermined frequency to the optical device 100A and the light source unit 602. For example, the light source unit 602 emits pulsed light based on the reference signal supplied from the control unit 604. For example, the optical device 100A obtains a time difference between a light emission timing and a light reception timing based on the above-described reference signal and an output signal output from the readout circuit 230. Further, for example, the control unit 604 sets a mode at the time of distance measurement to the optical device 100A in response to an instruction from the outside.

[0298] The optical system 605 guides light incident from the outside to the light reception surface of the optical device 100A.

[0299] Next, with reference to FIG. 23 , as an example of distance measurement by the distance measuring device 600, a case where the distance D from the distance measuring device 600 to the measurement object 303 is measured using the distance measuring device 600 will be described as an example of distance measurement by the direct ToF method. The time at which the light source unit 602 emits light is defined as a light emission timing t0, and the time at which the optical device 100A receives reflected light obtained by reflecting the light emitted from the light source unit 602 by the measurement object 303 is defined as a light reception timing t1. At this time, the distance D between the distance measuring device 600 and the measurement object 303 can be calculated by the following formula (1).

[0300] D = (c / 2) x (t1-t0)... (1)

[0301] Here, the constant c is the speed of light (2.9979 x 10 8 [m / sec]).

[0302] Incidentally, in the optical device 100A, when light (photons) is incident on the pixel 200, an output signal is output from the readout circuit 230 even if the light is light other than reflected light from the measurement object 303 (for example, ambient light), and the light reception timing is calculated by the TDC circuit 241 as described later. That is, the light reception timing t1 calculated based on the reflected light from the measurement object 303 and the light reception timing calculated based on light other than the reflected light cannot be distinguished.

[0303] Therefore, in the distance measuring device 600, light is repeatedly emitted from the light source unit 602 (for example, several hundred to several ten thousand times), and a histogram relating to the difference between the light emission timing and the light reception timing is created. FIG. 24is a graph showing an example of a histogram created in this way. As shown in the graph, the number of light reception timings 301 is shown for each of the intervals #0, #1, #2,..., # (N-2), and # (N-1) having a predetermined unit time d. Here, the interval #0 is a range of time d from the light emission timing t0, and the interval #1 is a range of time d from the time point at which the light emission timing t0 has elapsed by time d. Note that, in the graph, the time period from the light emission timing t0 to t ep corresponds to the exposure time of the optical device 100A.

[0304] Referring to FIG. 24 As shown by the curve 312, there is an interval in which the number of light reception timings is outstanding compared with adjacent intervals (hereinafter, referred to as the interval 312 for convenience) compared with the range 311 shown by the dotted line. While random ambient light and the like is received, light emitted from the light source unit 602 and reflected by the measurement object 303 is received after the light has traveled a distance of 2 x D, so it occurs when a certain range of time has elapsed, although including an error. Therefore, the light reception timing t1 corresponding to the reflected light from the measurement object 303 is considered to be included in the interval 312. Therefore, for example, as shown in the graph, the end time point of the interval in which the largest number of light reception timings in the interval 312 can be set as the light reception timing t1 based on the reflected light from the measurement object 303. The present application is not limited to this, and the start time point or the center time point of the interval in which the largest number of light reception timings is recorded can be set as the light reception timing t1. Furthermore, in the interval 312, an approximation curve of the light emission timing number can be obtained, and the light emission timing t1 can be obtained based on the peak value thereof.

[0305] As described above, the light reception timing t1 of the reflected light from the measurement object 303 can be obtained, and the distance D to the measurement object 303 can be calculated by Expression (1).

[0306] In the case where the above-described distance measurement is performed by the direct ToF method in the optical device 100A, the light reception timing is obtained by the TDC circuit 241. That is, the TDC circuit 241 generates a time difference signal indicating a time difference between a reference signal input from the control unit 604 and an output signal from the readout circuit 230. The reference signal from the control unit 604 is also input to the light source unit 602, and the light source unit 602 emits pulsed light based on the reference signal. Therefore, from the time difference signal generated in the TDC circuit 241, the light reception timing can be obtained with the light emission timing t0 at which the light source unit 602 emits pulsed light as a reference.

[0307] The light emission by the light source unit 602 based on the reference signal and the light reception by the SPAD 210 are repeatedly performed, and each time a histogram relating to the difference between the light emission timing and the light reception timing obtained by the TDC circuit 241 is generated by the generation unit 242. Based on the histogram created by the generation unit 242, the signal processing unit 243 determines the light reception timing tl and calculates the distance D.

[0308] Also in the distance measuring device 600 configured as described above, since the optical device 100A includes the light receiving element according to the respective embodiments described above (including modifications), the distance measuring device 600 is also able to exhibit the effects of shortening of dead time and reduction of power consumption.

[0309] <Application Example 3>

[0310] The technology according to the present application (the present technology) can be applied to various products. For example, the technology according to the present application can be applied to an endoscopic surgery system.

[0311] FIG. 25 is a block diagram showing an example of a schematic configuration of a patient in-vivo information acquisition system using a capsule endoscope to which the technology according to the present application (the present technology) can be applied.

[0312] The in-vivo information acquisition system 10001 includes a capsule endoscope 10100 and an external control device 10200.

[0313] At the time of examination, the patient swallows the capsule endoscope 10100. The capsule endoscope 10100 has an imaging function and a wireless communication function, and while moving inside an organ such as a stomach and an intestine by peristaltic movement or the like until it is naturally excreted by the patient, sequentially takes images of the inside of the organ (hereinafter referred to as in-vivo images) at predetermined intervals, and sequentially wirelessly transmits information on the in-vivo images to the external control device 10200 outside the body.

[0314] The external control device 10200 integrally controls the operation of the in-vivo information acquisition system 10001. Furthermore, the external control device 10200 receives the information on the in-vivo images transmitted from the capsule endoscope 10100 and generates image data for displaying the in-vivo images on a display device (not shown) based on the received information on the in-vivo images.

[0315] In the in-vivo information acquisition system 10001, in this way, the in-vivo images obtained by imaging the state inside the patient's body can be obtained at any time from when the capsule endoscope 10100 is swallowed until it is excreted.

[0316] The configurations and functions of the capsule endoscope 10100 and the external control device 10200 will be described in more detail.

[0317] The capsule endoscope 10100 includes a capsule-shaped casing 10101, and in the casing 10101, a light source unit 10111, an imaging unit 10112, an image processing unit 10113, a wireless communication unit 10114, a power feeding unit 10115, a power supply unit 10116, and a control unit 10117 are housed.

[0318] The light source unit 10111 includes, for example, a light source such as a light emitting diode (LED), and irradiates the imaging field of view of the imaging unit 10112 with light.

[0319] The imaging unit 10112 includes an imaging element and an optical system. The optical system includes a plurality of lenses disposed in front of the imaging element. Reflected light of light (hereinafter, referred to as observation light) irradiated onto a body tissue as an observation target is converged by the optical system and is incident on the imaging element. In the imaging unit 10112, the observation light incident on the imaging element is photoelectrically converted, and an image signal corresponding to the observation light is generated. The image signal generated by the imaging unit 10112 is supplied to the image processing unit 10113.

[0320] The image processing unit 10113 includes a processor such as a central processing unit (CPU) or a graphics processing unit (GPU), and performs various signal processing on the image signal generated by the imaging unit 10112. The image processing unit 10113 supplies the image signal on which the signal processing has been performed as RAW data to the wireless communication unit 10114.

[0321] The wireless communication unit 10114 performs predetermined processing such as modulation processing on the image signal on which the signal processing has been performed by the image processing unit 10113, and transmits the image signal to the external control device 10200 through an antenna 10114A. Further, the wireless communication unit 10114 receives a control signal related to the drive control of the capsule endoscope 10100 from the external control device 10200 through the antenna 10114A. The wireless communication unit 10114 supplies the control signal received from the external control device 10200 to the control unit 10117.

[0322] The power feeding unit 10115 includes an antenna coil for receiving electric power, a power regeneration circuit that regenerates electric power from the electric current generated in the antenna coil, and a step-up circuit, and the like. In the power feeding unit 10115, electric power is generated using a so-called non-contact charging principle.

[0323] The power supply unit 10116 includes a secondary battery, and stores the electric power generated by the power feeding unit 10115. In the power supply unit 10116, the electric power stored in the secondary battery is supplied to the control unit 10117, the image processing unit 10113, the wireless communication unit 10114, and the like. FIG. 25In the present embodiment, in order to avoid the drawing becoming complicated, the illustration of an arrow or the like indicating the supply destination of the electric power from the power supply unit 10116 is omitted, but the electric power stored in the power supply unit 10116 is supplied to the light source unit 10111, the imaging unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the control unit 10117, and can be used for driving these units.

[0324] The control unit 10117 includes a processor such as a CPU, and appropriately controls the driving of the light source unit 10111, the imaging unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the power supply unit 10115 in accordance with a control signal transmitted from the external control device 10200.

[0325] The external control device 10200 includes a processor such as a CPU or a GPU, or a microcomputer or a control board on which a processor and a storage element such as a memory are installed in a hybrid manner. The external control device 10200 controls the operation of the capsule endoscope 10100 by transmitting a control signal to the control unit 10117 of the capsule endoscope 10100 via an antenna 10200A. In the capsule endoscope 10100, for example, the control signal from the external control device 10200 can change the light irradiation conditions of the observation target by the light source unit 10111. In addition, the imaging conditions (for example, the frame rate and the exposure value of the imaging unit 10112, and the like) can be changed by the control signal from the external control device 10200. Furthermore, the content of the processing of the image processing unit 10113 and the conditions (for example, the transmission interval and the number of images to be transmitted, and the like) of the image signal transmission by the wireless communication unit 10114 can be changed by the control signal from the external control device 10200.

[0326] In addition, the external control device 10200 performs various image processing on the image signal transmitted from the capsule endoscope 10100, and generates image data for displaying the captured in-vivo image on a display device. As the image processing, for example, various signal processing such as development processing (demosaicing processing), image quality improvement processing (bandwidth enhancement processing, super-resolution processing, noise reduction (NR) processing, and / or camera shake correction processing, and the like), and / or enlargement processing (electronic zoom processing), and the like can be performed. The external control device 10200 controls the driving of the display device to display the captured in-vivo image on the basis of the generated image data. Alternatively, the external control device 10200 can record the generated image data in a recording device (not shown) or print it out by a printing device (not shown).

[0327] The above has explained an example of an in-vivo information acquisition system to which the technology according to the present application can be applied. The technology according to the present application can be applied to the imaging unit 10112 in the above-described configuration. Specifically, the optical device according to each of the above-described embodiments can be used as the imaging unit 10112. According to the above-described optical device, it is possible to shorten the dead time of the SPAD 210 (or 210A). Therefore, if the optical device is used as the imaging unit 10112, it is possible to appropriately set the imaging interval of the capsule endoscope 10100. That is, when imaging is performed by the capsule endoscope 10100, it is possible to reduce the possibility that the SPAD 210 (or 210A) is in the dead time. Further, since it is possible to reduce the power consumption of the SPAD 210, the optical device 100 or the like can be reliably operated from when the patient swallows the capsule endoscope 10100 until the capsule endoscope 10100 is naturally excreted.

[0328] Note that, although a patient in-vivo information acquisition system using a capsule endoscope has been explained here, the technology according to the present application can be applied to, for example, an endoscopic surgery system. Hereinafter, a case in which the technology of the present application is applied to an endoscopic surgery system will be explained.

[0329] <Application Example 4>

[0330] FIG. 26 is a drawing showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present application (the present technology) can be applied.

[0331] In FIG. 26 , a state in which a surgeon (doctor) 11131 is performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000 is shown. As shown in the drawing, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 such as a gas tube 11111 and an energy device 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are installed.

[0332] The endoscope 11100 includes a barrel 11101 having a region of a predetermined length from a distal end thereof that is inserted into a body lumen of the patient 11132, and an imaging head 11102 connected to a proximal end of the barrel 11101. In the example shown, the endoscope 11100 is shown as including a rigid endoscope having a rigid barrel 11101. However, the endoscope 11100 can additionally include a flexible endoscope having a flexible barrel.

[0333] The distal end of the barrel 11101 has an opening portion in which the objective lens is embedded. The light source device 11203 is connected to the endoscope 11100 so that light generated by the light source device 11203 is guided to the distal end of the barrel by a light guide extending inside the barrel 11101 and is irradiated toward an observation target in the body cavity of the patient 11132 through the objective lens. Note that the endoscope 11100 can be a forward-viewing endoscope, or can be an oblique-viewing endoscope or a side-viewing endoscope.

[0334] An optical system and an image pickup element are provided inside the camera head 11102 so that reflected light (observation light) from the observation target is converged on the image pickup element by the optical system. The image pickup element photoelectrically converts the observation light to generate an electric signal corresponding to the observation light, that is, an image signal corresponding to an observation image. This image signal is sent to the camera control unit (CCU) 11201 as RAW data.

[0335] The CCU 11201 includes a central processing unit (CPU) or a graphics processing unit (GPU) or the like, and integrally controls the operation of the endoscope 11100 and the display device 11202. Further, the CCU 11201 receives the image signal from the camera head 11102, and performs various image processing such as development processing (demosaicing processing) or the like on the image signal for displaying an image based on the image signal.

[0336] The display device 11202 displays thereon an image based on the image signal on which the image processing has been performed by the CCU 11201 under the control of the CCU 11201.

[0337] The light source device 11203 includes a light source such as a light emitting diode (LED) or the like, for example, and supplies irradiation light at the time of image pickup of a surgical site or the like to the endoscope 11100.

[0338] The input device 11204 is an input interface for the endoscopic surgery system 11000. The user can perform input of various information or instructions to the endoscopic surgery system 11000 through the input device 11204. For example, the user inputs an instruction or the like to change the image pickup conditions (type of irradiation light, magnification, or focal distance, or the like) of the endoscope 11100.

[0339] The treatment tool control device 11205 controls the driving of the energy device 11112 for cauterizing or incising tissue, or closing a blood vessel, and the like. In order to secure the field of view of the endoscope 11100 and to secure the work space of the surgeon, the pneumoperitoneum device 11206 sends gas into the body cavity of the patient 11132 through the pneumoperitoneum tube 11111 to inflate the body cavity. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various forms such as text, images, or graphics.

[0340] Note that the light source device 11203 that supplies irradiation light at the time of imaging the surgical site to the endoscope 11100 can include a white light source including, for example, an LED, a laser light source, or a combination thereof. In the case where the white light source includes a combination of red, green, and blue (RGB) laser light sources, because the output intensity and the output timing of various colors (wavelengths) can be controlled with high precision, the light source device 11203 can perform white balance adjustment of the captured image. Further, in this case, if laser beams from each of the RGB laser light sources are irradiated onto the observation target in a time-division manner, and the driving of the imaging element of the camera head 11102 is controlled in synchronization with the irradiation timing, images corresponding to R, G, and B each can also be captured in a time-division manner. According to this method, even if a color filter is not provided for the imaging element, a color image can be obtained.

[0341] Further, the light source device 11203 can be controlled so that the intensity of light to be output varies at each predetermined time. By controlling the driving of the imaging element of the camera head 11102 in synchronization with the timing of the variation of the light intensity so as to acquire images in a time-division manner and to synthesize the images, a high dynamic range image that has no blocked-up shadows of underexposure and no highlights of overexposure can be produced.

[0342] Further, the light source device 11203 can be configured to supply light of a predetermined wavelength band prepared for special light observation. In the special light observation, for example, by irradiating narrow-band light compared to the irradiation light at the time of ordinary observation (i.e., white light) by utilizing the wavelength dependency of light absorption in the body tissue, narrow-band observation that images a predetermined tissue such as a blood vessel of a mucosal surface layer at high contrast can be performed. Alternatively, in the special light observation, fluorescence observation for obtaining an image from fluorescence generated by irradiation of excitation light can be performed. In the fluorescence observation, observation of fluorescence from a body tissue (autofluorescence observation) can be performed by irradiating excitation light onto the body tissue, or a fluorescence image can be obtained by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating excitation light corresponding to the fluorescence wavelength of the reagent onto the body tissue. The light source device 11203 can be configured to supply such narrow-band light and / or excitation light suitable for the special light observation as described above.

[0343] FIG. 27 is a block diagram illustrating an example of a functional configuration of the camera head 11102 and the CCU 11201. FIG. 26

[0344] The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are communicably connected to each other by a transmission cable 11400.

[0345] The lens unit 11401 is an optical system provided at a connection position with the barrel 11101. The observation light taken in from the distal end of the barrel 11101 is guided to the camera head 11102 and introduced into the lens unit 11401. The lens unit 11401 includes a combination of a plurality of lenses including a zoom lens and a focus lens.

[0346] ​The imaging unit 11402 includes an imaging element. The number of imaging elements included in the imaging unit 11402 can be one (single board type) or a plurality (multi board type). For example, in a case where the imaging unit 11402 is configured as a multi board type imaging unit, image signals corresponding to each of R, G, and B are generated by the imaging elements, and the image signals can be synthesized to obtain a color image. The imaging unit 11402 can also be configured to have a pair of imaging elements to acquire a right-eye image signal and a left-eye image signal prepared for three-dimensional (3D) display, respectively. If 3D display is performed, the surgeon 11131 can more accurately understand the depth of living tissue in a surgical site. Note that, in a case where the imaging unit 11402 is configured as a stereo type imaging unit, a plurality of system lens units 11401 are provided corresponding to each imaging element.

[0347] Further, the imaging unit 11402 need not be provided on the camera head 11102. For example, the imaging unit 11402 can be provided inside the lens barrel 11101 immediately behind the objective lens.

[0348] The drive unit 11403 includes an actuator, and under the control of the camera head control unit 11405, moves the zoom lens and the focus lens of the lens unit 11401 along the optical axis by a predetermined distance. Thus, the magnification and the focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0349] The communication unit 11404 includes a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the imaging unit 11402 to the CCU 11201 as RAW data through the transmission cable 11400.

[0350] Further, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201, and supplies the control signal to the camera head control unit 11405. The control signal includes, for example, information related to the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and the focus of the captured image, and the like.

[0351] Note that the imaging conditions such as the frame rate, the exposure value, the magnification, or the focus can be specified by the user or can be automatically set by the control unit 11413 of the CCU 11201 based on the obtained image signal. In the latter case, an automatic exposure (AE) function, an automatic focus (AF) function, and an automatic white balance (AWB) function are incorporated in the endoscope 11100.

[0352] The camera control unit 11405 controls driving of the camera 11102 on the basis of a control signal from the CCU 11201 received through the communication unit 11404.

[0353] The communication unit 11411 includes a communication device for transmitting and receiving various information to and from the camera 11102. The communication unit 11411 receives an image signal transmitted from the camera 11102 through the transmission cable 11400.

[0354] Further, the communication unit 11411 transmits a control signal for controlling driving of the camera 11102 to the camera 11102. The image signal and the control signal can be transmitted through electric communication or optical communication, or the like.

[0355] The image processing unit 11412 performs various image processing on an image signal in the form of RAW data transmitted from the camera 11102.

[0356] The control unit 11413 performs various controls related to imaging of a surgical site or the like by the endoscope 11100 and display of an imaged image obtained by imaging of the surgical site or the like. For example, the control unit 11413 generates a control signal for controlling driving of the camera 11102.

[0357] Further, the control unit 11413 causes the display device 11202 to display an image imaged by imaging of the surgical site or the like on the basis of an image signal on which image processing has been performed by the image processing unit 11412. Therefore, the control unit 11413 can recognize various objects in the imaged image using various image recognition techniques. For example, the control unit 11413 can recognize a surgical tool such as forceps or the like, a specific living body site, bleeding, and mist when the energy device 11112 is used, or the like by detecting a shape and a color or the like of an edge of an object included in the imaged image. When the control unit 11413 causes the display device 11202 to display the imaged image, the control unit 11413 can cause various surgical support information to be displayed in a manner of superimposing on the image of the surgical site using the recognition result. When the surgical support information is displayed in a superimposed manner and presented to the surgeon 11131, the burden of the surgeon 11131 can be reduced, and the surgeon 11131 can positively perform surgery.

[0358] The transmission cable 11400 connecting the camera 11102 and the CCU 11201 to each other is an electric signal cable prepared for electric signal communication, an optical fiber prepared for optical communication, or a composite cable prepared for both electric communication and optical communication.

[0359] Here, although in the example shown, communication is carried out via wired communication using transmission cable 11400, communication between camera 11102 and CCU 11201 can also be carried out via wireless communication.

[0360] Examples of endoscopic surgical systems to which the technology according to the present invention can be applied have been described above. The technology according to the present invention can be applied to the imaging unit 11402 of the camera 11102 in the above-described configuration. Specifically, the optical device according to the various embodiments described above can be used as the imaging unit 11402. According to the optical device described above, dead time can be shortened and power can be saved. Therefore, endoscopic surgical systems using optical devices also exhibit similar effects.

[0361] <Application Example 5>

[0362] The technology according to the present invention (the technology) can be applied to a variety of products. For example, the technology according to the present invention can be implemented as a device (or system) installed on any type of mobile body such as automobiles, electric vehicles, hybrid vehicles, motorcycles, bicycles, personal mobile devices, airplanes, drones, ships, and robots.

[0363] FIG. 28 This is a block diagram illustrating a schematic construction example of a vehicle control system, which is an example of a mobile body control system to which the technology according to the present invention can be applied.

[0364] The vehicle control system 12000 includes multiple electronic control units interconnected via a communication network 12001. FIG. 28 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. Furthermore, as part of the functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown.

[0365] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 is used as a control device for devices such as an internal combustion engine or drive motor for generating drive force for the vehicle, a drive force transmission mechanism for transmitting drive force to the wheels, a steering mechanism for adjusting the vehicle's steering angle, and a braking device for generating vehicle braking force.

[0366] The body system control unit 12020 electrically connected to the above-mentioned devices via the bus 12013 controls the operation of various devices provided to the vehicle body in accordance with various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, a backup lamp, a brake lamp, a turn signal lamp, a fog lamp, or the like. In this case, radio waves transmitted from a mobile device that substitutes for a key or signals of various switches can be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls a door lock device, a power window device, or a vehicle lamp of the vehicle, and the like.

[0367] The outside -vehicle information detecting unit 12030 detects information on the outside of the vehicle including the vehicle control system 12000. For example, the outside-vehicle information detecting unit 12030 is connected to an imaging section 12031. The outside-vehicle information detecting unit 12030 causes the imaging section 12031 to image an image of the outside of the vehicle and receives the imaged image. Based on the received image, the outside-vehicle information detecting unit 12030 can perform a detection process of an object such as a person, a vehicle, an obstacle, a sign, or a character on a road surface, or a detection process of a distance to the above-mentioned object.

[0368] The imaging section 12031 is an optical sensor that receives light and outputs an electric signal corresponding to the amount of light of the received light. The imaging section 12031 can output the electric signal as an image or can output the electric signal as ranging information. Further, the light received by the imaging section 12031 can be visible light or can be invisible light such as infrared rays.

[0369] The in-vehicle information detecting unit 12040 detects information on the inside of the vehicle. The in-vehicle information detecting unit 12040 is connected to, for example, a driver state detecting section 12041 that detects a state of a driver. The driver state detecting section 12041 includes, for example, a camera that images the driver. Based on detection information input from the driver state detecting section 12041, the in-vehicle information detecting unit 12040 can calculate a degree of fatigue of the driver or a degree of concentration of the driver, or can determine whether or not the driver is dozing off.

[0370] The microcomputer 12051 can calculate a control target value of a driving force generating device, a steering mechanism, or a braking device based on information on the inside or outside of the vehicle acquired by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040 and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing functions of an advanced driver assistance system (ADAS) including collision avoidance or impact mitigation of the vehicle, follow-up driving based on an inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, or vehicle lane departure warning, and the like.

[0371] Further, the microcomputer 12051 is capable of performing cooperative control intended for realization of automated driving and the like, which enables the vehicle to travel autonomously without depending on the operation of the driver, by controlling the driving force generation device, the steering mechanism, or the brake device and the like based on the information about the outside or inside of the vehicle acquired by the outside information detection unit 12030 or the in-vehicle information detection unit 12040.

[0372] Further, based on the information about the outside of the vehicle acquired by the outside information detection unit 12030, the microcomputer 12051 can output a control command to the body system control unit 12020. For example, the microcomputer 12051 can perform cooperative control intended for prevention of glare by controlling the headlamp to change from high beam to low beam, for example, in accordance with the position of the preceding vehicle or oncoming vehicle detected by the outside information detection unit 12030.

[0373] The sound image output section 12052 transmits an output signal of at least one of a sound and an image to an output device capable of visually or aurally notifying information to the passenger of the vehicle or outside of the vehicle. In FIG. 28 In the example, as the output device, an audio speaker 12061, a display section 12062, and an instrument panel 12063 are shown. The display section 12062 can include at least one of a vehicle-mounted display and a head-up display, for example.

[0374] FIG. 29 is a view showing an example of a mounting position of the imaging section 12031.

[0375] In FIG. 29 , the imaging section 12031 includes imaging sections 12101, 12102, 12103, 12104, and 12105.

[0376] The imaging sections 12101, 12102, 12103, 12104, and 12105 are provided at positions on the front nose, the side mirror, the rear bumper, and the rear door of the vehicle 12100 and a position on the upper portion of the windshield, for example. The imaging section 12101 provided on the front nose and the imaging section 12105 provided on the upper portion of the windshield mainly acquire images of the front of the vehicle 12100. The imaging sections 12102 and 12103 provided on the side mirror mainly acquire images of both sides of the vehicle 12100. The imaging section 12104 provided on the rear bumper or the rear door mainly acquires images of the rear of the vehicle 12100. The imaging section 12105 provided on the upper portion of the windshield is mainly used for detection of a preceding vehicle, a pedestrian, an obstacle, a signal lamp, a traffic sign, or a lane, and the like.

[0377] Incidentally, FIG. 29Examples of the imaging ranges of the imaging sections 12101 to 12104 are shown. The imaging range 12111 indicates the imaging range of the imaging section 12101 provided at the front nose. The imaging ranges 12112 and 12113 respectively indicate the imaging ranges of the imaging section 12102 and the imaging section 12103 provided at the side mirrors. The imaging range 12114 indicates the imaging range of the imaging section 12104 provided at the rear bumper or the rear door. For example, by superimposing the image data imaged by the imaging sections 12101 to 12104, a bird's-eye image of the vehicle 12100 viewed from above can be obtained.

[0378] At least one of the imaging sections 12101 to 12104 can have a function of acquiring distance information. For example, at least one of the imaging sections 12101 to 12104 can be a stereo camera composed of a plurality of imaging elements, or can be an imaging element having pixels for phase difference detection.

[0379] For example, based on the distance information acquired from the imaging sections 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the temporal change (relative speed with respect to the vehicle 12100) of the distance, and thereby particularly extract, as a preceding vehicle, a nearest three-dimensional object that is on the travel path of the vehicle 12100 and travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or greater than 0 km / h). Further, the microcomputer 12051 can set in advance the inter-vehicle distance to be maintained in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control), automatic acceleration control (including follow-up start control), or the like. Thus, cooperative control aimed at autonomous driving of the vehicle independently of the operation of the driver, or the like, can be performed.

[0380] For example, based on distance information acquired from the imaging sections 12101 to 12104, the microcomputer 12501 can classify three-dimensional object data on a three-dimensional object into three-dimensional object data of a two-wheeled vehicle, a standard vehicle, a large vehicle, a pedestrian, and other three-dimensional objects such as a utility pole, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of obstacles. For example, the microcomputer 12051 classifies obstacles around the vehicle 12100 into obstacles that can be visually recognized by the driver of the vehicle 12100 and obstacles that are difficult for the driver of the vehicle 12100 to visually recognize. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a case where the collision risk is equal to or higher than a set value and thus there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display section 12062 and performs forced deceleration or evasive steering by the drive system control unit 12010. The microcomputer 12051 can thereby assist driving to avoid collision.

[0381] At least one of the imaging sections 12101 to 12104 can be an infrared camera that detects infrared rays. The microcomputer 12051 can recognize a pedestrian, for example, by determining whether a pedestrian is present in an image imaged by the imaging sections 12101 to 12104. Such recognition of a pedestrian is performed, for example, by a step of extracting feature points in an image imaged by the imaging sections 12101 to 12104 as infrared cameras and a step of performing pattern matching processing on a series of feature points representing the outline of an object to determine whether it is a pedestrian. If the microcomputer 12051 determines that a pedestrian is present in an image imaged by the imaging sections 12101 to 12104 and thus recognizes the pedestrian, the sound image output section 12052 controls the display section 12062 to display a square outline for emphasis superimposed on the recognized pedestrian. Further, the sound image output section 12052 can also control the display section 12062 to display an icon or the like representing the pedestrian at a desired position.

[0382] The above has described an example of a vehicle control system to which the technology according to the present application can be applied. The technology according to the present application can be applied to the imaging sections 12101 to 12104 in the above-described configuration. Specifically, the imaging elements according to the above-described respective embodiments (including modifications) can be applied to the imaging sections 12101 to 12104. For example, by applying the technology according to the present application to the imaging sections 12101 to 12104, a pedestrian can be recognized from weak light from the pedestrian even at night or in a dark place. Further, the effect of reducing power consumption according to the technology of the present application is particularly useful in a vehicle that includes a drive motor as a drive force generation device for generating vehicle driving force.

[0383] Note that, in the above description, various effects exhibited by the light-receiving element, the optical device including the light-receiving element, and the electronic device including the optical device according to the embodiments of the present application are described, but the effects are not limiting on the present application. Further, it is not necessary to exhibit all of the various effects. Further, the light-receiving element, the optical device, and the electronic device of the present application can exhibit additional effects not described herein.

[0384] Note that, the present technology can have the following configuration. (1)

[0386] A light-receiving element including:

[0387] a photon response multiplication section including a charge multiplication region capable of multiplying a charge generated in response to the incidence of a photon;

[0388] a first resistance section connected at one end to one end of the photon response multiplication section and having a resistance value greater than a resistance value of the photon response multiplication section;

[0389] a second resistance section connected at one end to the other end of the first resistance section; and

[0390] a connection point to which the other end of the first resistance section, the one end of the second resistance section, and a readout unit that reads out an output from the photon response multiplication section are connected. (2)

[0392] The light-receiving element according to (1), wherein the second resistance section has a resistance value greater than a resistance value of the first resistance section. (3)

[0394] The light-receiving element according to (1) or (2), wherein

[0395] a first capacitance is present at the one end of the photon response multiplication section, and

[0396] a second capacitance is present at the other end of the first resistance section. (4)

[0398] The light-receiving element according to (3), wherein each of the first capacitance and the second capacitance is composed of a variable capacitance element. (5)

[0400] The light-receiving element according to (4), wherein the variable capacitance element includes one or a plurality of transistors. (6)

[0402] The light-receiving element according to (5), wherein the one or more transistors are metal oxide semiconductor transistors. (7)

[0404] The light-receiving element according to any one of (1) to (6), wherein

[0405] The second resistance portion includes:

[0406] a switch provided between the readout unit and a power supply electrically connected to the other end of the second resistance portion; and

[0407] a control unit that detects an output of the readout unit and controls the switch based on a detection result. (8)

[0409] The light-receiving element according to any one of (1) to (6), wherein the second resistance portion is a constant current source. (9)

[0411] The light-receiving element according to any one of (1) to (8), wherein the photon response multiplication portion includes a single photon avalanche diode. (10)

[0413] The light-receiving element according to (9), wherein the one end of the photon response multiplication portion is a cathode or an anode of the single photon avalanche diode. (11)

[0415] The light-receiving element according to any one of (1) to (8), wherein the photon response multiplication portion includes a silicon photomultiplier. (12)

[0417] The light-receiving element according to any one of (1) to (11), wherein the first resistance portion is a polysilicon resistance portion or a metal resistance portion. (13)

[0419] The light-receiving element according to any one of (1) to (12), wherein the first resistance portion is formed of one or more transistors. (14)

[0421] The light-receiving element according to (13), wherein the one or more transistors are metal oxide semiconductor transistors. (15)

[0423] The light-receiving element according to (14), further comprising a voltage generation unit that applies a voltage for applying a gate voltage to a gate of the metal oxide semiconductor transistor. (16)

[0425] The light-receiving element according to any one of (1) to (15), further comprising:

[0426] a first substrate including a first connecting portion on one surface; and

[0427] a second substrate including a second connecting portion corresponding to the first connecting portion on one surface, and electrically and mechanically joined to the first substrate by joining of the first connecting portion and the second connecting portion, wherein

[0428] the photon response multiplication portion is provided in the first substrate, and

[0429] the readout unit is provided in the second substrate. (17)

[0431] The light-receiving element according to (16), wherein

[0432] the first connecting portion and the second connecting portion contain copper, and

[0433] the first connecting portion and the second connecting portion are joined by the surfaces of the first connecting portion and the second connecting portion formed using copper being in close contact with each other. (18)

[0435] The light-receiving element according to (16), wherein the first connecting portion and the second connecting portion are joined by a metal bump. (19)

[0437] The light-receiving element according to any one of (1) to (15), further comprising:

[0438] a first substrate including a first connecting portion on one surface;

[0439] a second substrate including a second connecting portion corresponding to the first connecting portion on one surface, including a third connecting portion on a surface opposite to the one surface, and electrically and mechanically joined to the first substrate by joining of the first connecting portion and the second connecting portion; and

[0440] a third substrate including a fourth connecting portion corresponding to the third connecting portion on one surface, and electrically and mechanically joined to the second substrate by joining of the third connecting portion and the fourth connecting portion, wherein

[0441] the photon response multiplication portion is provided in the first substrate. (20)

[0443] The light-receiving element according to (16) or (19), wherein

[0444] The first substrate is provided with a plurality of the photon response multiplication sections, and

[0445] The plurality of photon response multiplication sections are electrically connected to one of the readout units. (21)

[0447] The light-receiving element according to any one of (1) to (20), wherein a counting unit that counts the number of outputs of a signal from the readout unit is connected to an output terminal of the readout unit. (22)

[0449] The light-receiving element according to any one of (1) to (20), wherein a time-to-digital converter that generates a digital signal representing a time difference between a reference signal having a predetermined frequency and another signal generated based on the reference signal is connected to an output terminal of the readout unit. (23)

[0451] An optical device including a plurality of light-receiving elements arranged in a matrix, wherein the plurality of light-receiving elements each include:

[0452] a photon response multiplication section including a charge multiplication region capable of multiplying a charge generated in response to the incidence of a photon;

[0453] a first resistance section connected at one end to one end of the photon response multiplication section and having a resistance value greater than a resistance value of the photon response multiplication section;

[0454] a second resistance section connected at one end to the other end of the first resistance section; and

[0455] a connection point to which the other end of the first resistance section, the one end of the second resistance section, and a readout unit that reads out an output from the photon response multiplication section are connected. (24)

[0457] An electronic device including:

[0458] an optical system; and

[0459] an optical device in which a plurality of light-receiving elements are arranged in a matrix, wherein the plurality of light-receiving elements each include:

[0460] a photon response multiplication section including a charge multiplication region capable of multiplying a charge generated in response to the incidence of a photon that has transmitted through the optical system;

[0461] a first resistance portion connected at one end to one end of the photon response multiplication portion and having a resistance value greater than a resistance value of the photon response multiplication portion;

[0462] a second resistance portion connected at one end to the other end of the first resistance portion; and

[0463] a connection point to which the other end of the first resistance portion, the one end of the second resistance portion, and a readout unit that reads out an output from the photon response multiplication portion are connected. (25)

[0465] An electronic device including:

[0466] an optical system;

[0467] a light emitting unit configured to emit light based on a reference signal having a predetermined frequency; and

[0468] an optical device in which a plurality of light receiving elements are arranged in a matrix shape, wherein the plurality of light receiving elements each include:

[0469] a photon response multiplication portion including a charge multiplication region capable of multiplying a charge generated in response to an incident of a photon that has transmitted through the optical system;

[0470] a first resistance portion connected at one end to one end of the photon response multiplication portion and having a resistance value greater than a resistance value of the photon response multiplication portion;

[0471] a second resistance portion connected at one end to the other end of the first resistance portion;

[0472] a connection point to which the other end of the first resistance portion, the one end of the second resistance portion, and a readout unit that reads out an output from the photon response multiplication portion are connected; and

[0473] a time-to-digital converter that generates a digital signal representing a time difference between the reference signal and the output read out by the readout unit from the photon response multiplication portion via the first resistance portion.

[0474] List of Reference Signs

[0475] 1 Electronic device

[0476] 10 Optical device

[0477] 11 Pixel array unit

[0478] 12 Drive circuit

[0479] 13 Output circuit

[0480] 15 timing control circuit

[0481] 20, 200, 200A, 200B pixel

[0482] 21 photodiode (SPAD)

[0483] 22 quenching resistor

[0484] 23 readout circuit

[0485] 30 imaging lens

[0486] 40, 603 storage unit

[0487] 50 processor

[0488] 71 first substrate

[0489] 72 second substrate

[0490] LS output signal line

[0491] LD pixel drive line

[0492] 100 optical device

[0493] 101 semiconductor substrate

[0494] 102 photoelectric conversion region

[0495] 103 N-type semiconductor region

[0496] 104 P-type semiconductor region

[0497] 105 P+-type semiconductor region

[0498] 106 N+-type semiconductor region

[0499] 107 cathode contact

[0500] 108 anode contact

[0501] 109 insulating film

[0502] 110 element isolation portion

[0503] 111 light-blocking film

[0504] 113 pinning layer

[0505] 114 planarization film

[0506] 115 color filter

[0507] 116 on-chip lens

[0508] 120, 130 wiring layer

[0509] 121 cathode electrode

[0510] 122 anode electrode

[0511] 125, 135, 135A, 136 connection pad

[0512] 210, 210A single photon avalanche diode (SPAD)

[0513] 211 shielding resistance portion

[0514] 211A resistance element

[0515] 211B P-channel MOS transistor

[0516] 211C N-channel MOS transistor

[0517] 212 quenching resistance portion

[0518] 212A constant current source

[0519] 212B active recharge circuit

[0520] 212S switch

[0521] 212C control unit

[0522] 230 readout circuit

[0523] 230A inverter

[0524] 240 digital counter circuit

[0525] 241 TDC circuit

[0526] 242 generation unit

[0527] 243 signal processing unit

[0528] 250 bias voltage generation unit

[0529] 260 junction

[0530] 310 column circuit

[0531] 320 row scan circuit

[0532] 330 interface circuit

[0533] 600 distance measuring device

[0534] 602 light source unit

[0535] 604 control unit

[0536] 605 optical system

[0537] PAR pixel array unit

[0538] BL0, BL1,..., BL S , BL bit line

[0539] WL0, WL1,..., WL N , WL word line

[0540] C1, C2 parasitic capacitance

[0541] R L , R S resistor

[0542] IVT inverter

[0543] C01 cathode parasitic capacitance

[0544] C02 input parasitic capacitance

[0545] VC1, VC2 variable capacitance element

[0546] 201 imaging device

[0547] 202 optical system

[0548] 203 shutter device

[0549] 205 drive circuit

[0550] 206 signal processing circuit

[0551] 207 monitor

[0552] 208 memory

Claims

1. A light-receiving element comprising: a photon response multiplication section including a charge multiplication region capable of multiplying a charge generated in response to the incidence of a photon; a first resistance section connected at one end to one end of the photon response multiplication section and having a resistance value greater than a resistance value of the photon response multiplication section; a second resistance section connected at one end to the other end of the first resistance section; a connection point to which the other end of the first resistance section, the one end of the second resistance section, and a readout unit that reads out an output from the photon response multiplication section are connected; a first capacitance at the one end of the photon response multiplication section; and a second capacitance at the other end of the first resistance section, wherein the second resistance section has a resistance value greater than the resistance value of the first resistance section, a capacitance value of the second capacitance is greater than a capacitance value of the first capacitance.

2. The light-receiving element according to claim 1, wherein Each of the first capacitance and the second capacitance is constituted by a variable capacitance element.

3. The light-receiving element according to claim 2, wherein The variable capacitance element includes one or more transistors.

4. The light-receiving element according to claim 1, wherein the second resistance section includes: a switch provided between the readout unit and a power supply electrically connected to the other end of the second resistance section; and a control unit that detects an output of the readout unit and controls the switch based on a detection result.

5. The light-receiving element according to claim 1, wherein The second resistance section is a constant current source.

6. The light-receiving element according to claim 1, wherein The photon response multiplication section includes a single photon avalanche diode.

7. The light-receiving element according to claim 6, wherein The one end of the photon response multiplication section is a cathode or an anode of the single photon avalanche diode.

8. The light-receiving element according to claim 1, wherein The photon response multiplication section includes a silicon photomultiplier.

9. The light-receiving element according to claim 1, wherein The first resistance section is a polysilicon resistance section or a metal resistance section.

10. The light-receiving element according to claim 1, wherein The first resistance section includes one or more transistors.

11. The light-receiving element according to claim 1, further comprising: a first substrate including a first connection section on one surface; and a second substrate including a second connection section corresponding to the first connection section on one surface and electrically and mechanically joined with the first substrate by the joining of the first connection section and the second connection section, wherein the photon response multiplication section is provided in the first substrate, and the readout unit is provided in the second substrate.

12. The light-receiving element according to claim 11, wherein the first connection section and the second connection section contain copper, and the first connection section and the second connection section are joined by the surfaces of the first connection section and the second connection section containing copper being in close contact with each other.

13. The light-receiving element according to claim 11, wherein The first connection section and the second connection section are joined by a metal bump.

14. The light-receiving element according to claim 1, further comprising: a first substrate including a first connection section on one surface; a second substrate including a second connection section corresponding to the first connection section on one surface, including a third connection section on a surface opposite to the one surface, and electrically and mechanically joined with the first substrate by the joining of the first connection section and the second connection section; and a third substrate including a fourth connection section corresponding to the third connection section on one surface and electrically and mechanically joined with the second substrate by the joining of the third connection section and the fourth connection section. a third substrate including a fourth connecting portion corresponding to the third connecting portion on one surface, and electrically and mechanically joined to the second substrate by joining of the third connecting portion and the fourth connecting portion, wherein The photon response multiplication portion is provided in the first substrate.

15. The light-receiving element according to any one of claims 1 to 14, wherein A counting unit that counts the number of times of output of a signal from the readout unit is connected to an output terminal of the readout unit.

16. The light-receiving element according to any one of claims 1 to 14, wherein A time-to-digital converter that generates a digital signal representing a time difference between a reference signal having a predetermined frequency and another signal generated based on the reference signal is connected to an output terminal of the readout unit.

17. An optical device comprising a plurality of light receiving elements arranged in a matrix, wherein, The plurality of light-receiving elements are each the light-receiving element according to any one of claims 1 to 16.

18. An electronic device comprising: an optical system; and an optical device in which a plurality of light-receiving elements are arranged in a matrix, and photons of light transmitted through the optical system are incident on the plurality of light-receiving elements, wherein The plurality of light-receiving elements are each the light-receiving element according to any one of claims 1 to 16.

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