Power supply and its operation method

Abstract

The present invention provides a power supply and an operation method thereof. The power supply includes a power factor correction circuit, a resonant conversion circuit, and a dead time control circuit. The power factor correction circuit performs power factor correction to output a corrected voltage. The resonant conversion circuit is coupled to the power factor correction circuit to receive the corrected voltage. The resonant conversion circuit converts the corrected voltage into a converted voltage. The dead time control circuit is coupled to the resonant conversion circuit to receive a switching voltage. The dead time control circuit controls the power factor correction circuit to adjust the corrected voltage. The dead time control circuit observes the change trend of the falling time of the switching voltage during the dead time by adjusting the corrected voltage. The dead time control circuit determines the corrected voltage based on the change trend of the switching voltage.

Description

Technical Field

[0001] The present invention relates to a power circuit, and more particularly to a power supply and an operating method thereof. Background Art

[0002] All electrical devices require a power supply (power converter). In high-power power converters, the power factor correction (PFC) circuit is connected to an inductor-inductor-capacitor (LLC) resonant converter. The LLC resonant converter has the characteristics of zero-voltage switching and high efficiency, but is only suitable for single-voltage design. Generally speaking, the resonant tank is designed at the resonant frequency point. Many components of the power converter (such as the feedback voltage divider resistor component, resonant inductor, resonant capacitor, etc.) have component tolerance issues. Component tolerance means that the actual product (power converter) may not operate at the resonant frequency point. When the power converter does not operate at the resonant frequency point, the efficiency will be reduced. How to improve the efficiency of the power converter is one of the important issues in this field.

[0003] It should be noted that the content in the "Background" section is intended to facilitate understanding of the present invention. Some (or all) of the content disclosed in the "Background" section may not be known to those skilled in the art. The content disclosed in the "Background" section does not imply that such content was known to those skilled in the art prior to the filing of this application. Summary of the Invention

[0004] The present invention provides a power supply and an operating method thereof to improve the efficiency of the power supply.

[0005] In an embodiment according to the present invention, the power supply includes a power factor correction circuit, a resonant conversion circuit, and a dead zone control circuit. The power factor correction circuit is configured to perform power factor correction to output a corrected voltage. The resonant conversion circuit is coupled to the power factor correction circuit to receive the corrected voltage. The resonant conversion circuit is configured to convert the corrected voltage into a converted voltage. The dead zone control circuit is coupled to the resonant conversion circuit to receive the switching voltage. The dead zone control circuit is configured to control the power factor correction circuit to adjust the corrected voltage. The dead zone control circuit observes the changing trend of the falling time of the switching voltage in the dead time by adjusting the corrected voltage. The dead zone control circuit determines the corrected voltage based on the changing trend of the switching voltage.

[0006] In an embodiment according to the present invention, the above operation method includes: performing power factor correction by a power factor correction circuit to output a corrected voltage; controlling the power factor correction circuit to adjust the corrected voltage; converting the corrected voltage into a converted voltage by a resonant conversion circuit; observing the change trend of the falling time of the switching voltage of the resonant conversion circuit in the dead time by adjusting the corrected voltage; and determining the corrected voltage according to the change trend of the switching voltage.

[0007] Based on the above, the power supply according to the embodiments of the present invention observes the change trend of the falling time of the switching voltage of the resonant conversion circuit in the dead time by adjusting the corrected voltage of the power factor correction circuit. Based on the change trend of the switching voltage, the dead time control circuit can know which level of the corrected voltage will make the power supply operate at the resonant frequency point (or closest to the resonant frequency point). Based on this, the operation of the power supply can be as close as possible to the resonant frequency point, thereby improving the efficiency of the power supply. Description of the Drawings

[0008] Figure 1 is a schematic diagram of a circuit block of a power supply according to an embodiment of the present invention;

[0009] Figure 2 is a schematic flowchart of an operation method of a power supply according to an embodiment of the present invention;

[0010] Figure 3 is a schematic diagram of a voltage gain curve of a resonant conversion circuit according to an embodiment of the present invention;

[0011] Figure 4 is a schematic waveform diagram of the corrected voltage and the gate-source voltage according to an embodiment of the present invention;

[0012] Figure 5 is according to an embodiment of the present invention Figure 1 is a schematic diagram of a circuit block of the shown primary side rectification and filtering circuit, power factor correction circuit, resonant conversion circuit, and secondary side rectification and filtering circuit;

[0013] Figure 6 is according to an embodiment of the present invention Figure 5 is a schematic diagram of a circuit block of the shown switching circuit, output circuit, switching circuit, resonant circuit, and transformer circuit;

[0014] Figure 7 is a schematic flowchart of an operation method of a power supply according to another embodiment of the present invention.

[0015] Description of the Reference Numerals

[0016] 100: Power supply

[0017] 110: Primary side rectifier and filter circuit

[0018] 111: Primary side rectifier circuit

[0019] 112: Rectified voltage

[0020] 113: Filter circuit

[0021] 120: Power factor correction circuit

[0022] 121: Switching circuit

[0023] 122: Output voltage

[0024] 123: Output circuit

[0025] 124: Power factor correction control circuit

[0026] 130: Resonant conversion circuit

[0027] 131: Switching circuit

[0028] 132: Resonant circuit

[0029] 133: Transformer circuit

[0030] 135: Resonant conversion control circuit

[0031] 140: Secondary side rectifier and filter circuit

[0032] 141: Secondary side rectifier circuit

[0033] 142: Rectified voltage

[0034] 143: Filter circuit

[0035] 150: Dead time control circuit

[0036] 410, 420: Curve

[0037] ACin: AC voltage

[0038] C123: Capacitor

[0039] Cr: Resonant capacitor

[0040] D121: Diode

[0041] DCout: DC voltage

[0042] Fo: Resonant frequency point

[0043] FT1, FT2: Fall time

[0044] L121: Inductor

[0045] Lm: Magnetizing Inductance

[0046] Lr: Resonant Inductance

[0047] Region_1, Region_2, Region_3: Intervals

[0048] S210~S250, S705~S750: Steps

[0049] SW121, SW1311, SW1312: Power Switches

[0050] VGS: Gate-Source Voltage

[0051] VLLC: Switching Voltage

[0052] VPFC: Rectified Voltage

[0053] VREC: Rectified Voltage

[0054] Vref: Reference Voltage

[0055] VT: Converted Voltage Detailed Embodiments

[0056] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals will be used in the drawings and the description to refer to the same or like parts.

[0057] As used throughout this specification (including the claims), the term "coupled (or connected)" may refer to any direct or indirect means of connection. For example, if the first device is described as being coupled (or connected) to the second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be indirectly connected to the second device through other devices or some means of connection. The terms "first", "second", etc. mentioned throughout this specification (including the claims) are used to name components (elements), or to distinguish different embodiments or scopes, and are not used to limit the upper or lower limits of the number of components, nor to limit the order of the components. Additionally, wherever possible, components / elements / steps using the same reference numerals in the drawings and embodiments represent the same or similar parts. Components / elements / steps using the same reference numerals or the same terms in different embodiments can be referred to each other's relevant descriptions.

[0058] Figure 1 is a schematic diagram of a circuit block of a power supply 100 according to an embodiment of the present invention. Figure 1The power supply 100 shown includes a primary side rectifier filter circuit 110, a power factor correction (PFC) circuit 120, a resonant conversion circuit 130, a secondary side rectifier filter circuit 140, and a dead time control circuit 150. The input terminal of the primary side rectifier filter circuit 110 receives an AC voltage ACin. The primary side rectifier filter circuit 110 can perform rectification and filtering operations on the AC voltage ACin to generate a rectified voltage VREC. The present embodiment does not limit the implementation details of the rectification and filtering operations of the primary side rectifier filter circuit 110. According to the actual design, in some embodiments, the rectification and filtering operations of the primary side rectifier filter circuit 110 may include well-known rectification and filtering operations or other rectification / filtering operations. The output terminal of the primary side rectifier filter circuit 110 is coupled to the input terminal of the power factor correction circuit 120 to provide the rectified voltage VREC.

[0059] Figure 2 is a schematic flow chart of an operation method of a power supply according to an embodiment of the present invention. Please refer to Figure 1 and Figure 2 . In step S210, the power factor correction circuit 120 can perform power factor correction on the rectified voltage VREC to output a corrected voltage VPFC. The present embodiment does not limit the implementation details of the power factor correction of the power factor correction circuit 120. According to the actual design, in some embodiments, the power factor correction of the power factor correction circuit 120 may include well-known power factor correction operations or other power factor correction operations. In step S220, the dead time control circuit 150 can control the power factor correction circuit 120 to adjust the corrected voltage VPFC.

[0060] The resonant conversion circuit 130 is coupled to the power factor correction circuit 120 to receive the corrected voltage VPFC. In step S230, the resonant conversion circuit 130 can convert the corrected voltage VPFC into a converted voltage VT. Specifically, the resonant conversion circuit 130 can perform a switching operation on the corrected voltage VPFC to generate a switching voltage VLLC, and the resonant conversion circuit 130 can perform a resonant conversion operation on the switching voltage VLLC to generate the converted voltage VT. The input terminal of the secondary rectification and filtering circuit 140 is coupled to the output terminal of the resonant conversion circuit 130 to receive the converted voltage VT. The secondary rectification and filtering circuit 140 can perform a rectification and filtering operation on the converted voltage VT to generate a DC voltage DCout. The present embodiment does not limit the implementation details of the rectification and filtering operation of the secondary rectification and filtering circuit 140. According to the actual design, in some embodiments, the rectification and filtering operation of the secondary rectification and filtering circuit 140 may include well-known rectification and filtering operations or other rectification / filtering operations.

[0061] The dead-time control circuit 150 is coupled to the resonant conversion circuit 130 to receive the switching voltage VLLC. By controlling the power factor correction circuit 120 (step S220), the dead-time control circuit 150 can adjust the corrected voltage VPFC. In step S240, the dead-time control circuit 150 can observe the change trend of the falling time of the switching voltage VLLC during the dead time by adjusting the corrected voltage VPFC. In step S250, the dead-time control circuit 150 can determine the target level of the corrected voltage VPFC according to the change trend of the switching voltage VLLC.

[0062] For example, in Figure 2In the described embodiment, step S240 includes step S241 and step S242. In step S241, the dead-time control circuit 150 can observe (detect) the change trend of the falling time of the switching voltage VLLC during the dead time. The dead-time control circuit 150 can check (judge) in step S242 whether there is a foldback in the change trend of the switching voltage VLLC (for example, the falling time that has been increasing turns to decrease). When there is no foldback in the change trend of the switching voltage VLLC (the judgment result in step S242 is "no"), the dead-time control circuit 150 can return to step S220 to adjust the corrected voltage VPFC. And so on, the dead-time control circuit 150 can observe the change trend of the falling time of the switching voltage VLLC during the dead time by adjusting the corrected voltage VPFC. When there is a foldback in the change trend of the switching voltage VLLC (the judgment result in step S242 is "yes"), the dead-time control circuit 150 can enter step S250. In step S250, the dead-time control circuit 150 can use the then level of the corrected voltage VPFC when the change trend has a foldback as the target level of the corrected voltage VPFC.

[0063] Figure 3 It is a schematic diagram of the voltage gain curve of a resonant conversion circuit according to an embodiment of the present invention. Figure 1 The shown resonant conversion circuit 130 can refer to Figure 3 the relevant description. Figure 3 The shown vertical axis represents the voltage gain, and the horizontal axis represents the switching frequency (or resonant frequency) of the resonant conversion circuit 130. Figure 3 The shown coordinate space can be divided into interval Region_1, interval Region_2, and interval Region_3.

[0064] Figure 4 It is a schematic waveform diagram of the corrected voltage VPFC and the gate-source voltage VGS of the power switch in the resonant conversion circuit 130 according to an embodiment of the present invention. Please refer to Figure 1 , Figure 3 and Figure 4 . When the switching frequency of the resonant conversion circuit 130 is in the higher-frequency interval Region_1 (that is, the switching frequency of the resonant conversion circuit 130 is higher than the resonant frequency point Fo), the current of the power switch used to discharge the charge of the output capacitor of the power factor correction circuit 120 in the resonant conversion circuit 130 is relatively high. Therefore, the switching voltage VLLC (refer to Figure 4The falling speed of the curve 410 shown in the dead time DT is fast, that is, the falling time FT1 is short. When the switching frequency of the resonant conversion circuit 130 is at the resonant frequency point Fo, the current of the power switch for discharging the charge of the output capacitor of the power factor correction circuit 120 in the resonant conversion circuit 130 is almost equal to the current of the excitation inductor Lm in the resonant conversion circuit 130. Therefore, the falling speed of the switching voltage VLLC (refer to Figure 4 the curve 420 shown) in the dead time DT is slower than that in the interval Region_1 (that is, the falling time FT2 is longer). When the switching frequency of the resonant conversion circuit 130 is in the interval Region_2 (that is, the switching frequency of the resonant conversion circuit 130 is lower than the resonant frequency point Fo), because the excitation time of the excitation inductor Lm in the resonant conversion circuit 130 is longer, the current of the power switch for discharging the charge of the output capacitor of the power factor correction circuit 120 in the resonant conversion circuit 130 increases, and then the falling speed of the switching voltage VLLC (refer to Figure 4 the curve 410 shown) in the dead time DT is fast, that is, the falling time FT1 is short.

[0065] Therefore, the dead time control circuit 150 can change the corrected voltage VPFC of the power factor correction circuit 120 by adjusting the switching frequency. In other words, the dead time control circuit 150 can change the corrected voltage VPFC of the power factor correction circuit 120 through communication. The dead time control circuit 150 can observe the change trend of the falling time of the switching voltage VLLC of the resonant conversion circuit 130 in the dead time DT by adjusting the corrected voltage VPFC, and determine the target level of the corrected voltage VPFC according to the change trend of the switching voltage VLLC. For example, assuming that the switching frequency is in the interval Region_2, the dead time control circuit 150 can increase the switching frequency of the power factor correction circuit 120 (increase the corrected voltage VPFC) and observe the switching voltage VLLC of the resonant conversion circuit 130 at the same time. As the switching frequency (corrected voltage VPFC) increases, the falling time of the switching voltage VLLC in the dead time DT also increases (for example Figure 4 as shown, changing from the curve 410 to the curve 420, so that the falling time changes from FT1 to FT2), until the switching frequency of the power factor correction circuit 120 reaches the resonant frequency point Fo. When the switching frequency of the power factor correction circuit 120 reaches the resonant frequency point Fo, the falling time of the switching voltage VLLC in the dead time DT is the maximum (as Figure 4The falling time (FT2) as shown. When the switching frequency of the power factor correction circuit 120 exceeds the resonant frequency point Fo, the falling time of the switching voltage VLLC during the dead time DT will change to become smaller (i.e., the change trend of the falling time of the switching voltage VLLC during the dead time DT shows a reverse fold). Therefore, once the change trend of the falling time of the switching voltage VLLC during the dead time DT shows a reverse fold, it indicates that the switching frequency of the power factor correction circuit 120 reaches the resonant frequency point Fo.

[0066] Assume that the switching frequency is in the interval Region_1. Then the dead time control circuit 150 can lower the switching frequency of the power factor correction circuit 120 (lower the corrected voltage VPFC) while observing the switching voltage VLLC of the resonant conversion circuit 130. In other words, the dead time control circuit 150 can communicate to lower the corrected voltage VPFC. As the switching frequency (corrected voltage VPFC) is lowered, the falling time of the switching voltage VLLC during the dead time DT also becomes larger (for example Figure 4 as shown, changing from curve 410 to curve 420, so that the falling time changes from FT1 to FT2), until the switching frequency of the power factor correction circuit 120 reaches the resonant frequency point Fo. When the switching frequency of the power factor correction circuit 120 reaches the resonant frequency point Fo, the falling time FT2 of the switching voltage VLLC during the dead time DT is the largest. When the switching frequency of the power factor correction circuit 120 is lower than the resonant frequency point Fo, the falling time of the switching voltage VLLC during the dead time DT will change to become smaller (i.e., the change trend of the falling time of the switching voltage VLLC during the dead time DT shows a reverse fold). Therefore, once the change trend of the falling time of the switching voltage VLLC during the dead time DT shows a reverse fold, it indicates that the switching frequency of the power factor correction circuit 120 reaches the resonant frequency point Fo.

[0067] In summary, the dead time control circuit 150 can observe the change trend of the falling time of the switching voltage VLLC of the resonant conversion circuit 130 during the dead time DT by adjusting the corrected voltage VPFC of the power factor correction circuit 120. Based on the change trend of the switching voltage VLLC, the dead time control circuit 150 can know which level of the corrected voltage VPFC will make the power supply 100 operate at the resonant frequency point Fo (or closest to the resonant frequency point Fo). Based on this, the operation of the power supply 100 can be as close as possible to the resonant frequency point Fo, thereby improving the efficiency of the power supply 100.

[0068] Figure 5 It is described according to an embodiment of the present invention Figure 1A schematic diagram of the circuit blocks of the primary rectification and filtering circuit 110, the power factor correction circuit 120, the resonant conversion circuit 130, and the secondary rectification and filtering circuit 140 shown. Figure 5 The primary rectification and filtering circuit 110 shown includes a primary rectification circuit 111 and a filtering circuit 113. The input terminal of the primary rectification circuit 111 receives the AC voltage ACin. The primary rectification circuit 111 can perform a rectification operation on the AC voltage ACin to generate a rectified voltage 112. According to the actual design, the primary rectification circuit 111 can include a bridge rectification circuit or other rectification circuits. The input terminal of the filtering circuit 113 is coupled to the output terminal of the primary rectification circuit 111 to receive the rectified voltage 112. The filtering circuit 113 can perform a filtering operation on the rectified voltage 112 to generate a rectified voltage VREC. According to the actual design, the filtering circuit 113 can include a known filtering circuit or other filtering circuits.

[0069] Figure 5 The power factor correction circuit 120 shown includes a switching circuit 121, an output circuit 123, and a power factor correction control circuit 124. The input terminal of the switching circuit 121 is coupled to the output terminal of the filtering circuit 113 to receive the rectified voltage VREC. The power factor correction control circuit 124 can control the power switch inside the switching circuit 121 to adjust the output voltage 122. The input terminal of the output circuit 123 is coupled to the output terminal of the switching circuit 121 to receive the output voltage 122. The output circuit 123 can perform a filtering operation on the output voltage 122 to generate a corrected voltage VPFC for the resonant conversion circuit 130. According to the actual design, the output circuit 123 can include a capacitor or other filtering circuits / components.

[0070] The power factor correction control circuit 124 is coupled to the output circuit 123 to receive the corrected voltage VPFC. Based on the corrected voltage VPFC, the power factor correction control circuit 124 can control the switching frequency and / or duty ratio of the switching circuit 121 to dynamically adjust the corrected voltage VPFC. The dead-time control circuit 150 can notify the power factor correction control circuit 124 to adjust the corrected voltage VPFC according to the change trend of the switching voltage VLLC of the resonant conversion circuit 130.

[0071] Figure 5The resonant conversion circuit 130 shown includes a switching circuit 131, a resonant circuit 132, a transformer circuit 133, and a resonant conversion control circuit 135. The input terminal of the switching circuit 131 is coupled to the power factor correction circuit 120 to receive the corrected voltage VPFC. The resonant conversion control circuit 135 can control the power switch inside the switching circuit 131 to output and adjust the switching voltage VLLC. The resonant conversion control circuit 135 can also detect the switching voltage VLLC and provide the detection result (detecting the switching voltage VLLC) to the dead-time control circuit 150. The input terminal of the resonant circuit 132 is coupled to the output terminal of the switching circuit 131 to receive the switching voltage VLLC. The resonant circuit 132 can perform a resonant operation on the switching voltage VLLC. According to the actual design, the resonant circuit 132 can include a known resonant tank or other resonant tanks. The primary side of the transformer circuit 133 is coupled to the resonant circuit 132. The secondary side of the transformer circuit 133 is coupled to the input terminal of the secondary side rectification and filtering circuit 140 to provide the converted voltage VT.

[0072] Figure 5 The secondary side rectification and filtering circuit 140 shown includes a secondary side rectification circuit 141 and a filtering circuit 143. The input terminal of the secondary side rectification circuit 141 is coupled to the output terminal of the transformer circuit 133 to receive the converted voltage VT. The secondary side rectification circuit 141 can perform a rectification operation on the converted voltage VT to generate the rectified voltage 142. According to the actual design, the secondary side rectification circuit 141 can include a bridge rectification circuit or other rectification circuits. The input terminal of the filtering circuit 143 is coupled to the output terminal of the secondary side rectification circuit 141 to receive the rectified voltage 142. The filtering circuit 143 can perform a filtering operation on the rectified voltage 142 to generate the DC voltage DCout. According to the actual design, the filtering circuit 143 can include a known filtering circuit or other filtering circuits.

[0073] According to different design requirements, the implementation of the above-mentioned power factor correction control circuit 124, resonant conversion control circuit 135, and / or dead-time control circuit 150 can be in the form of hardware, firmware, software (i.e., programs), or a combination of multiple ones among the foregoing. In terms of hardware, the above-mentioned power factor correction control circuit 124, resonant conversion control circuit 135, and / or dead-time control circuit 150 can be implemented as logic circuits on an integrated circuit. The related functions of the above-mentioned power factor correction control circuit 124, resonant conversion control circuit 135, and / or dead-time control circuit 150 can be implemented as hardware using hardware description languages (such as Verilog HDL or VHDL) or other suitable programming languages. For example, the related functions of the above-mentioned power factor correction control circuit 124, resonant conversion control circuit 135, and / or dead-time control circuit 150 can be implemented in various logic blocks, modules, and circuits in one or more controllers, microcontrollers, microprocessors, application-specific integrated circuits (ASICs), digital signal processors (DSPs), field programmable gate arrays (FPGAs), and / or other processing units.

[0074] In terms of software form and / or firmware form, the related functions of the above-mentioned power factor correction control circuit 124, resonant conversion control circuit 135, and / or dead-time control circuit 150 can be implemented as programming codes. For example, the above-mentioned power factor correction control circuit 124, resonant conversion control circuit 135, and / or dead-time control circuit 150 are implemented using general programming languages (such as C, C++, or assembly language) or other suitable programming languages. The programming codes can be recorded / stored in a "non-transitory computer readable medium". In some embodiments, the non-transitory computer readable medium includes, for example, a Read Only Memory (ROM), a programmable logic circuit, and / or a storage device. The storage device includes a hard disk drive (HDD), a solid-state drive (SSD), or other storage devices. A Central Processing Unit (CPU), a controller, a microcontroller, or a microprocessor can read and execute the programming codes from the non-transitory computer readable medium to implement the related functions of the above-mentioned power factor correction control circuit 124, resonant conversion control circuit 135, and / or dead-time control circuit 150.

[0075] Figure 6 It is illustrated according to an embodiment of the present invention Figure 5 The circuit block diagram of the switching circuit 121, output circuit 123, switching circuit 131, resonant circuit 132, and transformer circuit 133 shown. Figure 6 The switching circuit 121 shown includes an inductor L121, a diode D121, and a power switch SW121. Please refer to Figure 5 and Figure 6 . The first end of the inductor L121 is coupled to the output end of the filter circuit 113 to receive the rectified voltage VREC. The anode of the diode D121 and the first end of the power switch SW121 are coupled to the second end of the inductor L121. The second end of the power switch SW121 is coupled to a reference voltage Vref (such as a ground voltage or other fixed voltage). The power factor correction control circuit 124 can control the power switch SW121 inside the switching circuit 121, for example, adjust the switching frequency and / or duty cycle of the power switch SW121 to adjust the output voltage 122. In Figure 6 the embodiment shown, the output voltage 122 is used as the corrected voltage VPFC. Figure 6The output circuit 123 shown includes a capacitor C123. The first terminal of the capacitor C123 is coupled to the cathode of the diode D121 to receive the output voltage 122 (the corrected voltage VPFC). The second terminal of the capacitor C123 is coupled to the reference voltage Vref.

[0076] Figure 6 The switching circuit 131 shown includes a power switch SW1311 and a power switch SW1312. The first terminal of the power switch SW1311 is coupled to the output circuit 123 to receive the corrected voltage VPFC. The second terminal of the power switch SW1311 is coupled to the resonant circuit 132 to provide the switching voltage VLLC. The first terminal of the power switch SW1312 is coupled to the second terminal of the power switch SW1311. The second terminal of the power switch SW1312 is coupled to the reference voltage Vref. The drain-source voltage of the power switch SW1312 can be referred to Figure 4 the relevant description of the corrected voltage VPFC shown, and the gate-source voltage of the power switch SW1312 can be referred to Figure 4 the relevant description of the gate-source voltage VGS shown.

[0077] Figure 6 The resonant circuit 132 shown includes a resonant inductor Lr, an exciting inductor Lm, and a resonant capacitor Cr. The first terminal of the resonant inductor Lr is coupled to the output terminal of the switching circuit 131 to receive the switching voltage VLLC. The first terminal of the exciting inductor Lm is coupled to the second terminal of the resonant inductor Lr. The first terminal of the resonant capacitor Cr is coupled to the second terminal of the exciting inductor Lm. The second terminal of the resonant capacitor Cr is coupled to the reference voltage Vref.

[0078] Figure 6 The transformer circuit 133 shown includes a transformer. In Figure 6 the embodiment shown, the primary side coil of the transformer is used as the exciting inductor Lm of the resonant circuit 132. Based on the magnetic flux change of the exciting inductor Lm, the secondary side coil of the transformer can generate the converted voltage VT for the secondary side rectifying and filtering circuit 140.

[0079] Figure 7 is a schematic flowchart of an operation method of a power supply according to another embodiment of the present invention. Please refer to Figures 4 to 7。In step S705, the dead-time control circuit 150 can detect the falling time of the switching voltage VLLC during the dead time DT via the resonant conversion control circuit 135. The dead-time control circuit 150 can reduce the corrected voltage VPFC (step S710) via the power factor correction control circuit 124, and then detect the falling time of the switching voltage VLLC during the dead time DT again via the resonant conversion control circuit 135 (step S715) to observe the changing trend of the falling time of the switching voltage VLLC during the dead time DT.

[0080] For example, the dead time DT can be divided into multiple intervals, and the falling time of the switching voltage VLLC during the dead time DT corresponds to one of these intervals. The dead-time control circuit 150 can detect and determine at a first time point which interval the falling time of the switching voltage VLLC during the dead time DT falls into (here assume the first interval) (step S705). Next, the dead-time control circuit 150 can reduce the corrected voltage VPFC (step S710), and then detect and determine at a second time point (later than the first time point) which interval the falling time of the switching voltage VLLC during the dead time DT falls into (here assume the second interval) (step S715). The dead-time control circuit 150 can compare the first interval with the second interval to observe whether the falling time of the switching voltage VLLC during the dead time DT has changed. By observing the relationship between the first interval and the second interval, the dead-time control circuit 150 can know the changing trend of the falling time of the switching voltage VLLC during the dead time DT.

[0081] In step S720, the dead-time control circuit 150 can check and determine the changing trend of the falling time of the switching voltage VLLC during the dead time DT. When the changing trend of the switching voltage VLLC indicates that "the falling time becomes larger" (i.e., the judgment result of step S720 is "yes"), the dead-time control circuit 150 can perform step S725. In the case where the reduction of the corrected voltage VPFC causes the falling time of the switching voltage VLLC during the dead time DT to become larger, the dead-time control circuit 150 can continue to reduce the corrected voltage VPFC (step S725) to observe the inflection of the changing trend of the falling time (step S730).

[0082] For example, the dead zone control circuit 150 can check and determine the change trend of the falling time of the switching voltage VLLC in the dead time DT again after reducing the corrected voltage VPFC (step S730). When the change trend of the switching voltage VLLC indicates that "the falling time becomes larger" (i.e., the judgment result of step S730 is "yes"), the dead zone control circuit 150 can return to step S725. And so on, the dead zone control circuit 150 can adjust the corrected voltage VPFC to observe whether there is a reverse fold in the change trend of the falling time of the switching voltage VLLC in the dead time DT. When the change trend of the switching voltage VLLC indicates that "the falling time becomes smaller" (i.e., the judgment result of step S730 is "no"), at this time, the change trend of the switching voltage VLLC has a reverse fold, and the dead zone control circuit 150 can enter step S735.

[0083] In step S735, the dead zone control circuit 150 can determine the corrected voltage VPFC based on the reverse fold of the change trend of the falling time of the switching voltage VLLC in the dead time DT. For example, the dead zone control circuit 150 can use the current level of the corrected voltage VPFC when the change trend has a reverse fold as the target level of the corrected voltage VPFC. That is, the dead zone control circuit 150 can use the current switching frequency and (or) the current duty ratio of the switching circuit 121 when the change trend has a reverse fold as the target switching frequency and (or) the target duty ratio.

[0084] In step S720, when the change trend of the switching voltage VLLC indicates that "the falling time becomes smaller" (i.e., the judgment result of step S720 is "no"), the dead zone control circuit 150 can perform step S740. In the case where the reduction of the corrected voltage VPFC causes the falling time of the switching voltage VLLC in the dead time DT to become smaller, the dead zone control circuit 150 can adjust the corrected voltage VPFC upward (step S740) to observe the reverse fold of the change trend of the falling time (step S745).

[0085] For example, the dead zone control circuit 150 can check and determine the change trend of the falling time of the switching voltage VLLC in the dead time DT again after increasing the corrected voltage VPFC (step S745). When the change trend of the switching voltage VLLC indicates that "the falling time becomes larger" (i.e., the judgment result of step S745 is "yes"), the dead zone control circuit 150 can return to step S740. And so on, the dead zone control circuit 150 can observe whether there is a foldback in the change trend of the falling time of the switching voltage VLLC in the dead time DT by adjusting the corrected voltage VPFC. When the change trend of the switching voltage VLLC indicates that "the falling time becomes smaller" (i.e., the judgment result of step S745 is "no"), at this time, the change trend of the switching voltage VLLC has a foldback, and the dead zone control circuit 150 can enter step S750. In step S750, the dead zone control circuit 150 can determine the corrected voltage VPFC according to the foldback of the change trend of the falling time of the switching voltage VLLC in the dead time DT. Step S750 can be analogized with reference to the relevant description of step S735, so it will not be elaborated here.

[0086] That is to say, the dead zone control circuit 150 can decrease the corrected voltage VPFC to observe the change of the interval corresponding to the falling time of the switching voltage VLLC. When decreasing the corrected voltage VPFC in step S710 causes the interval corresponding to the falling time to change to the right (the falling time becomes larger), the dead zone control circuit 150 can continue to decrease the corrected voltage VPFC in step S725 to observe the foldback of the change of the interval corresponding to the falling time. When decreasing the corrected voltage VPFC in step S710 causes the interval corresponding to the falling time to change to the left (the falling time becomes smaller), the dead zone control circuit 150 can increase the corrected voltage VPFC in step S740 to observe the foldback of the change of the interval corresponding to the falling time. The dead zone control circuit 150 can determine the corrected voltage VPFC according to the foldback of the change of the interval corresponding to the falling time.

[0087] In summary, the power supply 100 described in the above embodiments can observe the change trend of the falling time of the switching voltage VLLC of the switching circuit 131 in the dead time DT by adjusting the corrected voltage VPFC of the output circuit 123. Based on the change trend of the switching voltage VLLC, the dead zone control circuit 150 can know which level of the corrected voltage VPFC will make the power supply 100 operate at the resonant frequency point Fo (or closest to the resonant frequency point Fo). Based on this, the operation of the power supply 100 can be as close as possible to the resonant frequency point Fo, thereby improving the efficiency of the power supply 100.

[0088] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A power supply, characterized in that, The power supply includes: A power factor correction circuit configured to perform power factor correction to output a corrected voltage; A resonant conversion circuit coupled to the power factor correction circuit to receive the corrected voltage and configured to convert the corrected voltage into a converted voltage; and A dead-time control circuit coupled to the resonant conversion circuit to receive a switching voltage and configured to control the power factor correction circuit to adjust the corrected voltage, wherein the dead-time control circuit observes a change trend of a falling time of the switching voltage during a dead time by adjusting the corrected voltage, and the dead-time control circuit determines a target level of the corrected voltage based on a current level of the corrected voltage when the change trend of the switching voltage exhibits an inflection point.

2. The power supply according to claim 1, wherein The dead-time control circuit reduces the corrected voltage to observe the change trend of the falling time of the switching voltage during the dead time. When the reduction of the corrected voltage causes the falling time to increase, the dead-time control circuit continues to reduce the corrected voltage to observe an inflection point of the change trend of the falling time. When the reduction of the corrected voltage causes the falling time to decrease, the dead-time control circuit increases the corrected voltage to observe an inflection point of the change trend of the falling time. And The dead-time control circuit determines the corrected voltage based on the inflection point of the change trend.

3. The power supply according to claim 1, characterized in that, The dead time is divided into multiple intervals, the falling time of the switching voltage during the dead time corresponds to one of the multiple intervals, and the dead-time control circuit reduces the corrected voltage to observe a change of the interval corresponding to the falling time of the switching voltage. When the reduction of the corrected voltage causes the interval corresponding to the falling time to change to the right, the dead-time control circuit continues to reduce the corrected voltage to observe an inflection point of the change of the interval corresponding to the falling time. When the reduction of the corrected voltage causes the interval corresponding to the falling time to change to the left, the dead-time control circuit increases the corrected voltage to observe an inflection point of the change of the interval corresponding to the falling time; and The dead-time control circuit determines the corrected voltage based on the inflection point of the change of the interval corresponding to the falling time.

4. The power supply according to claim 1, wherein The power factor correction circuit includes: A switching circuit having an input terminal for receiving a rectified voltage; An output circuit having an input terminal coupled to an output terminal of the switching circuit and configured to output the corrected voltage to the resonant conversion circuit; and A power factor correction control circuit configured to control the switching circuit to adjust the corrected voltage, wherein the dead-time control circuit notifies the power factor correction control circuit to adjust the corrected voltage based on the change trend of the switching voltage.

5. The power supply according to claim 1, wherein The resonant conversion circuit includes: A switching circuit having an input terminal coupled to the power factor correction circuit to receive the corrected voltage and configured to output the switching voltage. A resonant circuit having an input terminal coupled to the switching circuit to receive the switching voltage; A transformer circuit having a primary side coupled to the resonant circuit; and A resonant conversion control circuit configured to control the switching circuit and to detect the switching voltage to provide a detection result to the dead time control circuit.

6. The power supply according to claim 1, wherein The power supply further includes: A primary side rectifying and filtering circuit having an output terminal coupled to an input terminal of the power factor correction circuit to provide a rectified voltage.

7. The power supply according to claim 1, wherein The power supply further includes: A secondary side rectifying and filtering circuit having an input terminal coupled to an output terminal of the resonant conversion circuit to receive the converted voltage.

8. A method for operating a power supply, characterized in that, The operation method includes: Performing power factor correction by a power factor correction circuit to output a corrected voltage; Controlling the power factor correction circuit to adjust the corrected voltage; Converting the corrected voltage into a converted voltage by a resonant conversion circuit; Observing a change trend of a falling time of the switching voltage of the resonant conversion circuit in a dead time by adjusting the corrected voltage; and Determining a target level of the corrected voltage according to a level of the corrected voltage when a foldback occurs in the change trend of the switching voltage.

9. The operating method according to claim 8, characterized in that, The operation method further includes: Lowering the corrected voltage to observe the change trend of the falling time of the switching voltage in the dead time; When the lowering of the corrected voltage causes the falling time to increase, continuously lowering the corrected voltage to observe a foldback of the change trend of the falling time; When the lowering of the corrected voltage causes the falling time to decrease, raising the corrected voltage to observe a foldback of the change trend of the falling time; and Determining the corrected voltage according to the foldback of the change trend.

10. The operating method according to claim 8, characterized in that, The operation method further includes: Dividing the dead time into a plurality of intervals, wherein the falling time of the switching voltage in the dead time corresponds to one of the plurality of intervals; Lowering the corrected voltage to observe a change of the interval corresponding to the falling time of the switching voltage; When the lowering of the corrected voltage causes the interval corresponding to the falling time to change to the right, continuously lowering the corrected voltage to observe a foldback of the change of the interval corresponding to the falling time; When the lowering of the corrected voltage causes the interval corresponding to the falling time to change to the left, raising the corrected voltage to observe a foldback of the change of the interval corresponding to the falling time; and Determining the corrected voltage according to the foldback of the change of the interval corresponding to the falling time.

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