Data acquisition method, related device and storage medium

Abstract

The present invention discloses a data acquisition method, device, electronic device and storage medium. Among them, the method includes: a first target process running on the BMC obtains a first target instruction that meets a preset condition and is triggered by a trigger controller outside the BMC; in response to the first target instruction, the first target process acquires first target data for troubleshooting faults or anomalies, and the first target data is first failure data.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular, to a data acquisition method, device, electronic device, and storage medium. Background Art

[0002] In the related art, when the FFDC data (first failure data) obtained by the First Failure Data Capture (FFDC) tool is used as reference data, it can provide a good basis for maintenance or repair personnel to troubleshoot server failures or anomalies. The process of obtaining FFDC data is as follows: The maintenance or repair personnel input an instruction to the web (WEB) interface of the Baseboard Management Controller (BMC), and the process running on the BMC that complies with the Intelligent Platform Management Interface (IPMI) specification responds to the instruction to automatically obtain the FFDC data.

[0003] It can be understood that if at least one of the BMC's Internet access function (such as the inability to normally display the WEB interface) and the process that complies with the IPMI specification has a problem, the FFDC data cannot be successfully obtained. Summary of the Invention

[0004] The present invention provides a data acquisition method, device, electronic device, and storage medium to at least solve the above technical problems existing in the prior art.

[0005] According to a first aspect of the present invention, a data acquisition method is provided, which is applied to a Baseboard Management Controller (BMC). The method includes:

[0006] A first target process running on the BMC obtains a first target instruction that meets a preset condition and is triggered by a trigger controller external to the BMC;

[0007] The first target process responds to the first target instruction and acquires first target data for troubleshooting failures or anomalies. The first target data is the first failure data.

[0008] In the above solution, the BMC further includes a second target process;

[0009] The second target process is configured to, when obtaining a second target instruction triggered by the BMC, respond to the second target instruction and acquire the first target data.

[0010] In the above solution, the method further includes:

[0011] In the case where the second target process fails to obtain the first target data in response to the second target instruction, the first target process detects whether there is the first target instruction to obtain the first target instruction.

[0012] In the above solution, after obtaining the first target data for troubleshooting faults or anomalies, the method further includes:

[0013] The first target process stores the first target data; and / or,

[0014] The first target process transmits the first target data.

[0015] In the above solution, after storing the first target data,

[0016] The first target process transmits the first target data, including:

[0017] In the case where the second target process successfully obtains the second target data in response to the third target instruction, the first target process transmits the second target data and the stored first target data;

[0018] Wherein, the third target instruction is an instruction for obtaining the second target data triggered by the BMC; the second target data is the first failure data for troubleshooting faults or anomalies that is later than the first target data.

[0019] In the above solution, the first target process transmits the first target data, including:

[0020] In the case where there is target configuration information, the first target process transmits the first target data; wherein, the target configuration information represents the configuration information for transmitting the first target data.

[0021] In the above solution, the second target process is a process in the BMC that conforms to the Intelligent Platform Management Interface (IPMI) specification and is used to obtain the first failure data.

[0022] According to a second aspect of the present invention, there is provided a data acquisition device, including:

[0023] An acquisition unit, configured to use a first target process running in a Baseboard Management Controller (BMC) to obtain a first target instruction that meets a preset condition and is triggered by a trigger controller external to the BMC;

[0024] A response unit, configured to obtain, through the first target process, first target data for fault or anomaly troubleshooting in response to the first target instruction, where the first target data is first failure data.

[0025] According to a third aspect of the present invention, there is provided an electronic device, including:

[0026] At least one processor; and

[0027] A memory communicatively connected to the at least one processor; wherein,

[0028] The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method of the present invention.

[0029] According to a fourth aspect of the present invention, there is provided a non-transitory computer-readable storage medium storing computer instructions for causing a computer to execute the method of the present invention.

[0030] The present invention provides a data acquisition method, device, electronic device and storage medium. The method includes: a first target process running on the BMC obtains a first target instruction that meets a preset condition and is triggered by a trigger controller external to the BMC; the first target process responds to the first target instruction and acquires first target data for fault or anomaly troubleshooting, where the first target data is first failure data.

[0031] The technical solution of the present invention realizes the acquisition of FFDC data through the response of the first target process to the first target instruction that meets the preset condition and is triggered by a trigger controller external to the BMC, and can at least realize the normal acquisition of FFDC data in the case where it is impossible to successfully acquire FFDC data due to failures of WEB and / or processes conforming to the IPMI specification.

[0032] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] By reading the following detailed description with reference to the accompanying drawings, the above and other objects, features and advantages of the exemplary embodiments of the present invention will become easily understood. In the drawings, several embodiments of the present invention are shown in an exemplary rather than restrictive manner, where:

[0034] In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.

[0035] Figure 1 Shows the implementation process schematic of the data acquisition method according to an embodiment of the present invention Figure 1 ;

[0036] Figure 2 Shows the communication block diagram of BMC, Bios and FPGA according to an embodiment of the present invention;

[0037] Figure 3 Shows the overall implementation schematic of the data acquisition method according to an embodiment of the present invention;

[0038] Figure 4 Shows the implementation process schematic of the data acquisition method according to an embodiment of the present invention Figure 2 ;

[0039] Figure 5 Shows the implementation process schematic of the data acquisition method according to an embodiment of the present invention Figure 3 ;

[0040] Figure 6 Shows the implementation process schematic of the data acquisition method according to an embodiment of the present invention Figure 4 ;

[0041] Figure 7 Shows the composition structure schematic diagram of the data acquisition device according to an embodiment of the present invention;

[0042] Figure 8 Shows the composition structure schematic diagram of an electronic device according to an embodiment of the present invention. Detailed implementation manners

[0043] To make the objectives, features, and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the protection scope of the present invention.

[0044] To make the objectives, technical solutions, and advantages of this application clearer, the following will further describe this application in detail with reference to the accompanying drawings. The described embodiments should not be regarded as limitations to this application. All other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of this application.

[0045] In the following description, "some embodiments" are involved, which describe a subset of all possible embodiments. However, it can be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0046] In the following description, the terms "first / second" only distinguish similar objects and do not represent a specific order for the objects. It can be understood that "first / second" can be interchanged with a specific order or sequence when allowed, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0048] It should be understood that in various embodiments of this application, the magnitude of the serial numbers of each implementation process does not mean the order of execution. The order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of this application.

[0049] For convenience of description, a process that complies with the IPMI specification and runs in the BMC and can respond to instructions input from the WEB interface in the related art is regarded as an IPMI process.

[0050] The data acquisition method of the technical solution of the present invention can, in the case where normal communication between the WEB and the IPMI process in the related art fails and FFDC data cannot be successfully acquired, implement the acquisition of FFDC data based on the first target process in the BMC, realize the normal acquisition of FFDC data, and avoid the occurrence of failures or abnormal situations that cannot be detected due to the failure to successfully acquire FFDC data.

[0051] Before introducing the technical solution of the present invention, the technical terms in this field that may be used are described first: The FFDC tool is a tool built into the WebSphere Application Server (WebSphere application server) runtime. This tool attempts to automatically capture and save key information when a possible abnormal situation occurs. The FFDC tool will monitor all exceptions raised during the server operation process. Once an exception is raised, it will be checked in real time to determine whether it belongs to an unexpected exception or whether it is part of a problem that may be occurring. If so, the FFDC tool writes an FFDC incident record to a file. Maintenance personnel can check these FFDC incident records afterwards to gain an in-depth understanding of what happened. The FFDC data in the embodiments of the present invention can be a set of two or more FFDC incident records.

[0052] The embodiments of the data acquisition method provided by the present invention are applied to the BMC.

[0053] In practical applications, the BMC can be an embedded device or system embedded in a server to monitor the status of the server. For example, it monitors the rotation speed of the server's fan, humidity, temperature, the occupancy of the central processing unit (CPU), power usage, etc., to achieve server monitoring.

[0054] The server provided by the present invention can be any reasonable service terminal, such as a general server, a cloud server, or a cluster server. For a server embedded with the BMC, it also includes an operating system (OS) and a basic input / output system (BIOS). Both the OS and BIOS serve for the server to implement functions such as accessing the Internet and outputting audio and video. The BMC can communicate with the OS and BIOS.

[0055] The BMC according to an embodiment of the present invention includes a first target process and a second target process.

[0056] Among them, the second target process is an IPMI process in the related art that can obtain FFDC data based on instructions input by a user to the WEB interface. That is, the second target process is a process in the BMC that already conforms to the Intelligent Platform Management Interface (IPMI) specification for obtaining first failure data. In short, the second target process is an IPMI process in the BMC for obtaining FFDC. Considering that the WEB interface is an operation interface that the BMC can display, the IPMI process runs in the BMC, and the instruction for obtaining FFDC data is input by the user to the WEB interface, the process of obtaining FFDC data implemented based on the communication between the WEB and IPMI in the related art can be regarded as a process in which the second target process obtains FFDC data when the instruction for obtaining FFDC data is an instruction triggered internally by the BMC.

[0057] Among them, the first target process is an independent process, different from the IPMI process that can communicate with the WEB. The first target process can be a process specifically for implementing FFDC data acquisition when it is impossible to successfully obtain FFDC data based on the communication between the WEB and the IPMI process.

[0058] Different from the solution in which the first target process obtains instructions triggered internally by the BMC to obtain FFDC data, the second target process in the present invention can execute the FFDC data acquisition solution when obtaining instructions triggered externally by the BMC. That is, from the perspective of obtaining instructions, the first target process executes the FFDC data acquisition when obtaining external instructions of the BMC, and the second target process executes the FFDC data acquisition when obtaining internal instructions of the BMC.

[0059] In terms of specific implementation, the first target process can be a process that complies with the IPMI specification of BMC, or it can also be a process that complies with other reasonable specifications. The first target process can independently process the process of obtaining FFDC data independently of the existing processes in the BMC. Among them, the existing processes include the aforementioned IPMI process that can execute the FFDC data acquisition based on the instructions input by the user through the WEB interface, that is, the second target process.

[0060] The independent operation of the first target process and the independent processing of the FFDC data acquisition process are not easily interfered by other processes such as the IPMI process when the interaction between the WEB and the IPMI process fails to successfully obtain the FFDC data, and can realize the independent acquisition of the FFDC data to avoid the problem that the fault troubleshooting cannot be carried out due to the failure to obtain the FFDC data in time.

[0061] The first embodiment of the data acquisition method provided by the present invention is as Figure 1 shown, and the method includes:

[0062] S101: The first target process running on the BMC obtains a first target instruction that meets the preset conditions and is triggered by a trigger controller outside the BMC;

[0063] S102: The first target process responds to the first target instruction and acquires first target data for fault or anomaly troubleshooting. The first target data is the first failure data (FFDC data).

[0064] In S101 to S102, the normal acquisition of FFDC data is realized by an independent process different from the second target process - the first target process, so as to avoid the problem that the FFDC data cannot be successfully obtained due to the failure of the WEB and / or the second target process in the related art. Among them, when the running first target process obtains a first target instruction that meets the preset conditions and is triggered by a trigger controller outside the BMC, and responds to the first target instruction to acquire the FFDC data, it can also ensure that the first target process realizes the normal acquisition of the FFDC data under the accurate instruction trigger, so as to avoid the problems brought by the acquisition of data based on incorrect instructions.

[0065] In summary, the solution of S101 to S102 realizes the normal acquisition of FFDC data by the response of the first target process to the first target instruction that meets the preset conditions and is triggered by a trigger controller outside the BMC, and can at least realize the normal acquisition of FFDC data when the WEB and / or the second target process fails and the FFDC data cannot be successfully obtained.

[0066] In addition, the use of the external trigger controller of the BMC to trigger the BMC, specifically the first target process, to obtain FFDC data provides a novel way to obtain FFDC data.

[0067] In the embodiments of the present invention, the trigger controller used to externally trigger the BMC can be any reasonable component located outside the BMC in the server and capable of communicating with the BMC. For example, the trigger controller is the Bios in the server. The trigger controller is any reasonable chip in the server, such as a Field Programmable Gate Array Logic (FPGA) chip or a Digital Signal Processing (DSP) chip.

[0068] In the embodiments of the present invention, as Figure 2 shown, the BMC can communicate with the Bios, the FPGA chip, and the DSP chip respectively to obtain instructions that enable the first target process to obtain FFDC data.

[0069] It can be understood that the instructions for enabling the first target process to obtain FFDC data can be from one of the Bios, the FPGA chip, and the DSP chip. Using the instructions for enabling the first target process to obtain FFDC data from one of the Bios, the FPGA chip, and the DSP chip to obtain FFDC data can achieve the normal acquisition of FFDC data in the case where it is impossible to successfully obtain FFDC data due to failures of the WEB and / or the second target process.

[0070] In addition, using existing components in the server such as the Bios, the FPGA chip, and the DSP chip to trigger the instructions of the first target process, without the need to additionally set up a trigger controller, can greatly reduce the expenditure cost and achieve reasonable reuse of existing components. If the trigger controller is regarded as a part of the server resources, the utilization rate of the server resources is greatly improved. This solution has high feasibility and is easy to implement in engineering.

[0071] Taking the trigger controller as the Bios as an example, for the instructions from the Bios (outside the BMC), they need to meet preset conditions before they can be regarded as instructions for enabling the first target process to obtain FFDC data. This is considered because: in practical applications, the Bios can communicate with the BMC through three preset channels, such as the KCS1 channel, the KCS2 channel, and the KCS 3 channel. In order for the BMC to implement the functions of the first target process and other existing functions, one of the three preset channels, such as the KCS 3 channel, needs to be pre-selected as the target channel for serving the first target process.

[0072] The first target process receives a first target instruction that meets the preset conditions from the Bios transmitted to the BMC through a preset target channel. This instruction can be considered as an instruction for the first target process to obtain FFDC data. Among them, an instruction originating from the Bios and transmitted from the Bios to the BMC through a preset target channel can be regarded as an instruction that meets the preset conditions.

[0073] Taking the trigger controller as an FPGA chip as an example, for an instruction originating from the FPGA chip (outside the BMC), it also needs to meet the preset conditions before it can be regarded as an instruction for the first target process to obtain FFDC data. This is considered because: in practical applications, the FPGA chip can send existing instructions to the BMC. To distinguish whether the instruction sent by the FPGA chip to the BMC is an existing instruction or an instruction for the first target process to obtain FFDC data, the FPGA chip identifies the type of the instruction it generates. For example, use the number 0 to identify that the type of the instruction is the first type, and this instruction is an existing instruction; use the number 1 to identify that the type of the instruction is the second type, and this instruction is an instruction for the first target process to obtain FFDC data.

[0074] When the first target process receives an instruction from the FPGA chip, analyze the instruction type. If it is found through analysis that the instruction type is marked with the number 1, then it is considered that the type of the instruction is the second type, and this instruction is a predetermined type of instruction, that is, this instruction is an instruction for the first target process to obtain FFDC data.

[0075] The above method of marking the instruction type can also be any other reasonable method, without specific limitation. Among them, for the same physical button of the server, the FPGA chip can detect the operation duration of the press to generate different types of instructions. For example, if the press duration exceeds a preset duration threshold, then generate a second-type instruction; otherwise, generate a first-type instruction. It is also possible to detect the size of the operation duration and the different operation directions (such as swiping up and swiping down) of the virtual button of the server for the same virtual button of the server by the FPFA chip to generate different types of instructions.

[0076] In short, the first target process receives an instruction from the FPGA chip and the instruction is of a predetermined type, which is the first target instruction that meets the preset conditions. This instruction can be considered as an instruction for the first target process to obtain FFDC data. Among them, an instruction originating from the Bios and being of a predetermined type can be regarded as the first target instruction that meets the preset conditions.

[0077] The above description is given by taking the external trigger controller as an example of the FPGA chip and the Bios. For the case where the trigger controller is a DSP chip, please refer to the case where the trigger controller is an FPGA chip for understanding, and no further elaboration is provided. In addition, except for the trigger controller described above, any other reasonable trigger controller is covered by the protection scope of the embodiments of the present invention.

[0078] In the embodiments of the present invention, the second target process is used to obtain the first target data in response to the second target instruction when obtaining the second target instruction triggered by the BMC. It can be understood that, as shown in Figure 2 The second target instruction is an instruction input by the user through the WEB interface of the BMC for enabling the second target process to obtain FFDC data.

[0079] Specifically, when the Internet access function of the BMC is normal and the WEB interface can be normally displayed, the user inputs an instruction (the second target instruction) for enabling the second target process to obtain FFDC data in the WEB interface. The WEB function module that detects this input instruction sends the instruction to the IPMI process. If the IPMI process is normal, the IPMI process responds to this instruction, reads the FFDC data and stores it in the first storage location. The WEB function module reads the FFDC data from the first storage location.

[0080] The above content is the process of obtaining FFDC data based on the communication between the WEB and the IPMI process in the related art. Among them, the first storage location can be any reasonable storage space, such as a memory such as an embedded multimedia card (EMMC, embedded Multi Media Card), a hard disk, a USB flash drive, etc.

[0081] It can be understood that in the case where at least one of the WEB and / or the IPMI process has a problem, the successful acquisition of FFDC data cannot be achieved according to the related art. To achieve the normal acquisition of FFDC data, the technical solution of the embodiments of the present invention is enabled.

[0082] Taking the trigger controller as the Bios and the FPGA chip as an example, when the second target process fails to obtain the first target data in response to the second target instruction, the first target process detects whether there is a first target instruction to obtain the first target instruction. As shown in Figure 2 and Figure 3As shown, exemplarily, it is detected whether there is an instruction transmitted from the Bios to the BMC through a preset target channel, and / or whether there is an instruction of a predetermined type from the FPGA chip. If it is detected that there is an instruction transmitted from the Bios to the BMC through the preset target channel, and / or there is an instruction of a predetermined type from the FPGA chip, it is detected that there is a first target instruction, and the first target process responds to the first target instruction and reads the FFDC data to obtain the first target data.

[0083] Among them, considering that the amount of FFDC data may be large, it takes a certain amount of time to read the FFDC data. In the case of successful reading, the FFDC data is stored in the second storage location.

[0084] It can be understood that the failure to obtain FFDC data according to the related technology may be caused by at least one of the WEB and IPMI processes, or may be caused by other reasons, such as the read function of the EMMC storing the FFDC data fails, and the WEB function module cannot successfully read the FFDC data.

[0085] In the case where the second target process fails to obtain the first target data in response to the second target instruction, the first target data obtained by the first target process may include cause data indicating the failure of the second target process to obtain the first target data in response to the second target instruction. For example, it includes the log data generated due to the communication between the WEB and the IPMI when the second target process receives and responds to the second target instruction. The acquisition of this log data provides a certain data basis for troubleshooting the reason why the FFDC data fails to be successfully obtained this time.

[0086] Among them, during the communication between the WEB and the IPMI, the virtual file system (proc) will record the log data generated due to the communication between the WEB and the IPMI. The first target process can read and back up the log data from the proc and use it as part of the FFDC data.

[0087] Of course, in the case where the second target process fails to obtain the first target data in response to the second target instruction, the first target data obtained by the first target process also includes any other reasonable log data that causes the server to generate an exception. For example, the log data indicating abnormal fan speed, and the log data indicating that the read function of the EMMC cannot be used normally.

[0088] The maintenance personnel can accurately and comprehensively troubleshoot the cause of the server failure based on the obtained first target data.

[0089] In some alternative embodiments, such as Figure 4As shown, after obtaining the first target data for troubleshooting faults or anomalies, the method further includes: S103: The first target process stores the first target data. This is for subsequent use of the first target data as reference data for maintenance personnel to troubleshoot faults.

[0090] Here, the first target process can store the first target data in a second storage location. Among them, the second storage location is different from the first storage location. The "different" means: storing the first target data in an EMMC, hard disk, or USB flash drive different from the first storage location. Or, storing the first target data in the same EMMC, hard disk, or USB flash drive as the first storage location, but it needs to be distinguished by dividing different physical regions of the same EMMC, hard disk, or USB flash drive.

[0091] Exemplarily, store the first target data in EMMC 1, and store the FFDC data successfully obtained based on the communication between the WEB and IPMI processes in EMMC 2. Or, store the first target data in area C of the hard disk, and store the FFDC data successfully obtained based on the WEB and IPMI processes in area D of the hard disk.

[0092] It can be understood that in the embodiments of the present invention, the FFDC data successfully obtained based on the communication between the WEB and IPMI processes, and the FFDC data obtained by using the first target process when the communication between the WEB and IPMI processes fails to obtain FFDC are stored in different locations. So that when reading the FFDC data from different locations subsequently, it can be known from which situation the FFDC data is obtained based on the difference in location, which can, to a certain extent, guide the troubleshooting direction of maintenance personnel.

[0093] For example, if the FFDC data is read from the second storage location, it is considered that the reasons for the failure to obtain FFDC based on the communication between the WEB and IPMI processes can be focused on troubleshooting from the direction of WEB error and / or IPMI process error.

[0094] In some alternative embodiments, as Figure 5 shown, after obtaining the first target data for troubleshooting faults or anomalies, the method further includes: S104: The first target process transmits the first target data.

[0095] It can be understood that the first target data is obtained by the first target process of the BMC, that is, obtained locally on the BMC. In the case where it is inconvenient for maintenance personnel to view locally on the BMC, the first target process can transmit the first target data from the BMC to a terminal or device convenient for maintenance personnel to view, so that they can troubleshoot faults based on the FFDC data.

[0096] In practical applications, if maintenance personnel need to transfer FFDC data to their terminals or devices, they can configure the target configuration information in the server's Bios. When the first target process obtains the first target data, it determines whether there is target configuration information in the Bios. If so, the first target process transfers the first target data.

[0097] Among them, the Bios can provide a Bios setup menu (configuration menu), and there is an option in the menu, such as a check box for the Trivial File Transfer Protocol (TFTP). When this option is checked, it indicates that there is target configuration information. When this option is not checked, it indicates that there is no target configuration information.

[0098] The foregoing solution can be regarded as a solution for configuring target configuration information in the Bios. When there is target configuration information in the Bios, the TFTP protocol can be used to transfer FFDC data to terminals or devices that are convenient for maintenance personnel to view.

[0099] Alternatively, in practical applications, the first target process detects an instruction input by maintenance personnel through the target button of the BMC to view FFDC data, and based on this instruction, realizes the transfer of the first target data. Among them, the target button can be a physical button or a virtual button that can implement the function of providing FFDC data for maintenance personnel. This button can be reused with the existing buttons of the server or can be set additionally.

[0100] In some alternative embodiments, as Figure 6 shown, the method further includes: S105: The first target process stores the first target data and transfers the first target data.

[0101] When the FFDC data cannot be successfully obtained according to the related technology, and the first target process in the embodiment of the present invention is used to successfully obtain the FFDC data, the first target process can first store the obtained first target data and then transfer it, or transfer it first and then store it, and the specific method is not limited.

[0102] For the purposes of storage and transmission, please refer to the foregoing related descriptions and will not be elaborated.

[0103] In some alternative embodiments, after storing the first target data, the first target process transfers the first target data, including:

[0104] When the second target process successfully obtains the second target data in response to the third target instruction, the first target process transfers the second target data and the stored first target data; wherein, the third target instruction is an instruction triggered internally by the BMC for obtaining the second target data; the second target data is the first failure data for troubleshooting faults or anomalies that is later than the first target data.

[0105] In the foregoing solution, if the FFDC data cannot be successfully obtained by using the related technology for the Mth time, and the first target process in this solution is used to successfully obtain the FFDC data, the first target process can store the FFDC data. Wherein, M is a positive integer greater than or equal to 1.

[0106] After the server or BMC is restarted and the WEB and IPMI processes return to normal, based on the instruction (third target instruction) for obtaining the FFDC data input by the user through the WEB interface of the BMC, the IPMI process responds to the instruction and obtains the FFDC data, and stores it in the first storage location. If the FFDC data successfully obtained this time is regarded as the FFDC data successfully obtained for the (M + 1)th time, then the FFDC data obtained for the (M + 1)th time (second target data), and the FFDC data that could not be successfully obtained by using the related technology for the Mth time but was successfully obtained by using the first target process in this solution and stored in the second storage location (first target data) are transferred together to a terminal or device for easy viewing.

[0107] The foregoing solution is equivalent to taking the FFDC data obtained when the WEB and IPMI processes return to normal next time and the FFDC data that could not be successfully obtained due to the communication between the WEB and IPMI processes last time but was successfully obtained by using the first target process in the embodiments of the present invention as the data to be transferred, and transferring them to a terminal or device for easy viewing by maintenance personnel.

[0108] It can be understood that both the first target data and the second target data are FFDC data. The first target data is the FFDC data generated for the Mth data acquisition process. The second target data is the FFDC data generated for the (M + 1)th data acquisition process. The two represent the FFDC accident and anomaly records of the server in different time periods.

[0109] In this way, maintenance personnel can use the anomaly records in two time periods together to troubleshoot possible anomalies in different time periods. To avoid the problem that the cause cannot be identified due to the non-transfer of the first target data.

[0110] In summary, in the embodiments of the present invention, the normal acquisition of FFDC data is realized by a first target process different from the existing IPMI process in the BMC, which can greatly avoid the problem that the FFDC data cannot be successfully acquired due to failures in the WEB and / or IPMI processes.

[0111] In addition, the first target process realizes the acquisition of FFDC data under the condition of obtaining a first target instruction that meets the preset conditions and is triggered by a trigger controller outside the BMC, ensuring that the acquisition process of FFDC data is executed with accurate instructions, and avoiding problems caused by data acquisition based on incorrect instructions.

[0112] Furthermore, the acquisition of FFDC data is realized by using the external trigger controller of the BMC to trigger the BMC, specifically the first target process, providing a novel way to acquire FFDC data. The external trigger controller of the BMC is effectively utilized. If the trigger controller is regarded as part of the server resources, the utilization rate of the server resources is greatly improved. This solution has high feasibility and is easy to implement in engineering.

[0113] The present invention also provides an embodiment of a data acquisition device, as Figure 7 shown, the device includes:

[0114] An obtaining unit 701, configured to obtain a first target instruction that meets the preset conditions and is triggered by a trigger controller outside the BMC by using a first target process running in a baseboard management controller (BMC);

[0115] A response unit 702, configured to respond to the first target instruction through the first target process and acquire first target data for troubleshooting failures or anomalies, where the first target data is first failure data.

[0116] In an alternative solution, the BMC further includes a second target process;

[0117] The second target process is configured to respond to the second target instruction and acquire the first target data when obtaining a second target instruction triggered by the BMC.

[0118] In an alternative solution, when the second target process fails to acquire the first target data in response to the second target instruction, the obtaining unit 701 is configured to detect whether there is the first target instruction through the first target process to obtain the first target instruction.

[0119] In an alternative solution, the device further includes a storage unit and a transmission unit; wherein,

[0120] The storage unit is used to store the first target data by using the first target process; and / or,

[0121] The transmission unit is used to transmit the first target data by using the first target process.

[0122] In an alternative solution, the transmission unit is used to transmit the second target data and the stored first target data by using the first target process when the second target process successfully obtains the second target data in response to a third target instruction;

[0123] wherein, the third target instruction is an instruction for obtaining the second target data triggered by the BMC; the second target data is the first failure data for troubleshooting faults or anomalies that is later than the first target data.

[0124] In an alternative solution, the transmission unit is used to transmit the first target data by using the first target process when the BIOS has target configuration information; wherein, the target configuration information represents the configuration information for transmitting the first target data.

[0125] In an alternative solution, the second target process is a process in the BMC that conforms to the Intelligent Platform Management Interface (IPMI) specification and is used to obtain the first failure data.

[0126] In implementation, the data acquisition device can be a device that can be set in the BMC, and can be the BMC.

[0127] It should be noted that for the data acquisition device in the embodiments of the present application, since the principle of solving problems by this data acquisition device is similar to the foregoing data acquisition method, therefore, the implementation process and implementation principle based on the data acquisition device can refer to the implementation process and implementation principle description of the foregoing data acquisition method, and the repeated parts will not be elaborated.

[0128] According to the embodiments of the present invention, the present invention also provides an electronic device and a readable storage medium.

[0129] Figure 8FIG. 0 shows a schematic block diagram of an exemplary electronic device 800 that can be used to implement embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as, for example, laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as, for example, personal digital processors, cellular telephones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely exemplary and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0130] As Figure 8 shown, the device 800 includes a computing unit 801 that can perform various appropriate actions and processes in accordance with a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. In the RAM 803, various programs and data required for the operation of the device 800 can also be stored. The computing unit 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0131] A plurality of components in the device 800 are connected to the I / O interface 805, including: an input unit 806, such as a keyboard, a mouse, etc.; an output unit 807, such as various types of displays, speakers, etc.; a storage unit 808, such as a magnetic disk, an optical disk, etc.; and a communication unit 809, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 809 allows the device 800 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0132] The computing unit 801 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 801 executes the various methods and processes described above, such as the data acquisition method. For example, in some embodiments, the data acquisition method can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 808. In some embodiments, part or all of the computer program can be loaded and / or installed onto the device 800 via the ROM 802 and / or the communication unit 809. When the computer program is loaded into the RAM 803 and executed by the computing unit 801, one or more steps of the data acquisition method described above can be executed. Alternatively, in other embodiments, the computing unit 801 can be configured to execute the data acquisition method by any other suitable means (e.g., by means of firmware).

[0133] Various embodiments of the systems and techniques described above in this document can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-chip systems (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a dedicated or general-purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0134] The program code for implementing the methods of the present invention can be written in any combination of one or more programming languages. These program codes can be provided to the processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the program codes are executed by the processor or controller, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The program codes can be executed entirely on the machine, partially on the machine, as an independent software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0135] In the context of the present invention, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0136] In order to provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, speech input, or tactile input).

[0137] The systems and techniques described herein can be implemented in a computing system including backend components (e.g., as a data server), or a computing system including middleware components (e.g., an application server), or a computing system including frontend components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system including any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.

[0138] A computer system can include a client and a server. The client and the server are generally remote from each other and typically interact through a communication network. The relationship of client and server is generated by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, or a server of a distributed system, or a server incorporating blockchain.

[0139] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in the present disclosure can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution disclosed in the present invention can be achieved, and no limitations are imposed herein.

[0140] In addition, the terms "first" and "second" are used only for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means two or more, unless otherwise specifically defined.

[0141] As described above, the above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A data acquisition method, applied to a Baseboard Management Controller (BMC), the method comprising: The first target process running on the BMC obtains a first target instruction that meets a preset condition and is triggered by a trigger controller outside the BMC; The first target process responds to the first target instruction and obtains first target data for troubleshooting failures or anomalies. The first target data is the first failure data; Among them, the trigger controller includes a first trigger controller and / or a second trigger controller. The first target instruction that meets the preset condition is an instruction transmitted from the first trigger controller to the BMC through a preset target channel, and / or is a predetermined type of instruction from the second trigger controller.

2. The method according to claim 1, wherein, The BMC further includes a second target process; The second target process is used to obtain the first target data in response to the second target instruction when obtaining the second target instruction triggered by the BMC.

3. The method according to claim 2, the method further comprising: If the second target process fails to obtain the first target data in response to the second target instruction, the first target process detects whether there is the first target instruction to obtain the first target instruction.

4. The method according to any one of claims 1 to 3, after acquiring the first target data for fault or anomaly troubleshooting, the method further comprising: The first target process stores the first target data; and / or The first target process transmits the first target data.

5. The method according to claim 4, after storing the first target data, the first target process transmits the first target data, including: If the second target process successfully obtains the second target data in response to the third target instruction, the first target process transmits the second target data and the stored first target data; Among them, the third target instruction is an instruction for obtaining the second target data triggered by the BMC; the second target data is the first failure data for troubleshooting failures or anomalies that is later than the first target data.

6. The method according to claim 4, wherein, The first target process transmitting the first target data includes: If there is target configuration information, the first target process transmits the first target data; among them, the target configuration information represents the configuration information for transmitting the first target data.

7. The method according to claim 2 or 3, wherein, The second target process is a process in the BMC that meets the Intelligent Platform Management Interface (IPMI) specification and is used to obtain the first failure data.

8. A data acquisition device, comprising: An obtaining unit, configured to use a first target process running in a Baseboard Management Controller (BMC) to obtain a first target instruction that meets a preset condition and is triggered by a trigger controller outside the BMC; A response unit, configured to obtain first target data by the first target process responding to the first target instruction and obtaining first target data for troubleshooting failures or anomalies. The first target data is the first failure data; Among them, the trigger controller includes a first trigger controller and / or a second trigger controller. The first target instruction that meets the preset condition is an instruction transmitted from the first trigger controller to the BMC through a preset target channel, and / or is a predetermined type of instruction from the second trigger controller.

9. An electronic device, comprising: At least one processor; and A memory communicatively connected to the at least one processor; among them, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method according to any one of claims 1-7.

10. A non-transitory computer-readable storage medium storing computer instructions for causing a computer to execute the method according to any one of claims 1-7.

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