Display panel and manufacturing method thereof, electronic terminal

Abstract

The application provides a display panel and a manufacturing method thereof and an electronic terminal, comprising a driving circuit layer, a flat layer, an electrode layer and a light-emitting layer which are sequentially stacked, the flat layer comprises a plurality of first flat parts and a plurality of second flat parts which are arranged in the same layer, the plurality of first flat parts correspond to a plurality of driving circuits in the driving circuit layer one by one, the plurality of second flat parts correspond to a plurality of electrode groups in the electrode layer one by one, the first flat part is located on the side of the corresponding driving circuit close to the electrode layer, the second flat part is located on the side of the corresponding electrode group close to the driving circuit layer, the plurality of electrode groups correspond to the plurality of driving circuits one by one and are electrically connected, a plurality of light-emitting devices in the light-emitting layer correspond to the plurality of electrode groups one by one and are electrically connected, the thickness of the second flat part is greater than that of the first flat part in the application, the reliability of fixing the light-emitting device to the electrode group is improved, and the quality of the display picture is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to the manufacturing of display device, and specifically to a display panel and a manufacturing method thereof, and an electronic terminal. BACKGROUND

[0002] Micro LED (Micro Light Emitting Diode) has cross-generation advantages in brightness, resolution, energy consumption, service life, response speed and thermal stability, and is internationally recognized as the future display technology.

[0003] However, the substrate for carrying Micro LED is currently limited by the process, resulting in a lower topography of the part on the substrate for bonding Micro LED, and the height of the Micro LED itself is also lower. Therefore, in the process of transferring multiple Micro LEDs on the transfer table to the substrate, at least part of the Micro LEDs cannot be stably bonded to the corresponding multiple parts on the substrate, resulting in dark or even light-out phenomenon, causing the display panel formed by the Micro LED to have a large number of dark spots, and reducing the quality of the display picture.

[0004] Therefore, the existing display panel formed by Micro LED has the problem of unstable bonding of Micro LED, which reduces the quality of the display picture, and needs to be improved. SUMMARY

[0005] The present application provides a display panel and a manufacturing method thereof, and an electronic terminal, to solve the technical problem of unstable bonding of Micro LED in the existing display panel formed by Micro LED, which reduces the quality of the display picture.

[0006] The present application provides a display panel and a manufacturing method thereof, and an electronic terminal, comprising:

[0007] A driving circuit layer comprising a plurality of driving circuits;

[0008] An electrode layer located on the driving circuit layer, comprising a plurality of electrode groups corresponding one-to-one to the plurality of driving circuits, and the electrode group is electrically connected to the corresponding driving circuit;

[0009] A planar layer located between the driving circuit layer and the electrode layer, comprising a plurality of first planar parts and a plurality of second planar parts arranged in the same layer, the plurality of first planar parts corresponding one-to-one to the plurality of driving circuits, and the plurality of second planar parts corresponding one-to-one to the plurality of electrode groups, the first planar part being located on the side of the corresponding driving circuit close to the electrode layer, and the second planar part being located on the side of the corresponding electrode group close to the driving circuit layer;

[0010] a light emitting layer located on a side of the electrode layer away from the driving circuit layer, the light emitting layer comprising a plurality of light emitting devices corresponding to the plurality of electrode groups, the light emitting devices electrically connected to the corresponding electrode groups;

[0011] wherein a thickness of the second flat portion is greater than a thickness of the first flat portion.

[0012] In an embodiment, further comprising:

[0013] a black matrix layer located on a side of the plurality of first flat portions away from the driving circuit layer, a difference between a distance between a top of the black matrix layer and the substrate and a distance between a top of the electrode layer and the substrate being less than or equal to a thickness of the light emitting device.

[0014] In an embodiment, the difference between the distance between the top of the black matrix layer and the substrate and the distance between the top of the electrode layer and the substrate is less than or equal to 0.

[0015] In an embodiment, further comprising:

[0016] a first passivation layer located between the plurality of first flat portions and the black matrix layer, an adhesion between the first passivation layer and the black matrix layer being greater than an adhesion between the first flat portions and the black matrix layer.

[0017] In an embodiment, the second flat portion is provided with a via, the electrode group being electrically connected to the corresponding driving circuit through the corresponding via.

[0018] In an embodiment, the electrode group comprises:

[0019] a first sub-electrode portion electrically connected to the corresponding driving circuit through the corresponding via, a constituent material of the first sub-electrode portion comprising metal;

[0020] a second sub-electrode portion located on a side of the first sub-electrode portion away from the driving circuit, electrically connected between the first sub-electrode portion and the corresponding light emitting device, a constituent material of the second sub-electrode portion comprising metal oxide.

[0021] In an embodiment, the via comprises a first via and a second via arranged at intervals, the electrode group comprising:

[0022] a first electrode electrically connected to the corresponding driving circuit through the corresponding first via;

[0023] a second electrode arranged at intervals with the first electrode and in the same layer, electrically connected to an electrode trace through the corresponding second via.

[0024] In an embodiment, the driving circuit comprises:

[0025] a driving transistor, the first electrode being electrically connected to a drain of the corresponding driving transistor, and the electrode trace being arranged in the same layer as the drain of the driving transistor.

[0026] In an embodiment, the light emitting device is a micro light emitting diode or a sub-millimeter light emitting diode.

[0027] The present application provides an electronic terminal comprising the display panel as in any of the preceding embodiments.

[0028] The present application provides a manufacturing method of a display panel, comprising:

[0029] providing a driving circuit layer comprising a plurality of driving circuits;

[0030] forming a planar film on the driving circuit layer, and forming a planar layer by processing the planar film through a gray-tone photomask, the planar layer comprising a plurality of first planar portions and a plurality of second planar portions arranged in the same layer, the thickness of the second planar portion being greater than the thickness of the first planar portion, the planar layer being provided with a via hole, the plurality of first planar portions corresponding to the plurality of driving circuits one by one, and the first planar portion being located on the side of the corresponding driving circuit close to the electrode layer;

[0031] forming an electrode layer on the planar layer, comprising a plurality of electrode groups corresponding to the plurality of driving circuits one by one, the electrode group being electrically connected to the corresponding driving circuit through the via hole, the plurality of second planar portions corresponding to the plurality of electrode groups one by one, and the second planar portion being located on the side of the corresponding electrode group close to the driving circuit layer;

[0032] forming a light emitting layer on the electrode layer, comprising a plurality of light emitting devices corresponding to the plurality of electrode groups one by one, the light emitting device being electrically connected to the corresponding electrode group.

[0033] In an embodiment, the gray-tone photomask comprises a first region, a second region and a third region with light transmittance decreasing in sequence.

[0034] The step of forming the planar layer by processing the planar film through the gray-tone photomask comprises:

[0035] arranging the gray-tone photomask opposite to the planar film;

[0036] The first region in the gray-scale photomask is used to treat the corresponding part of the flat film to form the via hole, the second region in the gray-scale photomask is used to treat the corresponding part of the flat film to form the first flat part, and the third region in the gray-scale photomask is used to treat the corresponding part of the flat film to form the second flat part.

[0037] The application provides a display panel and a manufacturing method thereof and an electronic terminal, comprising: a driving circuit layer comprising a plurality of driving circuits; an electrode layer located on the driving circuit layer and comprising a plurality of electrode groups corresponding to the plurality of driving circuits one by one, the electrode groups being electrically connected to the corresponding driving circuits; a flat layer located between the driving circuit layer and the electrode layer and comprising a plurality of first flat parts and a plurality of second flat parts arranged in the same layer, the plurality of first flat parts corresponding to the plurality of driving circuits one by one, the plurality of second flat parts corresponding to the plurality of electrode groups one by one, the first flat part being located on the side of the corresponding driving circuit close to the electrode layer, and the second flat part being located on the side of the corresponding electrode group close to the driving circuit layer; and a light-emitting layer located on the side of the electrode layer away from the driving circuit layer and comprising a plurality of light-emitting devices corresponding to the plurality of electrode groups one by one, the light-emitting devices being electrically connected to the corresponding electrode groups; wherein the thickness of the second flat part is greater than the thickness of the first flat part, so that the difference between the distance between the top of the electrode group and the substrate and the distance between the top of the first flat part and the substrate in the vertical direction is reduced, the risk of the top of the first flat part being too high to block the light-emitting device from contacting the electrode group is reduced, the reliability of the light-emitting device fixed to the electrode group is improved, and the quality of the display picture is improved. BRIEF DESCRIPTION OF DRAWINGS

[0038] The application will be further described below with reference to the drawings. It should be noted that the drawings in the following description are only used to explain some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of the drawings.

[0039] Figure 1 A cross-sectional schematic view of a first display panel provided by an embodiment of the application.

[0040] Figure 2 A cross-sectional schematic view of a second display panel provided by an embodiment of the application.

[0041] Figure 3 A cross-sectional schematic view of a third display panel provided by an embodiment of the application.

[0042] Figure 4 A flowchart of a manufacturing method of a display panel provided by an embodiment of the application.

[0043] Figure 5 A manufacturing scene diagram of a display panel is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0044] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person skilled in the art without creative work fall within the protection scope of the present application.

[0045] In the description of the present application, it should be understood that the terms "upper", "close to", "far away from" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, for example, "upper" only means that the surface is above the object, and specifically refers to the upper, oblique upper, upper surface, as long as it is above the object level, the above orientation or positional relationship is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first", "second" and the like are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more of the features.

[0046] In addition, it should be noted that the drawings provided only closely related structures and steps of the present application, and some details not closely related to the application are omitted, the purpose is to simplify the drawings, make the invention points clear at a glance, and not as the actual device and method are the same as the drawings, not as the actual device and method are limited. Figure 1

[0047] The present application provides a display panel, which includes but is not limited to the following embodiments and combinations of the following embodiments.

[0048] In an embodiment, as Figures 1 to 3 ​As shown, the display panel 100 includes: a driving circuit layer, including a plurality of driving circuits; an electrode layer, located on the driving circuit layer, including a plurality of electrode groups 10 corresponding one-to-one with the plurality of driving circuits, the electrode groups 10 being electrically connected to the corresponding driving circuits; a planarization layer 20, located between the driving circuit layer and the electrode layer, including a plurality of first planarization portions 201 and a plurality of second planarization portions 202 disposed on the same layer, the plurality of first planarization portions 201 corresponding one-to-one with the plurality of driving circuits, the plurality of second planarization portions 202 corresponding one-to-one with the plurality of electrode groups 10, the first planarization portions 201 being located on the side of the corresponding driving circuit closer to the electrode layer, the second planarization portions 202 being located on the side of the corresponding electrode group 10 closer to the driving circuit layer; and a light-emitting layer, located on the side of the electrode layer away from the driving circuit layer, including a plurality of light-emitting devices 30 corresponding one-to-one with the plurality of electrode groups 10, the light-emitting devices 30 being electrically connected to the corresponding electrode group 10; wherein, the thickness of the second planarization portion 202 is greater than the thickness of the first planarization portion 201.

[0049] Among them, such as Figures 1 to 3 As shown, multiple driving circuits can be arranged in an array, but are not limited to this array. Each driving circuit can include multiple electrically connected transistors, and these transistors can include driving transistors 40 electrically connected to the corresponding light-emitting device 30. The driving circuit layer can also include multiple gate lines and multiple data lines intersecting with the gate lines. Each driving circuit can be electrically connected to the corresponding gate line and the corresponding data line so that the corresponding driving transistor 40 drives the corresponding light-emitting device 30 to emit light. It should be noted that in the driving circuit layer, the driving circuit can include multiple stacked and spaced metal layers and an insulating layer between adjacent metal layers. This results in the driving circuit having a larger thickness compared to other areas in the driving circuit layer, causing the top of the driving circuit to be higher than the top of other areas in the driving circuit layer. For example, the top of the driving transistor 40 can be considered higher than the top of other areas in the driving circuit layer. Furthermore, the electrode group 10 can be positioned opposite the gap between adjacent driving circuits. If the thickness of the planarization layer 20 is uniform throughout, the top of the driving circuit layer will be higher than the top of the electrode group 10 in the vertical direction, and there will be a large distance between them, which is not conducive to fixing the light-emitting device 30 to the electrode group 10.

[0050] Understandably, in the planarization layer 20 of this embodiment, the thickness of the plurality of first planar portions 201, which correspond one-to-one with the plurality of driving circuits and are respectively arranged opposite each other, is set to be less than the thickness of the plurality of second planar portions 202, which correspond one-to-one with the plurality of electrode groups 10 and are respectively arranged opposite each other. That is, the second planar portions 202 with a larger thickness and the first planar portions 201 with a smaller thickness can reduce the distance between the top of the electrode group 10 and the top of the first planar portion 201 in the vertical direction. This is beneficial to make the top of the electrode group 10 and the top of the first planar portion 201 tend to be consistent or even the top of the electrode group 10 is higher than the top of the first planar portion 201. This can reduce the risk that the top of the first planar portion 201 is too high and blocks the light-emitting device 30 from contacting the electrode group 10, reduce the difficulty of fixing the light-emitting device 30 to the electrode group 10, improve the reliability of fixing the light-emitting device 30 to the electrode group 10, and improve the quality of the display screen.

[0051] In one embodiment, such as Figures 1 to 3 As shown, the display panel 100 further includes a black matrix layer 50, located on the side of the plurality of first flat portions 201 away from the driving circuit layer. The difference H between the top of the black matrix layer 50 and the substrate and the top of the electrode layer and the substrate is less than or equal to the thickness of the light-emitting device 30. Specifically, the black matrix layer 50 can cover the side of the plurality of first flat portions 201 away from the driving circuit layer, that is, the plurality of second flat portions 202 can be considered to be surrounded by the black matrix layer 50, or the black matrix layer 50 can be considered to surround the plurality of light-emitting devices 30. The black matrix layer 50 can absorb light emitted from the side of the light-emitting device 30 to reduce the risk of color mixing, and can also absorb external light to reduce reflectivity. The constituent materials of the black matrix layer 50 may include, but are not limited to, chromium, carbon black, and black resin.

[0052] It should be noted that, as discussed above, when the top of the black matrix layer 50 is higher than the top of the electrode layer, i.e., when the difference H mentioned above is greater than 0, since the black matrix layer 50 is arranged around the multiple second flat portions 202 used to support the multiple light-emitting devices 30, if the difference H mentioned above is too large, the top of the black matrix layer 50 will also be too high and will block the light-emitting devices 30 from contacting the electrode group 10. Understandably, the difference H mentioned above in this embodiment can be changed by adjusting, but not limited to, the thickness ratio of the second flat portion 202 and the first flat portion 201, and the thickness of the electrode group 10. In this embodiment, the difference H mentioned above is set to be less than or equal to the thickness of the light-emitting device 30, that is, the thickness of the light-emitting device 30 is sufficiently large compared to the difference H mentioned above. During the process of transferring the light-emitting device 30 to the corresponding second flat portion 202, the thickness of the light-emitting device 30 is sufficiently large so that the light-emitting device 30 can overcome the difference H mentioned above and contact the electrode layer, thereby improving the reliability of fixing the light-emitting device 30 to the electrode group 10 and improving the quality of the display screen.

[0053] In one embodiment, such as Figures 1 to 3 As shown, the difference H between the top of the black matrix layer 50 and the substrate, and the top of the electrode layer and the substrate, is less than or equal to 0. Figure 1 and Figure 3 In the middle, the top of the black matrix layer 50 is lower than the top of the electrode layer, that is, the difference H mentioned above is less than 0. Figure 2 In this embodiment, the top of the black matrix layer 50 is flush with the top of the electrode layer, meaning the difference H mentioned above is equal to 0. Specifically, in conjunction with the above discussion, the top of the electrode layer in this embodiment is higher than or flush with the top of the black matrix layer 50, meaning the black matrix layer 50 will not protrude from the multiple electrode groups 10 and obstruct the fixation of the light-emitting device 30 to the electrode groups 10. Therefore, compared to this embodiment where the top of the black matrix layer 50 is higher than the top of the electrode layer, during the process of transferring the light-emitting device 30 to the corresponding second flat portion 202, the light-emitting device 30 can avoid having to sink below the top of the black matrix layer 50 to contact the electrode group 10. Instead, it can contact the electrode group 10 when it is flush with or even higher than the top of the black matrix layer 50, improving the reliability of fixing the light-emitting device 30 to the electrode group 10 and improving the quality of the displayed image.

[0054] In one embodiment, such as Figures 1 to 3As shown, the display panel 100 further comprises a first passivation layer 60 between the plurality of first flat portions 201 and the black matrix layer 50, and the adhesion between the first passivation layer 60 and the black matrix layer 50 is greater than the adhesion between the first flat portion 201 and the black matrix layer 50. In combination with the above discussion, the black matrix layer 50 can comprise a black resin, which is an organic material, and the first flat portion 201 can comprise an organic insulating material, such as, but not limited to, polyimide, polyamic acid, polyamide, polyvinyl alcohol, polyvinyl cinnamate, or other suitable photoresist materials. It should be noted that since the first flat portion 201 and the black matrix layer 50 are both organic materials, their hydrophilicity is high or low, resulting in a large repulsion between the first flat portion 201 and the black matrix layer 50, and accordingly, a small adhesion therebetween.

[0055] It can be understood that in the present embodiment, the first passivation layer 60 is arranged between the plurality of first flat portions 201 and the black matrix layer 50, and the adhesion between the first passivation layer 60 and the black matrix layer 50 is greater than the adhesion between the first flat portion 201 and the black matrix layer 50, that is, the first passivation layer 60 can better indirectly fix the black matrix layer 50 on the first flat portion 201, reducing the risk of the black matrix layer 50 detaching. Specifically, the first passivation layer 60 can comprise an inorganic insulating material, such as, but not limited to, silicon oxide, silicon nitride, and silicon oxynitride. Due to the large difference in hydrophilicity between inorganic materials and organic materials, that is, the repulsion between the first passivation layer 60 and either of the first flat portion 201 and the black matrix layer 50 is small, or the adhesion therebetween is large, so as to better indirectly fix the black matrix layer 50 on the first flat portion 201.

[0056] In an embodiment, as shown in Figure 3 The second flat portion 202 is provided with a via hole 70, and the electrode group 10 is electrically connected to the corresponding driving circuit through the corresponding via hole 70. Specifically, in combination with the above discussion, the second flat portion 202 is located on the side of the corresponding electrode group 10 close to the driving circuit layer, that is, the electrode group 10 can be arranged opposite to the corresponding second flat portion 202. Specifically, in the present embodiment, the via hole 70 penetrating the second flat portion 202 is arranged, and the via hole 70 can be filled with a conductive material to electrically connect the corresponding electrode group 10 and the corresponding driving circuit. Further, the conductive material filled in the via hole can be the same as the material of the electrode group 10 to be prepared by the same process. In combination with the above discussion, the light emitting device 30 is electrically connected to the corresponding electrode group 10, that is, in the present embodiment, the light emitting device 30 can be electrically connected to the corresponding driving circuit through the corresponding electrode group 10, so as to be driven by the corresponding driving circuit to emit light.

[0057] In an embodiment, as shown in Figure 3 the via hole 70 includes a first via hole 701 and a second via hole 702 arranged in intervals, the electrode group 10 includes: a first electrode 101 electrically connected to a corresponding driving circuit through a corresponding first via hole 701; a second electrode 102 arranged in intervals with the first electrode 101 in the same layer and electrically connected to an electrode trace 80 through a corresponding second via hole 702. Wherein, the voltage of the part of the driving circuit electrically connected to the first electrode 101 can not be equal to the voltage of the electrode trace 80, so as to form a voltage difference between the first electrode 101 and the second electrode 102, thereby forming a current, in the light emitting device 30, the electrons in the N-type semiconductor and the holes in the P-type semiconductor collide and recombine in the light emitting layer to produce photons, and the energy is emitted in the form of photons, that is, it presents as light emission.

[0058] Specifically, the first via hole 701 can be arranged opposite to the first electrode 101, and the second via hole 702 can be arranged opposite to the second electrode 102. Similarly, the first via hole 701 and the second via hole 702 can be filled with a conductive substance to electrically connect the first electrode 101 to the corresponding driving circuit and electrically connect the second electrode 102 to the corresponding electrode trace 80. Of course, the first electrode 101 can also extend to fill the first via hole 701, and the second electrode 102 can also extend to fill the second via hole 702.

[0059] In an embodiment, as shown in Figure 3 the driving circuit includes: a driving transistor 40, the first electrode 101 is electrically connected to a drain 401 of a corresponding driving transistor 40, and the electrode trace 80 is arranged in the same layer as the drain 401 of the driving transistor 40. Wherein, in combination with the above discussion, the driving transistor 40 can be one of the transistors in the driving circuit electrically connected to the light emitting device 30, and the driving transistor 40 can be a top gate structure or a bottom gate structure. Here, the driving transistor 40 is taken as an example to illustrate the top gate structure.

[0060] Specifically, the display panel 100 can further include a substrate 90 for carrying the driving circuit layer, and a light shielding layer 11 and a buffer layer 12 can be further arranged between the substrate 90 and the driving circuit layer. The light shielding layer 11 can be arranged opposite to the plurality of driving circuits, and the buffer layer 12 can be located on the side of the light shielding layer 11 and the substrate 90 close to the driving circuit layer. Specifically, the driving transistor 40 can include an active layer 402, a gate insulating layer 403 located on the side of the active layer 402 away from the substrate 90, and a gate layer 404 located on the side of the gate insulating layer 403 away from the substrate 90. The light shielding layer 11 can be arranged opposite to at least the corresponding active layer 402 and beyond the side of the active layer 402 to ensure that the light is blocked from shining on the active layer 402 to avoid the problem of electric leakage. The side of the gate layer 404 away from the substrate 90 can be further provided with an interlayer insulating layer 405, which can further extend to cover the active layer 402 and the buffer layer 12. The interlayer insulating layer 405 can be provided with a third via hole 703 and a fourth via hole 704. The third via hole 703 can be arranged opposite to one end of the active layer 402, and the fourth via hole 704 can be arranged opposite to the other end of the active layer 402. The side of the interlayer insulating layer 405 away from the substrate 90 can be provided with a source-drain layer including a source 406 and a drain 401. The source 406 can be arranged opposite to the third via hole 703 and electrically connected to one end of the active layer 402 through the conductive material filled in the third via hole 703. The drain 401 can be arranged opposite to the fourth via hole 704 and electrically connected to the other end of the active layer 402 through the conductive material filled in the fourth via hole 704.

[0061] The substrate 90 can be a rigid substrate or a flexible substrate. The rigid substrate can be, but is not limited to, a glass substrate. The flexible substrate can be made of at least one of materials including, but not limited to, a flexible circuit board substrate, a printed circuit board substrate, and polyimide. The light shielding layer 11 can be a non-transparent film layer. The non-transparent film layer can be made of a material including, but not limited to, black resin or a light shielding metal with low reflectivity, such as, but not limited to, Cu or Mo. The buffer layer 12 can be made of a material including, but not limited to, silicon nitride and silicon oxide. The active layer 402 can be made of, but is not limited to, amorphous silicon, polysilicon, an organic material, or a metal oxide. The active layer 402 made of polysilicon can be doped with, but is not limited to, phosphorus ions or boron ions at both ends to form a source contact region and a drain contact region, respectively. The source contact region is electrically connected to a corresponding source electrode 406, and the drain contact region is electrically connected to a corresponding drain electrode 401. The gate insulating layer 403 and the interlayer insulating layer 405 can be made of a material including, but not limited to, an inorganic dielectric material and an organic dielectric material. The inorganic dielectric material can include, but is not limited to, silicon oxide, silicon nitride, and silicon oxynitride. The organic dielectric material can be a high molecular material including, but not limited to, a polyimide resin, an epoxy resin, and an acrylic resin. The gate electrode layer 404 and the source / drain electrode layer can be made of a material including, but not limited to, a metal, a metal oxide, a metal nitride, and a metal oxynitride. The metal can be, but is not limited to, Cu, Al, Mo, or Ti.

[0062] Further, the source electrode 406 of the driving transistor 40 can be electrically connected to the light shielding layer 11 through a fifth via hole 705 penetrating the interlayer insulating layer 405 and part of the buffer layer 12 to achieve electrostatic discharge. It can be considered that the source electrode 406 extends to the side opposite to one end of the light shielding layer 11. In combination with the above description, the electrode trace 80 is disposed in the same layer as the drain electrode 401 of the driving transistor 40. Further, the electrode trace 80 can be located on the side of the corresponding drain electrode 401 away from the corresponding active layer 402, so that the light emitting device 30 is electrically connected to the corresponding drain electrode 401 and the corresponding electrode trace 80. The electrode trace 80 can be made of the same material as the source / drain electrode layer. Further, the display panel 100 can further include a second passivation layer 13 covering the source / drain electrode layer, the electrode trace 80, and the interlayer insulating layer 405. The second passivation layer 13 can be made of the same material as the first passivation layer 60.

[0063] In an embodiment, as Figure 3As shown, the electrode group 10 comprises: a first sub-electrode part 103 electrically connected to the corresponding driving circuit through the corresponding via hole 70, the constituent material of the first sub-electrode part 103 comprising metal; a second sub-electrode part 104 located on the side of the first sub-electrode part 103 away from the driving circuit, electrically connected between the first sub-electrode part 103 and the corresponding light emitting device 30, the constituent material of the second sub-electrode part 104 comprising metal oxide. Specifically, the first sub-electrode part 103 can be made of but is not limited to metal, and the second sub-electrode part 104 can be made of but is not limited to metal oxide, wherein the metal can comprise but is not limited to copper and aluminum, and the metal oxide can be but is not limited to indium tin oxide. It can be understood that the first sub-electrode part 103 made of metal has a smaller resistivity, i.e., a larger conductivity, and the second sub-electrode part 104 made of metal oxide has a larger oxidation resistance, which can reduce the risk of oxidation and failure of the first sub-electrode part 103 while maintaining electrical conductivity, thereby improving the reliability of the electrode group 10.

[0064] In an embodiment, as shown in Figure 3 The light emitting device 30 is a micro light emitting diode or a sub-millimeter light emitting diode. It can be understood that the micro light emitting diode or the sub-millimeter light emitting diode can be fixed on the electrode group 10 by transfer, i.e., the present application can improve but is not limited to the problem of low reliability of the micro light emitting diode or the sub-millimeter light emitting diode when transferred to the electrode group 10. Specifically, the light emitting colors of the plurality of light emitting devices 30 can be the same or different, if the same, it can be blue, and can be matched with a color conversion layer made of but not limited to doped fluorescent powder, QD quantum dots, and organic dyes in glue to realize color display, if different, the light emitting colors of two adjacent light emitting devices 30 can be different.

[0065] The light-emitting device 30 can include a first light-emitting electrode 301, a second light-emitting electrode 302 and a light-emitting body 303 arranged oppositely, the first light-emitting electrode 301 can be in contact with the first electrode 101 for electrical connection, and the second light-emitting electrode 302 can be in contact with the second electrode 102 for electrical connection. As discussed above, a voltage difference is formed between the first electrode 101 and the second electrode 102, so that a voltage difference is also formed between the first light-emitting electrode 301 and the second light-emitting electrode 302 to form a current flowing through the light-emitting device 30. In the light-emitting device 30, electrons in the N-type semiconductor and holes in the P-type semiconductor collide and recombine in the light-emitting layer to generate photons, and the energy is emitted in the form of photons, that is, light emission. Further, the display panel 100 can further include an encapsulating adhesive layer located away from the driving circuit layer on the side of the plurality of light-emitting devices 30, the black matrix layer 50 and the planar layer 20, the encapsulating adhesive layer can be transparent, and the encapsulating adhesive layer can be prepared by transparent adhesive, but is not limited to this.

[0066] The present application provides an electronic terminal including the display panel 100 according to any one of the above, and further, the light-emitting device 30 in the display panel 100 can be used as a sub-pixel for image display, or can be used as a backlight source for image display through liquid crystal molecules.

[0067] The present application provides a manufacturing method of the display panel, as shown in Figure 4 The manufacturing method of the display panel includes but is not limited to the following steps and combinations of the following steps.

[0068] S1, providing a driving circuit layer including a plurality of driving circuits.

[0069] Specifically, as shown in Figure 5 The plurality of driving circuits can be arranged in an array, but are not limited to this. The driving circuit can include a plurality of transistors electrically connected, and the plurality of transistors can include a driving transistor 40. The driving circuit layer can further include a plurality of gate lines and a plurality of data lines arranged to intersect the plurality of gate lines. It should be noted that in the driving circuit layer, the driving circuit can include a plurality of metal layers stacked and arranged at intervals, and an insulating layer arranged between the adjacent two metal layers, so that the driving circuit has a greater thickness than other regions in the driving circuit layer, causing the top of the driving circuit to be higher than the top of other regions in the driving circuit layer.

[0070] The plurality of driving circuits can be arranged in an array, but are not limited to this. The driving circuit can include a plurality of transistors electrically connected, and the plurality of transistors can include a driving transistor 40. The driving circuit layer can further include a plurality of gate lines and a plurality of data lines arranged to intersect the plurality of gate lines. It should be noted that in the driving circuit layer, the driving circuit can include a plurality of metal layers stacked and arranged at intervals, and an insulating layer arranged between the adjacent two metal layers, so that the driving circuit has a greater thickness than other regions in the driving circuit layer, causing the top of the driving circuit to be higher than the top of other regions in the driving circuit layer. Figure 5As shown, it may also include electrode traces 80 disposed on the same layer as the source and drain layers. Step S1 may include: providing a substrate 90; forming a light-shielding layer 11 and a buffer layer 12 on the substrate 90, wherein the light-shielding layer 11 may be disposed opposite to multiple driving circuits, and the buffer layer 12 may be located on the side of the light-shielding layer 11 and the substrate 90 closer to the driving circuit layer, and the light-shielding layer 11 may be disposed opposite to at least multiple driving transistors 40. Specifically, the features of the relevant structures in this embodiment can be referred to the above description of the electrode traces 80, the substrate 90, the light-shielding layer 11, and the buffer layer 12.

[0071] Among them, such as Figure 5 As shown, the driving transistor 40 may include an active layer 402, a gate insulating layer 403 located on the side of the active layer 402 away from the substrate 90, and a gate layer 404 located on the side of the gate insulating layer 403 away from the substrate 90. The light-shielding layer 11 may be disposed at least opposite to the corresponding active layer 402 and extend beyond the side of the active layer 402 to ensure that light is blocked from reaching the active layer 402 to avoid leakage problems. An inter-insulating layer 405 may also be provided on the side of the gate layer 404 away from the substrate 90. The inter-insulating layer 405 may extend to cover the active layer 402 and the buffer layer 12. A third via 7 may be provided on the inter-insulating layer 405. 03 and the fourth via 704, the third via 703 can be disposed opposite to one end of the active layer 402, the fourth via 704 can be disposed opposite to the other end of the active layer 402, the insulating layer 405 can be provided with a source-drain layer on the side away from the substrate 90, the source-drain layer includes a source 406 and a drain 401, the source 406 can be disposed opposite to the third via 703 and electrically connected to one end of the active layer 402 through the conductive material filled in the third via 703, the drain 401 can be disposed opposite to the fourth via 704 and electrically connected to the other end of the active layer 402 through the conductive material filled in the fourth via 704.

[0072] S2, a planarization film is formed on the driving circuit layer, and the planarization film is processed by a grayscale photomask to form a planarization layer. The planarization layer includes a plurality of first planarization portions and a plurality of second planarization portions disposed on the same layer. The thickness of the second planarization portions is greater than the thickness of the first planarization portions. The planarization layer is provided with vias. The plurality of first planarization portions correspond one-to-one with the plurality of driving circuits.

[0073] Before step S2, such as Figure 5 As shown, a second passivation layer 13 can be formed on the driving circuit layer. The second passivation layer 13 may include a source-drain layer, an electrode trace 80, and an interlayer insulating layer 405. The constituent material of the second passivation layer 13 may be an inorganic insulating material, such as including but not limited to silicon oxide, silicon nitride, and silicon oxynitride.

[0074] The constituent materials of the planarization film 19 used to form the planarization layer 20 may include organic insulating materials, such as, but not limited to, polyimide, polyamic acid, polyamide, polyvinyl alcohol, polyvinyl cinnamate, or other suitable photoresist materials. Specifically, such as... Figure 5 As shown, in step S2, the grayscale photomask 18 can be positioned opposite to the planarization film. Based on this, the grayscale photomask 18 can include a first region A, a second region B, and a third region C with successively decreasing transmittance. For example, the first region A can be a fully transparent region, the second region B can be a partially transparent region, and the third region C can be an opaque region. In conjunction with the photolithography process, the three regions in the planarization film corresponding to the first region A, the second region B, and the third region C can be formed as vias 70, a first planarization portion 201, and a second planarization portion 202, respectively, to form the planarization layer 20. It should be noted that the portion of the second passivation layer 13 corresponding to the via 70 can also have a corresponding via. Specifically, the features of the relevant structures in this embodiment can be referred to in the above description of the via 70, the first planarization portion 201, and the second planarization portion 202.

[0075] As can be understood, based on the above discussion, the top of the driving circuit is higher than the top of other areas in the driving circuit layer. This can be understood as the top of the driving transistor 40 being higher than the top of other areas in the driving circuit layer. In this embodiment, the thickness of the second flat portion 202 is greater than the thickness of the first flat portion 201, which makes the distance between the top of the first flat portion 201 and the top of the second flat portion 202 smaller than the distance between the top of the driving transistor 40 and the top of other areas in the driving circuit layer, thus reducing the distance.

[0076] S3, an electrode layer is formed on the planarization layer, including a plurality of electrode groups corresponding to a plurality of driving circuits. The electrode groups are electrically connected to the corresponding driving circuits through the vias. A plurality of second planar portions correspond to a plurality of electrode groups. The second planar portions are located on the side of the corresponding electrode group closer to the driving circuit layer.

[0077] Specifically, such as Figure 5 As shown, in conjunction with the above discussion that "a plurality of first flat portions 201 correspond one-to-one with a plurality of driving circuits" and "an electrode layer is formed on the flat layer", that is, the first flat portion 201 is located on the side of the corresponding driving circuit near the electrode layer, and "the second flat portion 202 is located on the side of the corresponding electrode group 10 near the driving circuit layer", that is, the flat layer 20 including the first flat portion 201 and the second flat portion 202 arranged in the same layer is located between the driving circuit layer and the electrode layer, the first flat portion 201 is arranged opposite to the corresponding driving circuit, and the second flat portion 202 is arranged opposite to the corresponding electrode group 10, that is, it can be considered that the driving circuit and the electrode group 10 are also spaced apart in the horizontal direction.

[0078] It can be understood that, since the electrode group 10 in the embodiment is located on the side of the second flat portion 202 away from the driving circuit layer, and the thickness of the second flat portion 202 is greater than the thickness of the first flat portion 201, that is, the second flat portion 202 with greater thickness and the first flat portion 201 with smaller thickness can reduce the distance between the top of the electrode group 10 and the top of the first flat portion 201 in the vertical direction, thereby avoiding the top of the electrode group 10 being too low from the top of the first flat portion 201.

[0079] S4, forming a light-emitting layer on the electrode layer, including a plurality of light-emitting devices corresponding to a plurality of electrode groups one by one, the light-emitting device is electrically connected to the corresponding electrode group.

[0080] Specifically, as shown in Figure 5 Combining the above discussion, the light-emitting device 30 and the corresponding electrode group 10 are sequentially stacked on the corresponding second flat portion 202. It can be understood that, in the embodiment, the thickness of the second flat portion 202 is greater than the thickness of the first flat portion 201, thereby avoiding the electrode group 10 between the adjacent two first flat portions 201 forming a obvious "concave" type, but can reduce the distance between the top of the electrode group 10 for carrying the light-emitting device 30 and the top of the first flat portion 201, which can reduce the risk of the top of the first flat portion 201 being too high to block the light-emitting device 30 from contacting the electrode group 10, reduce the difficulty of fixing the light-emitting device 30 to the electrode group 10, improve the reliability of fixing the light-emitting device 30 to the electrode group 10, and improve the quality of the display picture.

[0081] As shown in Figure 5 Before step S4, as shown in The conductive material filled in the via hole 70 can be the same as the composition material of the electrode group 10, so as to form the conductive material filled in the via hole 70 and the electrode group 10 at the same time by the same material and the same process.

[0082] Figure 5 After step S4, as shown in Specifically, the features of the related structure in the embodiment can refer to the related description of the electrode group 10, the first passivation layer 60 and the black matrix layer 50 above.

[0083] The application provides a display panel, a manufacturing method thereof and an electronic terminal, comprising: a driving circuit layer comprising a plurality of driving circuits; an electrode layer located on the driving circuit layer and comprising a plurality of electrode groups corresponding to the plurality of driving circuits one by one, the electrode groups being electrically connected to the corresponding driving circuits; a flat layer located between the driving circuit layer and the electrode layer and comprising a plurality of first flat parts and a plurality of second flat parts arranged in the same layer, the plurality of first flat parts corresponding to the plurality of driving circuits one by one, the plurality of second flat parts corresponding to the plurality of electrode groups one by one, the first flat part being located on the side of the corresponding driving circuit close to the electrode layer, and the second flat part being located on the side of the corresponding electrode group close to the driving circuit layer; and a light-emitting layer located on the side of the electrode layer away from the driving circuit layer and comprising a plurality of light-emitting devices corresponding to the plurality of electrode groups one by one, the light-emitting devices being electrically connected to the corresponding electrode groups; wherein the thickness of the second flat part is greater than the thickness of the first flat part, so that the difference between the distance between the top of the electrode group and the substrate and the distance between the top of the first flat part and the substrate in the vertical direction can be reduced, the risk of the top of the first flat part being too high to block the light-emitting device from contacting the electrode group can be reduced, the reliability of the light-emitting device fixed to the electrode group can be improved, and the quality of the display picture can be improved.

[0084] The display panel, the manufacturing method thereof and the electronic terminal provided by the embodiments of the application are described in detail above, and the principles and implementation manners of the application are described by applying specific examples in this paper, and the above description of the embodiments is only used to help understand the technical solutions and the core ideas of the application; those skilled in the art should understand that the technical solutions recorded in the above embodiments can be modified or some technical features can be replaced by equivalents; and the modification or replacement does not make the essence of the corresponding technical solution deviate from the scope of the technical solutions of the embodiments of the application.

Claims

1. A display panel, characterized by, Comprise: a driving circuit layer comprising a plurality of driving circuits; an electrode layer on the driving circuit layer, comprising a plurality of electrode groups corresponding to the plurality of driving circuits, the electrode groups being electrically connected to the corresponding driving circuits; a flat layer between the driving circuit layer and the electrode layer, comprising a plurality of first flat parts and a plurality of second flat parts arranged in the same layer, the plurality of first flat parts corresponding to the plurality of driving circuits, the plurality of second flat parts corresponding to the plurality of electrode groups, the first flat part being located on the side of the corresponding driving circuit close to the electrode layer, and the second flat part being located on the side of the corresponding electrode group close to the driving circuit layer; a light-emitting layer on the side of the electrode layer away from the driving circuit layer, comprising a plurality of light-emitting devices corresponding to the plurality of electrode groups, the light-emitting devices being electrically connected to the corresponding electrode groups; a substrate on the side of the driving circuit layer away from the electrode layer; a black matrix layer on the side of the plurality of first flat parts away from the driving circuit layer; wherein the thickness of the second flat part is greater than the thickness of the first flat part, and the distance between the top of the black matrix layer and the substrate is equal to the distance between the top of the second flat part and the substrate.

2. The display panel of claim 1, wherein, The difference between the distance between the top of the black matrix layer and the substrate and the distance between the top of the electrode layer and the substrate is less than or equal to the thickness of the light-emitting device.

3. The display panel of claim 2, wherein, The difference between the distance between the top of the black matrix layer and the substrate and the distance between the top of the electrode layer and the substrate is less than or equal to 0.

4. The display panel of claim 2, wherein, Further comprising: a first passivation layer between the plurality of first flat parts and the black matrix layer, the adhesion between the first passivation layer and the black matrix layer being greater than the adhesion between the first flat part and the black matrix layer.

5. The display panel of claim 1, wherein, The second flat part is provided with a via hole, and the electrode group is electrically connected to the corresponding driving circuit through the corresponding via hole.

6. The display panel of claim 5, wherein, The electrode group comprises: a first sub-electrode part electrically connected to the corresponding driving circuit through the corresponding via hole, the composition material of the first sub-electrode part comprising metal; a second sub-electrode part on the side of the first sub-electrode part away from the driving circuit, electrically connected between the first sub-electrode part and the corresponding light-emitting device, the composition material of the second sub-electrode part comprising metal oxide.

7. The display panel of claim 5, wherein, The via hole comprises a first via hole and a second via hole arranged at intervals, and the electrode group comprises: a first electrode electrically connected to the corresponding driving circuit through the corresponding first via hole; a second electrode arranged at intervals in the same layer as the first electrode and electrically connected to the electrode trace through the corresponding second via hole.

8. The display panel of claim 7, wherein, The driving circuit comprises: a driving transistor, the first electrode being electrically connected to the drain of the corresponding driving transistor, and the electrode trace being arranged in the same layer as the drain of the driving transistor.

9. The display panel of claim 1, wherein, The light-emitting device is a micro light-emitting diode or a sub-millimeter light-emitting diode.

10. An electronic terminal, characterized in that The display panel comprises any one of claims 1 to 9.

11. A manufacturing method of a display panel, comprising: Comprise: providing a driving circuit layer comprising a plurality of driving circuits; Forming a flat film on the driving circuit layer, and forming a flat layer by processing the flat film through a gray-scale photomask, the flat layer comprising a plurality of first flat parts and a plurality of second flat parts arranged in the same layer, the thickness of the second flat part being greater than the thickness of the first flat part, the flat layer being provided with a via hole, a plurality of the first flat parts corresponding to a plurality of the driving circuits one by one; Forming an electrode layer on the flat layer, comprising a plurality of electrode groups corresponding to a plurality of the driving circuits one by one, the electrode group being electrically connected to the corresponding driving circuit through the via hole, the first flat part being located on the side of the corresponding driving circuit close to the electrode layer, a plurality of the second flat parts corresponding to a plurality of the electrode groups one by one, the second flat part being located on the side of the corresponding electrode group close to the driving circuit layer; Forming a light-emitting layer on the electrode layer, comprising a plurality of light-emitting devices corresponding to a plurality of the electrode groups one by one, the light-emitting device being electrically connected to the corresponding electrode group; The display panel further comprises: a substrate located on the side of the driving circuit layer away from the electrode layer; a black matrix layer located on the side of a plurality of the first flat parts away from the driving circuit layer, the distance between the top of the black matrix layer and the substrate being equal to the distance between the top of the second flat part and the substrate.

12. The method of manufacturing a display panel according to claim 11, wherein The gray-scale photomask comprises a first region, a second region and a third region with light transmittance decreasing in turn; The step of forming a flat layer by processing the flat film through a gray-scale photomask comprises: arranging the gray-scale photomask opposite to the flat film; processing the corresponding part of the flat film through the first region in the gray-scale photomask to form the via hole, processing the corresponding part of the flat film through the second region in the gray-scale photomask to form the first flat part, and processing the corresponding part of the flat film through the third region in the gray-scale photomask to form the second flat part.

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