A control method of three-phase unified power quality conditioner (UPQC)

Abstract

This invention discloses a three-phase unified power quality regulator (UPQC) control method, comprising the following steps: acquiring system modulation parameters and setting active vectors; synthesizing virtual vectors based on the active vectors; distributing the virtual vectors and active vectors in different sectors; calculating the action time of the virtual vectors and the action time of the active vectors in different sectors; and outputting a PWM signal to control the operation of the power quality regulator based on the action time of the virtual vectors and the action time of the active vectors. This invention effectively suppresses the DC bus inductor current ripple of the unified power quality regulator by controlling the virtual vector action sequence and virtual vector action time, thereby reducing not only the hysteresis loss and eddy current loss on the inductor, but also the current stress and switching loss of the series and parallel converters, improving system efficiency and system operating performance.

Description

Technical Field

[0001] This invention relates to the field of power grid power quality control technology, and in particular to a three-phase unified power quality regulator (UPQC) control method. Background Technology

[0002] With the connection of numerous nonlinear loads to the power grid, power quality problems have become increasingly serious, causing issues such as grid voltage instability, harmonic pollution, three-phase voltage imbalance, and reactive power. Therefore, the Unified Power Quality Conditioner (UPQC) has emerged. Its topology mainly consists of series and parallel converters, which can compensate for harmonic voltages and suppress voltage fluctuations, as well as compensate for harmonic and reactive currents. In current-source type UPQCs, the DC bus inductor plays a crucial role as the link connecting the series and parallel converters. Melín et al. published a paper in the internationally renowned journal IEEE Transactions on Power Delivery, "Analysis, design and control of unified power-quality conditioner based on a current-source topology," proposing a novel current-source type three-phase unified power quality conditioner and a control strategy based on an input-output linearization model, including voltage swell and voltage sag system voltage fault ride-through control strategies, and providing design steps for a 3.3kV@1.17MVA system. However, no effective solution was provided for the problem of suppressing the DC bus inductor current ripple. In practical applications, because the series and parallel converters of the unified power quality regulator operate at high frequencies, high-frequency current ripple inevitably forms in the DC bus inductor. This not only increases the hysteresis and eddy current losses in the inductor but also increases the current stress and switching losses in the series and parallel converters. Therefore, it is urgent to propose a control method to solve the problem of suppressing DC inductor current ripple in the unified power quality regulator. Summary of the Invention

[0003] This invention primarily addresses the problem of current ripple in the DC inductor of power quality regulators in existing technologies; it provides a UPQC control method for a three-phase unified power quality regulator to solve the problem of suppressing current ripple in the DC inductor of the unified power quality regulator.

[0004] A further objective of this invention is to effectively suppress the DC bus inductor current ripple of the unified power quality regulator by controlling the virtual vector action sequence and virtual vector action time. This not only reduces the hysteresis loss and eddy current loss on the inductor, but also reduces the current stress and switching loss of the series converter and the parallel converter, thereby improving system efficiency and system operating performance.

[0005] The above-mentioned technical problem of the present invention is mainly solved by the following technical solution: a three-phase unified power quality regulator (UPQC) control method, comprising the following steps:

[0006] Obtain system modulation parameters and set the active vector;

[0007] Virtual vectors are synthesized from active vectors;

[0008] The virtual vector and the active vector are distributed in different sectors;

[0009] Calculate the duration of action of the virtual vector and the duration of action of the active vector in different sectors;

[0010] The power quality regulator is controlled by outputting a PWM signal based on the duration of action of the virtual vector and the duration of action of the active vector.

[0011] Preferably, the system modulation parameters include modulation index m and reference current I. ref Angular displacement θ and switching period T.

[0012] Preferably, based on the reference current I ref The spatial vector diagram is divided into the first sector, the second sector, the third sector, the fourth sector, the fifth sector, and the sixth sector by the angular displacement θ.

[0013] Preferably, the virtual vector I is synthesized from the active vectors I1 and I6. a Virtual vector I is synthesized from active vectors I1 and I2. b Virtual vector I is synthesized from active vectors I3 and I2. f .

[0014] Preferably, virtual vector I a I b I f If set in the first sector, then the virtual vector I a I b I f The durations of action are as follows:

[0015]

[0016] Among them, T a For virtual vector Ia Duration of action, T b For virtual vector I b Duration of action, T f For virtual vector I f The duration of action.

[0017] Preferably, the activation times of the active vectors I1, I2, I3, and I6 are as follows:

[0018]

[0019] Among them, T n T is the duration of action of the active vector I1. n+1 T is the duration of action of the active vector I2. n+2 T is the duration of action of the active vector I3. n-1 The duration of action of the active vector I6.

[0020] The beneficial effects of this invention are: by controlling the virtual vector action sequence and virtual vector action time of the unified power quality regulator, the DC bus inductor current ripple of the unified power quality regulator is effectively suppressed, which not only reduces the hysteresis loss and eddy current loss on the inductor, but also reduces the current stress and switching loss of the series converter and the parallel converter, thereby improving the system efficiency and system operating performance. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of a three-phase unified power quality regulator.

[0022] Figure 2 This is a flowchart illustrating the implementation of the method of the present invention.

[0023] Figure 3 This is a schematic diagram of the virtual space vector of the UPQC series converter or parallel converter of the present invention.

[0024] Figure 4 This is a schematic diagram of the reference vector synthesis principle of the UPQC series converter or parallel converter of the present invention (taking the first sector as an example).

[0025] Figure 5 The active vector action sequence of the UPQC series converter or parallel converter of the present invention (taking the first sector as an example). Detailed Implementation

[0026] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.

[0027] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the invention.

[0028] Example:

[0029] A three-phase unified power quality regulator (UPQC) control method, such as Figure 2 As shown, it includes the following steps:

[0030] S1: Obtain system modulation parameters and set the active vector; for example... Figure 1 As shown, the circuit topology of the Unified Power Quality Conditioner (UPQC) includes a series converter and a parallel converter. The system modulation parameters include the modulation index m and the reference current I. ref Angular displacement θ and switching period T, I a -I f I1-I6 are virtual vectors, and T is an active vector. a -T f T1 represents the virtual vector application time, while T6 represents the active vector application time.

[0031] S2: Synthesize a virtual vector based on the active vector; such as Figure 3 and Figure 4 As shown, a virtual vector I is synthesized from the active vectors I1 and I6. a Virtual vector I is synthesized from active vectors I1 and I2. b Virtual vector I is synthesized from active vectors I3 and I2. f Virtual vector I is synthesized from active vectors I3 and I4. c Virtual vector I is synthesized from active vectors I4 and I5. d Virtual vector I is synthesized from active vectors I5 and I6. e .

[0032] S3: Distribute the virtual vector and active vector in different sectors; based on the reference current I... refThe spatial vector diagram is divided into the first sector, the second sector, the third sector, the fourth sector, the fifth sector, and the sixth sector by the angular displacement θ.

[0033] Virtual vector I a I b I f Set in the first sector, virtual vector I a I b I c Set in the second sector, virtual vector I d I b I c Set in the third sector, virtual vector I c I d I e Set in the fourth sector, virtual vector I e I f I d Set in the fifth sector, virtual vector I f I a I e It is set in the sixth sector.

[0034] like Figure 5 As shown, the active vectors are sorted. Since the virtual vectors are synthesized from the active vectors, the sorting of the virtual vectors is achieved based on the sorted active vectors.

[0035] The sorted distribution of the virtual vector action sequence is shown in Table 1:

[0036] Table 1 Virtual Vector Sequence

[0037]

[0038] The order distribution of the active vector action sequence is shown in Table 2:

[0039] Table 2. Active vector sequences in different sectors

[0040] sector Active vector sequence 1 <![CDATA[I1,I6,I1,I2,I3,I2 <!-- 3 -->]]> 2 <![CDATA[I2,I1,I2,I3,I4,I3]]> 3 <![CDATA[I3,I2,I3,I4,I5,I4]]> 4 <![CDATA[I4,I3,I4,I5,I6,I5]]> 5 <![CDATA[I5,I4,I5,I6,I1,I6]]> 6 <![CDATA[I6,I5,I6,I1,I2,I1]]>

[0041] S4: Calculate the duration of action of the virtual vector and the duration of action of the active vector in different sectors; taking the first sector as an example, the virtual vector I... a I b I f The durations of action are as follows:

[0042]

[0043] Among them, T a For virtual vector I a Duration of action, T b For virtual vector Ib Duration of action, T f For virtual vector I f The duration of action.

[0044] The durations of action of the active vectors I1, I2, I3, and I6 are as follows:

[0045]

[0046] Among them, T n T is the duration of action of the active vector I1. n+1 T is the duration of action of the active vector I2. n+2 T is the duration of action of the active vector I3. n-1 The duration of action of the active vector I6.

[0047] S5: Outputs a PWM signal to control the power quality regulator based on the duration of action of the virtual vector and the duration of action of the active vector.

[0048] This invention effectively suppresses the DC bus inductor current ripple of the unified power quality regulator by controlling the virtual vector action sequence and virtual vector action time. This not only reduces the hysteresis loss and eddy current loss on the inductor, but also reduces the current stress and switching loss of the series converter and parallel converter, thereby improving system efficiency and system operating performance.

[0049] The embodiments described above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any way. Other variations and modifications are possible without departing from the technical solutions described in the claims.

Claims

1. A three-phase unified power quality regulator (UPQC) control method, characterized in that, Includes the following steps: Obtain system modulation parameters and set the active vector; Virtual vectors are synthesized from active vectors; The spatial vector diagram is divided into six sectors based on the reference current Iref and angular displacement θ, and corresponding virtual vectors and active vectors are set in each sector. Set virtual vectors Ia, Ib, and If in the first sector; set virtual vectors Ia, Ib, and Ic in the second sector; set virtual vectors Id, Ib, and Ic in the third sector; set virtual vectors Ic, Id, and Ie in the fourth sector; set virtual vectors Ie, If, and Id in the fifth sector; and set virtual vectors If, Ia, and Ie in the sixth sector. Calculate the duration of action of the virtual vector and the duration of action of the active vector in different sectors; The power quality regulator is controlled by outputting a PWM signal based on the duration of action of the virtual vector and the duration of action of the active vector. By controlling the virtual vector action sequence and virtual vector action time of the unified power quality regulator, the DC bus inductor current ripple of the unified power quality regulator is suppressed.

2. The three-phase unified power quality regulator (UPQC) control method according to claim 1, characterized in that, The system modulation parameters include modulation index m, reference current Iref, angular displacement θ, and switching period T.

3. The three-phase unified power quality regulator (UPQC) control method according to claim 2, characterized in that, The spatial vector diagram is divided into the first sector, the second sector, the third sector, the fourth sector, the fifth sector, and the sixth sector based on the reference current Iref and the angular displacement θ.

4. The UPQC control method for a three-phase unified power quality regulator according to claim 3, characterized in that, Virtual vector Ia is synthesized from active vectors I1 and I6, virtual vector Ib is synthesized from active vectors I1 and I2, and virtual vector If is synthesized from active vectors I3 and I2.

5. The three-phase unified power quality regulator (UPQC) control method according to claim 4, characterized in that, If virtual vectors Ia, Ib, and If are set in the first sector, then the durations of action of virtual vectors Ia, Ib, and If are respectively: Where Ta is the duration of action of the virtual vector Ia, Tb is the duration of action of the virtual vector Ib, and Tf is the duration of action of the virtual vector If.

6. A three-phase unified power quality regulator (UPQC) control method according to claim 4 or 5, characterized in that, The durations of action of the active vectors I1, I2, I3, and I6 are as follows: Where Tn is the duration of action of the active vector I1, Tn+1 is the duration of action of the active vector I2, Tn+2 is the duration of action of the active vector I3, and Tn-1 is the duration of action of the active vector I6.

7. The UPQC control method for a three-phase unified power quality regulator according to claim 1, characterized in that, The method sorts the active vectors. Since the virtual vectors are synthesized from the active vectors, the virtual vectors are sorted based on the sorted active vectors.

Images