A terahertz synapse resistive memory device and a preparation method thereof

Abstract

The application discloses a terahertz neural synapse memorization device and a preparation method thereof. The terahertz neural synapse memorization device comprises a substrate, an active region formed on the substrate, two electrodes in the form of interdigital electrodes, the two electrodes comprising test parts and finger parts, the test parts of the two electrodes being respectively formed on two sides of the active region, the finger parts being arranged on the active region in a staggered manner at a certain interval, and the interval between adjacent finger parts being controlled at a nanometer level; the two electrodes are respectively used as a presynaptic end and a postsynaptic end of a neural synapse, a high-frequency voltage signal is applied to the presynaptic end as an excitation source of the neural synapse, and a current signal response of the postsynaptic end is collected, so that a terahertz neural morphological calculation function is realized.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to a terahertz neural synaptic memristor device and its fabrication method. Background Technology

[0002] Neuromorphic computing, as a highly efficient computing method, can break through the bottlenecks of traditional von Neumann architectures, especially through the functional integration of storage and computing units, avoiding additional energy consumption and improving computational efficiency. As a key component, the neuromorphic memristor plays a crucial role in improving the overall system's computational energy efficiency through speed and power consumption optimization.

[0003] The human brain's neural synapses respond at a frequency of 100 Hz, enabling them to efficiently perform complex computational tasks and vital functions. Inspired by the human brain, constructing biomimetic neural synapse devices holds the potential to achieve intelligent computing similar to that of the human brain. However, limited by fabrication processes and device structures, the response frequencies of traditional neural synapse devices are typically between 10 Hz and 1 kHz. To further improve the computational efficiency of these devices, developing high-frequency neuromorphic devices has become the next-generation direction for brain-like computing.

[0004] Terahertz waves operate at a frequency of 1000 GHz, resulting in extremely fast device response times. However, terahertz devices are primarily used in wireless communication and security systems, with no reports on their application in neuromorphic computing. Developing terahertz synaptic devices could significantly improve operating speed, enabling the creation of high-speed biomimetic synapses and computing systems that far surpass the human brain, demonstrating excellent application prospects.

[0005] On the other hand, with the advancement of Moore's Law, device dimensions are continuously shrinking and approaching physical limits, making the development of nanoscale devices imperative. Fabricating devices in planar nanoscale not only improves the integration density of semiconductor circuits but is also more suitable for applications in terahertz neuromorphic devices. Summary of the Invention

[0006] To address the aforementioned problems, this invention discloses a terahertz neuromorphic memristor device comprising: a substrate; an active region formed on the substrate; and two electrodes, which are interdigitated and include a test portion and a finger portion. The test portions of the two electrodes are respectively formed on both sides of the active region, and the finger portions are arranged alternately at a certain interval on the active region, with the spacing between adjacent finger portions controlled at the nanometer level. The two electrodes are used as the synaptic front end and synaptic back end of a neural synapse, respectively. A high-frequency voltage signal is applied to the synaptic front end as the excitation source of the neural synapse, and the current signal response at the synaptic back end is acquired, thereby realizing the terahertz neuromorphic computing function.

[0007] In the terahertz synaptic memristor device of the present invention, the active region is preferably made of SiO2, Si3N4, Al2O3 or SnO2.

[0008] In the terahertz synaptic memristor device of the present invention, preferably, the active region has a length of 30nm to 80nm and a width of 20nm to 80nm.

[0009] In the terahertz synaptic memristor device of the present invention, preferably, the material of the electrode is Al, Au, Pt or Ag.

[0010] This invention also discloses a method for fabricating a terahertz synaptic memristor device, comprising the following steps: preparing a substrate; growing a functional layer on the substrate, and photolithographically etching to form an active region; forming two interdigitated electrodes in the active region, including a test portion and a finger portion, wherein the test portions of the two electrodes are respectively formed on both sides of the active region, and the finger portions are arranged alternately on the active region at a certain interval, and the spacing between adjacent finger portions is controlled at the nanometer level; using the two electrodes as the synaptic front end and synaptic back end of the synapse respectively, applying a high-frequency voltage signal to the synaptic front end as the excitation source of the synapse, and collecting the current signal response at the synaptic back end, thereby realizing the terahertz neuromorphic computing function.

[0011] In the method for fabricating the terahertz neural synaptic memristor device of the present invention, the active region is preferably made of SiO2, Si3N4, Al2O3 or SnO2.

[0012] In the method for fabricating the terahertz synaptic memristor device of the present invention, preferably, the active region has a length of 30nm to 80nm and a width of 20nm to 80nm.

[0013] In the method for fabricating the terahertz synaptic memristor device of the present invention, preferably, the step of photolithographic etching to form the active region specifically includes: defining the active region on the functional layer using electron beam photolithography; applying photoresist in two steps to the active region, wherein the parameters of the first spin coating are 500 rpm to 800 rpm and the spin coating time is 5 to 30 seconds; the parameters of the second spin coating are 3000 rpm to 5000 rpm and the spin coating time is 40 seconds to 1 minute and 30 seconds; baking with a hot plate after spin coating at a temperature of 120°C to 180°C for 1 minute to 10 minutes; and using the photoresist as a mask, dry etching is used to remove the functional layer not protected by the photoresist to form the active region.

[0014] Beneficial effects:

[0015] (1) To construct nanoscale memristor devices, the minimum size of the working area is defined as 20nm, which is more conducive to the miniaturization of device size and the improvement of integration density, and adapts to the development of Moore's Law.

[0016] (2) Applying 1000GHz terahertz devices to neuromorphic computing improves the response speed of biological synapses by 10 orders of magnitude compared to 100Hz, which can greatly improve the efficiency of neuromorphic computing and provide a new path for the establishment of high-speed neuromorphic computing systems.

[0017] (3) The designed nanoscale memristor is a planar structure. Compared with vertical memristor devices, this structure is very suitable for in-situ characterization methods to directly observe and reveal the mechanism of the device, providing a guarantee for the optimization and improvement of the device's performance. Attached Figure Description

[0018] Figure 1 This is a flowchart of the fabrication method for terahertz neural synaptic memristor devices.

[0019] Figures 2-6 This is a schematic diagram of the structure of each stage in the fabrication method of a terahertz neural synaptic memristor device.

[0020] Figures 7A to 7D This is a schematic diagram illustrating the principle of high-speed response achieved by terahertz neural synaptic memristor devices. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining this invention and are not intended to limit this invention. The described embodiments are merely some embodiments of this invention, not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0022] In the description of this invention, it should be noted that the terms "upper," "lower," "vertical," and "horizontal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0023] Furthermore, many specific details of the invention, such as the structure, materials, dimensions, processing techniques, and methods of the device, are described below to provide a clearer understanding of the invention. However, as those skilled in the art will understand, the invention may be implemented without adhering to these specific details. Unless specifically indicated below, various parts of the device may be made of materials known to those skilled in the art, or may employ materials with similar functionality developed in the future.

[0024] Figure 1 This is a flowchart illustrating the fabrication method of a terahertz neural synaptic memristor device. (For example...) Figure 1 As shown, the fabrication method of the terahertz neural synaptic memristor device includes the following steps:

[0025] In step S1, a 4-inch silicon wafer is prepared as the substrate 100 for fabricating a nanoscale terahertz synaptic memristor. It is cleaned with acetone, isopropanol, and water, and then a silicon wafer with a side length of 1.5cm × 1.5cm is obtained using a laser cutter. Silicon wafers are preferred as the substrate, but glass, sapphire, etc., can also be used.

[0026] In step S2, a 20 nm thick SiO2 thin film is grown on the silicon substrate 100 using PECVD as a functional layer 101, such as... Figure 2 As shown. The functional layer material can also be Si3N4, Al2O3, SnO2, etc.; the thickness is preferably 20nm, and can range from 10nm to 50nm.

[0027] In step S3, a rectangle with a length of 30nm to 80nm and a width of 20nm to 80nm is defined on the SiO2 thin film 101 using electron beam lithography as the active region. The SiO2 thin film 101 in the active region is protected using electron beam positive photoresist PMMA102 (model AR-P679). Figure 3 As shown. PMMA spin coating consists of two steps. The first spin coating parameters are 500 rpm to 800 rpm, with a spin coating time of 5 to 30 seconds. The second spin coating parameters are 3000 rpm to 5000 rpm, for a total of 40 seconds to 1 minute and 30 seconds. After spin coating, the product is baked on a hot plate at a temperature of 120℃ to 180℃ for 1 minute to 10 minutes.

[0028] Subsequently, the SiO2 thin film 101 not protected by photoresist was removed by RIE dry etching, and the resulting structure is as follows. Figure 4 As shown in the figure. The etching gas is CF4, the flow rate is 50 sccm to 100 sccm, the power is 300 W to 600 W, and the etching time is 5 min to 10 min.

[0029] In step S4, the shape of the working electrode is defined using electron beam lithography. Then, a Pt layer with a thickness of 30nm to 100nm is fabricated as the electrode using physical vapor deposition. Preferably, the electrode is designed as an interdigitated electrode to make the device more sensitive to signal reception and achieve a high-frequency terahertz band response. The two interdigitated planar electrodes 103 and 104 include a test portion and a finger portion. The test portions of the two electrodes are formed on both sides of the active region, and the finger portions of the two electrodes are arranged alternately on the active region at a certain interval. The spacing between adjacent finger portions is controlled at 20nm, resulting in a terahertz synaptic memristor device with an effective working area of ​​20nm. Figure 5 As shown. The area of ​​the planar electrode 103 / 104 is preferably 60 μm × 60 μm. The electrode material is preferably Pt, but can also be Al, Au, Ag, etc.

[0030] In step S5, as Figure 6 As shown, the two electrodes 103 and 104 of the nanoscale terahertz synaptic memristor are used as the synaptic front end and synaptic back end of the synapse, respectively. A high-frequency voltage signal is applied to the synaptic front end as the excitation source of the nerve impulse, and the current signal response of the synaptic back end is collected, thereby realizing the terahertz neuromorphic computing function.

[0031] This invention combines the high-frequency response characteristics of terahertz devices with the neuromorphic computing characteristics of neural synaptic devices, achieving neuromorphic plasticity at 1000 GHz for high-speed neural computation. Figures 7A to 7D As shown, the principle behind the high-speed response of the device is the formation and breakage of oxygen vacancy conductive channels under high-frequency voltage, which mainly consists of four stages. Stage 1: When a positive voltage is applied to electrode 103, which serves as the synaptic tip, oxygen vacancies begin to accumulate, but do not form a continuous channel, so the device is in a high-resistance state. Stage 2: As a positive voltage continues to be applied to electrode 103, the oxygen vacancies between the positive and negative electrodes gradually connect to form a conductive channel, and the device is in a low-resistance state. Stage 3: When a negative voltage is applied to electrode 103, which serves as the synaptic tip, some oxygen vacancies combine with oxygen ions, causing the oxygen vacancy conductive filaments to break, reducing the device's conductivity, and the device is in a high-resistance state. Stage 4: When a positive voltage is applied to electrode 103, oxygen vacancies accumulate again to form a conductive channel, and the device returns to a low-resistance state.

[0032] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A terahertz neural synaptic memristor device, characterized in that, include: Substrate; The active region is formed on the substrate; Two electrodes, which are interdigitated, include a test part and a finger part. The test parts of the two electrodes are formed on both sides of the active region, and the finger parts are arranged alternately on the active region at a certain interval, and the spacing between adjacent finger parts is controlled at the nanometer level. Two electrodes are used as the synaptic proximal and synaptic distal ends of a neural synapse, respectively. A high-frequency voltage signal is applied to the synaptic proximal end as the excitation source of the neural synapse, and the current signal response at the synaptic distal end is acquired, thereby realizing terahertz neuromorphic computing. The principle behind the high-speed response of the device is the formation and breakage of oxygen vacancy conductive channels under high-frequency voltage. This process mainly consists of four stages: First, when a positive voltage is applied to the electrode acting as the synaptic tip, oxygen vacancies begin to accumulate but do not form a continuous channel, resulting in a high-resistance state for the device. Second, as a positive voltage continues to be applied to the electrode acting as the synaptic tip, oxygen vacancies between the positive and negative electrodes gradually connect to form a conductive channel, resulting in a low-resistance state for the device. Third, when a negative voltage is applied to the electrode acting as the synaptic tip, some oxygen vacancies combine with oxygen ions, causing the oxygen vacancy conductive filaments to break, reducing the device's conductivity, and resulting in a high-resistance state for the device. Fourth, when a positive voltage is applied to the electrode acting as the synaptic tip, oxygen vacancies accumulate again to form a conductive channel, and the device returns to a low-resistance state.

2. The terahertz synaptic memristor device according to claim 1, characterized in that, The active region is made of SiO2, Si3N4, Al2O3, or SnO2.

3. The terahertz synaptic memristor device according to claim 1, characterized in that, The active region has a length of 30nm to 80nm and a width of 20nm to 80nm.

4. The terahertz synaptic memristor device according to claim 1, characterized in that, The electrode is made of Al, Au, Pt, or Ag.

5. A method for fabricating a terahertz neural synaptic memristor device, characterized in that, Includes the following steps: Prepare the substrate; A functional layer is grown on the substrate, and an active region is formed by photolithography and etching. Two interdigitated electrodes are formed in the active region, including a test part and a finger part. The test parts of the two electrodes are formed on both sides of the active region, and the finger parts are arranged alternately on the active region at a certain interval, and the spacing between adjacent finger parts is controlled at the nanometer level. Two electrodes are used as the synaptic proximal and synaptic distal ends of a neural synapse, respectively. A high-frequency voltage signal is applied to the synaptic proximal end as the excitation source of the neural synapse, and the current signal response at the synaptic distal end is acquired, thereby realizing terahertz neuromorphic computing. The principle behind the high-speed response of the device is the formation and breakage of oxygen vacancy conductive channels under high-frequency voltage. This process mainly consists of four stages: First, when a positive voltage is applied to the electrode acting as the synaptic tip, oxygen vacancies begin to accumulate but do not form a continuous channel, resulting in a high-resistance state for the device. Second, as a positive voltage continues to be applied to the electrode acting as the synaptic tip, oxygen vacancies between the positive and negative electrodes gradually connect to form a conductive channel, resulting in a low-resistance state for the device. Third, when a negative voltage is applied to the electrode acting as the synaptic tip, some oxygen vacancies combine with oxygen ions, causing the oxygen vacancy conductive filaments to break, reducing the device's conductivity, and resulting in a high-resistance state for the device. Fourth, when a positive voltage is applied to the electrode acting as the synaptic tip, oxygen vacancies accumulate again to form a conductive channel, and the device returns to a low-resistance state.

6. The method for fabricating a terahertz neural synaptic memristor device according to claim 5, characterized in that, The active region is made of SiO2, Si3N4, Al2O3, or SnO2.

7. The method for fabricating a terahertz neural synaptic memristor device according to claim 5, characterized in that, The active region has a length of 30nm to 80nm and a width of 20nm to 80nm.

8. The method for fabricating a terahertz neural synaptic memristor device according to claim 5, characterized in that, The specific steps involved in photolithography etching to form the active region include: Active regions are defined on the functional layer using electron beam lithography; The photoresist is applied in two spin-coating steps in the active area. The parameters for the first spin-coating are 500 rpm to 800 rpm and the spin-coating time is 5 to 30 seconds. The parameters for the second spin-coating are 3000 rpm to 5000 rpm and the spin-coating time is 40 seconds to 1 minute and 30 seconds. After spin-coating, the photoresist is baked using a hot plate at a temperature of 120°C to 180°C for 1 minute to 10 minutes. Using the photoresist as a mask, dry etching is used to remove the functional layer that is not protected by the photoresist, forming an active region.

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