A recessed gate enhancement mode GaN-based HFETs device and a gate-source channel resistance adjustment method thereof

By doping large atomic radius metal atoms in the barrier layer to adjust the source-drain region length and changing polarized Coulomb field scattering, the performance limitations of groove gate-enhanced GaN-based HFETs devices are solved, achieving higher power switching safety and reducing costs.

CN115101586BActive Publication Date: 2025-09-05HANGZHOU DIANZI UNIV
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Patent Information

Application Number
CN202210773421.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-07-03
Publication Date
2025-09-05
Estimated Expiration
2042-07-03

AI Technical Summary

Technical Problem

The power switching performance of existing groove gate enhanced GaN-based HFETs devices is still limited, and depleted devices require negative voltage power supply to be turned off, which has the risk of incorrect turn-on, which increases costs.

Method used

By doping metal atoms with large atomic radius on the barrier layer, adjusting the length of the doped regions at the source and drain ends, changing the polarized Coulomb field scattering, the gate-source channel resistance is achieved, and device performance is improved.

Benefits of technology

While simplifying the process, the power system safety and performance of GaN-based HFETs are improved, and the complexity and cost are reduced.

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Abstract

The present invention discloses a recessed-gate enhancement-mode GaN-based HFET device, comprising a substrate and a GaN layer disposed above the substrate. A source, a drain, and a T-shaped gate are disposed above the GaN layer. A barrier layer is disposed between the source and drain electrodes. The barrier layer comprises a barrier layer body, a source-end doped region, and a drain-end doped region. The source-end doped region and the drain-end doped region are connected to the source and drain electrodes, respectively, via an ohmic contact process. The source-end doped region and the drain-end doped region are doped with metal atoms with large atomic radii. An AlN intercalation layer is disposed between the barrier layer and the GaN layer, and a passivation layer is disposed on the upper surface of the barrier layer. By employing the above-described technical solution, the strain of the barrier layer near the ohmic contact can be altered by doping the barrier layer with metal atoms with large atomic radii, thereby changing the magnitude of polarization Coulomb field scattering associated with the barrier layer strain, thereby adjusting the gate-source channel resistance and improving the performance of GaN-based HFETs.
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Description

Technical Field

[0001] The present invention relates to the technical field of GaN-based HFETs devices, and in particular to a recessed gate enhancement-mode GaN-based HFETs device and a gate-source channel resistance adjustment method thereof. Background Art

[0002] As core components for power conversion, improved performance of power switching devices directly impacts efficiency gains in the energy conversion process. The ultimate performance of end devices is often determined by the physical properties of the semiconductor material. GaN-based heterojunction field-effect transistors (HFETs), fabricated using GaN-based heterojunction materials, offer advantages such as high operating frequency and low on-resistance, making them a key candidate for the third generation of high-performance power switching devices.

[0003] Due to the strong spontaneous polarization and piezoelectric polarization effects in GaN-based heterojunctions, GaN-based HFETs fabricated by conventional processes are all depletion-mode devices with a threshold voltage V th <0V. For depletion-mode devices, a negative voltage supply is required to turn them off. This creates the risk of false turn-on and increases cost.

[0004] In response to these technical challenges, researchers have proposed that, from a device processing perspective, a recessed gate structure could yield enhancement-mode GaN-based HFETs, thereby improving power system safety and reducing complexity and cost. To achieve the superior power switching performance of recessed-gate enhancement-mode GaN-based HFETs, researchers at home and abroad have made significant progress in materials, structures, and processes. However, the power switching performance of recessed-gate enhancement-mode GaN-based HFETs still has certain limitations and needs further improvement. Summary of the Invention

[0005] In view of the shortcomings of the existing technology, the present invention proposes a recessed gate enhancement mode GaN-based HFETs device and a gate-source channel resistance adjustment method thereof, thereby adjusting the polarization Coulomb field scattering angle. This not only simplifies the process but also further improves the safety of the power system.

[0006] In order to solve the above technical problems, the technical solution of the present invention is:

[0007] A recessed gate enhancement mode GaN-based HFET device comprises a substrate and a GaN layer disposed above the substrate, a source, a drain, and a T-type gate disposed above the GaN layer, a barrier layer disposed between the source and the drain, the barrier layer comprising a barrier layer body, a source-end doping region, and a drain-end doping region, the source-end doping region and the drain-end doping region being connected to the source and the drain, respectively, via an ohmic contact process, the source-end doping region and the drain-end doping region being doped with metal atoms having a large atomic radius, an AlN intercalation layer disposed between the barrier layer and the GaN layer, and a passivation layer disposed on the upper surface of the barrier layer.

[0008] Preferably, the metal atom with a large atomic radius refers to a metal atom with a radius larger than that of Al atom.

[0009] Preferably, the concentration of metal atoms with large atomic radius doped in the source doping region and the drain doping region does not exceed 1×10 18 cm -3 .

[0010] As an example, the barrier layer is made of Al x Ga 1-x Made of N.

[0011] Preferably, x=0.23.

[0012] Preferably, the lengths of the source doping region and the drain doping region are l1 and l2 respectively, and the width is d, and the minimum of l1 and l2 are both equal to 1% of the distance between the source and the drain, and the maximum are respectively equal to the distance from the source gate edge to the gate edge near the source end and the distance from the drain gate edge to the gate edge near the drain end, and d is the thickness of the barrier layer.

[0013] Preferably, the GaN layer includes a GaN buffer layer and a GaN channel layer, a two-dimensional electron gas is filled between the GaN channel layer and the AlN intercalation layer, the thickness of the GaN buffer layer and the GaN channel layer are both 1 μm, and the GaN buffer layer is doped with C.

[0014] Preferably, the passivation layer is made of Al2O3, the passivation layer is formed by atomic layer deposition, and the thickness of the passivation layer is 15 nm.

[0015] Preferably, the ohmic contact metal of the source-end doped region and the drain-end doped region connected to the source and the drain respectively is a four-layer composite metal of Ti / Al / Ni / Au.

[0016] The present invention also discloses a method for adjusting the gate-source channel resistance of a recessed gate enhanced GaN-based HFETs device, by adjusting the length of metal atoms doped in the source-end doping region and the drain-end doping region that are larger than the radius of Al atoms, thereby changing the magnitude of the polarization Coulomb field scattering related to the strain of the barrier layer.

[0017] The present invention has the following characteristics and beneficial effects:

[0018] By adopting the above technical solution, by doping the barrier layer with metal atoms with large atomic radius, the strain of the barrier layer near the ohmic contact can be changed, thereby changing the magnitude of the polarization Coulomb field scattering related to the strain of the barrier layer, thereby achieving the adjustment of the gate-source channel resistance, thereby improving the performance of GaN-based HFETs. This method, based on the theory of polarization Coulomb field scattering, provides a new direction for adjusting the power switching characteristics of GaN-based HFETs devices, which is conducive to the application of GaN-based HFETs devices in the field of power switching. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 Schematic diagram of the structure of an embodiment of the present invention.

[0021] Figure 2 for Figure 1 Schematic diagram of the intermediate barrier layer structure.

[0022] In the figure, 1-substrate, 2-GaN layer, 201-GaN buffer layer, 202-GaN channel layer, 3-AlN intercalation layer, 4-barrier layer, 401-barrier layer body, 402-source doped region, 403-drain doped region, 5-passivation layer, 6-source, 7-T-type gate, 8-drain. DETAILED DESCRIPTION

[0023] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0024] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0025] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0026] Example 1

[0027] The present invention provides a recessed gate enhanced GaN-based HFETs device, such as Figure 1 and Figure 2 As shown, it includes a substrate 1 and a GaN layer 2 arranged above the substrate 1, a source 6, a drain 8 and a T-type gate 7 are arranged above the GaN layer 2, a barrier layer 4 is arranged between the source 6 and the drain 8, the barrier layer 4 includes a barrier layer body 401, a source end doping region 402 and a drain end doping region 403, the source end doping region 402 and the drain end doping region 403 are respectively connected to the source 6 and the drain 8 through an ohmic contact process, the source end doping region 402 and the drain end doping region 403 are doped with metal atoms with a large atomic radius, an AlN intercalation layer 3 is provided between the barrier layer 4 and the GaN layer 2, the thickness of the AlN intercalation layer 3 is 1nm, and a passivation layer is provided on the upper surface of the barrier layer 4. The metal atom with a large atomic radius refers to a metal atom with a radius larger than that of Al atoms. The barrier layer body 401 is composed of Al x Ga 1-x Made of N, x=0.23.

[0028] It can be understood that the substrate 1 is a sapphire substrate.

[0029] In the aforementioned technical solution, years of research have shown that in GaN-based HFETs, polarization Coulomb field scattering, which is associated with the strain distribution of the barrier layer, is a significant factor affecting the gate-source channel resistance. Therefore, by doping the barrier layer 4 with metal atoms of large atomic radius, the strain of the barrier layer near the ohmic contact can be modified, thereby varying the magnitude of the polarization Coulomb field scattering associated with the strain of the barrier layer, thereby adjusting the gate-source channel resistance and improving the performance of GaN-based HFETs.

[0030] Furthermore, the concentration of metal atoms with large atomic radius doped in the source doping region 402 and the drain doping region 403 does not exceed 1×10 18 cm -3 The lengths of the source doping region 402 and the drain doping region 403 are l1 and l2 respectively, and the width is d. The minimum lengths of l1 and l2 are both equal to 1% of the distance between the source 6 and the drain 8, and the maximum lengths are equal to the distance from the source gate edge to the gate edge near the source end and the distance from the drain gate edge to the gate edge near the drain end, respectively. The d is the thickness of the barrier layer.

[0031] The maximum lengths of l1 and l2 refer to the lengths from one end of the barrier layer body 401 close to the source and drain electrodes to the middle of the barrier layer body 401 close to the gate electrode.

[0032] In a further configuration of this embodiment, the GaN layer 2 includes a GaN buffer layer 201 and a GaN channel layer 202. A two-dimensional electron gas is filled between the GaN channel layer 202 and the AlN intercalation layer 3 to form the channel layer. The thickness of the GaN buffer layer 201 and the GaN channel layer 202 are both 1 μm. The GaN buffer layer 201 is doped with C to achieve high-resistance epitaxy of GaN.

[0033] Specifically, the passivation layer 5 is made of Al 2 O 3 , and is formed by atomic layer deposition. The thickness of the passivation layer 5 is 15 nm.

[0034] According to a further configuration of the present invention, the ohmic contact metals of the source doped region 402 and the drain doped region 403 connected to the source 6 and the drain 8 respectively are Ti / Al / Ni / Au four-layer composite metals, and the thicknesses of the Ti / Al / Ni / Au four-layer composite metals are 30nm / 150nm / 50nm / 60nm respectively.

[0035] It can be understood that the T-type gate is manufactured by a Schottky process, wherein the gate metal adopts a Ni / Au two-layer composite metal with thicknesses of 60nm / 160nm respectively.

[0036] The present invention also discloses a method for adjusting the gate-source channel resistance of a recessed gate enhanced GaN-based HFETs device, by adjusting the length of metal atoms larger than the Al atomic radius doped in the source-end doping region 402 and the drain-end doping region 403, thereby changing the magnitude of the polarization Coulomb field scattering related to the strain of the barrier layer.

[0037] In the above technical solution, the lengths of the source-end doping region 402 and the drain-end doping region 403 doped with metal atoms larger than the radius of Al atoms are l1 and l2 respectively, and the width is d. The minimum of l1 and l2 are both equal to 1% of the distance between the source 6 and the drain 8, and the maximum is equal to the distance from the source gate edge to the gate edge near the source end and the distance from the drain gate edge to the gate edge near the drain end, respectively.

[0038] Specifically, the minimum of l1 and l2 is equal to 1% of the distance between the source 6 and the drain 8, and the maximum is equal to the distance from the source gate edge to the gate edge close to the source end and the distance from the drain gate edge to the gate edge close to the drain end, respectively.

[0039] It can be understood that metal atoms with a radius larger than that of Al atoms are doped on the barrier layer within the range of l1 and l2. Therefore, by adjusting the lengths of l1 and l2, the strain of the barrier layer near the ohmic contact is changed, and the magnitude of the polarization Coulomb field scattering related to the strain of the barrier layer is changed, thereby ultimately achieving the adjustment of the gate-source channel resistance.

[0040] Example 2

[0041] The difference between this embodiment and embodiment 1 is that the barrier layer body 401 is InAlN.

[0042] The structural technical solution of this embodiment is the same as that of embodiment 1, and no specific description or explanation is given in this embodiment.

[0043] Example 3

[0044] The difference between this embodiment and embodiment 1 is that the barrier layer body 401 is AlN.

[0045] The structural technical solution of this embodiment is the same as that of embodiment 1, and no specific description or explanation is given in this embodiment.

[0046] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. It will be apparent to those skilled in the art that various changes, modifications, substitutions, and variations of these embodiments, including components, without departing from the principles and spirit of the present invention are still within the scope of protection of the present invention.

Claims

1. A recessed gate enhanced GaN-based HFET device, comprising a substrate (1) and a GaN layer (2) disposed above the substrate (1), wherein a source (6), a drain (8) and a T-type gate (7) are disposed above the GaN layer (2), characterized in that: A barrier layer (4) is provided between the source electrode (6) and the drain electrode (8), the barrier layer (4) comprising a barrier layer body (401), a source end doping region (402) and a drain end doping region (403), the source end doping region (402) and the drain end doping region (403) being connected to the source electrode (6) and the drain electrode (8) respectively through an ohmic contact process, the source end doping region (402) and the drain end doping region (403) being doped with metal atoms having a large atomic radius, the metal atoms having a large atomic radius being metal atoms having a larger atomic radius than Al, an AlN intercalation layer (3) being provided between the barrier layer (4) and the GaN layer (2), and a passivation layer being provided on the upper surface of the barrier layer (4).

2. The recessed gate enhancement mode GaN-based HFET device according to claim 1, characterized in that: The concentration of metal atoms with large atomic radius doped in the source end doping region (402) and the drain end doping region (403) does not exceed 1×10 18 cm -3 .

3. The recessed gate enhancement mode GaN-based HFET device according to claim 1, characterized in that: The barrier layer body (401) is made of Al x Ga 1-x Made of N.

4. The recessed gate enhancement mode GaN-based HFET device according to claim 3, characterized in that: Said x=0.

23.

5. The recessed gate enhancement mode GaN-based HFET device according to claim 1, characterized in that: The lengths of the source end doping region (402) and the drain end doping region (403) are respectively l 1 and l 2, the width is d, l 1 and l 2 is equal to 1% of the distance between the source (6) and the drain (8), and the maximum length is equal to the distance from the gate side edge of the source to the gate edge near the source end and the distance from the gate side edge of the drain to the gate edge near the drain end, respectively. The d is the thickness of the barrier layer.

6. The recessed gate enhancement mode GaN-based HFET device according to claim 1, characterized in that: The GaN layer (2) comprises a GaN buffer layer (201) and a GaN channel layer (202); a two-dimensional electron gas is present at the interface between the GaN channel layer (202) and the AlN intercalation layer (3) and on the side of the GaN channel layer (202); the thickness of the GaN buffer layer (201) and the GaN channel layer (202) are both 1 μm; and the GaN buffer layer (201) is doped with C.

7. The recessed gate enhancement mode GaN-based HFET device according to claim 1, characterized in that: The passivation layer (5) is made of Al2O3, is formed by atomic layer deposition, and has a thickness of 15 nm.

8. The recessed gate enhancement mode GaN-based HFET device according to claim 1, characterized in that: The ohmic contact metals of the source end doping region (402) and the drain end doping region (403) connected to the source electrode (6) and the drain electrode (8) respectively are four-layer composite metals of Ti, Al, Ni and Au.

9. The method for adjusting the gate-source channel resistance of a recessed gate enhancement mode GaN-based HFETs device according to any one of claims 1 to 8, characterized in that: By adjusting the length of the metal atom portion doped with a larger radius than the Al atom in the source end doping region (402) and the drain end doping region (403), the magnitude of the polarized Coulomb field scattering associated with the strain of the barrier layer is changed.

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