Semiconductor laser
By introducing thick P-type stabilization layer and N-type barrier layer structures into semiconductor lasers, mechanical damage and stress problems during packaging are solved, reliability and beam quality are improved, and high-brightness output is achieved, which is suitable for multiple application fields.
Patent Information
- Application Number
- CN202410242039.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-04
- Publication Date
- 2025-09-05
AI Technical Summary
The existing wide-bar high-power semiconductor lasers are susceptible to mechanical damage and stress during the P-plane electrode flip-fitting welding packaging, resulting in reduced reliability. At the same time, the beam quality and brightness are insufficient, making it difficult to meet the high-brightness output requirements.
A thicker P-type stabilization layer is introduced between the P-type restriction layer and the ohmic contact layer to enhance the intensity of the P-plane electrode, and the injection region and non-injection region are provided in the P-type stabilization layer, and the current is restricted by using the N-type barrier layer to prevent the current from lateral diffusion and carrier accumulation, and improve the beam quality.
It improves the reliability and beam quality of semiconductor lasers, achieves high-power and low current thresholds and is suitable for fiber coupling, laser projection, optical communication and laser medical fields.
Smart Images

Figure CN120601260A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of display devices, and in particular to a semiconductor laser. Background Art
[0002] Wide stripe high-power laser diodes (WS-HPLDs) are widely used in various fields due to their advantages, including wide output band coverage, high output power, compact size, and long life. As their application areas continue to expand, higher requirements are placed on their output power and electro-optical conversion efficiency. Currently, the output power of a single wide stripe semiconductor laser has reached tens of watts. Furthermore, certain fields also require WS-HPLDs to simultaneously achieve high brightness output, such as fiber coupling, laser projection, optical communications, laser medical treatment, and scientific research.
[0003] In some solutions, in order to achieve better heat dissipation, the semiconductor laser is packaged using P-side electrode flip-chip welding. However, the P-type waveguide layer and P-type confinement layer of this type of semiconductor laser are relatively thin, which will cause additional mechanical damage and stress to the semiconductor laser during the welding and packaging process, reducing the reliability of the semiconductor laser. Summary of the Invention
[0004] In a first aspect, the present application provides a semiconductor laser, comprising an N-side electrode, an N-type substrate, an N-type buffer layer, an N-type confinement layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type confinement layer, an ohmic contact layer, and a P-side electrode arranged in sequence;
[0005] The semiconductor laser further includes a P-type stabilizing layer, wherein the P-type stabilizing layer is disposed between the P-type confinement layer and the ohmic contact layer;
[0006] The thickness of the P-type stabilizing layer is greater than or equal to the sum of the thickness of the P-type waveguide layer and the thickness of the P-type confinement layer.
[0007] In the above scheme, the present application provides a thicker P-type stabilization layer between the P-type confinement layer and the ohmic contact layer, which is beneficial to improving the strength of the P-side electrode side of the semiconductor laser, thereby avoiding mechanical damage and stress to the semiconductor laser caused by the thin P-type waveguide layer and the P-type confinement layer when the semiconductor laser is packaged using the P-side electrode flip-chip welding method, thereby improving the reliability of the semiconductor laser. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 A schematic diagram of a semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0009] Figure 2 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0010] Figure 3 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0011] Figure 4 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0012] Figure 5 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0013] Figure 6 A schematic diagram of an N-type barrier epitaxial layer structure provided for one or more embodiments of the present application;
[0014] Figure 7 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0015] Figure 8 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0016] Figure 9 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0017] Figure 10 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0018] Figure 11 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0019] Figure 12 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0020] Figure 13 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0021] Figure 14 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0022] Figure 15 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0023] Figure 16 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0024] Figure 17 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0025] Figure 18 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0026] Figure 19 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0027] Figure 20 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0028] Figure 21 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0029] Figure 22 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0030] Figure 23 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0031] Figure 24 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application;
[0032] Figure 25 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application. DETAILED DESCRIPTION
[0033] In order to make the purpose and implementation of this application clearer, the exemplary implementation of this application will be clearly and completely described below in conjunction with the drawings in the exemplary embodiments of this application. Obviously, the described exemplary embodiments are only part of the embodiments of this application, not all of the embodiments.
[0034] It should be noted that the brief descriptions of terms in this application are only for the purpose of facilitating the understanding of the embodiments described below, and are not intended to limit the embodiments of this application. Unless otherwise specified, these terms should be understood according to their ordinary and usual meanings.
[0035] In the specification and claims of this application and the accompanying drawings, the terms "first," "second," "third," etc. are used to distinguish similar or similar objects or entities, and are not necessarily intended to limit a particular order or sequence, unless otherwise noted. It should be understood that the terms used in this manner are interchangeable under appropriate circumstances.
[0036] The terms "comprise," "comprises," and "having," and any variations thereof, are intended to cover but not exclude inclusion; for example, a product or device comprising a list of components is not necessarily limited to all the components expressly listed but may include other components not expressly listed or inherent to such product or device.
[0037] Wide stripe high-power laser diodes (WS-HPLDs) are widely used in various fields due to their advantages, including wide output band coverage, high output power, compact size, and long life. As their application areas continue to expand, higher requirements are placed on their output power and electro-optical conversion efficiency. Currently, the output power of a single wide stripe semiconductor laser has reached tens of watts. Furthermore, certain fields also require WS-HPLDs to simultaneously achieve high brightness output, such as fiber coupling, laser projection, optical communications, laser medical treatment, and scientific research.
[0038] In some existing solutions, in order to achieve better heat dissipation, semiconductor lasers are packaged using P-side electrode flip-chip welding. However, the P-type waveguide layer and P-type confinement layer of this type of semiconductor laser are relatively thin, which will cause additional mechanical damage and stress to the semiconductor laser during the welding and packaging process, thereby reducing the reliability of the semiconductor laser.
[0039] In order to solve the above technical problems, the present application provides a semiconductor laser, Figure 1 A schematic diagram of the epitaxial layer structure of a semiconductor laser provided for one or more embodiments of the present application, wherein the semiconductor laser includes an N-side electrode 101, an N-type substrate 102, an N-type buffer layer 103, an N-type confinement layer 104, an N-type waveguide layer 105, an active layer 106, a P-type waveguide layer 107, a P-type confinement layer 108, an ohmic contact layer 109, and a P-side electrode 110, which are arranged in sequence.
[0040] The semiconductor laser further includes a P-type stabilizing layer 112 , which is disposed between the P-type confinement layer 108 and the ohmic contact layer 109 .
[0041] The thickness of the P-type stabilizing layer 112 is greater than or equal to the sum of the thickness of the P-type waveguide layer 107 and the thickness of the P-type confinement layer 108 .
[0042] Specifically, the P-type stabilizing layer 112 is a P-type doped structure, and the total thickness of the P-type stabilizing layer 112 can be greater than or equal to 0.55 μm, or less than or equal to 1.5 μm. Since the thickness of the P-type stabilizing layer 112 is greater than or equal to the sum of the thickness of the P-type waveguide layer 107 and the thickness of the P-type confinement layer 108, and the P-type stabilizing layer 112 is also P-type doped, it can be considered that the strength of the P-type waveguide layer 107 and the P-type confinement layer 108 is improved without changing the structural type of the original semiconductor laser. Therefore, when the semiconductor laser is packaged using the P-surface electrode flip-chip welding method, mechanical damage and stress to the semiconductor laser caused by the thin P-type waveguide layer 107 and the P-type confinement layer 108 can be avoided, thereby improving the reliability of the semiconductor laser.
[0043] In the embodiment of the present application, due to the addition of the P-type stabilization layer 112, the migration distance of electrons / holes increases, which may affect the electrical characteristics of the original semiconductor laser. In the embodiment of the present application, a high-mobility material can be used to prepare the P-type stabilization layer 112 to reduce the time required for electrons / holes to pass through the P-type stabilization layer 112. Specifically, the high-mobility material can be at least one of GaAs, InP, InGaAs, InAs, AlGaAs, GaN, and InN.
[0044] To achieve high-power output from semiconductor lasers, a wide strip structure is usually used. However, the far-field light intensity distribution of this type of semiconductor laser is extremely asymmetric, and the light spot is a narrow ellipse. This is mainly because the active region material of the WS-HPLD has a strong refractive index restriction in the fast axis direction, and its beam divergence angle and beam width change little, and the beam quality is relatively stable; while the refractive index restriction of the active region material in the slow axis direction is weak, and its beam divergence angle and beam width are easily affected by temperature changes, resulting in an increase in the slow axis divergence angle of the semiconductor laser, which leads to low beam quality output by the WS-HPLD, bringing certain difficulties to the practical application of semiconductor lasers.
[0045] The lateral beam quality of the laser can be expressed by formula (1):
[0046] B lat =P / BPP lat (1)
[0047] BPP lat =0.25*ω 95 %*θ 95% (2)
[0048] Where P represents output power, BPP lat Side beam parameter product, ω 95% and θ 95%They represent the near-field width and far-field horizontal divergence angle when the light field energy is 95%.
[0049] In addition to the thermal lens effect, the lateral diffusion of current and carrier accumulation at the edge of the strip will also reduce the beam quality of the laser. Domestic and foreign researchers have conducted research in different directions on this issue, with the aim of improving the beam quality of semiconductor lasers without changing the light output power, so as to improve the brightness of semiconductor lasers. For example, defects are introduced through high-energy deep ion implantation technology to limit the diffusion and accumulation of the injected current on the P side of the strip edge, thereby reducing the near / far field divergence angle and improving the beam quality. However, this method will introduce larger defects, which will seriously affect the output power and conversion efficiency of the semiconductor laser. The ridge structure laser currently commonly used forms a refractive index guiding structure by deep etching. Although it can confine carriers to the strip injection area and improve the output power and conversion efficiency, the large refractive index difference will reduce the beam quality. The buried structure uses secondary epitaxial growth to grow high-bandgap waveguide layer materials on both sides of the current injection area to form a built-in refractive index guiding structure, which reduces the lateral diffusion of current and carrier accumulation, thereby improving the output power and conversion efficiency. Similar to the ridge structure, the large refractive index difference will cause the existence of multiple high-order modes, which reduces the beam output quality.
[0050] Judging from the different structures and processes currently used, it is impossible to simultaneously improve the beam quality and brightness of semiconductor lasers without changing the optical output power.
[0051] Figure 2 A schematic diagram of another semiconductor laser epitaxial layer structure provided in one or more embodiments of the present application is shown in FIG. Figure 2 As shown, an injection region 200 and a non-injection region 300 are provided in the P-type stabilizing layer 112. In a direction parallel to the plane where the P-type stabilizing layer 112 is located, the non-injection region 300 is provided at both ends of the injection region 200. The non-injection region 300 is formed by the N-type barrier layer 111, and the injection region 200 is formed by the P-type stabilizing layer 112.
[0052] like Figure 2As shown, in the embodiment of the present application, the N-type substrate 102, N-type buffer layer 103, and N-type confinement layer 104 are formed of N-type doped materials, the P-type confinement layer 108, P-type stabilization layer 112, and ohmic contact layer 109 are formed of P-type doped materials, the N-type waveguide layer 105 and the P-type waveguide layer 107 are used to reduce photon absorption and loss and are not doped, the active layer 106 is not doped, and the N-type barrier layer 111 is formed of N-type doped materials. It should be noted that in the embodiment of the present application and in actual application scenarios, the thickness of each epitaxial layer may vary significantly. In order to relatively clearly reflect the structure of each epitaxial layer in the illustrations of the embodiment of the present application, the thickness ratios between some epitaxial layers may be distorted. However, the thickness of each epitaxial layer can be described in text in the embodiment of the present application, and the illustrations are only for example.
[0053] In the above embodiment, the present application actually inserts a layer structure of N-type doping material into the P-type stabilizing layer 112, that is, a reverse PN junction is formed in the original semiconductor laser structure. This structure can limit the current to the injection region 200 while preventing or at least weakening the lateral diffusion of the current, suppressing the accumulation of carriers, improving the current injection efficiency, and achieving high power, low current threshold, and conversion rate output. Since the accumulation of carriers in the non-injection region 300 is weakened, the near-field / far-field divergence angle of the semiconductor laser can be reduced to a certain extent, thereby improving the beam quality and brightness of the semiconductor laser.
[0054] Figure 3 A top view of another semiconductor laser structure provided for one or more embodiments of the present application, as shown in Figure 3, includes an injection region 200 and a non-injection region 300 disposed within the P-type stabilization layer 112. The non-injection region 300 surrounds the injection region 200 on the plane where the P-type stabilization layer 112 is located. The non-injection region 300 is formed by the N-type barrier layer 111, and the injection region is formed by the P-type stabilization layer.
[0055] Figure 4 A schematic diagram of another semiconductor laser epitaxial layer structure provided in one or more embodiments of the present application is shown in FIG. Figure 4 As shown, an injection region and a non-injection region are arranged in a first direction parallel to the plane where the P-type stabilizing layer is located. In the non-injection region, an N-type barrier layer is further arranged between the P-type stabilizing layer and the ohmic contact layer. The non-injection region is formed by the N-type barrier layer, and the injection region is formed by the P-type stabilizing layer.
[0056] Figure 3 、 Figure 4 The corresponding embodiments and Figure 2The corresponding embodiments are similar. The N-type barrier layer 111 can be used to limit the current to the injection region 200, while preventing or at least weakening the lateral diffusion of the current, suppressing the accumulation of carriers, improving the injection efficiency of the current, and achieving high power, low current threshold, and conversion efficiency output. Since the accumulation of carriers in the non-injection region 300 is weakened, the near-field / far-field divergence angle of the semiconductor laser can be reduced to a certain extent, thereby improving the beam quality and brightness of the semiconductor laser.
[0057] Figure 5 This is a schematic diagram of another semiconductor laser epitaxial layer structure provided by one or more embodiments of the present application. In some embodiments, the N-type barrier layer 111 includes an N-type etch stop layer 1111 and an N-type doped barrier layer 1112. The N-type doped barrier layer 1112 is located on the side of the N-type etch stop layer 1111 away from the P-type waveguide layer 107. The N-type etch stop layer 1111 and the N-type doped barrier layer 1112 are made of different materials. The N-type doped barrier layer 1112 is used to block current, while the N-type etch stop layer 1111 is used to block etching material.
[0058] In the embodiment of the present application, the injection region 200 and the non-injection region 300 can be formed by etching the etching material. The materials of the N-type etch barrier layer 1111 and the N-type doped barrier layer 1112 are different. The same etching material cannot etch the N-type etch barrier layer 1111 and the N-type doped barrier layer 1112 formed by the two materials. Therefore, the etching depth of the N-type etch barrier layer 1111 and the N-type doped barrier layer 1112 can be more accurately controlled to form a better injection region 200 and non-injection region 300.
[0059] Figure 6 This is a schematic diagram of an N-type barrier layer structure provided in one or more embodiments of the present application. In some embodiments, the thickness H1 of the N-type etch barrier layer 1111 can be greater than or equal to 15 nm, or less than or equal to 25 nm. The thickness H2 of the N-type doping barrier layer 1112 can be greater than or equal to 30 nm, or less than or equal to 50 nm.
[0060] For example, if the thickness of the N-type doped barrier layer 1112 is small, the blocking effect on the current is weak. If the thickness of the N-type doped barrier layer 1112 is large, the flatness of the side of the N-type doped barrier layer 1112 away from the N-type etch barrier layer 1111 is poor, which is not conducive to the output of the semiconductor laser characteristics. Therefore, the thickness of the N-type doped barrier layer 1112 can be greater than or equal to 30nm, or less than or equal to 50nm. If the thickness of the N-type etch barrier layer 1111 is small, it may not form a good blocking effect on the etched material. If the thickness of the N-type etch barrier layer 1111 is large, it will also affect the flatness of the side of the N-type etch barrier layer 1111 facing the N-type doped barrier layer 1112, thereby affecting the output of the semiconductor laser characteristics.
[0061] In the embodiment of the present application, the thickness of the N-type doped barrier layer 1112 is greater than the thickness of the N-type etch stop layer 1111. If the thickness ratio between the N-type doped barrier layer 1112 and the N-type etch stop layer 1111 is too large, it may cause the overall voltage of the semiconductor laser to increase, which is not conducive to the output characteristics of the semiconductor laser. Preferably, the thickness ratio between the N-type doped barrier layer 1112 and the N-type etch stop layer 1111 can be 2:1.
[0062] In some embodiments, the material of the N-type etch stop layer 1111 includes GaInP, the doping source of the N-type etch stop layer 1111 includes Si2H6, and the doping concentration of Si2H6 can be greater than or equal to 1.5E18 / cm 3 , or less than or equal to 3.5E18 / cm 3 .
[0063] The material of the N-type doped barrier layer 1112 includes GaAs, and the doping source of the N-type etch barrier layer 1111 includes Si2H6. The doping concentration of Si2H6 can be greater than or equal to 1.5E18 / cm 3 , or less than or equal to 3.5E18 / cm 3 .
[0064] Specifically, the N-type etch stop layer 1111 and the N-type doping stop layer 1112 can be formed of different materials, but both are N-type doped materials. The material of the N-type etch stop layer 1111 can be GaInP. More specifically, GaInP can be described as GaInP. x1 In 1-x1 P, where x1 represents the ratio of Ga elements in GalnP, 1-x1 represents the ratio of In elements in GaInP, and Ga x1 In 1-x1 P indicates that the ratio of Ga element, In element and P element in GaInP is x1:(1-x1):1, where x1<1.
[0065] The doping source of the N-type doping barrier layer 1112 and the N-type etching barrier layer 1111 can both be Si. When the doping concentration is too low, the current blocking effect is weak. When the doping concentration is too high, it is easy to cause the failure of the semiconductor laser. After research, it was found that the doping concentration of Si element can be greater than or equal to 1.5E18 / cm 3 , or less than or equal to 3.5E18 / cm 3 , thereby achieving the purpose of both better blocking the current and preventing the semiconductor laser from failing.
[0066] In some embodiments, the ratio of Ga, In, and P in the GaInP material is x1:(1-x1):1, where x1 can be greater than or equal to 0.48, or less than or equal to 0.52.
[0067] For example, the Ga content of the GaInP material may be greater than or equal to 48%, or less than or equal to 52%, that is, the In content may be greater than or equal to 48%, or less than or equal to 52%.
[0068] Exemplarily, the P-type stabilizing layer 112 and the N-type barrier layer 111 are formed by secondary epitaxy. The Al content in the P-type stabilizing layer 112 is lower than that in the P-type confinement layer 108, or the P-type stabilizing layer 112 does not contain Al.
[0069] In the embodiment of the present application, the P-type stabilizing layer 112 and the N-type barrier layer 111 are fabricated using a secondary epitaxial growth method. Specifically, during the fabrication of the P-type stabilizing layer 112 and the N-type barrier layer 111, in order to dispose the N-type barrier layer 111 within the P-type stabilizing layer 112, the P-type stabilizing layer 112 can be fabricated in two steps.
[0070] The P-type stabilizing layer 112 may include a P-type lower stabilizing layer 1121 and a P-type upper stabilizing layer 1122. In the embodiment of the present application, the P-type lower stabilizing layer 1121 may be first formed, followed by the N-type barrier layer 111, and the implantation region 200 and the non-implantation region 300 may be formed before forming the P-type upper stabilizing layer 1122. Based on the above scheme, the P-type stabilizing layer 112 and the N-type barrier layer 111 may be formed by secondary epitaxy.
[0071] After the N-type barrier layer 111 is grown, the unfinished semiconductor laser needs to be removed from the relevant equipment and exposed to air for etching of the injection window. The laser is then transferred to the relevant equipment for the preparation of the P-type upper stabilization layer 1122. During this process, if the P-type stabilization layer 112 contains Al, it will undergo an oxidation reaction with O in the air, causing oxidation damage to the P-type stabilization layer 112, affecting the overall performance of the semiconductor laser.
[0072] Specifically, the oxidation of Al element will produce Al2O3 with a high refractive index, which will lead to the formation of additional light scattering centers, increase light loss, and reduce the internal reflection efficiency and beam quality of the semiconductor laser.
[0073] Al2O3 has absorption properties for light of specific wavelengths and may therefore cause additional light absorption, which will reduce the optical power that can propagate through the waveguide and reach the threshold oscillation.
[0074] Al2O3 may destroy the original semiconductor heterojunction structure, affect the effective injection and recombination of carriers, and further reduce the working efficiency and stability of semiconductor lasers.
[0075] The heat generated by the oxidation process and the resulting increase in light absorption may cause local temperature increases, exacerbating thermal effects, causing the operating point of the semiconductor laser to deviate from the optimal state and even leading to thermal collapse.
[0076] In the embodiment of the present application, the P-type stabilizing layer 112 does not include the Al element, so the above-mentioned problem can be avoided directly from the source.
[0077] Alternatively, since the P-type waveguide layer 107 is the region where the semiconductor laser light field is mainly concentrated, if the Al content in the P-type stabilization layer 112 is lower than the Al content in the P-type confinement layer 108, compared to disposing the N-type barrier layer 111 in the P-type confinement layer 108, the above-mentioned problem can be alleviated to a certain extent.
[0078] Figure 7 A schematic diagram of another semiconductor laser epitaxial layer structure is provided for one or more embodiments of the present application. In some embodiments, the material of the N-type substrate 102 includes GaAs.
[0079] The material of the N-type buffer layer 103 includes GaAs, the doping source of the N-type buffer layer 103 includes Si 2 H 6 , and the thickness of the N-type buffer layer 103 may be greater than or equal to 0.35 μm, or less than or equal to 0.5 μm.
[0080] The material of the N-type confinement layer 104 includes AlInP, the doping source of the N-type confinement layer 104 includes Si 2 H 6 , and the thickness of the N-type confinement layer 104 may be greater than or equal to 0.9 μm, or less than or equal to 1 μm.
[0081] The material of the N-type waveguide layer 105 includes AlGaInP. The N-type waveguide layer 105 is not doped. The thickness of the N-type waveguide layer 105 may be greater than or equal to 100 nm, or less than or equal to 200 nm.
[0082] The active layer 106 includes a first barrier layer 1061, a quantum well layer 1062, and a second barrier layer 1063, arranged in sequence away from the N-type waveguide layer 105. The first barrier layer 1061 is made of AlGaInP and is undoped. The thickness of the first barrier layer 1061 can be greater than or equal to 5 nm, or less than or equal to 15 nm. The quantum well layer 1062 is made of GaInP and is undoped. The thickness of the quantum well layer 1062 can be greater than or equal to 7 nm, or less than 13 nm. The second barrier layer 1063 is made of AlGaInP and has a thickness of greater than or equal to 5 nm, or less than or equal to 15 nm.
[0083] The material of the P-type waveguide layer 107 includes AlGaInP. The P-type waveguide layer 107 is not doped. The thickness of the P-type waveguide layer 107 may be greater than or equal to 100 nm, or less than or equal to 200 nm.
[0084] The material of the P-type confinement layer 108 includes AlInP, the doping source of the P-type confinement layer 108 includes Si 2 H 6 , and the thickness of the P-type confinement layer 108 may be greater than or equal to 0.5 μm, or less than or equal to 0.7 μm.
[0085] The P-type stabilizing layer 112 includes a P-type lower stabilizing layer 1121 and a P-type upper stabilizing layer 1122. The P-type upper stabilizing layer 1122 is disposed on a side of the P-type lower stabilizing layer 1121 away from the P-type waveguide layer 107. The N-type barrier layer 111 is disposed between the P-type lower stabilizing layer 1121 and the P-type upper stabilizing layer 1122. The material of the P-type lower stabilizing layer 1121 includes GaAs, and the doping source of the P-type lower stabilizing layer 1121 includes Cp2Mg or DEZn. The thickness of the P-type lower stabilizing layer 1121 can be greater than or equal to 0.15 μm, or less than or equal to 0.7 μm. The material of the P-type upper stabilizing layer 1122 includes GaAs, and the doping source of the P-type upper stabilizing layer 1122 includes Cp2Mg or DEZn. The thickness of the P-type upper stabilizing layer 1122 can be greater than or equal to 0.4 μm, or less than or equal to 0.9 μm.
[0086] The material of the ohmic contact layer 109 includes GaAs, the doping source of the ohmic contact layer 109 includes CBr4, and the thickness of the ohmic contact layer 109 may be greater than or equal to 0.15 μm, or less than or equal to 0.3 μm.
[0087] First, the semiconductor laser provided in the embodiments of the present application can be a semiconductor laser of various wavelength bands, including but not limited to GaAs, GaN, InP and other substrates.
[0088] The following is an exemplary process for preparing a semiconductor laser provided in an embodiment of the present application:
[0089] After the N-type GaAs substrate 102 is placed in MOCVD for surface heat treatment, an N-type buffer layer 103, an N-type confinement layer 104, an N-type waveguide layer 105, an active layer 106, a P-type waveguide layer 107, a P-type confinement layer 108, a P-type lower stabilization layer 1121, an N-type etch barrier layer 1111, and an N-type doped barrier layer 1112 are sequentially grown to complete the first epitaxial growth. The current injection region 200 is prepared by non-in-situ etching, and then a P-type upper stabilization layer 1122 and an ohmic contact layer 109 are grown.
[0090] The active layer 106 includes 1 to 3 quantum well layers 1062 and barrier layers on both sides thereof. The material of the N-type confinement layer 104 can be specifically represented by Al x2 In 1-x2 The material of the P, N type waveguide layer 105 can be specifically expressed as (Al x3 Ga 1-x3 ) y1 In 1-y1 P, the material of the active layer 106 can be specifically represented by Ga x4 In 1-x4 P / (Al x5 Ga 1-x5 ) y2 In 1-y2 The material of the P-type waveguide layer 107 can be specifically expressed as (Al x6 Ga 1-x6 ) y3 In 1-y3 The material of the P-type confinement layer 108 can be specifically represented by Al x7 In 1-x7 The material of the P-type lower stabilization layer 1121 is specifically GaAs, and the doping source is Cp2Mg or DEZn. The doping concentration can be greater than or equal to 1E18 / cm 3 , or less than or equal to 8E18 / cm 3 The material of the N-type etching stopper layer 1111 can be specifically represented by Ga x1 In 1-x1 The material of the P-type upper stabilization layer 1122 is specifically GaAs, and the doping source is Cp2Mg or DEZn. The doping concentration can be greater than or equal to 1E18 / cm 3 , or less than or equal to 1E19 / cm 3 The doping concentration of the P-type upper stabilizing layer 1122 is slightly greater than the doping concentration of the P-type lower stabilizing layer 1121 .
[0091] Among them, 0.48≤x2≤0.52, 0.4≤x3≤0.9, 0.4≤y1≤0.6, 0.35≤x4≤0.55, 0.3≤×5≤0.62, 0.4≤y2≤0.6, 0.4≤x6≤0.9, 0.4≤y3≤0.6, 0.48≤x7≤0.52, and 0.1≤x1≤0.9.
[0092] Specifically,
[0093] First, an N-type substrate 102 is provided, such as Figure 8 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0094] The N-type GaAs substrate 102 is placed in a MOCVD chamber and the chamber temperature is raised to 710±20° C. in a H 2 atmosphere for baking. Then, AsH 3 is introduced to perform surface heat treatment on the N-type substrate 102 .
[0095] The temperature is slowly lowered to 680±10°C, TMGa and AsH3 are introduced, and an N-type buffer layer 103 is grown on the N-type substrate 102. The thickness of the N-type buffer layer 103 can be greater than or equal to 0.35 μm, or less than or equal to 0.5 μm. The doping source is Si2H6, and the doping concentration can be greater than or equal to 1.5E18 / cm 3 , or less than or equal to 2.5E18 / cm 3 , is N-type doped. The purpose of the N-type buffer layer 103 is to prevent the influence of the substrate's own defects on the epitaxial layer growth and provide a good growth interface and growth quality. Figure 9 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0096] The temperature is slowly raised to 700±10℃, TMAI, TMIn and PH3 are introduced, and AsH3 is stopped until the As atoms in the cavity are exhausted. An N-type confinement layer 104 is grown on the N-type buffer layer 103. The thickness of the N-type confinement layer 104 can be greater than or equal to 0.9μm or less than or equal to 1μm. The doping source is Si2H6, and the doping concentration can be greater than or equal to 4E17 / cm 3 , or less than or equal to 2E18 / cm 3 , is N-type doping. Figure 10 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0097] The growth temperature is maintained at 700±10°C, TMGa, TMAI, TMIn and PH3 are introduced, and an N-type waveguide layer 105 is grown on the N-type confinement layer 104. The thickness of the N-type waveguide layer 105 can be greater than or equal to 100nm, or less than or equal to 200nm. The N-type waveguide layer 105 is used to transmit light beams and is not doped to reduce photon absorption and loss. Figure 11 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0098] The temperature is slowly lowered to 640±10°C, TMGa, TMAI, TMIn and PH3 are introduced, and a first barrier layer 1061 is grown on the N-type waveguide layer 105. The thickness of the first barrier layer 1061 can be greater than or equal to 5nm, or less than or equal to 15nm. The first barrier layer 1061 is not doped. Figure 12 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0099] The growth temperature is maintained at 640±10°C, TMGa, TMIn and PH3 are introduced, and a quantum well layer 1062 is grown on the first barrier layer 1061. The thickness of the quantum well layer 1062 can be greater than or equal to 7nm, or less than or equal to 13nm. The quantum well layer 1062 is not doped. Figure 13 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0100] Maintaining the growth temperature at 640±10°C, introducing TMGa, TMAI, TMIn and PH3, a second barrier layer 1063 is grown on the quantum well layer 1062. The thickness of the second barrier layer 1063 can be greater than or equal to 5nm, or less than or equal to 15nm. The second barrier layer 1063 is not doped. Figure 14 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0101] The temperature is slowly raised to 700±10°C, TMGa, TMAI, TMIn and PH3 are introduced, and a P-type waveguide layer 107 is grown on the second barrier layer 1063. The thickness of the P-type waveguide layer 107 can be greater than or equal to 100nm, or less than or equal to 200nm. The P-type waveguide layer 107 is not doped to reduce photon absorption and loss. Figure 15 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0102] Maintaining the growth temperature at 700±10°C, introducing TMAI, TMIn and PH3, a P-type confinement layer is grown on the P-type confinement layer 108. The thickness of the P-type confinement layer can be greater than or equal to 0.5 μm, or less than or equal to 0.7 μm. Figure 16 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0103] The temperature is slowly lowered to 560±10℃, TMGa and AsH3 are added, and TMAI and PH3 are stopped. When the Al atoms and P atoms in the cavity are exhausted, a P-type lower stabilization layer 1121 is grown on the P-type confinement layer 108. The thickness of the P-type lower stabilization layer 1121 can be greater than or equal to 0.15μm, or less than or equal to 0.7μm. The doping source is Cp2Mg or DEZn, and the doping concentration can be greater than or equal to 1E18 / cm 3 , or less than or equal to 8E18 / cm 3 , is P-type doping. Figure 17 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0104] The temperature is slowly raised to 650±10°C, TMGa, TMIn and PH3 are introduced, and an N-type etch stop layer 1111 is grown on the P-type lower stabilization layer 1121. The thickness of the N-type etch stop layer 1111 can be greater than or equal to 15nm, or less than or equal to 25nm. The doping source is Si2H6, and the doping concentration can be greater than or equal to 1.5E18 / cm 3 , or less than or equal to 3.5E18 / cm 3 , is N-type doping. Figure 18 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0105] The temperature is slowly lowered to 560±10°C, TMGa and AsH3 are introduced, and an N-type doped barrier layer 1112 is grown on the N-type etch barrier layer 1111. The thickness of the N-type doped barrier layer 1112 can be greater than or equal to 30nm, or less than or equal to 50nm. The doping source is Si2H6, and the doping concentration can be greater than or equal to 1.5E18 / cm 3 , or less than or equal to 3.5E18 / cm 3 , is N-type doping. Figure 19 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0106] At this point, the first epitaxial growth is completed, and then the primary epitaxial wafer (the unfinished semiconductor laser) is taken out, and a SiO2 film is grown on the primary epitaxial wafer using PECVD as a mask protection layer. The current injection region 200 is etched through photolithography and ICP etching / wet etching methods. Since the structure contains an N-type etch barrier layer 1111, which is a different material from the N-type doped barrier layer 1112, the same ICP etching gas / wet etching solution cannot clean both materials at the same time, so the N-type doped barrier layer 1112 and the N-type etch barrier layer 1111 can be better cleaned. After the SiO2 mask protection layer is cleaned and removed using BOE etching solution, it is immersed in a dilute HCI solution for 10 to 30 seconds to remove the oxide layer formed in the air. Figure 20 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0107] Then, the primary epitaxial wafer is placed in an MOCVD, the temperature is slowly raised to 560±10°C, TMGa and AsH3 are introduced, and a P-type upper stabilizing layer 1122 is grown on the N-type doped barrier layer 1112 (and the P-type lower stabilizing layer 1121). The thickness of the P-type upper stabilizing layer 1122 can be greater than or equal to 0.4μm, or less than or equal to 0.9μm; the doping source is Cp2Mg or DEZn, and the doping concentration can be greater than or equal to 1E18cm 3 , or less than or equal to 1E19 / cm 3 , is P-type doping; preferably, the total thickness of the P-type lower stabilizing layer 1121 and the P-type upper stabilizing layer 1122 can be greater than or equal to 0.55 μm, or less than or equal to 1.5 μm. Figure 21 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0108] The temperature is slowly lowered to 540±10°C, and TMGa and AsH3 are continuously introduced to grow an ohmic contact layer 109 on the P-type upper stabilization layer 1122. The thickness of the ohmic contact layer 109 can be greater than or equal to 0.15 μm, or less than or equal to 0.3 μm. The doping source is CBr4, and the doping concentration can be greater than or equal to 4E18 / cm 3 , or less than or equal to 1E20 / cm 3 , is P-type doping. Figure 22 A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0109] The secondary epitaxial wafer is taken out, and an N-side electrode 101 is provided on the surface of the N-type substrate 102 and a P-side electrode 110 is provided on the surface of the ohmic contact layer 109 by photolithography and etching. Figure 23A schematic diagram of another semiconductor laser epitaxial layer structure provided for one or more embodiments of the present application.
[0110] Thus, the preparation of the semiconductor laser can be completed.
[0111] In some embodiments, the N-type confinement layer 104 and the P-type confinement layer 108 adopt a composition-graded or doping-graded epitaxial layer structure.
[0112] Specifically, the composition gradient can represent the composition gradient between various elements in the material constituting the epitaxial layer. Taking the P-type confinement layer 108 as an example, the material of the P-type confinement layer 108 can be AlInP, wherein the composition ratio between the Al element and the In element can be gradually changed along the direction perpendicular to the plane where the P-type confinement layer 108 is located. The doping gradient can represent the doping concentration gradient of the doping source in the material constituting the epitaxial layer. Still taking the P-type confinement layer 108 as an example, the doping source of the P-type confinement layer 108 can be Cp2Mg, and the concentration of Cp2Mg can be gradually changed along the direction perpendicular to the plane where the P-type confinement layer 108 is located. In this way, the optical and electrical properties of the semiconductor laser can be further improved.
[0113] In some embodiments, the N-type waveguide layer 105 and the P-type waveguide layer 107 adopt a composition-graded or doping-graded epitaxial layer structure.
[0114] Similar to the above embodiment, composition gradient or doping gradient may be applied to the N-type waveguide layer 105 and the P-type waveguide layer 107 to further improve the optical and electrical properties of the semiconductor laser, which will not be described in detail here.
[0115] In some embodiments, the N-type confinement layer 104 , the P-type confinement layer 108 , the N-type waveguide layer 105 , and the P-type waveguide layer 107 may all adopt a composition-gradient or doping-gradient epitaxial layer structure.
[0116] In some embodiments, an asymmetric structure may be adopted for the P-type waveguide layer 107 and the N-type waveguide layer 105 .
[0117] Figure 24 This is another schematic diagram of a semiconductor laser epitaxial layer structure provided in one or more embodiments of the present application. In some embodiments, a first bandgap transition layer 113 is disposed between the N-type buffer layer 103 and the N-type confinement layer 104. The thickness of the first bandgap transition layer 113 can be greater than or equal to 20 nm, or less than or equal to 70 nm.
[0118] For example, the material of the first bandgap transition layer 113 may be GaInP, wherein the composition ratio of Ga element, In element and P element may be 0.5:0.5:1.
[0119] By providing the first bandgap transition layer 113 , the operating voltage of the semiconductor laser can be effectively reduced, thereby reducing the heat generated by the semiconductor laser and improving the temperature characteristics of the semiconductor laser.
[0120] Figure 25 Another schematic diagram of a semiconductor laser epitaxial layer structure is provided for one or more embodiments of the present application. In some embodiments, a second bandgap transition layer 114 is provided between the P-type confinement layer 108 and the ohmic contact layer 109. The thickness of the second bandgap transition layer 114 may be greater than or equal to 20 nm, or less than or equal to 50 nm.
[0121] For example, the material of the second bandgap transition layer 114 may also be GaInP, wherein the composition ratio of the Ga element, the In element, and the P element may also be 0.5:0.5:1.
[0122] By providing the second bandgap transition layer 114 , the operating voltage of the semiconductor laser can be effectively reduced, thereby reducing the heat generated by the semiconductor laser and improving the temperature characteristics of the semiconductor laser.
[0123] In some embodiments, the present application may also simultaneously set a first bandgap transition layer 113 and a second bandgap transition layer 114 to improve the electrical characteristics of the semiconductor laser, which will not be described in detail here.
[0124] On the basis of the above-mentioned semiconductor laser embodiment, since the semiconductor laser epitaxial layer prepared in the embodiment of the present application has an N-type barrier layer, the etching and evaporation insulation layer process of the conventional semiconductor laser preparation method can be eliminated, simplifying the process flow. The embodiment of the present application can directly perform photolithography to prepare the P-side electrode, thin the N-type substrate, polish, and prepare the N-side electrode, cleave it into Bar strips for evaporation of the front and rear cavity masks, and then cleave it into a single chip chip, and contact its P-side electrode with the heat sink through AuSn solder to form a flip-chip sealing form. The heat sink can be a ceramic substrate (or aluminum nitride, silicon carbide, etc.). The ceramic substrate has higher heat dissipation efficiency and good thermal stability. The upper layer of the ceramic substrate is a solder resist layer, and the solder resist layer can be a titanium platinum gold mixture, or a copper nickel gold mixture.
[0125] In addition to the above-mentioned semiconductor laser preparation method, conventional methods can also be used: photolithography, etching, evaporation of insulating film, preparation of P-side electrode, thinning of N-type substrate, polishing, preparation of N-side electrode, cleavage of it into Bar strips for evaporation of front and rear cavity masks, and then cleavage of it into a single chip chip, and contact of its P side with the heat sink through AuSn solder to form a flip-chip sealing form. Among them, the etching step is shallow etching, and it should be etched to a position greater than or equal to 0.3μm above the barrier layer, or it can be etched to a position less than or equal to 0.5μm above to avoid affecting the effect of the barrier layer. This scheme can combine the advantages of weak refractive index waveguide structure lasers (such as ridge lasers) and the embodiments of the present application, further limit the diffusion of current in the non-injection area, and can reduce the edge carrier accumulation effect of weak refractive index waveguide structure lasers, thereby improving the output beam quality of the laser.
[0126] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.
[0127] For ease of explanation, the above description has been presented in conjunction with specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or to limit the embodiments to the specific forms disclosed above. Based on the above teachings, various modifications and variations are possible. The above embodiments have been selected and described to better explain the principles and practical applications, thereby enabling those skilled in the art to better utilize the embodiments and various different variations of the embodiments suitable for specific use considerations.
Claims
1. A semiconductor laser, characterized in that It includes an N-side electrode, an N-type substrate, an N-type buffer layer, an N-type confinement layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type confinement layer, an ohmic contact layer and a P-side electrode which are arranged in sequence; The semiconductor laser further includes a P-type stabilizing layer, wherein the P-type stabilizing layer is disposed between the P-type confinement layer and the ohmic contact layer; The thickness of the P-type stabilizing layer is greater than or equal to the sum of the thickness of the P-type waveguide layer and the thickness of the P-type confinement layer.
2. The semiconductor laser according to claim 1, wherein An injection region and a non-injection region are provided in the P-type stabilizing layer. In a direction parallel to the plane where the P-type stabilizing layer is located, the non-injection region is provided at both ends of the injection region. The non-injection region is formed by an N-type barrier layer, and the injection region is formed by the P-type stabilizing layer.
3. The semiconductor laser according to claim 1, wherein An injection region and a non-injection region are provided in the P-type stabilizing layer. On the plane where the P-type stabilizing layer is located, the non-injection region is provided around the injection region. The non-injection region is formed by an N-type barrier layer, and the injection region is formed by the P-type stabilizing layer.
4. The semiconductor laser according to claim 1, wherein An injection region and a non-injection region are provided in a first direction parallel to the plane where the P-type stabilizing layer is located. In the non-injection region, an N-type barrier layer is further provided between the P-type stabilizing layer and the ohmic contact layer. The non-injection region is formed by the N-type barrier layer, and the injection region is formed by the P-type stabilizing layer.
5. The semiconductor laser according to any one of claims 2 to 4, characterized in that: The N-type barrier layer includes an N-type etch barrier layer and an N-type doped barrier layer, and the N-type doped barrier layer is located on a side of the N-type etch barrier layer away from the P-type waveguide layer; The N-type etch stop layer and the N-type doped stop layer are made of different materials. The N-type doped stop layer is used to block current, and the N-type etch stop layer is used to block etching materials.
6. The semiconductor laser according to claim 5, characterized in that The thickness of the N-type etch barrier layer is greater than or equal to 15 nm and / or less than or equal to 25 nm; the thickness of the N-type doping barrier layer is greater than or equal to 30 nm and / or less than or equal to 50 nm.
7. The semiconductor laser according to claim 5, wherein The material of the N-type etch stop layer includes GaInP, the doping source of the N-type etch stop layer includes Si2H6, and the doping concentration of Si2H6 is greater than or equal to 1.5E18 / cm 3 , and / or less than or equal to 3.5E18 / cm 3 ; The material of the N-type doped barrier layer includes GaAs, the doping source of the N-type etch barrier layer includes Si2H6, and the doping concentration of Si2H6 is greater than or equal to 1.5E18 / cm 3 , and / or less than or equal to 3.5E18 / cm 3 ; The ratio of Ga element, In element and P element in the GaInP material is x1:(1-x1):1; wherein x1 is greater than or equal to 0.48 and / or less than or equal to 0.
52.
8. The semiconductor laser according to claim 1, wherein The Al content in the P-type stabilizing layer is lower than the Al content in the P-type confinement layer, or the P-type stabilizing layer does not include the Al element.
9. The semiconductor laser according to claim 1, wherein The N-type confinement layer and the P-type confinement layer adopt a composition gradient or doping gradient epitaxial layer structure; and / or, The N-type waveguide layer and the P-type waveguide layer adopt a composition gradient or doping gradient epitaxial layer structure.
10. The semiconductor laser according to claim 1, wherein A first bandgap transition layer is provided between the N-type buffer layer and the N-type confinement layer; the thickness of the first bandgap transition layer is greater than or equal to 20 nm, and / or less than or equal to 70 nm; and / or, A second bandgap transition layer is disposed between the P-type confinement layer and the ohmic contact layer. The thickness of the second bandgap transition layer is greater than or equal to 20 nm and / or less than or equal to 50 nm.
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CN121602229A