Optical Proximity Correction Method for the Through-Hole Layer

The through-hole size on the inner side of the U-shaped metal wire is reduced by optical proximity correction method, which solves the problem of poor alignment between the through-hole and the metal wire, and improves the quality of the device.

CN115146578BActive Publication Date: 2025-07-22SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Patent Information

Application Number
CN202210784938.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-29
Publication Date
2025-07-22
Estimated Expiration
2042-06-29

AI Technical Summary

Technical Problem

During semiconductor manufacturing, poor alignment between the through holes and metal wires leads to device failure, especially under the influence of the gap inside the U-shaped metal wires, the through holes fail to fill tungsten, affecting device quality.

Method used

Through the optical proximity correction method, the size of the through hole located inside the U-shaped structure is reduced, the distance between it and the gap between the oxide layer is increased, and the alignment rate of the through hole and metal wire is improved.

Benefits of technology

The alignment rate of through holes and metal wires is improved, the problem of tungsten filling failure is avoided, and the quality of the device is improved.

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Abstract

The present invention provides an optical proximity correction method for a via layer, comprising: providing a layout of a semiconductor device, the layout including a metal layer and a via layer, the via layer including a plurality of vias, the metal layer including a plurality of metal lines, and the vias being located on the metal lines; querying the U-shaped structures formed by the metal lines, picking out the vias located inside the U-shaped structures as the vias to be corrected; and reducing the sizes of all the vias to be corrected by the optical proximity correction method, while keeping the sizes of the vias that do not need to be corrected unchanged. The present invention increases the distance between the vias inside the "U"-shaped metal lines and the gap of the oxide layer, enlarges the process window for the alignment of the vias and the metal lines, avoids the problem of failure in tungsten filling into the vias, and also improves the alignment rate of the vias and the metal lines, thereby improving the quality of the device.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and more particularly to an optical proximity correction method for a via layer. Background Art

[0002] In the back-end manufacturing process of semiconductors, in order to achieve the interconnection of upper and lower metal layers, vias need to be formed between the metal lines of adjacent two metal layers to realize the interconnection of the upper and lower metal layers. For example, in the formation of SRAM, a gate structure is formed on each metal layer, and the gate structure is connected to other metal layers through vias.

[0003] However, in the failure of wafer edge SRAM on the 0.11um platform, it is found that some failures are due to the poor alignment between the vias and the lower metal layer (metal line), and the greater the deviation, the greater the failure. After further analysis of the failed SRAM by the inventor, it is found that the poor alignment of these vias appears inside the "U"-shaped metal line. Moreover, it is also found that the poor alignment between the vias and the metal layer is because there are gaps in the oxide layer near the metal line where the vias are located, and the gaps affect the alignment between the vias and the metal layer. Specifically, please refer to Figure 1 and Figure 2 , Figure 1 , Figure 1 is a cross-sectional view of SRAM, Figure 2 is a schematic cross-sectional view of SRAM. From the figure, it can be seen that there is a metal layer, the metal layer has metal lines 110, and the metal lines 110 are separated by an oxide layer 120. It is found that there are gaps 130 in the oxide layer 120. A via 140 will be formed on one of the metal lines 110. If the gap is too large, the via 140 may deviate onto the gap 130. When filling tungsten into the via 140, since there are impurities in the gap, it may affect the filling of the via 140, and if the gap 130 is filled with tungsten, it will cause the filling of conductive metal in places where it should not be filled. Therefore, it will affect the quality of the formed device.

[0004] Therefore, how to improve the alignment rate between the vias and the metal lines is an urgent problem to be solved in the prior art. Summary of the Invention

[0005] The purpose of the present invention is to provide an optical proximity correction method for a via layer, which can make the distance between the vias inside the "U"-shaped metal line and the gaps far, avoid the problem of failure to fill tungsten into the vias, and can also improve the alignment rate between the vias and the metal lines, thereby improving the quality of the device.

[0006] To achieve the above purpose, the present invention provides an optical proximity correction method for a via layer, including:

[0007] Provide a layout of a semiconductor device, the layout including a metal layer and a via layer, the via layer including a plurality of vias, the metal layer including a plurality of metal lines, and the vias being located on the metal lines;

[0008] Query the U-shaped structure formed by the metal lines, and pick out the vias located inside the U-shaped structure as the vias to be corrected; and

[0009] Reduce the sizes of all the vias to be corrected, and keep the sizes of the vias that do not need to be corrected unchanged.

[0010] Optionally, in the optical proximity correction method of the via layer, the layout further includes an oxide layer, and the oxide layer separates a plurality of the metal lines.

[0011] Optionally, in the optical proximity correction method of the via layer, the vias are square.

[0012] Optionally, in the optical proximity correction method of the via layer, the vias are circular.

[0013] Optionally, in the optical proximity correction method of the via layer, the method for reducing the sizes of all the vias to be corrected includes: finding the center points of the vias and reducing the areas of the vias in the direction of the center points.

[0014] Optionally, in the optical proximity correction method of the via layer, the sizes of all the vias to be corrected are reduced in a certain proportion to the sizes of the vias.

[0015] Optionally, in the optical proximity correction method of the via layer, the sizes of all the vias to be corrected are reduced by 5% to 10% of the sizes of the vias.

[0016] Optionally, in the optical proximity correction method of the via layer, the number of the metal lines is greater than or equal to the number of the vias.

[0017] Optionally, in the optical proximity correction method of the via layer, there are a plurality of vias located inside one U-shaped structure.

[0018] Optionally, in the optical proximity correction method of the via layer, the U-shaped structure is composed of three linearly-shaped metal lines, and the three metal lines are connected in sequence to form the U-shaped structure.

[0019] In the optical proximity correction method for the via layer provided by the present invention, the via located inside the "U" - shaped structure is queried as the via to be corrected. The size of the via to be corrected is reduced by the optical proximity correction method, and the distance of the gap between the reduced - size via and the oxide layer is increased, thereby enlarging the process window for the alignment of the reduced - size via and the metal line, avoiding the problem of failure in tungsten filling into the via, and also improving the alignment rate of the via and the metal line. Finally, the quality of the device is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 and Figure 2 is a schematic diagram of a prior - art SRAM;

[0021] Figure 3 is a flowchart of the optical proximity correction method for the via layer in an embodiment of the present invention;

[0022] Figure 4 is a schematic diagram of a layout in an embodiment of the present invention;

[0023] In the figure: 110 - metal line, 120 - oxide layer, 130 - gap, 140 - via, 210 - metal line, 220 - oxide layer, 240 - via, 241 - via to be corrected, 242 - via that does not need to be corrected. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] The specific embodiments of the present invention will be described in more detail below with reference to the schematic diagrams. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the drawings are all in a very simplified form and use non - precise scales, only for the purpose of facilitating and clearly assisting in explaining the objectives of the embodiments of the present invention.

[0025] Hereinafter, terms such as "first" and "second" are used to distinguish between similar elements and are not necessarily used to describe a specific order or time sequence. It is to be understood that, where appropriate, these terms may be replaced. Similarly, if the methods described herein include a series of steps, and the order of these steps presented herein is not necessarily the only order in which these steps can be executed, and some of the described steps may be omitted and / or some other steps not described herein may be added to the method.

[0026] Through failure location slice analysis, the inventor found that the connection open circuit was caused by the lack of tungsten in the fixed column vias. By comparing the cross-sectional views of the three tangent points, it can be clearly seen that on the basis of the same line width, the oxide layer filling is poor in some places, and the gap is significantly larger. At this time, the alignment between the via hole located next to the gap and the lower metal layer is deviated, and the via hole is displaced above the gap. The via hole etching will penetrate through the gap, causing the via hole to be connected to the gap in the oxide layer. The subsequent tungsten filling of the via hole is extremely dependent on the internal environment of the hole. The environment in the complex morphology formed by the gap between the via hole and the oxide layer affects the tungsten filling, resulting in the failure of the subsequent connection. The inventor further analyzed the patterns around the oxide layer gap and found that the large-sized gaps are all inside the metal layer of the U-shaped structure. The reason is that there are obstacles on three sides of the metal layer of the U-shaped structure, which is not conducive to the deposition of the oxide layer.

[0027] Please refer to Figure 3 , the present invention provides an optical proximity correction method for a via layer, including:

[0028] S11: Provide a layout of a semiconductor device, the layout includes a metal layer and a via layer, the via layer includes a plurality of via holes, the metal layer includes a plurality of metal lines, and the via holes are located on the metal lines;

[0029] S12: Query the U-shaped structure formed by the metal lines, and pick out the via holes located inside the U-shaped structure as the via holes to be corrected; and

[0030] S13: Reduce the sizes of all the via holes to be corrected by an optical proximity correction method, and keep the sizes of the via holes that do not need to be corrected unchanged.

[0031] Specifically, please refer to Figure 4 , the provided layout of the semiconductor device includes metal lines 210. There are multiple metal lines 210 in this embodiment. The metal lines 210 are arranged according to the circuit structure of the device to be formed. All the metal lines 210 are on the same plane, and all the metal lines 210 form a metal layer. The entire metal layer has a certain circuit function. If there are multiple metal layers and the functions of multiple metal layers need to be combined, it is necessary to connect the multiple metal layers through via holes 240. Therefore, the via holes are located on the metal lines 210. Further, the layout also includes an oxide layer 220. The oxide layer 220 separates several metal lines 210. At the same time, the oxide layer 220 also separates between metal layers. At the same time, the oxide layer 220 also separates between via holes 240 and via holes 240. Adjacent metal lines 210 may form various shapes, such as the shape of a U-shaped structure. In the embodiment of the present invention, all the metal lines of the U-shaped structure are picked out. For example Figure 4 The U-shaped structure 250 in is composed of three linearly shaped metal lines, and the three metal lines are sequentially connected to form the U-shaped structure 250.

[0032] In an embodiment of the present invention, the through hole 240 is square, such as rectangular and square, and preferably square in the embodiment of the present invention. In another embodiment of the present invention, the through hole 240 is circular. Of course, in other embodiments of the present invention, the through hole 240 can also be both square and circular.

[0033] In the embodiment of the present invention, the number of metal wires 210 is greater than or equal to the number of through holes 240. A device may have multiple metal layers, each metal layer having the same or different functions, and then the respective metal layers are connected through the through hole 240 structure, and the respective through hole layers and each through hole 240 are separated by an oxide layer. Therefore, from a top view or a cross-sectional view, it can be seen that the through hole 240 is located on the through hole layer. And the metal layer is composed of several metal wires, and the through hole layer is composed of several through holes, so it is equivalent to the through hole 240 being located on the metal wire, so the number of through holes is less than or equal to the number of metal wires.

[0034] Preferably, there are several through holes located inside a U-shaped structure, and there are several through holes to be corrected in the entire metal layer, such as Figure 4 in, there is one through hole located inside the first U-shaped structure 251, and there are two through holes located inside the second U-shaped structure 252. In addition to the metal layers being separated by an oxide layer, the metal wires are also separated by an oxide layer. Since the oxide layer is formed by depositing an oxide, if there are metal wires formed in the shape of a U-shaped structure around the metal wire where the through hole is located, these metal wires have a certain influence on the flow of the oxide, so that the formed oxide layer has gaps, and this gap may be very close to the metal wire where the metal hole is located. And when etching the oxide layer between the metal layer and the upper metal layer to form a through hole, due to the excessive depth of the through hole, the filling may not be good enough, so over-etching of the through hole will be performed. During over-etching, if there is a gap beside the metal wire corresponding to the through hole, and if the oxide layer on the metal wire is over-etched to form a through hole, it may cause the through hole to deviate to the adjacent gap, resulting in filling the gap when filling tungsten into the through hole. For example, Figure 4 the through hole located inside the first U-shaped structure 251 is the through hole 241 to be corrected. The through holes not located inside the U-shaped structure are the through holes 242 that do not need to be corrected. The shape formed by the adjacent metal wires 210 of the through holes 242 that do not need to be corrected is not a U-shaped shape, and the through holes 242 that do not need to be corrected do not need to be corrected by the optical proximity correction method. All the through holes 240 in the metal layer are divided into these two categories. The classification of each through hole 240 is based on whether it is located inside the U-shaped structure 250 formed by the metal wires 210.

[0035] Further, the method for reducing the size of all vias to be corrected includes: finding the center point of the via and reducing the area of the via 240 in the direction of the center point. If the cross-section of the via 240 is square, find the center of the square, and use the center as a reference point to move the sides towards the center point, thereby reducing the area. If the cross-section of the via 240 is circular, find the center of the circle, and use the center as a reference point to move the sides towards the center point, thereby reducing the area. Feed back the modified size to the optical correction center, and modify the size of the via 241 to be corrected in the mask, so that the size of the via formed next time is reduced, making the distance between the edge of the via and the gap farther. In this way, when etching the oxide layer to form the via, it will not deviate above the gap, and when filling tungsten into the via, it will not fill into the gap, thus avoiding the occurrence of defects. The specific method of reduction is to take the center of the original via 241 to be corrected as the standard and reduce it inward. The reduced size is in a certain proportion to the line width. The data of the reduced size of the via 241 to be corrected in the embodiment of the present invention is obtained through multiple experiments. The reduced size is 5% - 10% of the size of the via 241 to be corrected. Specifically, the inward reduction distance may be 0.175 nanometers - 0.18 nanometers.

[0036] In summary, in the optical proximity correction method of the via layer provided in the embodiment of the present invention, the via located inside the "U" - shaped structure is queried as the via to be corrected, and the size of the via to be corrected is reduced by the optical proximity correction method, increasing the distance between the via after size reduction and the gap of the oxide layer, thereby enlarging the process window for aligning the via after size reduction and the metal line, avoiding the problem of tungsten filling failure in the via, and also improving the alignment rate of the via and the metal line. Finally, the quality of the device is improved.

[0037] The above is only the preferred embodiment of the present invention and does not impose any limitation on the present invention. Any person skilled in the art within the technical field, without departing from the scope of the technical solution of the present invention, makes any form of equivalent replacement or modification and other changes to the technical solution and technical content disclosed by the present invention, all of which belong to the content within the scope of the technical solution of the present invention and still fall within the protection scope of the present invention.

Claims

1. An optical proximity correction method for a via layer, characterized in that Including: Providing a layout of a semiconductor device, the layout including a metal layer and a via layer, the via layer including a plurality of vias, the metal layer including a plurality of metal lines, the vias being located on the metal lines, the layout further including an oxide layer, the oxide layer separating the plurality of metal lines from each other; Querying a U-shaped structure formed by the metal lines, picking out the vias located inside the U-shaped structure as the vias to be corrected, the U-shaped structure being composed of three linearly-shaped metal lines, the three metal lines being sequentially connected to form the U-shaped structure; And Shrinking the sizes of all the vias to be corrected by an optical proximity correction method, increasing the distance of the gap between the vias and the oxide layer, and keeping the sizes of the vias that do not need to be corrected unchanged.

2. The optical proximity correction method for the via layer according to claim 1, wherein The vias are square.

3. The optical proximity correction method for the via layer according to claim 1, wherein The vias are circular.

4. The optical proximity correction method for the via layer according to claim 1, wherein The method for shrinking the sizes of all the vias to be corrected includes: finding the center points of the vias and shrinking the areas of the vias in the directions of the center points.

5. The optical proximity correction method for the via layer according to claim 4, wherein The size of shrinking the sizes of all the vias to be corrected is 5% - 10% of the via size.

6. The optical proximity correction method for the via layer according to claim 1, characterized in that, The number of the metal lines is greater than or equal to the number of the vias.

7. The optical proximity correction method for the via layer according to claim 1, characterized in that, There are a plurality of vias located inside one U-shaped structure.

Citation Information

Patent Citations

  • Optical proximity correction method for via hole layer

    CN105304558A

  • Multi-cascade semiconductor structure and forming method thereof

    CN109712975A