Device Structure and Its Manufacturing Method

Abstract

The present invention provides a device structure and a manufacturing method thereof. The device structure includes a substrate, a first target thin film resistor layer, a second target thin film resistor layer, and a sidewall conductive layer stacked in sequence. Openings are provided on at least one sidewall of the first target thin film resistor layer and on the sidewalls of the second target thin film resistor layer located on the same side to form at least one notch structure, and at least part of the sidewall covers the sidewall conductive layer and is in electrical contact with the substrate conductive layer of the substrate to facilitate the extraction of electrical signals; the second target thin film resistor layer shields at least one sidewall of the first target thin film resistor layer, and the at least one notch structure is located on a different side from the sidewall of the first target thin film resistor layer shielded by the second target thin film resistor layer, which can maximize the avoidance of thin film residues on the step sidewalls where thin film deposition is not required, save the subsequent steps of removing the sidewall thin film, and is beneficial to improving device performance and controlling costs.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor processing technologies, and particularly to a device structure and a manufacturing method thereof. Background Art

[0002] The internal structure of a Micro-Electro-Mechanical System (MEMS) is generally on the micron or even nanometer scale, which is an independent intelligent system. MEMS has the advantages of miniaturization, intelligence, multi-function, high integration, and suitability for mass production, and has broad application prospects in fields such as electronics, medicine, industry, automotive, and aerospace systems.

[0003] In traditional MEMS processing technologies, when the sidewall height is relatively high, in subsequent deposition processes, film residues will be generated on the sidewalls of steps where film deposition is not required due to the sidewall effect, which is likely to cause short-circuit problems.

[0004] Therefore, it is necessary to develop a new device structure and a manufacturing method thereof to solve the above problems existing in the prior art. Summary of the Invention

[0005] The purpose of the present invention is to provide a device structure and a manufacturing method thereof, which are beneficial to the extraction of electrical signals and can avoid film residues on the sidewalls of steps where film deposition is not required to the greatest extent, saving the subsequent steps of removing the sidewall film, so as to be beneficial to improving device performance and controlling costs.

[0006] To achieve the above purpose, the device structure of the present invention includes:

[0007] A substrate, a first target thin-film resistor layer, and a second target thin-film resistor layer stacked in sequence, and a sidewall conductive layer, wherein the substrate includes a substrate conductive layer in electrical contact with the sidewall conductive layer;

[0008] Openings are provided on at least one sidewall of the first target thin-film resistor layer and on the sidewalls on the same side of the second target thin-film resistor layer to enclose at least one notch structure, and the sidewall conductive layer covers at least part of the sidewalls of the notch structure;

[0009] The second target thin-film resistor layer shields at least one sidewall of the first target thin-film resistor layer;

[0010] The at least one notch structure and the sidewall of the first target thin-film resistor layer shielded by the second target thin-film resistor layer are located on different sides.

[0011] The beneficial effects of the device structure of the present invention are as follows: Among the substrate, the first target thin film resistor layer, and the second target thin film resistor layer stacked in sequence, the substrate includes a substrate conductive layer that is in electrical contact with the sidewall conductive layer. Openings are provided on at least one sidewall of the first target thin film resistor layer and on the sidewalls on the same side of the second target thin film resistor layer to form at least one notch structure, and the sidewall conductive layer covers at least part of the sidewalls of the notch structure. The second target thin film resistor layer shields at least one sidewall of the first target thin film resistor layer, and the at least one notch structure and the sidewall of the first target thin film resistor layer shielded by the second target thin film resistor layer are on different sides, which can maximize the avoidance of film residues on the sidewalls of steps where film deposition is not required, saving the subsequent steps of removing the sidewall film, so as to be beneficial to improving device performance and controlling costs.

[0012] Preferably, at least two of the notch structures are arranged opposite to each other along the first radial direction, and the two ends of the second target thin film resistor layer along the second radial direction shield the opposite sidewalls of the first target thin film resistor layer, and the second radial direction is perpendicular to the first radial direction on the same horizontal plane.

[0013] More preferably, the device structure further includes a top conductive layer that covers the top of the second target thin film resistor layer and is in electrical contact with the sidewall conductive layer.

[0014] More preferably, the top conductive layer includes a plurality of top surface conductive layers arranged along the first radial direction, and the plurality of top surface conductive layers cover part of the top surface of the second target thin film resistor layer and are electrically insulated from each other.

[0015] More preferably, the plurality of top surface conductive layers are in electrical contact with the sidewall conductive layer.

[0016] More preferably, the top conductive layer further includes a top sidewall conductive layer that covers at least part of the sidewalls of the second target thin film resistor layer, and the plurality of top surface conductive layers are in electrical contact with the sidewall conductive layer through the top sidewall conductive layer.

[0017] Preferably, the substrate further includes a functional layer that is in electrical contact with the substrate conductive layer to provide an electrical signal.

[0018] The manufacturing method of the device structure of the present invention includes the following steps:

[0019] S0: Provide a substrate with a sacrificial layer covering its surface, and the sacrificial layer includes a first groove structure that exposes part of the surface of the substrate;

[0020] S1: Deposit the first thin-film resistor material on the substrate and then remove a part of the first thin-film resistor material to form a first thin-film resistor layer filling the first trench structure;

[0021] S2: Deposit the second thin-film resistor material on the structure obtained in step S1 and then remove a part of the second thin-film resistor material to form a second thin-film resistor layer covering the top surface of the first thin-film resistor layer and a part of the top surface of the sacrificial layer;

[0022] S3: Starting from the top surface of the second thin-film resistor layer near at least one side edge, remove a part of the second thin-film resistor layer and a part of the first thin-film resistor layer until a part of the surface of the substrate and a part of the side wall of the sacrificial layer are exposed, so that the formed second target thin-film resistor layer covers the top surface of the formed first target thin-film resistor layer and a part of the top surface of the sacrificial layer, and openings are formed on at least one side wall of the first target thin-film resistor layer and the side wall on the same side of the second target thin-film resistor layer to enclose a notch structure;

[0023] S4: After removing the sacrificial layer, deposit a conductive material on the obtained structure and then remove a part of the conductive material to form a side-wall conductive layer covering at least a part of the side wall of the notch structure, and a substrate conductive layer covering a part of the surface of the substrate and being in electrical contact with the side-wall conductive layer.

[0024] The beneficial effect of the method for manufacturing the device structure of the present invention is that: after forming the second thin-film resistor layer covering the top surface of the first thin-film resistor layer and a part of the top surface of the sacrificial layer through step S2, then starting from the top surface of the second thin-film resistor layer near at least one side edge through step S3, remove a part of the second thin-film resistor layer and a part of the first thin-film resistor layer until a part of the surface of the substrate and a part of the side wall of the sacrificial layer are exposed, so that the formed second target thin-film resistor layer covers the top surface of the formed first target thin-film resistor layer and a part of the top surface of the sacrificial layer, and openings are formed on at least one side wall of the first target thin-film resistor layer and the side wall on the same side of the second target thin-film resistor layer to enclose a notch structure. Finally, after removing the sacrificial layer through step S4, deposit a conductive material on the obtained structure and then remove a part of the conductive material to form a side-wall conductive layer covering at least a part of the side wall of the notch structure, and a substrate conductive layer covering a part of the surface of the substrate and being in electrical contact with the side-wall conductive layer, which can be beneficial to leading out an electrical signal from the substrate and maximizing the avoidance of film residue on the side walls of the steps where film deposition is not required, saving the subsequent step of removing the side-wall film, so as to be beneficial to improving the device performance and controlling the cost.

[0025] Preferably, in the step S2, the step of removing a part of the second thin-film resistance material after depositing the structure obtained in the step S1 with the second thin-film resistance material includes: patterning the second thin-film resistance layer after depositing the structure obtained in the step S1 with the second thin-film resistance material, so that the second thin-film resistance layer covers the top surface of the first thin-film resistance layer along the first radial direction. In the step S3, when the number of the notch structures is at least 2, all the notch structures are located on the opposite sides of the first target thin-film layer along the first radial direction.

[0026] More preferably, in the step S2, when performing the step of patterning the second thin-film resistance layer after depositing the structure obtained in the step S1 with the second thin-film resistance material, the second thin-film resistance layer also covers the top surface of the first thin-film resistance layer and at least a part of the top surface of the sacrificial layer along the second radial direction: the second radial direction is perpendicular to the first radial direction on the same horizontal plane.

[0027] More preferably, in the step S3, the step of removing a part of the first thin-film resistance layer and a part of the second thin-film resistance layer from the top surface near at least one side edge of the second thin-film resistance layer until a part of the surface of the substrate is exposed includes: removing a part of the first thin-film resistance layer and a part of the second thin-film resistance layer from the top surface near the opposite side edges of the second thin-film resistance layer along the first radial direction until a part of the surface of the substrate is exposed, forming a second groove structure surrounded by the first target thin-film resistance layer, the second target thin-film resistance layer, the sacrificial layer and the substrate, and making at least one side wall of the first target thin-film resistance layer in the second groove structure flush with the side wall on the same side of the second target thin-film resistance layer.

[0028] Preferably, in the step S4, the step of removing a part of the conductive material after depositing the conductive material on the obtained structure includes: removing a part of the conductive material covering the surface of the second target thin-film resistance layer to form a top conductive layer in electrical contact with the side wall conductive layer.

[0029] More preferably, the top conductive layer includes a plurality of top surface conductive layers. The step of removing a part of the conductive material covering the surface of the second target thin-film resistance layer includes: removing a part of the conductive material covering the top surface of the second target thin-film resistance layer to form a plurality of top surface conductive layers arranged along the first radial direction, insulated from each other and in electrical contact with the side wall conductive layer.

[0030] Further preferably, the top conductive layer includes a top surface current collecting conductive layer and a plurality of top surface conductive layers. The step of removing a part of the conductive material covering the surface of the second target thin film resistor layer includes: removing a part of the conductive material covering the top surface of the second target thin film resistor layer to form a plurality of top surface conductive layers arranged along the first radial direction and insulated from each other, and forming a top surface current collecting conductive layer that is in electrical contact with the plurality of top surface conductive layers and in electrical contact with the side wall conductive layer.

[0031] Further preferably, the top conductive layer includes a top side wall conductive layer. A part of the conductive material covering the surface of the second target thin film resistor layer is removed to form the top side wall conductive layer, and the top side wall conductive layer is in electrical contact with the side wall conductive layer, the top surface current collecting conductive layer or at least one of the top surface conductive layers. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 is a top view of the device structure according to an embodiment of the present invention;

[0033] Figure 2 is Figure 1 a cross-sectional view of the device structure shown along line A-A;

[0034] Figure 3 is Figure 1 a cross-sectional view of the device structure shown along line B-B.

[0035] Figure 4 is Figure 1 a cross-sectional view in the A-A direction of the structure obtained after setting the conductive layer for the structure shown;

[0036] Figure 5 is Figure 1 another cross-sectional view in the A-A direction of the structure obtained after setting the conductive layer for the structure shown;

[0037] Figure 6 is Figure 1 a top view of the structure obtained after setting the conductive layer for the structure shown;

[0038] Figure 7 is Figure 6 a cross-sectional view in the B-B direction of the structure shown;

[0039] Figure 8 is a top view of the substrate according to an embodiment of the present invention;

[0040] Figure 9 is along Figure 8 the cross-sectional view formed in the A-A direction shown;

[0041] Figure 10 is at Figure 8Schematic diagram of the structure obtained after depositing a first thin film resistor material on the shown structure and removing a part of the first thin film resistor material;

[0042] Figure 11 For the Figure 10 Cross-sectional view formed along the A-A direction shown;

[0043] Figure 12 For the Figure 10 Schematic diagram of the structure obtained after depositing a second thin film resistor material on the shown structure and removing a part of the second thin film resistor material;

[0044] Figure 13 For the Figure 12 Cross-sectional view along the A-A direction shown;

[0045] Figure 14 For the Figure 12 Schematic diagram of the structure formed after removing a part of the first thin film resistor layer and a part of the second thin film resistor layer on the shown structure;

[0046] Figure 15 For the Figure 14 Cross-sectional view along the B-B direction shown;

[0047] Figure 16 Schematic diagram of the arrangement of a top conductive layer on a second thin film resistor layer according to an embodiment of the present invention;

[0048] Figure 17 Schematic diagram of another arrangement of a top conductive layer on a second thin film resistor layer according to an embodiment of the present invention. Detailed implementation manners

[0049] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the protection scope of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein shall have the ordinary meanings understood by those of ordinary skill in the art in the field to which the present invention belongs. The words such as "including" used herein mean that the elements or items appearing before the word cover the elements or items listed after the word and their equivalents, without excluding other elements or items.

[0050] The embodiments of the present invention provide a device structure and a manufacturing method thereof, so as to maximally avoid the generation of thin film residues on the sidewalls of steps where thin film deposition is not required, save the subsequent steps of removing the sidewall thin films, and be beneficial to improving the device performance and controlling the cost.

[0051] In some embodiments, with reference to Figures 1 to 3 , Figure 1 the device structure shown includes a substrate 1, a first target thin film resistor layer 2, and a second target thin film resistor layer 3 stacked in sequence. Openings (not labeled in the figure) are provided on at least one side wall of the first target thin film resistor layer and the side wall on the same side of the second target thin film resistor layer to form a notch structure 31.

[0052] In some embodiments, the substrate 1 is a silicon substrate.

[0053] In some embodiments, the substrate 1 further includes a functional part to generate an electrical signal.

[0054] In some embodiments, the substrate 1 is a silicon substrate provided with a CMOS processing circuit, making the device structure compatible with CMOS. The CMOS processing circuit is the functional part.

[0055] In some embodiments, the first thin film resistor material forming the first target thin film resistor layer 2 and the second thin film resistor material forming the second target thin film resistor layer 3 are doped polysilicon or doped amorphous silicon.

[0056] In some embodiments, the first target thin film resistor layer 2 and the second target thin film resistor layer 3 have the same composition material.

[0057] In some embodiments, the notch structure 31 is formed on at least one side wall of the second target thin film resistor layer 3 and the side wall on the same side of the first target thin film resistor layer 2 along a first radial direction of the second target thin film resistor layer 3. The first radial direction extends along the top surface extension direction of the second target thin film resistor layer 3 from a first side wall 32 of the second target thin film resistor layer 3 to a second side wall 33 opposite to the first side wall 32.

[0058] In some embodiments, with reference to Figure 1 , the first radial direction is along the B - B direction.

[0059] In some embodiments, with reference to Figure 1 , for the first side wall 32 and the second side wall 33 of the second target thin film resistor layer 3 that are opposite to each other along the B - B direction, the side wall of the first target thin film resistor layer 2 on the same side as the first side wall 32, and the side wall of the first target thin film resistor layer 2 on the same side as the second side wall 33, openings (not labeled in the figure) are provided to form two opposite notch structures 31.

[0060] In some embodiments, the specific position and number of the notch structure 31 on the side wall where it is located can be flexibly adjusted according to process requirements.

[0061] In some embodiments, at least one of the notch structures 31 and the sidewall of the first target thin film resistor layer 2 shielded by the second target thin film resistor layer 3 are on different sides. In some application scenarios, a conductive layer is further provided on the sidewall where at least one of the notch structures 31 is located to lead out the electrical signal of the circuit provided on the substrate. Setting at least one of the notch structures 31 to be on a different side from the sidewall of the first target thin film resistor layer 2 shielded by the second target thin film resistor layer 3 can reduce the mutual interference between different conductive layers.

[0062] In some embodiments, the projected area of the second target thin film resistor layer 3 on the substrate 1 is larger than the projected area of the first target thin film resistor layer 2 on the substrate 1 in the same direction, so that the second target thin film resistor layer 3 can shield at least one sidewall of the first target thin film resistor layer 2, which can maximize the avoidance of film residue on the step sidewalls where film deposition is not required, save the subsequent step of removing the sidewall film, and is beneficial to improving device performance and controlling costs.

[0063] In some embodiments, referring to Figure 2 , the projected area of the second target thin film resistor layer 3 on the substrate 1 is the area enclosed by the edges of the projected pattern formed by projecting the second target thin film resistor layer 3 towards the substrate 1 in the vertical direction.

[0064] In some embodiments, referring to Figure 1 and Figure 2 , the portions of the second target thin film resistor layer 3 on both sides of the notch structure 31 respectively shield one sidewall of the first target thin film resistor layer 2, that is, the second target thin film resistor layer 3 can shield the third sidewall 23 of the first target thin film resistor layer 2 and the fourth sidewall 24 opposite to the third sidewall 23.

[0065] In some embodiments, the partial sidewalls of the second target thin film resistor layer 3 that participate in forming the notch structure 31 are flush with the partial sidewalls of the first target thin film resistor layer 2 on the same side, and the specific sidewalls to be made flush can be flexibly adjusted according to process requirements.

[0066] In some embodiments, the device structure further includes a conductive layer.

[0067] In some embodiments, the constituent material of the conductive layer is at least one of titanium metal, tantalum metal, aluminum metal, copper metal, titanium nitride, and tantalum nitride.

[0068] In some embodiments, the conductive layer includes a top conductive layer covering the top of the second target thin film resistor layer 3.

[0069] In some embodiments, the top conductive layer includes a plurality of top surface conductive layers. Refer to Figure 4 and Figure 6 , a plurality of top surface conductive layers 51 extend along the second radial direction of the second target thin film resistance layer 3, that is, Figure 6 the A-A direction shown in the figure, and cover a part of the top surface of the second target thin film resistance layer 3. The plurality of top surface conductive layers 51 are electrically insulated from each other.

[0070] In some embodiments, the plurality of top surface conductive layers 51 are parallel to each other.

[0071] In some embodiments, the top conductive layer further includes a top sidewall conductive layer covering at least a part of the sidewall of the second target thin film resistance layer 3.

[0072] In some embodiments, refer to Figure 4 and Figure 6 , during the process of using the conductive material substrate, the formed top sidewall conductive layer 52 also covers at least a part of the sidewall of the second target thin film resistance layer 3. Since the thickness of the first target thin film resistance layer 2 is relatively high, if a conductive layer is formed on the sidewall where it is not required to deposit the conductive layer, it is difficult to remove it through subsequent patterning processes. And the second target thin film resistance layer 3 covers the top surface of the first target thin film resistance layer 2 and can shield at least one sidewall of the first target thin film resistance layer 2, so that the sidewall of the first target thin film resistance layer 2 where it is not required to deposit the thin film is shielded and protected. In addition, the thickness of the second target thin film resistance layer 3 is much smaller than the thickness of the first target thin film resistance layer 2. Forming the top sidewall conductive layer 52 on at least a part of the sidewall of the second target thin film resistance layer 3 according to process requirements not only avoids patterning the first target thin film resistance layer 2, but also facilitates the extraction of electrical signals through the electrical contact between the top sidewall conductive layer 52 and the sidewall conductive layer.

[0073] In some embodiments, refer to Figure 4 and Figure 5 , according to actual process requirements, even if it is necessary to remove the top sidewall conductive layer 52 deposited on the sidewall of the second target thin film resistance layer 3, since the thickness of the top sidewall conductive layer 52 is small and it is located above the first target thin film resistance layer 2, it is very easy to remove it through subsequent patterning processes.

[0074] In some embodiments, the conductive layer further includes a sidewall conductive layer. The sidewall conductive layer covers at least one sidewall of the notch structure 31 and covers the sidewall of the first target thin film resistance layer 2 on the same side as at least one sidewall of the notch structure 31. Specifically, refer to Figure 1 , Figure 3 and Figure 7, the sidewall conductive layer 53 covers the opposite first notch sidewall 36 and second notch sidewall 37 of the second target thin film resistor layer 3, also covers the first target thin film sidewall 21 of the first target thin film resistor layer 2 on the same side as the first notch sidewall 36, and covers the second target thin film sidewall 22 on the same side as the second notch sidewall 37.

[0075] In some embodiments, the first notch sidewall 36 is flush with the first target thin film sidewall 21.

[0076] In some embodiments, the second notch sidewall 37 is flush with the second target thin film sidewall 22.

[0077] In some embodiments, the sidewall conductive layer is in electrical contact with the plurality of top surface conductive layers. Specifically, referring to Figures 3 to 7 , a plurality of the top surface conductive layers 51 include a first top surface conductive layer 511 and a second top surface conductive layer 512 located at the edge and opposite to each other. The sidewall conductive layer (not labeled in the figure) covering the surface of the first notch sidewall 36 is in electrical contact with the first top surface conductive layer 511, and the sidewall conductive layer (not labeled in the figure) covering the surface of the second notch sidewall 37 is in electrical contact with the second top surface conductive layer 512.

[0078] In some embodiments, the conductive layer further includes a substrate conductive layer. Referring to Figure 6 and Figure 7 , the substrate conductive layer 54 covers a part of the top surface of the substrate 1 and is in electrical contact with the sidewall conductive layer 53.

[0079] In some embodiments, relevant functional parts can be provided on the substrate 1 according to process requirements, and electrical contact is achieved through the substrate conductive layer 54 and the sidewall conductive layer 53.

[0080] The embodiment of the present invention also provides a manufacturing method of the device structure, including:

[0081] S0: Provide a substrate with a sacrificial layer covered on its surface, and the sacrificial layer includes a first groove structure that exposes a part of the surface of the substrate;

[0082] S1: Deposit the first thin film resistor material on the substrate and then remove part of the first thin film resistor material to form a first thin film resistor layer filling the first groove structure;

[0083] S2: Deposit the second thin film resistor material on the structure obtained in the step S1 and then remove part of the second thin film resistor material to form a second thin film resistor layer covering the top surface of the first thin film resistor layer and a part of the top surface of the sacrificial layer;

[0084] S3: Starting from the top surface of the second thin film resistor layer near at least one side edge, remove a portion of the second thin film resistor layer and a portion of the first thin film resistor layer until a portion of the surface of the substrate and a portion of the sidewall of the sacrificial layer are exposed, so that the formed second target thin film resistor layer covers the top surface of the formed first target thin film resistor layer and a portion of the top surface of the sacrificial layer, and openings are formed on at least one sidewall of the first target thin film resistor layer and the sidewall on the same side of the second target thin film resistor layer to enclose a notch structure;

[0085] S4: After removing the sacrificial layer, deposit a conductive material on the obtained structure and then remove a portion of the conductive material to form a sidewall conductive layer covering at least a portion of the sidewall of the notch structure and a substrate conductive layer covering a portion of the surface of the substrate and being in electrical contact with the sidewall conductive layer.

[0086] In the step S0 of some embodiments, referring to Figure 8 and Figure 9 , the sacrificial layer 6 includes a first groove structure 7, such that the sacrificial layer 6 covers a portion of the surface of the substrate 1 and exposes a portion of the surface of the substrate 1.

[0087] In the step S1 of some embodiments, referring to Figure 10 and Figure 11 , after depositing the first thin film resistor material on the substrate 1 to form a first original thin film resistor layer (not labeled in the figure) that fills the first groove structure 7 and covers the top surface of the sacrificial layer 6, use chemical mechanical polishing (CMP) technology to remove a portion of the first thin film resistor material to form a first thin film resistor layer 20 that fills the first groove structure 7 and makes the top surfaces of the first thin film resistor layer 20 and the sacrificial layer 6 flush with each other.

[0088] In the step S2 of some embodiments, referring to Figure 12 and Figure 13 , after depositing the second thin film resistor material on the structure obtained in the step S1 to form a second original thin film resistor layer (not labeled in the figure) that covers the top surfaces of both the first thin film resistor layer 20 and the sacrificial layer 6, pattern the second original thin film resistor layer (not labeled in the figure) to form a second thin film resistor layer 30 that covers the top surface of the first thin film resistor layer 20 and a portion of the top surface of the sacrificial layer 6.

[0089] In the step S2 of some embodiments, referring to Figure 10 and Figure 13 , during the process of performing the step of depositing the second thin film resistor material on the structure obtained in the step S1 and then patterning the second original thin film resistor layer, control the second thin film resistor layer 30 along the second radial direction, that isFigure 10 The coverage in the A-A direction as shown covers the top surface of the first thin film resistor layer 20 and at least part of the top surface of the sacrificial layer 6, such that the length of the second thin film resistor layer 30 in the A-A direction is greater than the length of the first thin film resistor layer 20 in the A-A direction.

[0090] In the step S2 of some embodiments, with reference to Figure 10 and Figure 12 , during the process of performing the step of depositing the second thin film resistor material on the structure obtained in the step S1 and then patterning the second original thin film resistor layer, control the second thin film resistor layer 30 to cover the top surface of the first thin film resistor layer 20 in the first radial direction, that is, Figure 10 the B-B direction as shown, such that the length L1 of the second thin film resistor layer 30 in the B-B direction is equivalent to the length L2 of the first thin film resistor layer 20 in the B-B direction, or L1 is less than L2.

[0091] In the step S3 of some embodiments, with reference to Figure 12 , Figure 14 and Figure 15 , pattern the first thin film resistor layer 30 and the second thin film resistor layer (not labeled in the figure) starting from the top surface near the first edge 301 and the top surface near the second edge 302 of the second thin film resistor layer 30 in the direction pointing to the substrate 1 until part of the surface of the substrate 1 and part of the sidewall of the sacrificial layer 6 are exposed, to obtain the first target thin film resistor layer 2 and the second target thin film resistor layer 3.

[0092] Since the operation of removing part of the first thin film resistor layer 30 and part of the second thin film resistor layer 20 is carried out starting from the top surface near the first edge 301 and the top surface near the second edge 302 of the second thin film resistor layer 30 in the direction pointing to the substrate 1, the formed second target thin film resistor layer 3 can still cover the top surface of the first target thin film resistor layer 2 and part of the top surface of the sacrificial layer 6 in the first radial direction. The first edge 301 and the second edge 302 are opposite to each other in the first radial direction.

[0093] In the step S3 of some embodiments, with reference to Figure 14 and Figure 15 , after removing part of the first thin film resistor layer 30 and part of the second thin film resistor layer (not labeled in the figure), the formed first target thin film resistor layer 2 and the second target thin film resistor layer 3, together with the substrate 1 and the sacrificial layer 6, enclose a second groove structure 7.

[0094] In the step S3 of some embodiments, the step of removing a part of the first thin film resistor layer 20 and a part of the second thin film resistor layer 30 from the top surface of the second thin film resistor layer 30 near at least one side edge until a part of the surface of the substrate 1 is exposed includes: during the process of patterning the first thin film resistor layer 20 and the second thin film resistor layer 30 until a part of the surface of the substrate is exposed, controlling that in each of the formed second groove structures 7, the side walls of the first target thin film resistor layer 2 and the second target thin film resistor layer 3 are flush.

[0095] In some embodiments, in each of the formed second groove structures 7, at least one side wall of the first target thin film resistor layer 2 and the side wall of the second target thin film resistor layer 3 located on the same side as at least one side wall of the first target thin film resistor layer 2 are flush.

[0096] In the step S4 of some embodiments, with reference to Figure 15 、 Figure 3 and Figure 7 After the step S3 is completed, after removing the sacrificial layer 6, a conductive material is deposited on the obtained structure, and then a part of the conductive material covering the top surface of the second target thin film resistor layer 3 is removed to form a plurality of the top surface conductive layers 51. After the conductive material is deposited on the obtained structure, the conductive material covers the first target thin film side wall 21 and the second target thin film side wall 22 of the first target thin film resistor layer 2 that are not shielded by the second target thin film resistor layer 3 to form the side wall conductive layer 53.

[0097] In the step S4 of some embodiments, during the process of removing a part of the conductive material covering the top surface of the second target thin film resistor layer 3, controlling that the plurality of formed top surface conductive layers 51 are arranged along the first radial direction and are insulated from each other and are in electrical contact with the side wall conductive layer 53.

[0098] In the step S4 of some embodiments, during the process of removing a part of the conductive material covering the top surface of the second target thin film resistor layer 3, controlling that the plurality of formed top surface conductive layers 51 are parallel to each other.

[0099] In the step S4 of some embodiments, a part of the conductive material covering the top surface of the second target thin film resistor layer 3 is removed to form a plurality of the top surface conductive layers 51 and a top surface converging conductive layer in electrical contact with the plurality of top surface conductive layers 51. With reference to Figure 7 and Figure 16, the third top conductive layer 513 and the fourth top conductive layer 514 form a top current-collecting conductive layer. A plurality of mutually parallel top conductive layers 51 are all in electrical contact with the fourth top conductive layer 514, and the third top conductive layer 513 is in electrical contact with the nearest one of the top conductive layers 51. The third top conductive layer 513 is in electrical contact Figure 7 with the sidewall conductive layer 53 shown, so as to lead out an electrical signal through the sidewall conductive layer 53.

[0100] In some embodiments, referring to Figure 4 and Figure 17 , the fourth top conductive layer 514 extends towards the edge of the second target thin-film resistor layer 3, so that the top sidewall conductive layer 52 located on the sidewall of the second target thin-film resistor layer 3 can be in electrical contact with the fourth top conductive layer 514, thereby realizing the lead-out of the electrical signal.

[0101] In the step S5 of some embodiments, during the process of depositing a conductive material on the obtained structure, the sidewalls of the second target thin-film resistor layer 3 and the sidewalls of the first target thin-film resistor layer 2 that are not blocked by the second target thin-film resistor layer 3 will also deposit the conductive material, and the sidewall conductive material that needs to be removed can be removed according to process requirements.

[0102] Although the embodiments of the present invention have been described in detail above, it is obvious to those skilled in the art that various modifications and changes can be made to these embodiments. However, it should be understood that such modifications and changes are all within the scope and spirit of the present invention described in the claims. Moreover, the present invention described herein can have other embodiments and can be implemented or realized in various ways.

Claims

1. A device structure, characterized in that, Comprising: A substrate, a first target thin film resistance layer, and a second target thin film resistance layer stacked in sequence, and a sidewall conductive layer, wherein the substrate includes a substrate conductive layer in electrical contact with the sidewall conductive layer; Openings are provided on at least one sidewall of the first target thin film resistance layer and on the sidewalls of the second target thin film resistance layer on the same side to enclose at least one notch structure, and the sidewall conductive layer covers at least part of the sidewalls of the notch structure; The second target thin film resistance layer shields at least one sidewall of the first target thin film resistance layer; At least one of the notch structures is located on a different side from the sidewall of the first target thin film resistance layer shielded by the second target thin film resistance layer; At least two of the notch structures are arranged opposite to each other in a first radial direction, and two ends of the second target thin film resistance layer in a second radial direction shield two opposite sidewalls of the first target thin film resistance layer, and the second radial direction is perpendicular to the first radial direction on the same horizontal plane.

2. The device structure according to claim 1, characterized in that, It further includes a top conductive layer covering the top of the second target thin film resistance layer and in electrical contact with the sidewall conductive layer, and the top conductive layer includes a plurality of top surface conductive layers arranged in the first radial direction, and the plurality of top surface conductive layers cover part of the top surface of the second target thin film resistance layer and are electrically insulated from each other.

3. A manufacturing method of a device structure for manufacturing the device structure according to any one of claims 1 to 2, characterized in that, Including the following steps: S0: Providing a substrate with a sacrificial layer on its surface, and the sacrificial layer includes a first groove structure exposing part of the surface of the substrate; S1: Depositing a first thin film resistance material on the substrate and then removing part of the first thin film resistance material to form a first thin film resistance layer filling the first groove structure; S2: Depositing a second thin film resistance material on the structure obtained in step S1 and then removing part of the second thin film resistance material to form a second thin film resistance layer covering the top surface of the first thin film resistance layer and part of the top surface of the sacrificial layer; S3: Removing part of the second thin film resistance layer and part of the first thin film resistance layer starting from the top surface near at least one edge of the second thin film resistance layer until part of the surface of the substrate and part of the sidewalls of the sacrificial layer are exposed, so that the formed second target thin film resistance layer covers the top surface of the first target thin film resistance layer and part of the top surface of the sacrificial layer, and openings are formed on at least one sidewall of the first target thin film resistance layer and on the sidewalls of the second target thin film resistance layer on the same side to enclose a notch structure; S4: After removing the sacrificial layer, depositing a conductive material on the obtained structure and then removing part of the conductive material to form a sidewall conductive layer covering at least part of the sidewalls of the notch structure, and a substrate conductive layer covering part of the surface of the substrate and in electrical contact with the sidewall conductive layer.

4. The manufacturing method of the device structure according to claim 3, characterized in that, In step S2, the step of depositing a second thin film resistance material on the structure obtained in step S1 and then removing part of the second thin film resistance material includes: Depositing the second thin film resistance material on the structure obtained in step S1 and then patterning the second thin film resistance layer so that the second thin film resistance layer covers the top surface of the first thin film resistance layer in the first radial direction; In step S3, when the number of the notch structures is at least 2, all the notch structures are located on two opposite sides of the first target thin film resistor layer along the first radial direction.

5. The manufacturing method of the device structure according to claim 4, characterized in that, In step S2, after performing the step of depositing the structure obtained in step S1 with the second thin film resistor material and patterning the second thin film resistor layer, the second thin film resistor layer is also made to cover the top surface of the first thin film resistor layer and at least part of the top surface of the sacrificial layer along the second radial direction; The second radial direction is perpendicular to the first radial direction on the same horizontal plane.

6. The manufacturing method of the device structure according to claim 4, characterized in that, In step S3, the step of removing part of the first thin film resistor layer and part of the second thin film resistor layer from the top surface of the second thin film resistor layer near at least one side edge until part of the surface of the substrate is exposed includes: Removing part of the first thin film resistor layer and part of the second thin film resistor layer from the top surface near the opposite side edges of the second thin film resistor layer along the first radial direction until part of the surface of the substrate is exposed, forming a second groove structure surrounded by the first target thin film resistor layer, the second target thin film resistor layer, the sacrificial layer and the substrate, and making at least one side wall of the first target thin film resistor layer in the second groove structure flush with the side wall on the same side of the second target thin film resistor layer.

7. The manufacturing method of the device structure according to claim 4, characterized in that, In step S4, the step of depositing a conductive material on the obtained structure and then removing part of the conductive material includes: Removing part of the conductive material covering the surface of the second target thin film resistor layer to form a top conductive layer in electrical contact with the side wall conductive layer.

8. The manufacturing method of the device structure according to claim 7, characterized in that, The top conductive layer includes a plurality of top surface conductive layers. The step of removing part of the conductive material covering the surface of the second target thin film resistor layer includes: Removing part of the conductive material covering the top surface of the second target thin film resistor layer to form a plurality of top surface conductive layers arranged along the first radial direction, insulated from each other, and in electrical contact with the side wall conductive layer.

9. The manufacturing method of the device structure according to claim 7, characterized in that, The top conductive layer includes a top surface current collecting conductive layer and a plurality of top surface conductive layers. The step of removing part of the conductive material covering the surface of the second target thin film resistor layer includes: Removing part of the conductive material covering the top surface of the second target thin film resistor layer to form a plurality of top surface conductive layers arranged along the first radial direction and insulated from each other, and forming a top surface current collecting conductive layer in electrical contact with the plurality of top surface conductive layers and in electrical contact with the side wall conductive layer.

10. The manufacturing method of the device structure according to any one of claims 8 or 9, characterized in that, The top conductive layer includes a top side wall conductive layer. Removing part of the conductive material covering the surface of the second target thin film resistor layer to form the top side wall conductive layer, and making the top side wall conductive layer in electrical contact with the side wall conductive layer, the top surface current collecting conductive layer or at least one of the top surface conductive layers.

Images