Method, system and storage medium for solving worst-case power supply noise in high-speed links

Abstract

The present invention discloses a method for solving the worst-case power supply noise of a high-speed link. The method includes: inputting a data template at a specified frequency into a driver to obtain a periodic simultaneous switching current, and obtaining all relevant data templates based on the clock frequency; performing a full-link simulation to obtain the waveform profile of the simultaneous switching current and approximate modeling of the simultaneous switching current; omitting the channel link structure and directly using the simultaneous switching current as the input of the PDN; scanning the simultaneous switching current at the frequency of the data template to obtain multiple groups of power supply noise with different amplitudes; finding the worst-case power supply noise and its corresponding simultaneous switching current; the frequency of the simultaneous switching current is the frequency of the data template for the worst-case power supply noise. The present invention can quickly obtain the worst-case power supply noise based on the modeling sweep frequency method.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and more particularly to a method for solving worst-case power supply noise in high-speed links, a computer-readable storage medium for executing the steps of the method, and a system for solving worst-case power supply noise in high-speed links. Background Art

[0002] With the continuous advancement of integrated circuit design and process technology, circuit integration is increasing, and clock frequencies are also rising, resulting in high-speed circuits exceeding GHz. Power supply noise, once negligible, can now affect the operation of the entire system, leading to increasing research attention. Power supply noise can couple into signal lines, causing false triggering of logic gates, offsetting the normal operating voltage of devices, and in severe cases, causing device failure. The magnitude of power supply noise is closely related to the data input to the driver. Therefore, finding the data template that stimulates the maximum power supply noise is of great significance to the research of power distribution networks.

[0003] Simultaneous Switch Noise (SSN) refers to the large instantaneous current generated when a large number of transistors in a digital circuit driver operate simultaneously and rapidly, and the level state changes. When this current flows through the parasitic inductance of the loop, it forms an AC voltage drop, which causes fluctuations in the power supply voltage. The definition of simultaneous switching noise is as follows:

[0004] ΔV=N*L loop (di / dt) (1)

[0005] Among them, N refers to the number of simultaneous switches, that is, when N buffer drivers in the chip switch states at the same time, the current flowing through the loop parasitic inductance Lloop (current loop inductance on the power ground plane) will be expanded N times. i refers to the current drawn when a single transistor switches state. The current generated when multiple transistors switch at the same time is called the simultaneous switching current. After passing through the inductive package, it will generate noise on the power ground plane or power rail, so it is also called power supply noise. The power supply noise will be coupled into the signal line and manifested at the output end of the driver, causing noise and jitter in the output waveform. This application is aimed at the power supply noise on the chip package level PDN, that is, the noise on the power ground plane in the package.

[0006] The traditional approach to finding the worst-case power supply noise is to obtain the target impedance of the PDN through frequency-domain simulation and then use the impedance curve Zpdn(f) to find the worst-case data template, that is, to find the PDN's resonant frequency. If the PDN has multiple resonant points, multiple simulations of the entire link are required. Then, a data template with a strong component of the PDN resonant frequency is used as the excitation input to the driver to obtain the worst-case power supply noise. However, this mechanism for finding the worst-case data template only works for PDN structures where the current varies linearly with the impedance. It is not applicable to PDN structures with nonlinear Zpdn(f) curves or Ipdn(f) spectral components.

[0007] V(jω)=I(jω)Z(jω) (2)

[0008] Formula (2) explains this phenomenon from a frequency domain perspective. In formula (2), Z(jω) is the impedance frequency function of the PDN, and I(jω) is the frequency function of the PDN current. The interaction between the two generates frequency domain power supply noise V(jω). In general, Z(jω) changes with time, while I(jω) depends on the state activity in the system and can be time-varying and non-periodic stationary. That is, when the state activity (such as the data template in front of the driver) changes over time, the spectrum of I(jω) will change with the change of the data template, such as Figure 1 shown.

[0009] The impedance curve Zpdn(f) only reflects the PDN impedance characteristics at different frequencies and does not reflect the current characteristics in the frequency domain. Maximum power supply noise only occurs when the spectral components of the PDN output current I(jω) within the impedance band are significant. Therefore, deriving a worst-case data template based solely on frequency-domain impedance information and resonant frequency is inaccurate.

[0010] Take the power distribution network system in the DDR4 package as an example. Figure 2a This is the model structure of the PDN, and the model is given in the form of S parameters. Ports 1, 2, 3, 4, and 5 are chip ports connected to the chip's decoupling capacitors. The PDN contains four low-inductance capacitors, connected to ports 11, 12, 13, and 14. There are five paths in the diagram, and each path is independent and does not affect each other. Analyzing the first path, the on-chip capacitance is 20.8nf, and its parasitic resistance is 0.0015 ohms. Applying a constant sinusoidal current source with an amplitude of 1A at port 1 yields the PDN impedance curve shown in Figure 2(b). The figure shows that the PDN impedance varies at different frequencies. Due to the interaction between the package inductance and the on-chip decoupling capacitors in the PDN, the PDN resonates at 233MHz. Figure 3The full-link simulation model is described, including models for the PDN, PCB, package, driver, and receiver. Data templates of different frequencies are input to the driver, and the time-domain power supply noise simulation results are shown in Table 1.

[0011] Table 1: Power supply noise at different frequencies

[0012]

[0013] Table 1 shows that although the PDN resonates at 233 MHz, it generates the worst-case power supply noise at 178 MHz, with a peak-to-peak value of 18 mV. This is because the PDN output current spectrum at 178 MHz is the largest among all frequency data templates. This is primarily due to process parameters such as the charge and discharge cycles of on-chip capacitors and transistor switching times. Fourier transforming the PDN output current at different frequencies yields current spectra at different frequencies, as shown in Figure 4(a). The corresponding power supply noise waveforms are shown in Figure 4(b). Multiplying the frequency-domain impedance by the current spectrum yields the frequency-domain power supply noise. Performing an inverse Fourier transform on the frequency-domain power supply noise yields the time-domain power supply noise, with its peak-to-peak value shown in Table 2. The interaction between the 178 MHz current spectrum and the PDN impedance generates the worst-case power supply noise. Therefore, the worst-case power supply noise data template is not necessarily located at the PDN's resonant frequency, but rather depends on the combined effect of the current spectrum and impedance spectrum.

[0014] Table 2: IPDN at different frequencies

[0015] Summary of the Invention

[0016] The Summary of the Invention introduces a series of simplified concepts, which are simplifications of existing technologies in the field and are further described in detail in the Detailed Description of the Invention. The Summary of the Invention is not intended to define the key features and essential features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.

[0017] The technical problem to be solved by the present invention is to provide a method for solving the worst power supply noise of a high-speed link based on a modeling sweep frequency method, which can quickly obtain the worst power supply noise.

[0018] Also provided are a computer-readable storage medium for executing the steps in the method for solving the worst-case power supply noise of a high-speed link and a system for solving the worst-case power supply noise of a high-speed link.

[0019] To solve the above technical problems, the present invention provides a method for solving the worst-case power supply noise of a high-speed link, comprising the following steps:

[0020] S1, input the data template at the specified frequency in front of the driver, obtain the periodic simultaneous switching current, and obtain all related data templates according to the clock frequency;

[0021] S2, perform a full-link simulation to obtain the waveform profile of the simultaneous switching current and approximate modeling of the simultaneous switching current;

[0022] S3, omitting the channel link structure, directly uses the simultaneous switching current as the input of the PDN, and scans the simultaneous switching current at the frequency of the data template to obtain multiple groups of power supply noise with different amplitudes;

[0023] S4, finding the worst power supply noise and its corresponding simultaneous switching current, where the frequency of the simultaneous switching current is the frequency of the data template of the worst case of the power supply noise.

[0024] Optionally, the method for solving the worst-case power supply noise of a high-speed link is further improved, and the data template is a square wave signal data template with a duty cycle of 50%.

[0025] Optionally, the method for solving the worst-case power supply noise for high-speed links can be further improved, and the approximate modeling of the switching current can be performed by:

[0026] The data template period T satisfies, T>2(T pr +T pf +T nr +T nf )hour;

[0027] The data template period T satisfies, T<2(T pr +T pf +T nr +T nf )hour,

[0028]

[0029] The switch current is modeled as follows, I ssi =I pt +I nt +I dc ;

[0030] I pt It is a positive periodic triangular pulse, the period is the same as the added data template period, and the triangular pulse rise time is equal to T pr , the fall time is equal to T pf ;

[0031] I nt It is a negative periodic triangular pulse, the period is the same as the period of the added data template, the delay time is half a period, and the triangular pulse rise time is equal to T nr , the fall time is equal to Tnf ;

[0032] I dc is a direct current.

[0033] Optionally, the method for solving the worst-case power supply noise for high-speed links is further improved by scanning the frequency of the data template while changing the switching current period from 9.38ns to 0.938ns with a step size of 0.1ns, corresponding to the scanned data template frequency from 100.6MHz to 1.066GHz.

[0034] In order to solve the above technical problems, the present invention provides a computer-readable storage medium for executing the steps in any one of the above methods for solving the worst-case power supply noise of a high-speed link.

[0035] To solve the above technical problems, the present invention provides a high-speed link worst-case power supply noise solution system, comprising:

[0036] A driver module that inputs a data template at a specified frequency before the driver;

[0037] A calculation module, which obtains all relevant data templates according to the clock frequency;

[0038] A modeling module that obtains the waveform profile of the simultaneous switching current based on a full-link simulation and approximates the simultaneous switching current modeling;

[0039] The noise acquisition module omits the channel link structure and directly uses the simultaneous switching current as the input of the PDN. It scans the simultaneous switching current at the frequency of the data template to obtain multiple groups of power supply noise with different amplitudes.

[0040] The frequency acquisition module is used to obtain the worst power supply noise and its corresponding simultaneous switching current.

[0041] Optionally, the high-speed link worst-case power supply noise solution system is further improved, wherein the data template is a square wave signal type data template with a duty cycle of 50%.

[0042] Optionally, the high-speed link worst-case power supply noise solution system is further improved, and the modeling module approximates the simultaneous switching current modeling by:

[0043] The data template period T satisfies, T>2(T pr +T pf +T nr +T nf )hour;

[0044] The data template period T satisfies, T<2(T pr +T pf +T nr +Tnf )hour,

[0045]

[0046] The switch current is modeled as follows, I ssi =I pt +I nt +I dc ;

[0047] I pt It is a positive periodic triangular pulse, the period is the same as the added data template period, and the triangular pulse rise time is equal to T pr , the fall time is equal to T pf ;

[0048] I nt It is a negative periodic triangular pulse, the period is the same as the period of the added data template, the delay time is half a period, and the triangular pulse rise time is equal to T nr , the fall time is equal to T nf ;

[0049] I dc is a direct current.

[0050] Optionally, the high-speed link worst-case power supply noise solution system is further improved, and the noise acquisition module scans at the frequency of the data template while the switching current period changes from 9.38ns to 0.938ns, with a change step of 0.1ns, and the corresponding scanned data template frequency ranges from 100.6MHz to 1.066GHz.

[0051] The worst power supply noise does not necessarily appear at the PDN resonant frequency. The impedance curve only describes the characteristics of the PDN impedance. The power supply noise is generated by the interaction between the impedance and the current. It is not enough to determine the resonant frequency as the worst data template based only on the impedance curve of the PDN. It is also necessary to analyze the simultaneous switching output current of the PDN. The output current of the PDN is the source of the power supply noise. The present invention provides a sweeping frequency method to find the worst data template. Only one full-link simulation is required to obtain the synchronous switching current. The equivalent modeling of the simultaneous switching current is used as the excitation, the channel model is omitted, and then the period of the simultaneous switching current is changed to obtain the worst power supply noise. Compared with the traditional multi-resonance point multiple full-link simulation, the present invention is more time-saving and accurate in finding the worst power supply noise. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The drawings herein are intended to illustrate the general characteristics of methods, structures, and / or materials used in certain exemplary embodiments of the present invention, supplementing the descriptions in the specification. However, the drawings herein are schematic diagrams not drawn to scale and may not accurately reflect the precise structure or performance characteristics of any given embodiment. The drawings herein should not be interpreted as defining or limiting the range of values or properties encompassed by the exemplary embodiments of the present invention. The present invention is further described in detail below in conjunction with the drawings and specific embodiments:

[0053] Figure 1 Schematic diagram of the PDN structure of the Zpdn(f) curve and the Ipdn(f) spectral component.

[0054] Figure 2a This is a schematic diagram of the PDN topology.

[0055] Figure 2b This is a schematic diagram of the impedance curve of Zpdn(f).

[0056] Figure 3 This is a schematic diagram of the full-link model including the PDN network.

[0057] Figure 4a This is a schematic diagram of the power supply voltage and PDN output current spectrum for different frequency data templates.

[0058] Figure 4b This is a schematic diagram of the power supply noise waveform corresponding to the power supply voltage and PDN output current spectrum of different frequency data templates.

[0059] Figure 5 This is a schematic diagram of the equivalent waveform of the PDN simultaneous switching current at 178MHz.

[0060] Figure 6 This is a schematic diagram of power supply noise excited by switching currents of different frequencies. DETAILED DESCRIPTION

[0061] The following describes the implementation manner of the present invention through specific specific embodiments. Those skilled in the art can fully understand other advantages and technical effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through different specific implementation manners, and the various details in this specification can also be applied based on different viewpoints, and various modifications or changes can be made without deviating from the overall design concept of the invention. It should be noted that, in the absence of conflict, the following embodiments and the features in the embodiments can be combined with each other. The following exemplary embodiments of the present invention can be implemented in a variety of different forms and should not be interpreted as being limited to the specific embodiments described herein. It should be understood that these embodiments are provided to make the disclosure of the present invention thorough and complete, and to fully convey the technical solutions of these exemplary embodiments to those skilled in the art.

[0062] First embodiment;

[0063] The present invention provides a method for solving the worst power supply noise of a high-speed link, comprising the following steps:

[0064] S1, input the data template at the specified frequency in front of the driver, obtain the periodic simultaneous switching current, and obtain all related data templates according to the clock frequency;

[0065] S2, perform a full-link simulation to obtain the waveform profile of the simultaneous switching current and approximate modeling of the simultaneous switching current;

[0066] S3, omitting the channel link structure, directly uses the simultaneous switching current as the input of the PDN, and scans the simultaneous switching current at the frequency of the data template to obtain multiple groups of power supply noise with different amplitudes;

[0067] S4, finding the worst power supply noise and its corresponding simultaneous switching current, where the frequency of the simultaneous switching current is the frequency of the data template of the worst case of the power supply noise.

[0068] Second embodiment;

[0069] The second embodiment of the present invention is further described based on the steps of the first embodiment as follows;

[0070] Inputting a data template at a specific frequency before the driver will produce periodic switching currents. By changing the frequency of the data template, the switching currents will change regularly with the changes in the data template. Figure 5 The dotted line is the simultaneous switching current waveform at 178MHz.

[0071] Determine the operating clock frequency of the PDN using the formula:

[0072] T=1 / f (3)

[0073] T is the period, f is the frequency, and the clock period is calculated. The clock period is the duration of the 01 sequence with a duty cycle of 50%. By expanding the period by 2, 3, 4, ... times, we can get the related frequency divisions of the clock frequency as the frequency of the data template. The worst-case data template will appear at one of these related frequency divisions. The Fourier series expansion of the square wave signal is

[0074]

[0075] The fundamental wave (sine wave) of a square wave has the maximum amplitude when its duty cycle is 50%. When the signal's duty cycle is not equal to 50%, a DC component is introduced. However, regardless of the signal's duty cycle, its effective value remains unchanged. The larger the DC component, the smaller the AC component. Since the fundamental wave is an AC component, only a data template with a 50% duty cycle square wave signal can excite the worst-case power supply noise.

[0076] Extract all relevant data templates. Taking the aforementioned DDR4 package PDN system as an example, first determine the PDN operating clock frequency. The DDR4 clock frequency is 1066MHz, and the data sampling rate is 2133MHz. UI = 0.469ns, T = 0.938ns, where UI represents a bit duration. A data template with a 50% duty cycle is selected as the driver input. The selected data template is shown in Table 3:

[0077] Table 3: Data templates for different frequencies

[0078]

[0079] Among them, ··· represents a repeated data template.

[0080] The modeling of simultaneous switching currents, taking the simultaneous switching currents in a DDR4 package PDN as an example, is as follows:

[0081] The simultaneous switching current profile is roughly composed of three parts: steady-state current, rising edge current, and falling edge current. By observing the simultaneous switching current waveforms at different frequencies, it is concluded that the rise time Tpr, fall time Tpf, amplitude Mp of the positive pulse and the rise time Tnr, fall time Tnf, amplitude Mn of the negative pulse of the simultaneous switching current are almost unchanged. When the period T of the applied data template meets the following conditions:

[0082] T>2(T pr +T pf +T nr +T nf ) (5)

[0083] The switching current can be modeled as follows:

[0084] I ssi=I pt +I nt +I dc (6)

[0085] In Equation 6, Ipt is a positive-going periodic triangular pulse with the same period as the applied data template, a triangular pulse rise time equal to Tpr, a triangular pulse fall time equal to Tpf, and an amplitude equal to Mp; Int is a negative-going periodic triangular pulse with the same period as the applied data template, a delay time of half a period, a triangular pulse rise time equal to Tnr, a triangular pulse fall time equal to Tnf, and an amplitude equal to Mp; Idc is the DC current. The equivalent model is compared with the simultaneous switching current at 178MHz as shown in the figure below. Figure 5 The current portion indicated by 2 in the figure is compensated by 1.

[0086] When the period T of the added data template meets the following conditions:

[0087] T<2(T pr +T pf +T nr +T nf ) (7)

[0088] At the same time, the switching current is still modeled using Equation 6. The triangular pulse fall time becomes:

[0089]

[0090] The remaining variables in equation (6) remain unchanged. Using the above equivalent current model as the stimulus, the power supply noise on the PDN is simulated.

[0091] The frequency sweep process scans the switching current cycle, with a cycle range of 9.38ns to 0.938ns, with a step size of 0.1ns. The corresponding scanned data template frequency ranges from 100.6MHz to 1.066GHz. The simulation results show the trend of the power supply noise on the PDN changing with the switching current frequency (i.e., the data template frequency). Figure 6 As shown. Figure 6 The worst-case power supply noise generated by the 178MHz data template is 18.1mV peak-to-peak. This is consistent with the power supply noise generated by the 178MHz data template in Table 2. The power supply noise at other frequencies is also similar to the power supply noise generated at the same frequencies in Table 2.

[0092] Third embodiment;

[0093] The present invention provides a computer-readable storage medium for the steps of the method for solving the worst power supply noise of a high-speed link described in any one of the first embodiment or the second embodiment.

[0094] Fourth embodiment;

[0095] The present invention provides a high-speed link worst-case power supply noise solution system, comprising:

[0096] The driver module inputs a data template at a specified frequency in front of the driver, that is, a data template of a square wave signal with a duty cycle of 50%;

[0097] A calculation module, which obtains all relevant data templates according to the clock frequency;

[0098] A modeling module that obtains the waveform profile of the simultaneous switching current based on a full-link simulation and approximates the simultaneous switching current modeling;

[0099] The noise acquisition module omits the channel link structure and directly uses the simultaneous switching current as the input of the PDN. It scans the simultaneous switching current at the frequency of the data template to obtain multiple groups of power supply noise with different amplitudes.

[0100] The frequency acquisition module is used to obtain the worst power supply noise and its corresponding simultaneous switching current.

[0101] Fifth embodiment;

[0102] The present invention provides a high-speed link worst-case power supply noise solution system, comprising:

[0103] A driver module that inputs a data template at a specified frequency before the driver;

[0104] A calculation module, which obtains all relevant data templates according to the clock frequency;

[0105] The modeling module obtains the waveform profile of the simultaneous switching current based on a full-link simulation and approximates the simultaneous switching current model, including:

[0106] include:

[0107] The data template period T satisfies, T>2(T pr +T pf +T nr +T nf )hour;

[0108] The data template period T satisfies, T<2(T pr +T pf +T nr +T nf )hour,

[0109]

[0110] The switch current is modeled as follows, I ssi =I pt +I nt +I dc ;

[0111] I pt It is a positive periodic triangular pulse, the period is the same as the added data template period, and the triangular pulse rise time is equal to T pr , the fall time is equal to T pf ;

[0112] I nt It is a negative periodic triangular pulse, the period is the same as the period of the added data template, the delay time is half a period, and the triangular pulse rise time is equal to T nr , the fall time is equal to T nf ;

[0113] I dc is a direct current;

[0114] The noise acquisition module omits the channel link structure and directly uses the simultaneous switching current as the PDN input. The switching current period is scanned at the frequency of the data template, ranging from 9.38ns to 0.938ns, with a step size of 0.1ns. The corresponding scanned data template frequency ranges from 100.6MHz to 1.066GHz, generating multiple groups of power supply noise with different amplitudes.

[0115] The frequency acquisition module is used to obtain the worst power supply noise and its corresponding simultaneous switching current.

[0116] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will also be understood that, unless expressly defined herein, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, rather than being interpreted in an idealized or overly formal sense.

[0117] The present invention has been described in detail above by way of specific embodiments and examples, but these do not constitute limitations of the present invention. Without departing from the principles of the present invention, those skilled in the art may make many variations and improvements, which should also be considered within the scope of protection of the present invention.

Claims

1. A method for solving the worst power supply noise of a high-speed link, characterized in that: The following steps are involved: S1, input the data template at the specified frequency in front of the driver, obtain the periodic simultaneous switching current, and obtain all related data templates according to the clock frequency; S2, perform a full-link simulation to obtain the waveform profile of the simultaneous switching current and approximate modeling of the simultaneous switching current; S3, omitting the channel link structure, directly uses the simultaneous switching current as the input of the PDN, and scans the simultaneous switching current at the frequency of the data template to obtain multiple groups of power supply noise with different amplitudes; S4, finding the worst power supply noise and its corresponding simultaneous switching current, where the frequency of the simultaneous switching current is the frequency of the data template of the worst case of the power supply noise.

2. The method for solving the worst-case power supply noise of a high-speed link according to claim 1, wherein: The data template is a square wave signal type data template with a duty cycle of 50%.

3. The method for solving the worst-case power supply noise of a high-speed link according to claim 1, wherein: Simultaneous switching current approximation modeling includes: The data template period T satisfies, T>2(T pr +T pf +T nr +T nf ), the switch current is modeled as follows, I ssi =I pt +I nt +I dc ; The data template period T satisfies, T<2(T pr +T pf +T nr +T nf ), the switch current is modeled as follows, I ssi =I pt +I nt +I dc , the triangular pulse fall time becomes: The remaining variables remained unchanged; I pt It is a positive periodic triangular pulse, the period is the same as the added data template period, and the triangular pulse rise time is equal to T pr , the fall time is equal to T pf ; I nt It is a negative periodic triangular pulse, the period is the same as the period of the added data template, the delay time is half a period, and the triangular pulse rise time is equal to T nr , the fall time is equal to T nf ; I dc is a direct current.

4. The method for solving the worst-case power supply noise of a high-speed link according to claim 1, wherein: The switching current period is changed simultaneously with the frequency scanning of the data template. The switching current period changes from 9.38ns to 0.938ns with a step size of 0.1ns. The corresponding scanned data template frequency ranges from 100.6MHz to 1.066GHz.

5. A computer-readable storage medium for executing the steps of the method for solving the worst-case power supply noise of a high-speed link according to any one of claims 1 to 4.

6. A high-speed link worst-case power supply noise solution system, characterized in that: include: A driver module that inputs a data template at a specified frequency before the driver; A calculation module, which obtains all relevant data templates according to the clock frequency; A modeling module that obtains the waveform profile of the simultaneous switching current based on a full-link simulation and approximates the simultaneous switching current modeling; The noise acquisition module omits the channel link structure and directly uses the simultaneous switching current as the input of the PDN. It scans the simultaneous switching current at the frequency of the data template to obtain multiple groups of power supply noise with different amplitudes. The frequency acquisition module is used to obtain the worst power supply noise and its corresponding simultaneous switching current.

7. The high-speed link worst-case power supply noise solution system according to claim 6, wherein: The data template is a square wave signal type data template with a duty cycle of 50%.

8. The high-speed link worst-case power supply noise solution system according to claim 6, wherein: The modeling module approximates the modeling of simultaneous switching currents including: The data template period T satisfies, T>2(T pr +T pf +T nr +T nf ), the switch current is modeled as follows, I ssi =I pt +I nt +I dc ; The data template period T satisfies, T<2(T pr +T pf +T nr +T nf ), the switch current is modeled as follows, I ssi =I pt +I nt +I dc , the triangular pulse fall time becomes: The remaining variables remained unchanged; I pt It is a positive periodic triangular pulse, the period is the same as the added data template period, and the triangular pulse rise time is equal to T pr , the fall time is equal to T pf ; I nt It is a negative periodic triangular pulse, the period is the same as the period of the added data template, the delay time is half a period, and the triangular pulse rise time is equal to T nr , the fall time is equal to T nf ; I dc is a direct current.

9. The high-speed link worst-case power supply noise solution system according to claim 6, wherein: The noise acquisition module scans the frequency of the data template and changes the switching current period at the same time. The switching current period changes from 9.38ns to 0.938ns with a step size of 0.1ns. The corresponding scanned data template frequency ranges from 100.6MHz to 1.066GHz.

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