Passive buzzer control IC

Abstract

The present application provides a passive buzzer control integrated circuit, comprising: an enable circuit, a bias circuit, a charge-discharge circuit, a level conversion circuit, and a drive circuit; the enable circuit is configured to output a charging current and a starting current according to an enable signal; the bias circuit is configured to output a discharge current according to the starting current; the charge-discharge circuit is configured to output an initial voltage based on the charging current and the discharge current; the level conversion circuit is configured to output a supply voltage after transforming the initial voltage; and the drive circuit is configured to output a drive signal to the speaker based on the supply voltage and a modulated control signal to drive the speaker to operate. The solution provided in the present application adopts the design concept of integrated circuits to achieve an integrated effect for the music passive buzzer control circuit, thereby reducing the PCB area and getting rid of the constraints of discrete device factors.

Description

Technical Field

[0001] The present application relates to the field of circuits, and in particular to a passive buzzer control integrated circuit. Background Art

[0002] The music buzzer circuit is a circuit that uses a speaker to realize the music function. This circuit is widely used in washing machines, refrigerators, water heaters, coffee machines, etc.

[0003] Traditional music buzzer circuits are usually built with discrete components such as transistors, resistors, and capacitors. During the production process, they are easily restricted by factors such as the precision and reliability level of discrete components. In addition, the large number of discrete components leads to a large PCB area. Summary of the Invention

[0004] The present application provides a passive buzzer control integrated circuit to achieve circuit integration, reduce PCB area, and get rid of the constraints of discrete device accuracy, reliability level and other factors.

[0005] On the one hand, the present application provides a passive buzzer control integrated circuit, comprising: an enabling circuit, a bias circuit, a charging and discharging circuit, a level conversion circuit, and a driving circuit; wherein,

[0006] The enabling circuit is configured to output a charging current and a starting current according to an enabling signal; the bias circuit is connected to the enabling circuit and the charging and discharging circuit, and is configured to output a discharging current according to the starting current;

[0007] The charge and discharge circuit is connected to the enable circuit and is used to output an initial voltage based on the charge current and the discharge current; the level conversion circuit is connected to the charge and discharge circuit and is used to transform the initial voltage and output a supply voltage;

[0008] The driving circuit is connected to the level conversion circuit and the speaker, and is used to output a driving signal to the speaker based on the power supply voltage and the modulation control signal to drive the speaker to operate.

[0009] In one embodiment, the enabling circuit includes a first transistor, a first resistor, a second resistor, and a bias current module;

[0010] The first end of the first resistor is used to receive the enable signal, and the second end of the first resistor is connected to the base of the first transistor;

[0011] The collector of the first transistor is connected to the charge and discharge circuit for outputting the charging current; the emitter of the first transistor is connected to the first end of the second resistor, and the second end of the second resistor is grounded;

[0012] The bias current module is connected to the base of the first transistor and is used to generate the startup current.

[0013] In one embodiment, the bias current module includes: a second transistor, a third transistor, a fourth transistor and a third resistor;

[0014] The base of the second transistor is connected to the collector of the second transistor and the base of the first transistor, and the emitter of the second transistor is connected to the first end of the third resistor and the base of the third transistor;

[0015] The second end of the third resistor is connected to the collector of the third transistor, and the emitter of the third transistor is grounded;

[0016] The base of the fourth transistor is connected to the collector of the third transistor; the collector of the fourth transistor is connected to the bias circuit for outputting the starting current; and the emitter of the fourth transistor is grounded.

[0017] In one embodiment, the bias circuit includes a self-biased current mirror circuit.

[0018] In one embodiment, the self-biased current mirror circuit includes: a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a fourth resistor;

[0019] The emitter of the fifth transistor is connected to the emitter of the sixth transistor and the emitter of the ninth transistor and is connected to a power supply; the base of the fifth transistor is connected to the collector of the fifth transistor; the collector of the fifth transistor is connected to the collector of the seventh transistor and the enabling circuit for receiving the startup current;

[0020] The base of the seventh transistor is connected to the base of the eighth transistor, the emitter of the seventh transistor is connected to the first end of the fourth resistor, and the second end of the fourth resistor is grounded;

[0021] The base of the sixth transistor is connected to the base of the fifth transistor, the collector of the sixth transistor is connected to the collector of the eighth transistor; the base of the eighth transistor is connected to the collector of the eighth transistor, and the emitter of the eighth transistor is grounded;

[0022] The base of the ninth transistor is connected to the base of the fifth transistor, and the collector of the ninth transistor is connected to the charge and discharge circuit for outputting a discharge current.

[0023] In one embodiment, the charge-discharge circuit includes: a capacitor, a discharge module, and a charging module; wherein the charging module includes a tenth transistor and an eleventh transistor; and the discharge module includes a twelfth transistor and a thirteenth transistor;

[0024] The emitter of the tenth transistor is connected to the emitter of the eleventh transistor and to a power supply, and the base of the tenth transistor is connected to the collector of the tenth transistor and the enabling circuit for receiving a charging current;

[0025] The base of the eleventh transistor is connected to the base of the tenth transistor, the collector of the eleventh transistor is connected to the first end of the capacitor, and the second end of the capacitor is grounded;

[0026] The collector of the twelfth transistor is connected to the first end of the capacitor, the emitter of the twelfth transistor is grounded, and the base of the twelfth transistor is connected to the base of the thirteenth transistor; the base of the thirteenth transistor is connected to the collector of the thirteenth transistor and the bias circuit for receiving the discharge current; the emitter of the thirteenth transistor is grounded.

[0027] In one embodiment, the charge and discharge circuit further includes: a voltage divider module and a step mirror branch:

[0028] The voltage divider module is used to output a step voltage, and there is a one-to-one correspondence between the step voltage and the step mirror branch;

[0029] The step mirror branch is connected to the corresponding step voltage and is used to start or stop discharging the capacitor according to the relationship between the current energy storage of the capacitor and the step voltage.

[0030] In one embodiment, the number of the ladder mirror branches is two, the number of the ladder voltages is also two, and different ladder mirror branches correspond to different ladder voltages.

[0031] In one embodiment, the first ladder mirror branch includes: a fourteenth transistor and a fifteenth transistor, and the second ladder mirror branch includes: a sixteenth transistor and a seventeenth transistor;

[0032] The fourteenth transistor and the sixteenth transistor are mirror images of each other, and the fifteenth transistor and the seventeenth transistor are mirror images of each other.

[0033] The base of the fourteenth transistor is connected to the collector of the fourteenth transistor; the collector of the fourteenth transistor is connected to the collector of the fifteenth transistor and the voltage divider circuit, for receiving the corresponding step voltage; the emitter of the fourteenth transistor is connected to the first end of the capacitor;

[0034] The base of the fifteenth transistor is connected to the base of the thirteenth transistor, and the emitter of the fifteenth transistor is grounded;

[0035] The fourteenth transistor and the sixteenth transistor are mirror images of each other, and the fifteenth transistor and the seventeenth transistor are mirror images of each other.

[0036] In one embodiment, a unidirectional conductive element is provided between the collector of the fourteenth transistor and the voltage divider circuit;

[0037] A first end of the unidirectional conductive element is connected to the voltage divider circuit, and a second end of the unidirectional conductive element is connected to the collector of the fourteenth transistor, for unidirectionally transmitting the step voltage provided by the voltage divider circuit to the fourteenth transistor.

[0038] In one embodiment, the unidirectional conducting element includes: an eighteenth transistor and a nineteenth transistor;

[0039] The emitter of the eighteenth transistor is connected to the voltage divider circuit, the base of the eighteenth transistor is connected to the collector of the eighteenth transistor, and the collector of the eighteenth transistor is connected to the collector of the fourteenth transistor;

[0040] The eighteenth transistor and the nineteenth transistor are mirror images of each other.

[0041] In one embodiment, the unidirectional conductive element includes: a diode;

[0042] The anode of the diode is connected to the voltage divider circuit, and the cathode of the diode is connected to the collector of the fourteenth transistor.

[0043] In one embodiment, the voltage dividing module includes: a twentieth transistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor;

[0044] The first end of the fifth resistor is connected to a power supply; the second end of the fifth resistor is used to output a first step voltage, and the second end of the fifth resistor is connected to the first end of the sixth resistor and the collector of the fourteenth transistor in the step mirror branch corresponding to the first step voltage;

[0045] The second end of the sixth resistor is used to output a second step voltage, and the second end of the sixth resistor is connected to the first end of the seventh resistor and the collector of the fourteenth transistor in the step mirror branch corresponding to the second step voltage;

[0046] The second end of the seventh resistor is connected to the collector of the twentieth transistor, and the second end of the twentieth transistor is grounded; the first end of the eighth resistor is connected to the level conversion circuit for receiving the power supply voltage; the second end of the eighth resistor is connected to the base of the twentieth transistor.

[0047] In one embodiment, the driving circuit includes: a twenty-first transistor, a twenty-second transistor, a twenty-third transistor, a twenty-fourth transistor, a twenty-fifth transistor, a twenty-sixth transistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a twelfth resistor;

[0048] The emitter of the twenty-first transistor is connected to the first end of the ninth resistor and the emitter of the twenty-second transistor and is connected to the supply voltage, and the base of the twenty-first transistor is connected to the second end of the ninth resistor; the collector of the twenty-first transistor is connected to the collector of the twenty-fourth transistor for outputting the drive signal; and the emitter of the twenty-fourth transistor is grounded.

[0049] The emitter of the twenty-second transistor is connected to the first end of the tenth resistor, and the base of the twenty-second transistor is connected to the second end of the tenth resistor; the collector of the twenty-second transistor is connected to the collector of the twenty-third transistor for outputting the driving signal; the emitter of the twenty-third transistor is grounded;

[0050] A first end of the eleventh resistor is connected to the base of the twenty-fifth transistor for receiving the modulation control signal; a second end of the eleventh resistor is connected to the base of the twenty-third transistor; a collector of the twenty-fifth transistor is connected to the second end of the ninth resistor, and an emitter of the twenty-fifth transistor is grounded;

[0051] The first end of the twelfth resistor is connected to the base of the twenty-fourth transistor; the second end of the twelfth resistor is connected to the base of the twenty-sixth transistor, for receiving the inverted signal of the modulation control signal; the collector of the twenty-sixth transistor is connected to the second end of the tenth resistor, and the emitter of the twenty-sixth transistor is grounded.

[0052] In one embodiment, the driving circuit further includes: an inverter;

[0053] An input terminal of the inverter is connected to the modulation control signal, and an output terminal of the inverter is connected to the base of the twenty-sixth transistor.

[0054] The passive buzzer control integrated circuit provided in the present application includes: an enable circuit, a bias circuit, a charge and discharge circuit, a level conversion circuit and a drive circuit. The enable circuit is used to output a charging current and a starting current according to an enable signal; the bias circuit is connected to the enable circuit and the charge and discharge circuit, and is used to output a discharge current according to the starting current; the charge and discharge circuit is connected to the enable circuit, and is used to output an initial voltage based on the charging current and the discharge current; the level conversion circuit is connected to the charge and discharge circuit, and is used to output a supply voltage after transforming the initial voltage; the drive circuit is connected to the level conversion circuit and a speaker, and is used to output a drive signal to the speaker based on the supply voltage and a modulated control signal to drive the speaker to work. The solution provided in the present application adopts the design concept of integrated circuits to achieve an integrated effect for the music passive buzzer control circuit, thereby reducing the PCB area and getting rid of the constraints of factors such as the precision and reliability level of discrete devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0056] Figure 1 Schematic diagram of the passive buzzer control integrated circuit controlling the speaker;

[0057] Figure 2 This is a schematic diagram of the structure of the passive buzzer control integrated circuit provided in Example 1 of the present application;

[0058] Figure 3 Provided for the first embodiment of the present application is a structural diagram of an enabling circuit;

[0059] Figure 4 Provided for the first embodiment of the present application is another structural schematic diagram of an enabling circuit;

[0060] Figure 5 A schematic diagram of the structure of the bias circuit provided in Example 1 of the present application;

[0061] Figure 6 Another structural diagram of the bias circuit provided in Example 1 of the present application;

[0062] Figure 7 A schematic diagram of the structure of the charge and discharge circuit provided in Example 1 of the present application;

[0063] Figure 8 Another structural diagram of the charge-discharge circuit provided in Example 1 of the present application;

[0064] Figure 9This is another structural diagram of the charge and discharge circuit provided in Example 1 of the present application;

[0065] Figure 10 This is another structural diagram of the charge and discharge circuit provided in Example 1 of the present application;

[0066] Figure 11 This is another structural diagram of the charge and discharge circuit provided in Example 1 of the present application;

[0067] Figure 12 This is another structural diagram of the charge and discharge circuit provided in Example 1 of the present application;

[0068] Figure 13 This is another structural diagram of the charge and discharge circuit provided in Example 1 of the present application;

[0069] Figure 14 A schematic diagram of the structure of the driving circuit provided in Example 1 of the present application;

[0070] Figure 15 Another structural schematic diagram of the driving circuit provided in Example 1 of the present application.

[0071] Description of reference numerals:

[0072] 21: Enable circuit;

[0073] 22: bias circuit;

[0074] 23: charging and discharging circuit;

[0075] 24: Level conversion circuit;

[0076] 25: driving circuit;

[0077] Q1: first transistor;

[0078] Q2: second transistor;

[0079] Q3: the third transistor;

[0080] Q4: fourth transistor;

[0081] Q5: fifth transistor;

[0082] Q6: sixth transistor;

[0083] Q7: seventh transistor;

[0084] Q8: eighth transistor;

[0085] Q9: ninth transistor;

[0086] Q10: tenth transistor;

[0087] Q11: eleventh transistor;

[0088] Q12: twelfth transistor;

[0089] Q13: thirteenth transistor;

[0090] Q14: fourteenth transistor;

[0091] Q15: the fifteenth transistor;

[0092] Q16: sixteenth transistor;

[0093] Q17: seventeenth transistor;

[0094] Q18: eighteenth transistor;

[0095] Q19: nineteenth transistor;

[0096] Q20: twentieth transistor;

[0097] Q21: the twenty-first transistor;

[0098] Q22: 22nd transistor;

[0099] Q23: 23rd transistor;

[0100] Q24: 24th transistor;

[0101] Q25: twenty-fifth transistor;

[0102] Q26: twenty-sixth transistor;

[0103] R1: first resistor;

[0104] R2: second resistor;

[0105] R3: the third resistor;

[0106] R4: fourth resistor;

[0107] R5: fifth resistor;

[0108] R6: sixth resistor;

[0109] R7: seventh resistor;

[0110] R8: eighth resistor;

[0111] R9: ninth resistor;

[0112] R10: tenth resistor;

[0113] R11: eleventh resistor;

[0114] R12: The twelfth resistor. DETAILED DESCRIPTION

[0115] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0116] It should be noted that the brief descriptions of terms in this application are only for the purpose of facilitating the understanding of the embodiments described below, and are not intended to limit the embodiments of this application. Unless otherwise specified, these terms should be understood according to their ordinary and usual meanings.

[0117] In practical applications, buzzer integrated circuits are mainly circuits that use speakers to realize music functions, such as Figure 1 As shown, Figure 1 This diagram shows a passive buzzer control integrated circuit controlling a speaker. This device is commonly used in washing machines, refrigerators, water heaters, coffee makers, and other appliances. As shown, the passive buzzer control integrated circuit converts an input signal into an output signal and transmits it to the speaker, causing it to produce sound. In one example, the passive buzzer control integrated circuit provided herein can also change the frequency of the transmitted signal to alter the speaker's tone, making the sound more pleasant.

[0118] The technical solutions of the present application and the technical solutions of the present application are described in detail below with reference to specific embodiments. The following specific embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in certain embodiments. In the description of the present application, unless otherwise clearly specified and limited, each term should be understood in a broad sense within the art. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0119] Example 1

[0120] Figure 2 This is a schematic diagram of the structure of the passive buzzer control integrated circuit provided in Example 1 of the present application. Figure 2 As shown, the passive buzzer control integrated circuit includes: an enabling circuit 21, a bias circuit 22, a charge and discharge circuit 23, a level conversion circuit 24 and a drive circuit 25; wherein,

[0121] The enabling circuit 21 is configured to output a charging current and a starting current according to an enabling signal; the bias circuit 22 is connected to the enabling circuit 21 and the charge-discharge circuit 23 and configured to output a discharging current according to the starting current;

[0122] The charge and discharge circuit 23 is connected to the enable circuit 21 and is used to output an initial voltage based on the charging current and the discharging current. The level conversion circuit 24 is connected to the charge and discharge circuit 23 and is used to transform the initial voltage and output a supply voltage.

[0123] The driving circuit 25 is connected to the level conversion circuit 24 and the speaker, and is used to output a driving signal to the speaker based on the power supply voltage and the modulation control signal to drive the speaker to operate.

[0124] In the scenario example, the passive buzzer control integrated circuit starts working after the enable signal is connected. After receiving the enable signal, the enable circuit 21 outputs a startup current to the bias circuit 22, and at the same time outputs a charging current to the charge-discharge circuit 23. After receiving the startup current, the bias circuit 22 outputs a discharge current to the charge-discharge circuit 23. After receiving the charging current and the discharge current, the charge-discharge circuit outputs an initial voltage to the level conversion circuit 24. The level conversion circuit 24 converts the received initial voltage to generate a supply voltage V REG Provided to the driving circuit 25. After receiving the supply voltage, the driving circuit 25 generates a driving signal based on the modulation control signal and provides it to the speaker, thereby controlling the operation of the speaker. The modulation control signal is a pulse width modulation PWM signal, which is a speaker frequency input signal. As an example, the supply voltage V REG It can also return to the charge and discharge circuit 23.

[0125] In one example, Figure 3 This is a structural diagram of an enabling circuit provided in Example 1 of the present application. The enabling circuit 21 includes a first transistor Q1, a first resistor R1, a second resistor R2, and a bias current module;

[0126] A first end of the first resistor R1 is used to receive the enable signal, and a second end of the first resistor R1 is connected to the base of the first transistor Q1;

[0127] The collector of the first transistor Q1 is connected to the charge and discharge circuit 23 for outputting the charging current; the emitter of the first transistor Q1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded;

[0128] The bias current module is connected to the base of the first transistor Q1 and is used to generate the startup current.

[0129] The enable circuit 21 is composed of a first resistor R1, a second resistor R2, a first transistor and a first mirror circuit. The enable signal is connected to the base of the first transistor Q1 after passing through the first resistor R1. The enable signal turns on the first transistor to generate a charging current. The charging current is output from the collector of the first transistor Q1 and is transmitted to the charge and discharge circuit 23. The emitter of the first transistor Q1 is grounded after passing through the second resistor. The purpose is to make the emitter voltage of the first transistor Q1 0. In this way, as long as the enable signal reaches the first transistor Q1, the first transistor Q1 will be turned on to generate a charging current. The working principle of the bias current module is to generate a signal based on the enable signal that has been processed by reducing the current (reducing the current). The signal is a starting current, and the generated starting current is transmitted to the bias circuit 22. By reducing the current of the enable signal, the transistor can be prevented from burning out.

[0130] In another example, Figure 4 This is another structural diagram of the enabling circuit provided in the first embodiment of the present application, wherein the bias current module includes: a second transistor Q2, a third transistor Q3, a fourth transistor Q4 and a third resistor R3;

[0131] The base of the second transistor Q2 is connected to the collector of the second transistor Q2 and the base of the first transistor Q1, and the emitter of the second transistor Q2 is connected to the first end of the third resistor R3 and the base of the third transistor Q3;

[0132] A second end of the third resistor R3 is connected to the collector of the third transistor Q3, and an emitter of the third transistor Q3 is grounded;

[0133] The base of the fourth transistor Q4 is connected to the collector of the third transistor Q3; the collector of the fourth transistor Q4 is connected to the bias circuit 22 for outputting the starting current; and the emitter of the fourth transistor Q4 is grounded.

[0134] Take the scenario shown in the figure as an example: when the enable signal is transmitted to the first transistor Q1, it is also transmitted to the second transistor Q2 at the same time. After the current is reduced by the structure composed of the second transistor Q2, the third resistor R3 and the third transistor Q3, it is input into the fourth transistor Q4, so that the fourth transistor Q4 outputs the startup current.

[0135] In one example, Figure 5 This is a structural diagram of the bias circuit provided in the first embodiment of the present application. The bias circuit 22 includes a self-biased current mirror circuit.

[0136] The self-bias current mirror circuit of the bias circuit 22 generates a discharge current mainly based on the received startup current, and the discharge current is provided to the charge-discharge circuit 23 .

[0137] In one example, Figure 6 This is another structural diagram of the bias circuit provided in the first embodiment of the present application, wherein the self-biased current mirror circuit includes: a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, an eighth transistor Q8, a ninth transistor Q9, and a fourth resistor R4;

[0138] The emitter of the fifth transistor Q5 is connected to the emitter of the sixth transistor Q6 and the emitter of the ninth transistor Q9 and is connected to a power supply; the base of the fifth transistor Q5 is connected to the collector of the fifth transistor Q5; the collector of the fifth transistor Q5 is connected to the collector of the seventh transistor Q7 and the enabling circuit 21 for receiving the startup current;

[0139] The base of the seventh transistor Q7 is connected to the base of the eighth transistor Q8, the emitter of the seventh transistor Q7 is connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is grounded;

[0140] The base of the sixth transistor Q6 is connected to the base of the fifth transistor Q5, the collector of the sixth transistor Q6 is connected to the collector of the eighth transistor Q8; the base of the eighth transistor Q8 is connected to the collector of the eighth transistor Q8, and the emitter of the eighth transistor Q8 is grounded;

[0141] The base of the ninth transistor Q9 is connected to the base of the fifth transistor Q5 , and the collector of the ninth transistor Q9 is connected to the charge and discharge circuit 23 for outputting a discharge current.

[0142] Specifically, in the bias circuit 22 , the sixth transistor Q6 mirrors the current in the fifth transistor Q5 , and due to the addition of the resistor R4 , the loop gain is attenuated, and the gain of the circuit positive feedback is less than 1, so that the circuit remains stable.

[0143] In one example, Figure 7 This is a structural diagram of a charge-discharge circuit provided in Example 1 of the present application. The charge-discharge circuit 23 includes: a capacitor C1, a discharge module, and a charging module; wherein the charging module includes a tenth transistor Q10 and an eleventh transistor Q11; and the discharge module includes a twelfth transistor Q12 and a thirteenth transistor Q13;

[0144] The emitter of the tenth transistor Q10 is connected to the emitter of the eleventh transistor Q11 and to the power supply, and the base of the tenth transistor Q10 is connected to the collector of the tenth transistor Q10 and the enabling circuit for receiving the charging current;

[0145] The base of the eleventh transistor Q11 is connected to the base of the tenth transistor Q10, the collector of the eleventh transistor Q11 is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is grounded;

[0146] The collector of the twelfth transistor Q12 is connected to the first end of the capacitor C1, the emitter of the twelfth transistor Q12 is grounded, and the base of the twelfth transistor Q12 is connected to the base of the thirteenth transistor Q13; the base of the thirteenth transistor Q13 is connected to the collector end of the thirteenth transistor Q13 and the bias circuit for receiving the discharge current; the emitter of the thirteenth transistor Q13 is grounded.

[0147] When the charge-discharge circuit 23 receives a charging current, the eleventh transistor Q11 mirrors the current in the tenth transistor Q10, and the mirrored current charges capacitor C1. While capacitor C1 is charging, a discharging current also operates simultaneously. However, because the charging current is much greater than the discharging current, the voltage on capacitor C1 is not affected by the discharging current. When the charge-discharge circuit receives a discharging current, the twelfth transistor Q12 mirrors the discharging current in the thirteenth transistor Q13, thereby providing a discharge path for capacitor C1 to ground, thereby discharging capacitor C1.

[0148] In one example, Figure 8 This is another structural diagram of the charge and discharge circuit provided in the first embodiment of the present application. The charge and discharge circuit 23 further includes: a voltage divider module and a step mirror branch:

[0149] The voltage divider module is used to output a step voltage, and there is a one-to-one correspondence between the step voltage and the step mirror branch;

[0150] The step mirror branch is connected to the corresponding step voltage and is used to start or stop discharging the capacitor according to the relationship between the current energy storage of the capacitor and the step voltage.

[0151] First, V REG The signal comes from the charging current charging the capacitor C1 built into the charge and discharge circuit 23, causing the voltage on C1 to rise, and then the voltage on C1 is provided to the level conversion circuit 24, causing the level conversion circuit 24 to output V REG , the level conversion circuit 24 outputs V REG Then, the voltage divider module of the charge and discharge circuit 23 is acted on to make the voltage divider module work.

[0152] In one example, the voltage divider circuit outputs different step voltages, and the different step voltages correspond to different step mirror circuits. The step mirror circuit branches are used to provide a discharge path for the capacitor C1 to the ground.

[0153] Optionally, the number of the step mirror branches is two, the number of the step voltages is also two, and different step mirror branches correspond to different step voltages. By adjusting the number of step mirror branches, step discharge at different stages can be achieved, so that the V REG The voltage is stepped down slowly, making the sound more pleasant.

[0154] In one example, Figure 9 This is another structural diagram of the charge-discharge circuit provided in the first embodiment of the present application, wherein the first ladder mirror branch includes: a fourteenth transistor Q14 and a fifteenth transistor Q15, and the second ladder mirror branch includes: a sixteenth transistor Q16 and a seventeenth transistor Q17;

[0155] The base of the fourteenth transistor Q14 is connected to the collector of the fourteenth transistor Q14; the collector of the fourteenth transistor Q14 is connected to the collector of the fifteenth transistor Q15 and the voltage divider circuit for receiving the corresponding step voltage; the emitter of the fourteenth transistor Q14 is connected to the first end of the capacitor C1;

[0156] The base of the fifteenth transistor Q15 is connected to the base of the thirteenth transistor Q13, and the emitter of the fifteenth transistor Q15 is grounded;

[0157] The fourteenth transistor Q14 and the sixteenth transistor Q16 are mirror images of each other, and the fifteenth transistor Q15 and the seventeenth transistor Q17 are mirror images of each other.

[0158] With reference to the diagram, an example is provided: there are two ladder mirror branches in the charge and discharge circuit 23, namely the first ladder mirror branch and the second ladder mirror branch. Each ladder mirror branch includes two transistors, wherein the first ladder mirror branch includes the fourteenth transistor Q14 and the fifteenth transistor Q15, and the second ladder mirror branch includes the sixteenth transistor Q16 and the seventeenth transistor Q17. The fourteenth transistor Q14 in the first ladder mirror branch and the sixteenth transistor Q16 in the second ladder mirror branch are mirror structures and are connected in the same manner in the circuit. Similarly, the fifteenth transistor Q15 and the seventeenth transistor Q17 are mirror structures.

[0159] In one example, Figure 10 This is another structural diagram of the charge and discharge circuit provided in the first embodiment of the present application, wherein a unidirectional conducting element is provided between the collector of the fourteenth transistor Q14 and the voltage divider circuit;

[0160] The first end of the unidirectional conductive element is connected to the voltage divider circuit, and the second end of the unidirectional conductive element is connected to the collector of the fourteenth transistor Q14, for unidirectionally transmitting the step voltage provided by the voltage divider circuit to the fourteenth transistor Q14.

[0161] Specifically, the presence of a unidirectional conductive element in the stepped mirror branch ensures that the current signal can only flow from the voltage divider module to the fourteenth transistor Q14 and not in the opposite direction, thereby preventing signal backflow. Because the first stepped mirror branch and the second stepped mirror branch are mirror branches, a unidirectional conductive element is also provided between the sixteenth transistor Q16 and the voltage divider circuit.

[0162] In one example, Figure 11 This is another structural diagram of the charge-discharge circuit provided in the first embodiment of the present application, wherein the unidirectional conducting element includes: an eighteenth transistor Q18 and a nineteenth transistor Q19;

[0163] The emitter of the eighteenth transistor Q18 is connected to the voltage divider circuit, the base of the eighteenth transistor Q18 is connected to the collector of the eighteenth transistor Q18, and the collector of the eighteenth transistor Q18 is connected to the collector of the fourteenth transistor Q14;

[0164] The eighteenth transistor Q18 and the nineteenth transistor Q19 are mirror images of each other.

[0165] Specifically, the unidirectional conductive elements in a single ladder mirror branch can be implemented using transistors. For example, the eighteenth transistor Q18 in the first ladder mirror branch in the figure serves as the unidirectional conductive element in the first ladder mirror branch; the nineteenth transistor Q19 in the second ladder mirror branch serves as the unidirectional conductive element in the second ladder mirror branch.

[0166] In one example, Figure 12 This is another structural diagram of the charge and discharge circuit provided in the first embodiment of the present application, wherein the unidirectional conductive element includes: a diode;

[0167] The anode of the diode is connected to the voltage divider circuit, and the cathode of the diode is connected to the collector of the fourteenth transistor Q14.

[0168] Specifically, the unidirectional conducting element on the step mirror branch may be a diode. Figure 12 The diode corresponding to the first ladder mirror branch is D1, and the cathode of D1 is connected to the collector of the fourteenth transistor Q14. The diode corresponding to the second ladder mirror branch is D2, and the cathode of D2 is connected to the first end of the sixteenth transistor Q16.

[0169] In one example, Figure 13 This is another structural diagram of the charge and discharge circuit provided in the first embodiment of the present application, wherein the voltage divider module includes: a twentieth transistor Q20, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8;

[0170] A first end of the fifth resistor R5 is connected to a power supply; a second end of the fifth resistor R5 is used to output a first step voltage, and a second end of the fifth resistor R5 is connected to a first end of the sixth resistor R6 and a collector of a fourteenth transistor in a step mirror branch corresponding to the first step voltage;

[0171] The second end of the sixth resistor R6 is used to output a second step voltage, and the second end of the sixth resistor R6 is connected to the first end of the seventh resistor R7 and the collector of the fourteenth transistor in the step mirror branch corresponding to the second step voltage;

[0172] The second end of the seventh resistor R7 is connected to the collector of the twentieth transistor Q20, and the emitter of the twentieth transistor Q20 is grounded; the first end of the eighth resistor R8 is connected to the level conversion circuit 24 for receiving the supply voltage; the second end of the eighth resistor R8 is connected to the base of the twentieth transistor Q20.

[0173] In the charge and discharge circuit, the first end of the fifth resistor R5 is connected to the power supply VCC, and the second end of the fifth resistor R5 outputs a first step voltage. Accordingly, the first step mirror branch corresponding to the first step voltage is connected to the second end of the fifth resistor R5; similarly, the second end of the sixth resistor R6 outputs a second step voltage, and the second step mirror branch corresponding to the second step voltage is connected to the second end of the sixth resistor R6.

[0174] According to the situation shown in the figure, it can be seen that in this example, the first step voltage V1 is higher than the second step voltage V2. Combined with the discharge scenario example: when the capacitor C1 just starts to discharge, the voltage at the first end of the capacitor C1 is large, and the voltage at the right end of the fourteenth transistor Q14 of the first step mirror branch and the sixteenth transistor Q16 of the second step mirror branch (the "left / right" here is only an example with reference to the diagram, but does not limit the structure) is higher than the voltage at its own left end, so Q14 and Q16 are both turned on. Correspondingly, the energy stored on the capacitor C1 is discharged to the ground through the first step mirror branch formed by Q14 and Q15, and the second step mirror branch formed by Q16 and Q17. In other words, the discharge path for the capacitor C1 at this time includes the path where the twelfth transistor Q12 is located and the above-mentioned two step mirror branches, three paths.

[0175] After capacitor C1 discharges for a period of time, the voltage on capacitor C1 decreases. Accordingly, the voltage at the right end of the fourteenth transistor Q14 and the sixteenth transistor Q16 also decreases. When the voltage drops to between the first step voltage and the second step voltage, the voltage at the right end of the fourteenth transistor Q14 is lower than the voltage at its left end, while the voltage at the right end of the sixteenth transistor Q16 is still higher than the voltage at its left end. Therefore, the fourteenth transistor Q14 is turned off, but the sixteenth transistor Q16 remains on. Therefore, the discharge path at this time includes two paths: the path where the twelfth transistor Q12 is located and the second step mirror branch.

[0176] Subsequently, the capacitor C1 continues to discharge, and the voltage on the capacitor C1 continues to decrease. When the voltage drops below the second step voltage, the sixteenth transistor Q16 is disconnected, and the discharge path only includes the path where the twelfth transistor Q12 is located, until the capacitor C1 is discharged.

[0177] In this example, the charge and discharge circuit 23 achieves the effect of step-by-step discharge of the capacitor C1 by setting the voltage divider module and the step mirror branch, making the sound controlled by the passive buzzer smoother and more pleasant. In addition, when the voltage on C1 is discharged, the supply voltage V REG When the voltage is less than the turn-on voltage of the twentieth transistor Q20, the voltage divider circuit stops working, thereby reducing power consumption.

[0178] In one example, Figure 14 Schematic diagram of the structure of the driving circuit provided in the first embodiment of the present application. The driving circuit 25 includes: a twenty-first transistor Q21, a twenty-second transistor Q22, a twenty-third transistor Q23, a twenty-fourth transistor Q24, a twenty-fifth transistor Q25, a twenty-sixth transistor Q26, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, and a twelfth resistor R12;

[0179] The emitter of the twenty-first transistor Q21 is connected to the first end of the ninth resistor R9 and the emitter of the twenty-second transistor Q22, and is also connected to the supply voltage. The base of the twenty-first transistor Q21 is connected to the second end of the ninth resistor R9. The collector of the twenty-first transistor Q21 is connected to the collector of the twenty-fourth transistor Q24 for outputting the driving signal. The emitter of the twenty-fourth transistor Q24 is grounded.

[0180] The emitter of the twenty-second transistor Q22 is connected to the first end of the tenth resistor R10, and the base of the twenty-second transistor Q22 is connected to the second end of the tenth resistor R10; the collector of the twenty-second transistor Q22 is connected to the collector of the twenty-third transistor Q23, for outputting the driving signal; the emitter of the twenty-third transistor Q23 is grounded;

[0181] A first end of the eleventh resistor R11 is connected to the base of the twenty-fifth transistor Q25 for receiving the modulation control signal; a second end of the eleventh resistor R11 is connected to the base of the twenty-third transistor Q23; a collector of the twenty-fifth transistor Q25 is connected to the second end of the ninth resistor R9, and an emitter of the twenty-fifth transistor Q25 is grounded;

[0182] The first end of the twelfth resistor R12 is connected to the base of the twenty-fourth transistor Q24; the second end of the twelfth resistor R12 is connected to the base of the twenty-sixth transistor Q26, for receiving the inverted signal of the modulation control signal; the collector of the twenty-sixth transistor Q26 is connected to the second end of the tenth resistor R10, and the emitter of the twenty-sixth transistor Q26 is grounded.

[0183] The level conversion circuit 24 outputs V REG The signal is transmitted to the driver circuit 25, serving as the driver circuit's power supply. In the driver circuit 25, the PWM signal is a modulation control signal used to provide a frequency input signal to the speaker. Based on the modulation control signal, the driver circuit 25 outputs drive signals BUZZ_A and BUZZ_B to drive the speaker. Adjusting the frequency of the PWM signal can cause the speaker to produce different tones.

[0184] In one example, to provide an inverted signal of the modulation control signal, Figure 15 This is another structural diagram of the driving circuit provided in the first embodiment of the present application. The driving circuit 25 further includes: an inverter;

[0185] An input terminal of the inverter is connected to the modulation control signal, and an output terminal of the inverter is connected to the base of the twenty-sixth transistor Q26.

[0186] In the passive buzzer control integrated circuit provided in this embodiment, the enable circuit is used to output a charging current and a starting current according to an enable signal; the bias circuit outputs a discharge current based on the starting current; the charge-discharge circuit outputs an initial voltage based on the charging current and the discharge current; the level conversion circuit outputs a supply voltage after transforming the initial voltage; and the drive circuit outputs a drive signal to the speaker based on the supply voltage and a modulated control signal to drive the speaker to operate. The solution provided in this application adopts the design concept of integrated circuits to achieve an integrated effect for the music passive buzzer control circuit, thereby reducing the PCB area and getting rid of the constraints of discrete device factors.

Claims

1. A passive buzzer control integrated circuit, characterized in that: include: enabling circuit, bias circuit, charge and discharge circuit, level conversion circuit and driving circuit; wherein, The enabling circuit is configured to output a charging current and a starting current according to an enabling signal; the bias circuit is connected to the enabling circuit and the charging and discharging circuit, and is configured to output a discharging current according to the starting current; The charge and discharge circuit is connected to the enable circuit and is used to output an initial voltage based on the charge current and the discharge current; the level conversion circuit is connected to the charge and discharge circuit and is used to transform the initial voltage and output a supply voltage; The driving circuit is connected to the level conversion circuit and the speaker, and is used to output a driving signal to the speaker based on the power supply voltage and the modulation control signal to drive the speaker to operate.

2. The passive buzzer control integrated circuit according to claim 1, characterized in that: The enabling circuit includes a first transistor, a first resistor, a second resistor and a bias current module; The first end of the first resistor is used to receive the enable signal, and the second end of the first resistor is connected to the base of the first transistor; The collector of the first transistor is connected to the charge and discharge circuit for outputting the charging current; the emitter of the first transistor is connected to the first end of the second resistor, and the second end of the second resistor is grounded; The bias current module is connected to the base of the first transistor and is used to generate the startup current.

3. The passive buzzer control integrated circuit according to claim 2, characterized in that: The bias current module includes: a second transistor, a third transistor, a fourth transistor and a third resistor; The base of the second transistor is connected to the collector of the second transistor and the base of the first transistor, and the emitter of the second transistor is connected to the first end of the third resistor and the base of the third transistor; The second end of the third resistor is connected to the collector of the third transistor, and the emitter of the third transistor is grounded; The base of the fourth transistor is connected to the collector of the third transistor; the collector of the fourth transistor is connected to the bias circuit for outputting the starting current; and the emitter of the fourth transistor is grounded.

4. The passive buzzer control integrated circuit according to claim 1, characterized in that: The bias circuit includes a self-biased current mirror circuit.

5. The passive buzzer control integrated circuit according to claim 4, characterized in that: The self-biased current mirror circuit includes: a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor and a fourth resistor; The emitter of the fifth transistor is connected to the emitter of the sixth transistor and the emitter of the ninth transistor and is connected to a power supply; the base of the fifth transistor is connected to the collector of the fifth transistor; the collector of the fifth transistor is connected to the collector of the seventh transistor and the enabling circuit for receiving the startup current; The base of the seventh transistor is connected to the base of the eighth transistor, the emitter of the seventh transistor is connected to the first end of the fourth resistor, and the second end of the fourth resistor is grounded; The base of the sixth transistor is connected to the base of the fifth transistor, the collector of the sixth transistor is connected to the collector of the eighth transistor; the base of the eighth transistor is connected to the collector of the eighth transistor, and the emitter of the eighth transistor is grounded; The base of the ninth transistor is connected to the base of the fifth transistor, and the collector of the ninth transistor is connected to the charge and discharge circuit for outputting a discharge current.

6. The passive buzzer control integrated circuit according to claim 1, characterized in that: The charge-discharge circuit includes: a capacitor, a discharge module and a charging module; wherein the charging module includes a tenth transistor and an eleventh transistor; and the discharge module includes a twelfth transistor and a thirteenth transistor; The emitter of the tenth transistor is connected to the emitter of the eleventh transistor and to a power supply, and the base of the tenth transistor is connected to the collector of the tenth transistor and the enabling circuit for receiving a charging current; The base of the eleventh transistor is connected to the base of the tenth transistor, the collector of the eleventh transistor is connected to the first end of the capacitor, and the second end of the capacitor is grounded; The collector of the twelfth transistor is connected to the first end of the capacitor, the emitter of the twelfth transistor is grounded, and the base of the twelfth transistor is connected to the base of the thirteenth transistor; the base of the thirteenth transistor is connected to the collector of the thirteenth transistor and the bias circuit for receiving the discharge current; the emitter of the thirteenth transistor is grounded.

7. The passive buzzer control integrated circuit according to claim 6, characterized in that: The charge and discharge circuit further includes: a voltage divider module and a step mirror branch: The voltage divider module is used to output a step voltage, and there is a one-to-one correspondence between the step voltage and the step mirror branch; The step mirror branch is connected to the corresponding step voltage and is used to start or stop discharging the capacitor according to the relationship between the current energy storage of the capacitor and the step voltage.

8. The passive buzzer control integrated circuit according to claim 7, characterized in that: The number of the step mirror branches is two, and the number of the step voltages is also two. Different step mirror branches correspond to different step voltages.

9. The passive buzzer control integrated circuit according to claim 8, characterized in that: The first ladder mirror branch includes: a fourteenth transistor and a fifteenth transistor, and the second ladder mirror branch includes: a sixteenth transistor and a seventeenth transistor; The base of the fourteenth transistor is connected to the collector of the fourteenth transistor; the collector of the fourteenth transistor is connected to the collector of the fifteenth transistor and the voltage divider circuit, for receiving the corresponding step voltage; the emitter of the fourteenth transistor is connected to the first end of the capacitor; The base of the fifteenth transistor is connected to the base of the thirteenth transistor, and the emitter of the fifteenth transistor is grounded; The fourteenth transistor and the sixteenth transistor are mirror images of each other, and the fifteenth transistor and the seventeenth transistor are mirror images of each other.

10. The passive buzzer control integrated circuit according to claim 9, characterized in that: A unidirectional conducting element is provided between the collector of the fourteenth transistor and the voltage divider circuit; A first end of the unidirectional conductive element is connected to the voltage divider circuit, and a second end of the unidirectional conductive element is connected to the collector of the fourteenth transistor, for unidirectionally transmitting the step voltage provided by the voltage divider circuit to the fourteenth transistor.

11. The passive buzzer control integrated circuit according to claim 10, characterized in that: The unidirectional conductive element includes: an eighteenth transistor and a nineteenth transistor; The emitter of the eighteenth transistor is connected to the voltage divider circuit, the base of the eighteenth transistor is connected to the collector of the eighteenth transistor, and the collector of the eighteenth transistor is connected to the collector of the fourteenth transistor; The eighteenth transistor and the nineteenth transistor are mirror images of each other.

12. The passive buzzer control integrated circuit according to claim 10, characterized in that: The unidirectional conductive element includes: a diode; The anode of the diode is connected to the voltage divider circuit, and the cathode of the diode is connected to the collector of the fourteenth transistor.

13. The circuit according to claim 7, characterized in that The voltage dividing module includes: a twentieth transistor, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor; The first end of the fifth resistor is connected to a power supply; the second end of the fifth resistor is used to output a first step voltage, and the second end of the fifth resistor is connected to the first end of the sixth resistor and the collector of the fourteenth transistor in the step mirror branch corresponding to the first step voltage; The second end of the sixth resistor is used to output a second step voltage, and the second end of the sixth resistor is connected to the first end of the seventh resistor and the collector of the fourteenth transistor in the step mirror branch corresponding to the second step voltage; The second end of the seventh resistor is connected to the collector of the twentieth transistor, and the second end of the twentieth transistor is grounded; the first end of the eighth resistor is connected to the level conversion circuit for receiving the power supply voltage; the second end of the eighth resistor is connected to the base of the twentieth transistor.

14. The circuit according to any one of claims 1 to 13, characterized in that: The driving circuit includes: a twenty-first transistor, a twenty-second transistor, a twenty-third transistor, a twenty-fourth transistor, a twenty-fifth transistor, a twenty-sixth transistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a twelfth resistor; The emitter of the twenty-first transistor is connected to the first end of the ninth resistor and the emitter of the twenty-second transistor and is connected to the supply voltage, and the base of the twenty-first transistor is connected to the second end of the ninth resistor; the collector of the twenty-first transistor is connected to the collector of the twenty-fourth transistor for outputting the drive signal; and the emitter of the twenty-fourth transistor is grounded. The emitter of the twenty-second transistor is connected to the first end of the tenth resistor, and the base of the twenty-second transistor is connected to the second end of the tenth resistor; the collector of the twenty-second transistor is connected to the collector of the twenty-third transistor for outputting the driving signal; the emitter of the twenty-third transistor is grounded; A first end of the eleventh resistor is connected to the base of the twenty-fifth transistor for receiving the modulation control signal; a second end of the eleventh resistor is connected to the base of the twenty-third transistor; a collector of the twenty-fifth transistor is connected to the second end of the ninth resistor, and an emitter of the twenty-fifth transistor is grounded; The first end of the twelfth resistor is connected to the base of the twenty-fourth transistor; the second end of the twelfth resistor is connected to the base of the twenty-sixth transistor, for receiving the inverted signal of the modulation control signal; the collector of the twenty-sixth transistor is connected to the second end of the tenth resistor, and the emitter of the twenty-sixth transistor is grounded.

15. The passive buzzer control integrated circuit according to claim 14, characterized in that: The driving circuit further includes: an inverter; An input terminal of the inverter is connected to the modulation control signal, and an output terminal of the inverter is connected to the base of the twenty-sixth transistor.

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