A method for receiving a synchronization signal block and an electronic device

Abstract

An embodiment of the present application provides a method for receiving a synchronization signal block and an electronic device. The method includes: determining the time domain position of a synchronization signal block (SSB). According to the method of the embodiment of the present application, the reception of an SSB configured with short control signaling can be achieved.

Description

Technical Field

[0001] This application relates to the field of communication technologies, and particularly to a method for receiving a synchronization signal block and an electronic device. Background Art

[0002] In the unlicensed spectrum of the high-frequency band, according to regulations, short control signaling can be adopted. The short control signaling can also be referred to as contention-exempt short control signaling, and can also be referred to as listen-before-talk (LBT) exempt operation.

[0003] Specifically, in the Rel-15 NR protocol of 5G New Radio (NR), when the total duration of the short control signaling within an observation time of 100 milliseconds does not exceed 10 milliseconds, then the short control signaling can be sent without listen-before-talk (LBT). Therefore, using short control signaling can ensure that some important control signaling can be sent as soon as possible or on time, thereby improving system reliability and causing less interference (smaller duty cycle). However, how to configure the control signaling as short control signaling is an urgent problem to be solved. Summary of the Invention

[0004] In view of the prior art, this application provides an SSB receiving method and an electronic device when the SSB is configured as short control signaling, and this application also provides a computer-readable storage medium.

[0005] The embodiments of this application adopt the following technical solutions:

[0006] In a first aspect, this application provides a method for receiving a synchronization signal block, including:

[0007] Determine the time domain position of the synchronization signal block SSB.

[0008] In an implementation manner of the first aspect, the determining the time domain position of the SSB includes:

[0009] Determine the time domain position of the SSB within the SSB period.

[0010] In an implementation manner of the first aspect, the determining the time domain position of the SSB within the SSB period includes:

[0011] Determine the time domain position of the SSB within the SSB period according to the index or number of the SSB period.

[0012] In one implementation of the first aspect, determining the time domain position of the SSB within the SSB period includes:

[0013] Determining the time domain position of the SSB within the i-th SSB period as the time domain positions of the n*i-th to the n*(i + 1)-1-th SSBs within a 5-millisecond window, where i is the index number of the SSB period, i is an integer from 0 to m - 1, m is a positive integer, n is a positive integer, and the 5-millisecond window is the half-frame where the SSB is located.

[0014] In one implementation of the first aspect, n is N / m, where N is the total number of time domain positions of the SSBs within the 5-millisecond window.

[0015] In one implementation of the first aspect, N = 64.

[0016] In one implementation of the first aspect, m = 4.

[0017] In one implementation of the first aspect, n = 16.

[0018] In one implementation of the first aspect, determining the time domain position of the SSB within the SSB period includes:

[0019] Determining the time domain position of the SSB within the 0-th SSB period as the time domain positions of the 0-th to the 15-th SSBs within the 5-millisecond window;

[0020] Determining the time domain position of the SSB within the 1-st SSB period as the time domain positions of the 16-th to the 31-st SSBs within the 5-millisecond window;

[0021] Determining the time domain position of the SSB within the 2-nd SSB period as the time domain positions of the 32-nd to the 47-th SSBs within the 5-millisecond window;

[0022] Determining the time domain position of the SSB within the 3-rd SSB period as the time domain positions of the 48-th to the 63-rd SSBs within the 5-millisecond window.

[0023] In one implementation of the first aspect, determining the time domain position of the SSB includes:

[0024] Determining the index or number of the SSB period according to the system frame number corresponding to the SSB.

[0025] In one implementation of the first aspect, determining the index or number of the SSB period includes:

[0026] Determining the index or number of the SSB period as F / s, where F is the system frame number corresponding to the SSB, and s is the number of frames corresponding to one SSB period.

[0027] In one implementation manner of the first aspect, determining the index or number of the SSB period includes:

[0028] When the system frame number corresponding to the SSB is 0, determining that the index or number of the SSB period is 0;

[0029] When the system frame number corresponding to the SSB is 2, determining that the index or number of the SSB period is 1;

[0030] When the system frame number corresponding to the SSB is 4, determining that the index or number of the SSB period is 2;

[0031] When the system frame number corresponding to the SSB is 6, determining that the index or number of the SSB period is 3.

[0032] In a second aspect, the present application proposes a method for receiving a synchronization signal block, including:

[0033] Determining that the synchronization signal block SSB is a short control signaling.

[0034] In one implementation manner of the second aspect, determining that the SSB is a short control signaling includes:

[0035] Determining that the SSB is a short control signaling according to the master information block or the system information block.

[0036] In one implementation manner of the second aspect, determining that the SSB is a short control signaling includes:

[0037] When it is known that the burst transmission window is not configured, determining that the SSB is a short control signaling.

[0038] In one implementation manner of the second aspect, the method further includes:

[0039] Determining a short control signaling window and determining that the SSB within the short control signaling window is a short control signaling.

[0040] In one implementation manner of the second aspect, determining the short control signaling window includes: determining the period and duration of the short control signaling window.

[0041] In one implementation manner of the second aspect, determining the short control signaling window includes:

[0042] Determining a group of short control signaling windows within a time interval.

[0043] In one implementation manner of the second aspect, determining a group of short control signaling windows within a time interval includes:

[0044] Determine the transmission timing of this set of short control signaling windows within the time interval and the duration at each transmission timing.

[0045] In a third aspect, the present application proposes an electronic device, which includes a memory for storing computer program instructions and a processor for executing the program instructions. When the computer program instructions are executed by the processor, the electronic device is triggered to execute the method steps as described in the first aspect and / or the second aspect.

[0046] In a fourth aspect, the present application proposes a communication chip, characterized in that the communication chip includes a memory for storing computer program instructions and a processor for executing the computer program instructions stored in the memory. When the computer program instructions are executed by the processor, the communication chip is triggered to execute the method steps as described in the first aspect and / or the second aspect.

[0047] In a fifth aspect, the present application proposes a computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program, which, when running on a computer, causes the computer to execute the method as described in the first aspect and / or the second aspect.

[0048] According to the above technical solutions proposed in the embodiments of the present application, at least the following technical effects can be achieved:

[0049] According to the method of the embodiments of the present application, the reception of the SSB configured as short control signaling can be realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 Shown is a schematic diagram of the structure of a communication system according to an embodiment of the present application;

[0051] Figure 2 Shown is a schematic diagram of the SSB transmission timing according to an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0052] To make the objectives, technical solutions, and advantages of the present application clearer, the technical solutions of the present application will be clearly and completely described below in conjunction with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0053] The terms used in the embodiments of the present application are only used to explain the specific embodiments of the present application, rather than to limit the present application.

[0054] Figure 1The figure shows a schematic diagram of a communication system according to an embodiment of the present application. As Figure 1 shown, the base station 110 communicates with the user equipment 120 based on the NR protocol.

[0055] In Rel-15 NR, through the Primary Synchronization Signal (PSS) and the Secondary Synchronization Signal (SSS), the user equipment 120 obtains the time-frequency synchronization of a cell and obtains the physical layer cell ID of this cell. This process is generally referred to as cell search.

[0056] The PSS, SSS, and Physical Broadcast Channel (PBCH) form a Synchronization Signal Block (SS / PBCH block, SSB).

[0057] Each synchronization signal block has a predetermined time domain position. This time domain position can also be referred to as a candidate synchronization signal block. Multiple synchronization signal blocks form an SS-burst (synchronization signal burst). Multiple synchronization signal blocks form a synchronization signal burst. Multiple synchronization signal bursts form an SS-burst-set (synchronization signal burst set). The maximum number of SSBs that can be included in the synchronization signal burst set is Lmax. For example, for the SSB with a 120 kHz subcarrier spacing, the base station uses at most 64 SSB beams, and Lmax is 64.

[0058] The time domain positions of Lmax synchronization signal blocks are defined within a 5 ms window (SSB window) in an SSB period. For example, for the SSB with a 120 kHz subcarrier spacing, the 5 ms window (SSB window) contains the time domain positions of 64 SSBs. The time domain positions of Lmax synchronization signal blocks are fixed within a 5 ms window. The time domain position indexes of Lmax synchronization signal blocks are arranged continuously, from 0 to Lmax - 1. Therefore, the transmission time of a synchronization signal block within this 5 ms window is fixed, and the index is also fixed.

[0059] Generally speaking, when the base station sends synchronization signal blocks, it uses the beam sweeping method, that is, the base station sends synchronization signal blocks at different time domain positions through different beams. Correspondingly, the user equipment can measure different beams and sense which beam receives the strongest signal.

[0060] Base station 110 transmits SSB to user equipment 120. In an application scenario, assume that the period of the SSB is 20 milliseconds, which is a typical configuration. For an SSB with a 120 kHz subcarrier spacing, when the base station uses 64 SSB beams, the duration of an SSB within one SSB period is 5 milliseconds. Therefore, the total duration of the SSB within 100 milliseconds is 25 milliseconds, which is much greater than the 10-millisecond condition for short control signaling.

[0061] To configure the SSB as short control signaling, this application provides a communication scheme based on SSB grouping. Specifically, base station 110 divides multiple SSB beams originally transmitted within one SSB period into m SSB groups (m is an integer greater than 1), and transmits the m SSB groups in consecutive m SSB periods (one SSB group is transmitted in each SSB period). In this way, the transmission of the SSB is dispersed in multiple SSB periods, which is equivalent to reducing the duration of the SSB within a fixed time interval, thereby meeting the requirements of short control signaling. User equipment 120 receives m SSB groups in consecutive m SSB periods, where one SSB group is received in each SSB period.

[0062] For example, Figure 2 The following shows the timing diagram of the communication process according to an embodiment of this application. For an SSB with a 120 kHz subcarrier spacing, when the SSB is not configured as short control signaling, 64 SSBs (beams) are transmitted within one SSB period. When the SSB is configured as short control signaling, as Figure 2 shown, base station 110 divides 64 SSBs into 4 SSB groups (SSB group 01 to SSB group 04), with 16 SSBs in each SSB group, and each SSB group is transmitted within one SSB period (20 milliseconds) (S201 - S204).

[0063] In this way, it takes 80 milliseconds to transmit 64 SSBs using 4 SSB periods, and the total duration of the 4 SSB groups is 8 milliseconds, meeting the condition that the total duration of the SSB within 100 milliseconds is less than 10 milliseconds, that is, meeting the condition of short control signaling.

[0064] Furthermore, since base station 110 adopts the SSB grouping scheme, multiple SSBs that should have been transmitted within one SSB period are transmitted in multiple SSB periods respectively. Therefore, the original scheme for confirming the time domain position of the SSB is no longer applicable to the application scenario of multiple groups of SSBs. When the grouping method is introduced, user equipment 120 needs to obtain the time domain position of the SSB.

[0065] Therefore, the present application proposes a new SSB receiving method, which is executed by the user equipment 120. In the SSB receiving method proposed by the present application, the user equipment 120 determines the time domain position of the SSB group.

[0066] In specific implementation application scenarios, multiple different schemes can be adopted to determine the time domain position of the SSB group. Specific implementation manners are listed below.

[0067] In the first implementation manner, after introducing the grouping method, different SSB periods correspond to different SSB groups, and the time domain positions of different SSB groups within a 5 - millisecond window are different. For example, the base station 110 divides multiple SSB beams originally transmitted in one SSB period into m SSB groups (m is a positive integer), and transmits the m SSB groups in m consecutive SSB periods respectively (one SSB group is transmitted in each SSB period). In the i - th SSB period among the m SSB periods, the time domain position of the SSB group is the time domain position of the n * i - th to the n * (i + 1)-1 - th SSB within the 5 - millisecond window, where i is the serial number of the SSB period among the m SSB periods, i is an integer from 0 to m - 1, and n is the number of SSBs in the SSB group. The 5 - millisecond window is the half - frame where the SSB is located.

[0068] Taking Figure 2 the shown application scenario as an example, for an SSB with a 120 kHz sub - carrier spacing, when the SSB is not configured as short control signaling, 64 SSBs are transmitted in one SSB period, and the time domain positions of the 64 SSBs are the time domain positions of the 0 - th to the 63 - rd SSBs within the 5 - millisecond window in the SSB period. After the SSB is configured as short control signaling, the base station 110 divides the 64 SSBs into 4 SSB groups (SSB group 01 - SSB group 04) and transmits them in 4 SSB periods (S201 - S204) respectively, that is, the above - mentioned m = 4 and n = 16.

[0069] In one embodiment, n = N / m, where N is the total number of time domain positions of the SSBs within the 5 - millisecond window. For example, N = 64. Similarly, the base station 110 can divide 64 SSBs into 4 SSB groups, that is, m = 4.

[0070] Within the 0th SSB period S201 (the first 20 milliseconds), the time domain positions of the SSBs in SSB group 01 are the time domain positions of the 0th to the 15th SSBs within a 5 - millisecond window; within the 1st SSB period S202 (the second 20 milliseconds), the time domain positions of the SSBs in SSB group 02 are the time domain positions of the 16th to the 31st SSBs within a 5 - millisecond window; within the 2nd SSB period S203 (the third 20 milliseconds), the time domain positions of the SSBs in SSB group 03 are the time domain positions of the 32nd to the 47th SSBs within a 5 - millisecond window; within the 3rd SSB period S204 (the fourth 20 milliseconds), the time domain positions of the SSBs in SSB group 04 are the time domain positions of the 48th to the 63rd SSBs within a 5 - millisecond window.

[0071] Therefore, in the first implementation, the user equipment 120 determines the time domain positions of the SSBs within an SSB period. Specifically, the user equipment 120 determines the time domain positions of the SSBs within the SSB period according to the index or number of the SSB period.

[0072] In an embodiment of the first implementation, the user equipment 120 determines that the time domain positions of the SSBs within the ith SSB period are the time domain positions of the n * i - th to the n * (i + 1)-1 - th SSBs within a 5 - millisecond window, where i is the index or number of the SSB period, i is an integer from 0 to m - 1, m is a positive integer, and n is a positive integer.

[0073] In another embodiment of the first implementation, the user equipment 120 determines that the time domain positions of the SSBs within the 0th SSB period are the time domain positions of the 0th to the 15th SSBs within a 5 - millisecond window, determines that the time domain positions of the SSBs within the 1st SSB period are the time domain positions of the 16th to the 31st SSBs within a 5 - millisecond window, determines that the time domain positions of the SSBs within the 2nd SSB period are the time domain positions of the 32nd to the 47th SSBs within a 5 - millisecond window, and determines that the time domain positions of the SSBs within the 3rd SSB period are the time domain positions of the 48th to the 63rd SSBs within a 5 - millisecond window, that is, m = 4 and n = 16 as described above.

[0074] In another embodiment of the first implementation, n = N / m, where N is the total number of SSBs within a 5 - millisecond window, for example, N = 64. Similarly, the base station 110 can divide 64 SSBs into 4 SSB groups, that is, m = 4.

[0075] In the first implementation, the user equipment 120 needs to determine the index or number of the SSB period obtained. To implement the above - mentioned first implementation, the user equipment 120 determines the index or number of the SSB period according to the system frame number corresponding to the SSB.

[0076] For example, after introducing the grouping method, the user equipment 120 performs cell search and searches for an SSB. The user equipment 120 obtains the system frame number (SFN) corresponding to the SSB. The user equipment 120 obtains the system frame number by decoding the physical broadcast channel in the SSB, and obtains the index or number of the SSB period through the system frame number. The user equipment 120 obtains the time domain position of the SSB in the SSB period through the index or number of the SSB period. The user equipment 120 obtains timing information (intra-frame timing) according to the time domain position of the SSB.

[0077] Specifically, in an embodiment of the first implementation manner, the user equipment 120 determines that the index or number of the SSB period is F / s, where F is the system frame number corresponding to the SSB, and s is the number of frames corresponding to an SSB period. To meet the condition of short control signaling (time sparsity), at this time, an SSB period is greater than or equal to 10 milliseconds, that is, an SSB period corresponds to at least one frame, so s is a positive integer.

[0078] For example, an SSB period contains two system frames. When the system frame number corresponding to the SSB is 0, the user equipment 120 determines that the index or number of the SSB period is 0; when the system frame number corresponding to the SSB is 2, the user equipment 120 determines that the index or number of the SSB period is 1; when the system frame number corresponding to the SSB is 4, the user equipment 120 determines that the index or number of the SSB period is 2; when the system frame number corresponding to the SSB is 6, the user equipment 120 determines that the index or number of the SSB period is 3.

[0079] Generally, the user equipment 120 obtains the actually transmitted SSB within a 5-millisecond window through the SSB position high-layer parameter (such as ssb-PositionsInBurst). In the first implementation manner, due to the introduction of SSB grouping, the meaning of the SSB position high-layer parameter will change. Specifically, the user equipment 120 obtains the actually transmitted SSB within m periods through the SSB position high-layer parameter, or the actually transmitted SSB within a 5-millisecond window in each of the m periods. For example, the user equipment 120 obtains the actually transmitted SSB within 4 periods through the SSB position high-layer parameter, or the actually transmitted SSB within a 5-millisecond window in each of the 4 periods, that is, the actually transmitted SSB within the SSB group (16 SSBs) in each period.

[0080] In the second implementation mode, multiple SSB periods corresponding to multiple SSB groups are combined into an SSB extended period (the extended SSB period includes at least m consecutive SSB periods for transmitting m SSB groups), and different SSB groups correspond to different system frame numbers of the SSB extended period. Note: Currently, the system frame number of SSB within one period is the same. The user equipment 120 determines the system frame number corresponding to the SSB group within the SSB extended period according to the index or number of the SSB period in the SSB extended period.

[0081] Specifically, in one embodiment, the base station 110 divides multiple SSB beams originally transmitted in one SSB period into m SSB groups (m is an integer greater than 1), and transmits the m SSB groups in m consecutive SSB periods respectively (one SSB group is transmitted in each SSB period).

[0082] Assume that each SSB period contains two system frames, and the system frame numbers of the SSB period are 0 and 1. The extended SSB period includes m consecutive SSB periods for transmitting m SSB groups. The 0th system frame of the first SSB period among the m consecutive SSB periods is the 0th system frame of the extended SSB period, the 1st system frame of the first SSB period among the m consecutive SSB periods is the 1st system frame of the extended SSB period, the 0th system frame of the second SSB period among the m consecutive SSB periods is the 2nd system frame of the extended SSB period, and so on.

[0083] Since the SSB group (5 - millisecond window) is located in the 0th system frame of the SSB period, therefore, within the i - th SSB period among the m consecutive SSB periods, the system frame number of the SSB group within the extended SSB period is s*(i - 1), where s is the number of frames corresponding to one SSB period.

[0084] Take Figure 2 the shown application scenario as an example. For the SSB with a 120 kHz sub - carrier spacing, the period of one SSB is 20 milliseconds, and it contains two system frame numbers. The period of the SSB is extended from 20 milliseconds to 100 milliseconds. Within the first 20 - millisecond period (the first SSB period S201), the system frame number of the SSB group is 0; within the second 20 - millisecond period (the second SSB period S202), the system frame number of the SSB group is 2; within the third 20 - millisecond period (the third SSB period S203), the system frame number of the SSB group is 4; within the fourth 20 - millisecond period (the fourth SSB period S204), the system frame number of the SSB group is 6.

[0085] According to the above first implementation method and the second implementation method, the total duration of 4 SSB groups within 100 milliseconds can be made 8 milliseconds, meeting the condition that the total duration of SSB within 100 milliseconds is less than 10 milliseconds, that is, meeting the condition of short control signaling. Neither of these two implementation methods will change the 5 - millisecond time index within the SSB (provided by the 4 - bit information of the Physical Broadcast Channel (PBCH) Demodulation Reference Signal (DMRS) sequence and the 4 - bit information of the PBCH payload), nor will it change the half - frame indication within the SSB (provided by the 1 - bit information of the PBCH payload). Since the system frame number indication within the SSB changes, when the user equipment performs soft combination between multiple cycles (constituting the SSB extended cycle), special processing needs to be performed on the low - order bits of the system frame number to avoid different bits in the low - order bits of the system frame number during soft combination. However, this is the same as the current user equipment processing.

[0086] Further, after the base station 110 configures the SSB as short control signaling, the user equipment 120 also needs to know that the SSB is short control signaling. For this purpose, this application also proposes an SSB receiving method. In this method, the user equipment 120 determines that the SSB is short control signaling.

[0087] When the user equipment 120 determines that the SSB is short control signaling, it can use the SSB receiving method under the first or second implementation method (when the SSB has a 120 kHz sub - carrier spacing).

[0088] In specific implementation application scenarios, multiple different schemes can be adopted to determine that the SSB is short control signaling. Specific implementation methods are listed below.

[0089] In the third implementation method, the user equipment 120 determines that the SSB is short control signaling according to the Master Information Block (MIB) or the System Information Block (SIB).

[0090] In the fourth implementation, the user equipment 120 determines that the SSB is a short control signaling according to the Discovery Burst Transmission Window (DBTW). Specifically, the Discovery Burst Transmission Window (DBTW) is for coping with LBT, enabling the base station to have more opportunities to transmit the SSB. When the SSB is a short control signaling, the base station can transmit the SSB without LBT, and at this time, the DBTW is meaningless. Therefore, when the user equipment 120 learns that the Discovery Burst Transmission Window (DBTW) is not configured, the user equipment 120 learns that the SSB is a short control signaling.

[0091] In the fourth implementation, the user equipment 120 determines a short control signaling window and determines that the SSB within the short control signaling window is a short control signaling.

[0092] Specifically, a short control signaling window is defined, and the base station 110 configures the short control signaling window and transmits the SSB that needs to be configured as a short control signaling within the short control signaling window. The user equipment 120 receives the SSB within the short control signaling window. By configuring the short control signaling window, the base station 110 can tell the user equipment 120 to only measure the SSB within the short control signaling window.

[0093] In a simplified manner, the period and duration of the short control signaling window can be directly defined. Under this period and duration, the short control signaling window has relatively fixed transmission opportunities and the duration at each transmission opportunity within a time interval.

[0094] In a slightly more complex manner, a group of short control signaling windows is defined within a time interval (for example, the first time interval), and the transmission opportunities of this group of short control signaling windows within this time interval and the duration at each transmission opportunity are defined. For example, it is defined that the transmission opportunities of a group of short control signaling windows within 100 milliseconds are every 20 milliseconds (that is, the transmission starting points are at the 0th, 20th, 40th, 60th, and 80th milliseconds), and the duration at each transmission opportunity is 2 milliseconds. In this way, the total transmission time within 100 milliseconds is 10 milliseconds, meeting the short control signaling conditions. Or, the period of the short control signaling window is directly defined as 20 milliseconds and the duration is 2 milliseconds, and the effect is the same. The total transmission time within 100 milliseconds is 10 milliseconds, meeting the short control signaling conditions.

[0095] The user equipment 120 determines a set of short control signaling windows within a first time interval (e.g., 100 milliseconds). For example, the user equipment 120 determines the transmission opportunities of a set of short control signaling windows within the first time interval and the duration at each transmission opportunity. For another example, the user equipment 120 determines the period and duration of the short control signaling windows.

[0096] Furthermore, the first time interval is a duration associated with the definition of the short control signaling. For example, 100 milliseconds, which is not a periodically existing time period. Therefore, directly defining the period and duration of the short control signaling windows may result in inconsistent occurrence opportunities of the short control signaling windows within different 100 - millisecond intervals. Thus, the period and duration of the short control signaling windows can be restricted to be effective only within one first time interval. Specifically, in one embodiment, the user equipment 120 also determines whether the period and duration of the short control signaling windows are effective only within one first time interval.

[0097] Furthermore, in one embodiment, to simplify the configuration overhead, only the transmission opportunities of the short control signaling windows are configured, and it is defined that the duration at each transmission opportunity is the same. Under this definition, when the user equipment 120 knows the transmission opportunities (number) within the first time interval (e.g., within 100 milliseconds), it can deduce the duration at each transmission opportunity (e.g., 100 milliseconds divided by the number of transmission opportunities).

[0098] It can be understood that some or all of the steps or operations in the above - mentioned embodiments are merely examples. The embodiments of the present application can also perform other operations or various deformations of the operations. In addition, the various steps can be executed in different orders presented in the above - mentioned embodiments, and it is possible not to execute all the operations in the above - mentioned embodiments.

[0099] Furthermore, in the 1990s, it was obvious to distinguish whether an improvement to a technology was a hardware improvement (e.g., improvement to circuit structures such as diodes, transistors, switches, etc.) or a software improvement (improvement to method flows). However, with the development of technology, many improvements to method flows today can be regarded as direct improvements to hardware circuit structures. Almost all designers obtain the corresponding hardware circuit structures by programming the improved method flows into the hardware circuits. Therefore, it cannot be said that an improvement to a method flow cannot be implemented with a hardware entity module. For example, a Programmable Logic Device (PLD) (e.g., a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logical function is determined by the programming of the device by the access party. Designers can program themselves to "integrate" a digital device on a piece of PLD without having to ask a chip manufacturer to design and fabricate a dedicated integrated circuit chip. Moreover, nowadays, instead of manually fabricating integrated circuit chips, this programming is mostly implemented using "logic compiler" software, which is similar to the software compiler used in program development and writing. The original code before compilation also has to be written in a specific programming language, which is called a Hardware Description Language (HDL). And there is not only one kind of HDL, but many kinds, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, RHDL (Ruby Hardware Description Language), etc. The most commonly used ones currently are VHDL (Very-High-Speed Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art should also be aware that by simply performing some logical programming on the method flow with the above-mentioned several hardware description languages and programming it into the integrated circuit, it is easy to obtain the hardware circuit that implements the logical method flow.

[0100] The controller can be implemented in any suitable manner. For example, the controller can take the form of, for example, a microprocessor or a processor and a computer-readable medium storing computer-readable program code (such as software or firmware) executable by the (micro)processor, logic gates, switches, an application specific integrated circuit (ASIC), a programmable logic controller, and an embedded microcontroller. Examples of the controller include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320. The memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art also know that in addition to implementing the controller in the form of pure computer-readable program code, it is entirely possible to logically program the method steps to enable the controller to be implemented in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers, etc. to achieve the same function. Therefore, such a controller can be considered a hardware component, and the devices included therein for implementing various functions can also be regarded as the structures within the hardware component. Or even, the devices for implementing various functions can be regarded as either software modules for implementing the method or structures within the hardware component.

[0101] Specifically, when the device proposed in the embodiment of the present application is actually implemented, it can be fully or partially integrated into a physical entity, or physically separated. And these modules can all be implemented in the form of software called by a processing element; they can also all be implemented in the form of hardware; or some modules can be implemented in the form of software called by a processing element, and some modules can be implemented in the form of hardware. For example, the detection module can be a separately established processing element, or can be implemented by being integrated in a certain chip of the electronic device. The implementation of other modules is similar. In addition, these modules can be fully or partially integrated together, or can be independently implemented. During the implementation process, each step of the above method or each of the above modules can be completed through the hardware integrated logic circuit or software-form instructions in the processor element.

[0102] For example, the above-mentioned modules may be one or more integrated circuits determined to implement the above method, such as: one or more Application Specific Integrated Circuits (ASICs), or one or more Digital Signal Processors (DSPs), or one or more Field Programmable Gate Arrays (FPGAs), etc. Additionally, these modules may be integrated together and implemented in the form of a System-On-a-Chip (SOC).

[0103] An embodiment of the present application also provides an electronic device (e.g., user equipment 120), which includes a memory for storing computer program instructions and a processor for executing the program instructions. When the computer program instructions are executed by the processor, the electronic device is triggered to execute the method steps as described in the embodiments of the present application.

[0104] Specifically, in an embodiment of the present application, the above one or more computer programs are stored in the above memory. The above one or more computer programs include instructions that, when executed by the above device, cause the above device to execute the method steps described in the embodiments of the present application.

[0105] Specifically, in an embodiment of the present application, the processor of the electronic device may be a System-On-a-Chip (SOC). The processor may include a Central Processing Unit (CPU) and may further include other types of processors. Specifically, in an embodiment of the present application, the processor of the electronic device may be a PWM control chip.

[0106] Specifically, in an embodiment of the present application, the involved processor may include, for example, a CPU, a DSP, a microcontroller or a digital signal processor, and may also include a GPU, an Embedded Neural-network Process Unit (NPU), and an Image Signal Processor (ISP). The processor may further include necessary hardware accelerators or logic processing hardware circuits, such as an ASIC, or one or more integrated circuits for controlling the execution of the program of the technical solution of the present application. In addition, the processor may have the function of operating one or more software programs, and the software programs may be stored in a storage medium.

[0107] Specifically, in an embodiment of the present application, the memory of the electronic device may be a read-only memory (ROM), other types of static storage devices that can store static information and instructions, a random access memory (RAM), or other types of dynamic storage devices that can store information and instructions. It may also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM), or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage media, or other magnetic storage devices. Or it may also be any computer-readable medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer.

[0108] Specifically, in an embodiment of the present application, the processor and the memory may be integrated into a processing device. More commonly, they are independent components. The processor is used to execute the program code stored in the memory to implement the method described in the embodiments of the present application. Specifically, in implementation, the memory may also be integrated into the processor or independent of the processor.

[0109] Furthermore, the device described in the embodiments of the present application may be specifically implemented by a computer chip or an entity, or by a product with certain functions.

[0110] An embodiment of the present application also proposes a communication chip. The chip is applied to the user device 120 and includes a processor for executing program instructions stored in the memory. When the computer program instructions are executed by the processor, the communication chip is triggered to execute the method steps described in the embodiments of the present application.

[0111] Those skilled in the art should understand that the embodiments of the present application may be provided as a method, a device, or a computer program product. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program code.

[0112] In several embodiments provided by the present application, if any function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application.

[0113] Specifically, in an embodiment of the present application, a computer-readable storage medium is further provided. A computer program is stored in this computer-readable storage medium. When it runs on a computer, it causes the computer to execute the method provided by the embodiment of the present application.

[0114] An embodiment of the present application further provides a computer program product. This computer program product includes a computer program. When it runs on a computer, it causes the computer to execute the method provided by the embodiment of the present application.

[0115] The embodiments in the present application are described with reference to the flowcharts and / or block diagrams of methods, devices (apparatuses), and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0116] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in this computer-readable memory generate a manufactured product including an instruction device. This instruction device implements the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0117] These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable device provide for implementing the functions in the process Figure 1steps of one or more processes and / or blocks Figure 1 steps of functions specified in one or more blocks.

[0118] It should also be noted that in the embodiments of the present application, "at least one" means one or more, and "a plurality of" means two or more. "And / or" describes the association relationship of associated objects and indicates that there can be three relationships. For example, A and / or B can represent the cases of A existing alone, A and B existing simultaneously, and B existing alone. Where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after. "At least one of the following" and its similar expressions refer to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, and c can represent: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, and c can be single or multiple.

[0119] In the embodiments of the present application, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, commodity or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, commodity or device including the said element.

[0120] The present application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in a distributed computing environment where tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.

[0121] Each embodiment in the present application is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and reference can be made to the corresponding parts of the method embodiments for the relevant content.

[0122] Those of ordinary skill in the art will be aware that the various units and algorithm steps described in the embodiments of the present application can be implemented by electronic hardware, computer software, or a combination of electronic hardware. Whether these functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0123] Those skilled in the art can clearly understand that for the sake of convenience and brevity of description, the specific working processes of the above-described devices, apparatuses, and units can be referred to the corresponding processes in the foregoing method embodiments, and will not be elaborated herein.

[0124] As described above, the above is only the specific implementation manner of the present application. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present application, and all such changes or substitutions should be covered within the protection scope of the present application. The protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method for receiving a synchronization signal block, characterized in that, Including: Determining the time domain position of a synchronization signal block (SSB), including: Determining the time domain position of the SSB within the SSB period according to the index or number of the SSB period, wherein the time domain positions of Lmax SSBs are defined within an SSB window of one SSB period, and Lmax is the maximum number of SSBs that can be included in a synchronization signal burst set.

2. The method according to claim 1, wherein The determining the time domain position of the SSB within the SSB period includes: Determining the time domain position of the SSB within the i-th SSB period as the time domain positions of the n*i-th to the n*(i + 1)-1-th SSBs within a 5-millisecond window, where i is the number of the SSB period, i is an integer from 0 to m - 1, m is a positive integer, n is a positive integer, and the 5-millisecond window is the half-frame where the SSB is located.

3. The method according to claim 2, characterized in that, The n is N / m, where N is the total number of time domain positions of SSBs within the 5-millisecond window.

4. The method according to claim 3, characterized in that The N = 64.

5. The method according to claim 2, wherein The m = 4.

6. The method according to claim 2, wherein The n = 16.

7. The method according to claim 2, characterized in that The determining the time domain position of the SSB within the SSB period includes: Determining the time domain position of the SSB within the 0-th SSB period as the time domain positions of the 0-th to the 15-th SSBs within the 5-millisecond window; Determining the time domain position of the SSB within the 1-st SSB period as the time domain positions of the 16-th to the 31-st SSBs within the 5-millisecond window; Determining the time domain position of the SSB within the 2-nd SSB period as the time domain positions of the 32-nd to the 47-th SSBs within the 5-millisecond window; Determining the time domain position of the SSB within the 3-rd SSB period as the time domain positions of the 48-th to the 63-th SSBs within the 5-millisecond window.

8. The method according to claim 1, wherein The determining the time domain position of the synchronization signal block (SSB) includes: Determining the index or number of the SSB period according to the system frame number corresponding to the SSB.

9. The method according to claim 8, wherein The determining the index or number of the SSB period includes: Determining the index or number of the SSB period as F / s, where F is the system frame number corresponding to the SSB and s is the number of frames corresponding to one SSB period.

10. The method according to claim 8, characterized in that The determining the index or number of the SSB period includes: When the system frame number corresponding to the SSB is 0, determining the index or number of the SSB period as 0; When the system frame number corresponding to the SSB is 2, determining the index or number of the SSB period as 1; When the system frame number corresponding to the SSB is 4, determining the index or number of the SSB period as 2; When the system frame number corresponding to the SSB is 6, determining the index or number of the SSB period as 3.

11. An electronic device, characterized in that, The electronic device includes a memory for storing computer program instructions and a processor for executing the program instructions, wherein when the computer program instructions are executed by the processor, the electronic device is triggered to execute the method steps described in any one of claims 1 to 10.

12. A communication chip, characterized in that, The communication chip includes a memory for storing computer program instructions and a processor for executing the computer program instructions stored in the memory, wherein when the computer program instructions are executed by the processor, the communication chip is triggered to execute the method steps described in any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that, A computer program is stored in the computer-readable storage medium, and when it runs on a computer, it causes the computer to execute the method according to any one of claims 1 to 10.

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