Photomask, semiconductor structure and preparation method thereof

Abstract

The present invention relates to a photomask, a semiconductor structure, and a method for manufacturing the same. The photomask comprises: a photomask body; a backhole pattern located within the photomask body; and a plurality of support shaft patterns located within the backhole pattern; one end of each of the support shaft patterns is connected, and the other end of each of the support shaft patterns is connected to an edge of the backhole pattern; the support shaft pattern comprises a main body and end portions, the end portions being located at both ends of the main body and integrally connected to the main body, and the width of the end portions being smaller than the width of the main body. The present invention can prevent incomplete release of the sacrificial layer during cavity formation in a MEMS device.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a photomask, a semiconductor structure, and a method for manufacturing the same. Background Art

[0002] With the development of integrated circuit technology, micro-electromechanical system (MEMS) devices have emerged. MEMS devices can be used as piezoelectric elements in inkjet printers, as gyroscopes in cars to measure car tilt, and as pressure sensors in tires, etc.

[0003] During the preparation process of MEMS devices, a cavity needs to be formed on the back side of the substrate. In traditional technology, oxide is usually used as a stop layer, and the substrate is patterned. An opening is etched on the back side of the substrate using an etching process, and then a wet etching process is used to release the oxide to form a cavity. However, in the traditional technology, during the patterning of the substrate, due to defects in the mask design, the theoretical sharp-angle structure cannot be formed at the end position of the support shaft, but a chamfered structure with a larger width is formed, resulting in incomplete release of the sacrificial layer during the cavity formation process. Summary of the Invention

[0004] Based on this, it is necessary to provide a mask, a semiconductor structure and a preparation method thereof that can avoid incomplete release of the sacrificial layer during cavity formation of a MEMS device in order to address the above technical problems.

[0005] In a first aspect, the present application provides a photomask. The photomask comprises:

[0006] Mask body;

[0007] a back hole pattern, located in the mask body;

[0008] Multiple support shaft graphics are located in the back hole graphic; one end of each support shaft graphic is connected, and the other end of each support shaft graphic is respectively connected to the edge of the back hole graphic; the support shaft graphic includes a main body and an end portion, the end portion is located at both ends of the main body portion, and is integrally connected to the main body portion, and the width of the end portion is smaller than the width of the main body portion.

[0009] In one embodiment, a plurality of the support shaft patterns are radially distributed within the back hole pattern.

[0010] In one embodiment, each of the support shaft patterns is spindle-shaped.

[0011] The photomask of the present invention comprises: a photomask body; a back hole pattern located within the photomask body; a plurality of support shaft patterns located within the back hole pattern; one end of each of the support shaft patterns is connected, and the other end of each of the support shaft patterns is respectively connected to the edge of the back hole pattern; the support shaft pattern comprises a main body and end portions, the end portions being located at both ends of the main body and integrally connected to the main body, the width of the end portions being smaller than the width of the main body. Because the width of the end portions of the support shaft patterns in the photomask is smaller than the width of the main body, when a semiconductor structure having support shafts is formed based on the photomask, the width of the chamfered structure of the support shafts can be reduced, thereby preventing incomplete release of the sacrificial layer during cavity formation in the MEMS device.

[0012] In a second aspect, the present application further provides a semiconductor structure. The semiconductor structure comprises:

[0013] a substrate having a back hole therein;

[0014] Multiple support shafts are located in the back hole; one end of each support shaft is connected, and the other end of each support shaft is respectively connected to the edge of the back hole; the support shaft includes a main structure and an end structure, the end structure is located at both ends of the main structure, and is integrally connected to the main structure, and the width of the end structure is smaller than the width of the main structure.

[0015] In one embodiment, the plurality of support shafts are radially distributed in the back hole.

[0016] In one embodiment, the semiconductor structure further comprises:

[0017] a first sacrificial layer, located on the upper surface of the substrate, and having a first cavity therein;

[0018] a diaphragm located above the first cavity, with at least a portion of the diaphragm supported by the first sacrificial layer;

[0019] a second sacrificial layer, located on an upper surface of the diaphragm, wherein the second sacrificial layer has a second cavity;

[0020] a back plate, located above the second cavity, at least a portion of the back plate being supported by the second sacrificial layer;

[0021] The protective layer is located on the upper surface of the back plate. The protective layer and the back plate are provided with a plurality of sound holes, and the sound holes penetrate the protective layer and the back plate.

[0022] The semiconductor structure of the present invention comprises: a substrate having a back hole therein; a plurality of support shafts located within the back hole; one end of each of the support shafts being connected, and the other end of each of the support shafts being connected to an edge of the back hole; the support shafts comprising a main structure and end structures, the end structures being located at both ends of the main structure and integrally connected to the main structure, the width of the end structures being smaller than the width of the main structure. Because the width of the end structures of the support shaft pattern in the semiconductor structure is smaller than the width of the main structure, the width of the chamfered structure of the support shaft can be reduced, thereby preventing incomplete release of the sacrificial layer during cavity formation in the MEMS device.

[0023] In a third aspect, the present application further provides a method for preparing a semiconductor structure, characterized in that the method for preparing the semiconductor structure comprises:

[0024] providing a substrate;

[0025] A back hole is formed on the lower surface of the substrate, and the back hole passes through the substrate; and a plurality of support shafts are formed in the back hole; one end of each of the support shafts is connected, and the other end of each of the support shafts is respectively connected to the edge of the back hole; the support shaft includes a main structure and an end structure, and the end structure is located at both ends of the main structure and is integrally connected to the main structure, and the width of the end structure is smaller than the width of the main structure.

[0026] In one embodiment, before forming the back hole on the lower surface of the substrate, the method further includes:

[0027] forming a first sacrificial layer on the upper surface of the substrate;

[0028] forming a diaphragm on the upper surface of the first sacrificial layer;

[0029] forming a second sacrificial layer on the upper surface of the diaphragm;

[0030] forming a back plate on the upper surface of the second sacrificial layer;

[0031] A protective layer is formed on the upper surface of the back plate.

[0032] In one embodiment, after forming a plurality of support shafts in the back hole, the method further comprises:

[0033] removing a portion of the first sacrificial layer based on the back hole to form a first cavity in the first sacrificial layer;

[0034] forming a plurality of acoustic holes in the protective layer and the back plate, wherein the acoustic holes penetrate the protective layer and the back plate and expose the second sacrificial layer;

[0035] A portion of the second sacrificial layer is removed based on the acoustic hole to form a second cavity in the second sacrificial layer.

[0036] In one embodiment,

[0037] The removing part of the first sacrificial layer based on the back hole comprises: removing the first sacrificial layer by a wet etching process;

[0038] The removing part of the second sacrificial layer based on the acoustic hole includes: removing the second sacrificial layer by a dry etching process.

[0039] The method for preparing a semiconductor structure of the present invention includes: providing a substrate; forming a back hole on the lower surface of the substrate, the back hole penetrating the substrate; forming a plurality of support shafts within the back hole; one end of each of the support shafts being connected, and the other end of each of the support shafts being connected to the edge of the back hole; the support shafts including a main structure and an end structure, the end structures being located at both ends of the main structure and integrally connected to the main structure, the width of the end structure being smaller than the width of the main structure. Because the width of the end structure of the support shaft pattern in the semiconductor structure is smaller than the width of the main structure, the width of the chamfered structure of the support shaft can be reduced, thereby avoiding incomplete release of the sacrificial layer during cavity formation in the MEMS device. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 FIG1 is a schematic diagram of the layout of a photomask according to an embodiment of the present invention;

[0041] Figure 2 is a schematic diagram of a support shaft pattern in a photomask according to an embodiment of the present invention;

[0042] Figure 3 A schematic diagram of a photomask layout;

[0043] Figure 4 is a schematic diagram of a semiconductor structure;

[0044] Figure 5 A flow chart of a method for preparing a semiconductor structure provided in one embodiment of the present invention;

[0045] Figure 6 A schematic cross-sectional view of a structure obtained in step S501 of a method for preparing a semiconductor structure provided in one embodiment of the present invention;

[0046] Figure 7 Schematic bottom view of the structure obtained in step S502 of the method for preparing a semiconductor structure provided in one embodiment of the present invention;

[0047] Figure 8 for Figure 7Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0048] Figure 9 A flow chart of a method for preparing a semiconductor structure before forming a back hole on the lower surface of a substrate in a method for preparing a semiconductor structure provided in one embodiment of the present invention;

[0049] Figure 10 The structure obtained in step S901 of the method for preparing a semiconductor structure provided in one embodiment of the present invention is Figure 7 Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0050] Figure 11 The structure obtained in step S902 of the method for preparing a semiconductor structure provided in one embodiment of the present invention is Figure 7 Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0051] Figure 12 The structure obtained in step S903 of the method for preparing a semiconductor structure provided in one embodiment of the present invention is Figure 7 Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0052] Figure 13 The structure obtained in step S904 of the method for preparing a semiconductor structure provided in one embodiment of the present invention is Figure 7 Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0053] Figure 14 The structure obtained in step S904 of the method for preparing a semiconductor structure provided in another embodiment of the present invention is Figure 7 Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0054] Figure 15 The structure obtained in step S905 of the method for preparing a semiconductor structure provided in one embodiment of the present invention is Figure 7 Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0055] Figure 16 A flow chart of a method for preparing a semiconductor structure after forming a plurality of support shafts in a back hole in one embodiment of the present invention;

[0056] Figure 17 The structure obtained in step S1601 of the method for preparing a semiconductor structure provided in one embodiment of the present invention is Figure 7 Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0057] Figure 18The structure obtained in step S1602 of the method for preparing a semiconductor structure provided in one embodiment of the present invention is Figure 7 Schematic diagram of the cross section of the obtained structure in the ABC direction;

[0058] Figure 19 The structure obtained in step S1603 of the method for preparing a semiconductor structure provided in one embodiment of the present invention is Figure 7 Schematic diagram of the cross-section of the obtained structure in the ABC direction.

[0059] Description of reference numerals:

[0060] 10-back hole pattern, 20-support shaft pattern, 201-main body, 202-end, 30-substrate, 301-back hole, 302-support shaft, 40-first sacrificial layer, 401-first opening, 402-first cavity, 50-diaphragm, 60-second sacrificial layer, 601-second opening, 602-second cavity, 70-back plate, 701-third opening, 80-protective layer, 801-sound hole. DETAILED DESCRIPTION

[0061] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings provide embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0062] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0063] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent to, connected to, or coupled to the other element or layer, or there can be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0064] Spatially relative terms such as "under," "beneath," "beneath," "under," "above," "above," etc., may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the drawings is turned over, the element or feature described as "under" or "beneath" or "beneath" the other elements will be oriented as "above" the other elements or features. Thus, the exemplary terms "under" and "under" can include both upper and lower orientations. In addition, the device can also include alternative orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0065] As used herein, the singular forms "a," "an," and "the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include," "comprising," "having," and the like specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0066] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic illustrations of idealized embodiments (and intermediate structures) of the invention, such that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances are anticipated. Accordingly, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation occurs. Accordingly, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the invention.

[0067] The present invention provides a mask, such as Figure 1 and Figure 2 As shown, the mask includes: a mask body; a back hole pattern 10, located in the mask body; a plurality of support shaft patterns 20, located in the back hole pattern 10; one end of each support shaft pattern 20 is connected, and the other end of each support shaft pattern 20 is respectively connected to the edge of the back hole pattern 10; the support shaft pattern 20 includes a main body 201 and an end portion 202, the end portion 202 is located at both ends of the main body 201, and is integrally connected to the main body 201, and the width of the end portion 202 is smaller than the width of the main body 201.

[0068] It should be noted that during the preparation process of the MEMS device, a cavity needs to be formed on the back side of the substrate 30. In conventional technology, a cavity is usually formed on the back side of the substrate 30. Figure 3 The photomask shown is used to pattern the lower surface of the substrate 30 in the semiconductor structure, and then through exposure, etching and other steps, a back hole 301 is formed on the lower surface of the substrate 30. Figure 4 As shown, since the width of the main body 201 and the end 202 of the support shaft pattern 20 in the mask is the same, the following Figure 3 The semiconductor structure formed by the conventional photomask is not able to form the theoretical sharp corner structure at the end of the support shaft 302 due to the etching loading effect. Instead, it forms a structure as shown in FIG. Figure 4The chamfered structure shown has a relatively large width. In the subsequent process of forming the cavity, due to the large width of the chamfered structure, the oxide of the chamfered structure is not easily released during the cavity formation process, which can easily lead to the problem of incomplete release of the sacrificial layer. The present invention makes the width of the end 202 of the support shaft pattern 20 in the mask smaller than the width of the main body 201. Therefore, when a semiconductor structure with a support shaft is formed based on the mask of the present invention, the width of the end structure of the support shaft 302 is smaller than the width of the main body structure, thereby reducing the width of the chamfered structure of the support shaft 302, thereby avoiding incomplete release of the sacrificial layer during the cavity formation process of the MEMS device.

[0069] In one embodiment, the plurality of support shaft patterns 20 may be, but are not limited to, radially distributed within the back hole pattern 10 .

[0070] Specifically, the number of the support shaft graphics 20 can be set according to actual needs. For example, the number of the support shaft graphics 20 can be two, three, four, five, six, seven, eight or more. Figure 3 In the figure, only four support shaft patterns 20 are used as an example, and the four support shaft patterns 20 are in a cross shape.

[0071] In one embodiment, each support shaft pattern 20 is spindle-shaped.

[0072] See also Figure 5 The present invention also provides a method for preparing a semiconductor structure, comprising the following steps:

[0073] S501: providing a substrate;

[0074] S502: A back hole is formed on the lower surface of the substrate, and the back hole passes through the substrate; and a plurality of support shafts are formed in the back hole; one end of each support shaft is connected, and the other end of each support shaft is respectively connected to the edge of the back hole; the support shaft includes a main structure and an end structure, and the end structure is located at both ends of the main structure and is integrally connected to the main structure, and the width of the end structure is smaller than the width of the main structure.

[0075] It should be noted that in the above steps S502 and S503, the back holes 301 and the multiple support shafts 302 on the lower surface of the substrate 30 are patterned on the lower surface of the substrate 30 based on the mask provided by the present invention, and then prepared through exposure, etching and other processes.

[0076] It should be noted that, in traditional technology, the following methods are usually used: Figure 3 The photomask shown is used to pattern the lower surface of the substrate 30 in the semiconductor structure, and then through exposure, etching and other steps, a back hole 301 is formed on the lower surface of the substrate 30. Figure 4As shown, since the width of the main body 201 and the end 202 of the support shaft pattern 20 in the mask is the same, the following Figure 3 The semiconductor structure formed by the photomask of the conventional technology shown in FIG. 1 cannot form the theoretical sharp corner structure at the end position of the support shaft 302 due to the etching load effect, but forms a Figure 4 The chamfered structure shown has a relatively large width. In the subsequent process of forming the cavity, due to the large width of the chamfered structure, the oxide of the chamfered structure is not easily released during the cavity formation process, which can easily lead to the problem of incomplete release of the sacrificial layer. The present invention makes the width of the end 202 of the support shaft pattern 20 in the mask smaller than the width of the main body 201. Therefore, in the semiconductor structure formed by the mask of the present invention, the width of the end structure of the support shaft 302 is smaller than the width of the main body structure, thereby reducing the width of the chamfered structure of the support shaft 302, thereby avoiding incomplete release of the sacrificial layer during the cavity formation process of the MEMS device.

[0077] The present invention provides a method for fabricating a semiconductor structure, comprising: providing a substrate; forming a backhole on the lower surface of the substrate, the backhole penetrating the substrate; forming a plurality of support shafts within the backholes; one end of each support shaft being connected, and the other end of each support shaft being connected to an edge of the backhole; the support shafts comprising a main structure and end structures, the end structures being located at both ends of the main structure and integrally connected to the main structure, the width of the end structures being smaller than the width of the main structure. Because the width of the end structures of the support shaft pattern in the semiconductor structure is smaller than the width of the main structure, the width of the chamfered structure of the support shaft can be reduced, thereby preventing incomplete release of the sacrificial layer during cavity formation in the MEMS device.

[0078] In step S501, refer to Figure 5 Step S501 and Figure 6 , providing a substrate 30.

[0079] In some examples, the material of the substrate 30 can be any suitable substrate 30 material known to those skilled in the art, for example, at least one of the following materials: silicon, silicon-on-insulator (SOI), stacked silicon-on-insulator (SSOI), stacked silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI). This application does not limit the material of the substrate 30.

[0080] In step S502, refer to Figure 5 Step S502 in Figure 7 and Figure 8A back hole 301 is formed on the lower surface of the substrate 30, and the back hole 301 passes through the substrate 30; and a plurality of support shafts 302 are formed in the back hole 301; one end of each support shaft 302 is connected, and the other end of each support shaft 302 is respectively connected to the edge of the back hole 301; the support shaft 302 includes a main structure and an end structure, the end structures are located at both ends of the main structure, and are integrally connected to the main structure, and the width of the end structure is smaller than the width of the main structure.

[0081] In some examples, a deep reactive ion etching (DRIE) process may be used to form the back hole 301 and the support shaft 302 .

[0082] In one embodiment, Figure 9 As shown, before forming the back hole 301 on the lower surface of the substrate 30, the following steps may be further included:

[0083] S901: forming a first sacrificial layer on the upper surface of the substrate;

[0084] S902: forming a diaphragm on the upper surface of the first sacrificial layer;

[0085] S903: forming a second sacrificial layer on the upper surface of the diaphragm;

[0086] S904: forming a back plate on the upper surface of the second sacrificial layer;

[0087] S905: forming a protective layer on the upper surface of the back plate.

[0088] In step S901, refer to Figure 9 S901 steps and Figure 10 , a first sacrificial layer 40 is formed on the upper surface of the substrate 30 .

[0089] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the first sacrificial layer 40 may include but is not limited to silicon oxide. Of course, in other examples, the material of the first sacrificial layer 40 may also be other materials, such as germanium oxide.

[0090] In some examples, the first sacrificial layer 40 may include a plurality of first openings 401 .

[0091] In step S902, refer to Figure 9 Step S902 in Figure 11 , a diaphragm 50 is formed on the upper surface of the first sacrificial layer 40 .

[0092] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the diaphragm 50 may include but is not limited to polysilicon. Of course, in other examples, the material of the diaphragm 50 may also be other materials, such as polycrystalline germanium, etc.

[0093] In some examples, the diaphragm 50 may fill the first opening 401 .

[0094] In step S903, refer to Figure 9 Step S903 in Figure 12 , a second sacrificial layer 60 is formed on the upper surface of the diaphragm 50 .

[0095] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the second sacrificial layer 60 may include but is not limited to silicon oxide. Of course, in other examples, the material of the second sacrificial layer 60 may also be other materials, such as germanium oxide.

[0096] Optionally, the material of the second sacrificial layer 60 may be the same as that of the first sacrificial layer 40 .

[0097] In some examples, the second sacrificial layer 60 may include a plurality of second openings 601 .

[0098] In step S904, refer to Figure 9 Step S904 in Figure 13 , a back plate 70 is formed on the upper surface of the second sacrificial layer 60 .

[0099] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the back plate 70 may include but is not limited to polysilicon. Of course, in other examples, the material of the back plate 70 may also be other materials, such as polycrystalline germanium.

[0100] Optionally, the material of the back plate 70 may be the same as that of the diaphragm 50 .

[0101] In some examples, the back plate 70 may fill the second opening 601 .

[0102] In some examples, such as Figure 14 As shown, the back plate 70 may form a third opening 701 in the second opening 601 , and the third opening 701 may at least expose the diaphragm 50 .

[0103] In step S905, refer to Figure 9 S905 steps in Figure 15 , a protective layer 80 is formed on the upper surface of the back plate 70.

[0104] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the protective layer 80 may include but is not limited to silicon nitride. Of course, in other examples, the material of the protective layer 80 may also be other materials, such as germanium nitride.

[0105] In some examples, the protection layer 80 may fill the third opening 701 .

[0106] In one embodiment, Figure 16 As shown, after forming a plurality of support shafts 302 in the back hole 301, the following steps may be further included:

[0107] S1601: removing a portion of the first sacrificial layer based on the back hole to form a first cavity in the first sacrificial layer;

[0108] S1602: forming a plurality of acoustic holes in the protective layer and the back plate, wherein the acoustic holes penetrate the protective layer and the back plate and expose the second sacrificial layer;

[0109] S1603: removing a portion of the second sacrificial layer based on the acoustic hole to form a second cavity in the second sacrificial layer.

[0110] In step S1601, refer to Figure 16 S1601 steps and Figure 17 , a portion of the first sacrificial layer 40 is removed based on the back hole 301 to form a first cavity 402 in the first sacrificial layer 40 .

[0111] In step S1602, refer to Figure 16 S1602 steps and Figure 18 A plurality of acoustic holes 801 are formed in the protective layer 80 and the back plate 70 . The acoustic holes 801 penetrate the protective layer 80 and the back plate 70 and expose the second sacrificial layer 60 .

[0112] In step S1603, refer to Figure 16 S1603 steps and Figure 19 , a portion of the second sacrificial layer 60 is removed based on the acoustic hole 801 to form a second cavity 602 in the second sacrificial layer 60 .

[0113] In one embodiment, removing a portion of the first sacrificial layer 40 based on the back hole 301 includes removing the first sacrificial layer 40 using a wet etching process; removing a portion of the second sacrificial layer 60 based on the acoustic hole 801 includes removing the second sacrificial layer 60 using a dry etching process.

[0114] In some examples, a buffered oxide etch (BOE) process may be used to remove the first sacrificial layer 40 .

[0115] The present invention also provides a semiconductor structure, please continue to refer to Figure 7 and Figure 8The semiconductor structure includes: a substrate 30, which has a back hole 301; a plurality of support shafts 302, which are located in the back hole 301; one end of each support shaft 302 is connected, and the other end of each support shaft 302 is respectively connected to the edge of the back hole 301; the support shaft 302 includes a main structure and an end structure, the end structure is located at both ends of the main structure, and is integrally connected to the main structure, and the width of the end structure is smaller than the width of the main structure.

[0116] It should be noted that the back holes 301 and the multiple support shafts 302 on the lower surface of the substrate 30 of the semiconductor structure provided by the present invention are all patterned on the lower surface of the substrate 30 based on the mask provided by the present invention, and then prepared through exposure, etching and other processes.

[0117] It should be noted that, in traditional technology, the following methods are usually used: Figure 3 The photomask shown is used to pattern the lower surface of the substrate 30 in the semiconductor structure, and then through exposure, etching and other steps, a back hole 301 is formed on the lower surface of the substrate 30. Figure 4 As shown, since the width of the main body 201 and the end 202 of the support shaft pattern 20 in the mask is the same, the following Figure 3 The semiconductor structure formed by the photomask of the conventional technology shown in FIG. 1 cannot form the theoretical sharp corner structure at the end position of the support shaft 302 due to the etching load effect, but forms a Figure 4 The chamfered structure shown has a relatively large width. In the subsequent process of forming the cavity, due to the large width of the chamfered structure, the oxide of the chamfered structure is not easily released during the cavity formation process, which can easily lead to the problem of incomplete release of the sacrificial layer. The present invention makes the width of the end 202 of the support shaft pattern 20 in the mask smaller than the width of the main body 201. Therefore, in the semiconductor structure formed by the mask of the present invention, the width of the end structure of the support shaft 302 is smaller than the width of the main body structure, thereby reducing the width of the chamfered structure of the support shaft 302, thereby avoiding incomplete release of the sacrificial layer during the cavity formation process of the MEMS device.

[0118] The semiconductor structure of the present invention includes: a substrate 30 having a back hole 301 therein; a plurality of support shafts 302 located within the back hole 301; one end of each support shaft 302 being connected, and the other end of each support shaft 302 being connected to the edge of the back hole 301; the support shafts 302 including a main structure and end structures, the end structures being located at both ends of the main structure and integrally connected to the main structure, the width of the end structures being smaller than the width of the main structure. Because the width of the end structures of the support shaft pattern 20 in the semiconductor structure is smaller than the width of the main structure, the width of the chamfered structure of the support shaft 302 can be reduced, thereby preventing incomplete release of the sacrificial layer during cavity formation in the MEMS device.

[0119] In some examples, the material of the substrate 30 can be any suitable substrate 30 material known to those skilled in the art, for example, at least one of the following materials: silicon, silicon-on-insulator (SOI), stacked silicon-on-insulator (SSOI), stacked silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI). This application does not limit the material of the substrate 30.

[0120] In one embodiment, the plurality of support shafts 302 are radially distributed in the back hole 301 .

[0121] Specifically, the number of the support shafts 302 can be set according to actual needs. For example, the number of the support shafts 302 can be two, three, four, five, six, seven, eight or more. Figure 4 and Figure 7 In the figure, only four support shafts 302 are used as an example, and the four support shafts 302 are in a cross shape.

[0122] In one embodiment, see Figure 19 The semiconductor structure further includes: a first sacrificial layer 40, located on the upper surface of the substrate 30, and having a first cavity 402 therein; a diaphragm 50, located above the first cavity 402, and at least a portion of the diaphragm 50 is supported by the first sacrificial layer 40; a second sacrificial layer 60, located on the upper surface of the diaphragm 50, and having a second cavity 602 therein; a back plate 70, located above the second cavity 602, and at least a portion of the back plate 70 is supported by the second sacrificial layer 60; and a protective layer 80, located on the upper surface of the back plate 70, and having a plurality of sound holes 801 therein and in the protective layer 80 and the back plate 70, and the sound holes 801 penetrate the protective layer 80 and the back plate 70.

[0123] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the first sacrificial layer 40 may include but is not limited to silicon oxide. Of course, in other examples, the material of the first sacrificial layer 40 may also be other materials, such as germanium oxide.

[0124] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the diaphragm 50 may include but is not limited to polysilicon. Of course, in other examples, the material of the diaphragm 50 may also be other materials, such as polycrystalline germanium, etc.

[0125] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the second sacrificial layer 60 may include but is not limited to silicon oxide. Of course, in other examples, the material of the second sacrificial layer 60 may also be other materials, such as germanium oxide.

[0126] Optionally, the material of the second sacrificial layer 60 may be the same as that of the first sacrificial layer 40 .

[0127] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the back plate 70 may include but is not limited to polysilicon. Of course, in other examples, the material of the back plate 70 may also be other materials, such as polycrystalline germanium.

[0128] Optionally, the material of the back plate 70 may be the same as that of the diaphragm 50 .

[0129] In some examples, taking the substrate 30 as a silicon substrate 30 as an example, the material of the protective layer 80 may include but is not limited to silicon nitride. Of course, in other examples, the material of the protective layer 80 may also be other materials, such as germanium nitride.

[0130] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0131] The above embodiments merely illustrate several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art may make various modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A photomask, characterized in that: The photomask comprises: Mask body; a back hole pattern, located in the mask body; Multiple support shaft graphics are located in the back hole graphics; one end of each support shaft graphic is connected, and the other end of each support shaft graphic is respectively connected to the edge of the back hole graphic; each support shaft graphic is spindle-shaped, and the support shaft graphic includes a main body and an end portion, the end portion is located at both ends of the main body, and is integrally connected to the main body, and the width of the end portion is smaller than the width of the main body.

2. The photomask according to claim 1, wherein: The plurality of support shaft patterns are radially distributed in the back hole pattern.

3. A semiconductor structure, characterized in that The semiconductor structure comprises: a substrate having a back hole therein; Multiple support shafts are located in the back hole; one end of each support shaft is connected, and the other end of each support shaft is respectively connected to the edge of the back hole; the support shaft includes a main structure and an end structure, the end structure is located at both ends of the main structure, and is integrally connected to the main structure, and the width of the end structure is smaller than the width of the main structure.

4. The semiconductor structure according to claim 3, wherein: The plurality of support shafts are radially distributed in the back hole.

5. The semiconductor structure according to claim 3, wherein: The semiconductor structure further comprises: a first sacrificial layer, located on the upper surface of the substrate, and having a first cavity therein; a diaphragm located above the first cavity, with at least a portion of the diaphragm supported by the first sacrificial layer; a second sacrificial layer, located on an upper surface of the diaphragm, wherein the second sacrificial layer has a second cavity; a back plate, located above the second cavity, at least a portion of the back plate being supported by the second sacrificial layer; The protective layer is located on the upper surface of the back plate. The protective layer and the back plate are provided with a plurality of sound holes, and the sound holes penetrate the protective layer and the back plate. The semiconductor structure according to claim 3 , wherein: The material of the substrate includes at least one of silicon, silicon on insulator, stacked silicon on insulator, stacked silicon germanium on insulator, silicon germanium on insulator and germanium on insulator.

7. A method for preparing a semiconductor structure, characterized in that: The method for preparing the semiconductor structure comprises: providing a substrate; A back hole is formed on the lower surface of the substrate, and the back hole passes through the substrate; and a plurality of support shafts are formed in the back hole; one end of each of the support shafts is connected, and the other end of each of the support shafts is respectively connected to the edge of the back hole; the support shaft includes a main structure and an end structure, and the end structure is located at both ends of the main structure and is integrally connected to the main structure, and the width of the end structure is smaller than the width of the main structure.

8. The method for preparing a semiconductor structure according to claim 7, wherein: Before forming a back hole on the lower surface of the substrate, the method further includes: forming a first sacrificial layer on the upper surface of the substrate; forming a diaphragm on the upper surface of the first sacrificial layer; forming a second sacrificial layer on the upper surface of the diaphragm; forming a back plate on the upper surface of the second sacrificial layer; A protective layer is formed on the upper surface of the back plate.

9. The method for preparing a semiconductor structure according to claim 8, wherein: After forming a plurality of support shafts in the back hole, the method further includes: removing a portion of the first sacrificial layer based on the back hole to form a first cavity in the first sacrificial layer; forming a plurality of acoustic holes in the protective layer and the back plate, wherein the acoustic holes penetrate the protective layer and the back plate and expose the second sacrificial layer; A portion of the second sacrificial layer is removed based on the acoustic hole to form a second cavity in the second sacrificial layer.

10. The method for preparing a semiconductor structure according to claim 9, wherein: The removing part of the first sacrificial layer based on the back hole comprises: removing the first sacrificial layer by a wet etching process; The removing part of the second sacrificial layer based on the acoustic hole includes: removing the second sacrificial layer by a dry etching process.

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