Current-mode temperature sensing method and device based on dynamic bias distribution circuit

Abstract

This disclosure provides a current-type temperature sensing method and apparatus based on a dynamically allocated bias circuit. The temperature sensing method includes: using a control logic module to generate a switching signal, a comparator clock signal, and a reset signal in response to a clock signal, wherein the clock signal is generated internally by the control logic module or introduced externally; using a dynamically allocated bias current generation module to generate a proportional PTAT current or a reference REF current in response to the switching signal and the comparator clock signal; and using a readout module to generate a digital temperature signal based on the PTAT current or REF current in response to the comparator clock signal.

Description

Technical Field

[0001] This disclosure relates to the field of temperature sensor technology, and in particular to a current-type temperature sensing method and apparatus based on a dynamically allocated bias circuit. Background Technology

[0002] With the continuous development of Radio Frequency Identification (RFID) technology, methods for integrating temperature sensors using passive RFID tags have emerged, enabling these temperature sensors to be widely used in smart healthcare and perishable food monitoring. Existing current-type temperature sensors typically use two circuits to simultaneously generate PTAT (Proportional To Absolute Temperature) and CTAT (Complementary to Absolute Temperature) currents at the sensing front end. Existing dynamically distributed current-type temperature sensors have improved circuitry to reduce power consumption and space waste, achieving the separation of PTAT and CTAT current generation. Because passive RFID tags offer advantages such as battery-free operation, wireless communication, high flexibility, low cost, and rapid deployment, the integrated temperature sensors also need to meet the requirements of low power consumption, high accuracy, and low cost. Summary of the Invention

[0003] In view of this, the present disclosure provides a current-type temperature sensing method and apparatus based on a dynamically allocated bias circuit, in order to partially solve at least one of the aforementioned technical problems.

[0004] One aspect of this disclosure provides a current-type temperature sensing method based on a dynamically allocated bias circuit. The current-type temperature sensing circuit includes a control logic module, a dynamically allocated bias current generation module, and a readout module. The method includes: using the control logic module to generate a switching signal, a comparator clock signal, and a reset signal in response to a clock signal, wherein the clock signal is generated internally by the control logic module or introduced externally; using the dynamically allocated bias current generation module to generate a proportional PTAT current or a reference REF current in response to the switching signal and the comparator clock signal; and using the readout module to generate a digital temperature signal based on the PTAT current or REF current in response to the comparator clock signal.

[0005] According to embodiments of this disclosure, the aforementioned dynamically allocated bias current generation module includes: a combined current generation submodule and a current multiplexing submodule; the aforementioned switching signals include: a first switching signal, a second switching signal, and a third switching signal; the aforementioned generation of a proportional PTAT current or REF current using the dynamically allocated bias current generation submodule in response to the aforementioned switching signals and the comparator clock signal includes: using the aforementioned combined current generation submodule, generating a PTAT current when the aforementioned first switching signal is at a low level, and generating a REF current when the aforementioned first switching signal is at a high level; using the aforementioned current multiplexing submodule, connecting the PTAT current to the aforementioned readout module when the aforementioned second switching signal is at a high level and the aforementioned third switching signal is at a low level, and connecting the REF current to the aforementioned readout module when the aforementioned second switching signal is at a low level and the aforementioned third switching signal is at a high level.

[0006] According to an embodiment of this disclosure, the readout module includes a capacitor, a comparator, and a digital filter. The method of generating a digital temperature signal based on the PTAT current or REF current using the readout module in response to the comparator clock signal includes: the capacitor charging in response to the incoming PTAT current to obtain a first voltage, and discharging in response to the incoming REF current to obtain a second voltage; the comparator includes a first input terminal and a second input terminal, the first input terminal receiving a preset reference voltage, and the second input terminal receiving the first voltage or the second voltage, and comparing the preset reference voltage with the first voltage or the second voltage in response to the comparator clock signal to generate a quantized signal; the digital filter generates the digital temperature signal based on the quantized signal in response to the comparator clock signal.

[0007] Another aspect of this disclosure provides a current-type temperature sensing device based on a dynamically allocated bias circuit. The device includes: a control logic module for generating a switching signal, a comparator clock signal, and a reset signal in response to a clock signal, wherein the clock signal is generated internally by the control logic module or introduced externally; a dynamically allocated bias current generation module for generating a proportional PTAT current or a reference REF current in response to the switching signal and the comparator clock signal; and a readout module for generating a digital temperature signal based on the PTAT current or REF current in response to the switching signal and the comparator clock signal.

[0008] According to embodiments of this disclosure, the aforementioned dynamic bias current generation module includes: a combined current generation submodule and a current multiplexing submodule; the aforementioned switching signals include: a first switching signal, a second switching signal, and a third switching signal; the aforementioned combined current generation submodule is configured to generate a PTAT current when the first switching signal is low and a REF current when the first switching signal is high in response to the first switching signal; the aforementioned current multiplexing submodule is configured to connect the PTAT current to the aforementioned readout module when the second switching signal is high and the third switching signal is low in response to the second and third switching signals, and connect the REF current to the aforementioned readout module when the second switching signal is low and the third switching signal is high in response to the second and third switching signals.

[0009] According to an embodiment of this disclosure, the readout module includes: a capacitor, a comparator, and a digital filter; the capacitor is used to charge in response to the incoming PTAT current to obtain a first voltage, and is also used to discharge in response to the incoming REF current to obtain a second voltage; the comparator includes a first input terminal and a second input terminal, the first input terminal is used to receive a preset reference voltage, the second input terminal is used to receive the first voltage or the second voltage, the comparator is also used to compare the preset reference voltage with the first voltage or the second voltage in response to the comparator clock signal to generate a quantized signal; and the digital filter is used to generate the digitized temperature signal based on the quantized signal in response to the comparator clock signal.

[0010] According to embodiments of this disclosure, the aforementioned combined current generation submodule includes: a first current mirror group, a first switch a, a first switch b, a first reverse switch, a first resistor, a second resistor group, a first transistor, a second transistor, a third transistor, and an operational amplifier; one end of the first current mirror group is connected to a pull-up voltage source, and the other end includes a first output circuit, a second output circuit, a third output circuit, a fourth output circuit, and a fifth output circuit; the first output circuit is connected to one end of the first resistor, the other end of the first resistor is connected to the emitter of the first transistor, and the base and collector of the first transistor are grounded; the second resistor group includes a second resistor a, a second resistor b, and a third resistor; the second output circuit is connected to one end of the second resistor a, the third output circuit is connected to one end of the second resistor b, the other end of the second resistor a and the other end of the second resistor b are jointly connected to one end of the third resistor, the other end of the third resistor is grounded, the other end of the second resistor a and the other end of the second resistor b are also jointly connected to one end of the first reverse switch, and the other end of the first reverse switch is connected to the third transistor... The emitter of the transistor, the base and collector of the third transistor are grounded; the fourth output circuit is connected to the emitter of the second transistor, and the base and collector of the second transistor are grounded; one end of the first resistor and one end of the second resistor a are connected through the first switch a; one end of the second resistor b and the emitter of the second transistor are connected through the first switch b; the first switches a and b are simultaneously closed or open, and the state of the first reverse switch closed or open is opposite to that of the first switch a; the output terminal of the operational amplifier is connected to the first current mirror group, the first input terminal is connected to one end of the first resistor, one end of the first resistor is connected to the first output circuit, and the second input terminal is connected to the emitter of the second transistor; and the combined current generation submodule is used to control the first switch a, the first switch b and the first reverse switch to remain closed or open in response to the high or low level of the first switch signal, so as to generate PTAT current or REF current, and the PTAT current or REF current is input to the current multiplexing module from the fifth output circuit.

[0011] According to embodiments of this disclosure, the current multiplexing submodule includes: a second switch, a third switch, a third quantization switch, a second current mirror group, a first MOSFET, and a second MOSFET; one end of the second switch is connected to the fifth output circuit, and the other end is selectively connected to either the second switch a interface or the second switch b interface; one end of the third switch is connected to the second switch b interface, and the other end is selectively connected to either the third switch a interface or the third switch b interface; one end of the third quantization switch is connected to the second switch b interface, and the other end is selectively connected to either the third quantization switch a interface or the third quantization switch b interface; one end of the first MOSFET is connected to the pull-up voltage source, and the other end is connected to the third switch b interface; One end of the second MOSFET is connected to the aforementioned pull-up voltage source, and the other end is connected to the aforementioned third quantization switch b interface; one end of the aforementioned second current mirror group is grounded, and the other end includes a first access circuit, a second access circuit, and a third access circuit. The first access circuit is connected to the aforementioned second switch a interface, the second access circuit is connected to the aforementioned third switch a interface, and the third access circuit is connected to the aforementioned third quantization switch a interface; and the aforementioned current multiplexing submodule is used to control the connection state of the second switch, the third switch, and the third quantization switch in response to the aforementioned second switch signal, the third switch signal, and the comparator clock signal, so that the PTAT current or REF current is connected to the aforementioned capacitor to complete charging or discharging.

[0012] According to embodiments of this disclosure, the first current mirror group and the third current mirror group further include: a dynamic element matching module for stabilizing the current in the first current mirror group and the third current mirror group.

[0013] According to embodiments of this disclosure, the operational amplifier further includes a chopper circuit before the input and after the output, for eliminating offset voltage and other low-frequency errors in the circuit.

[0014] Based on the above technical solutions, it can be seen that the embodiments of this disclosure have the following beneficial effects compared with the prior art:

[0015] The dynamic bias current generation circuit generates a proportional PTAT current or a reference REF current based on the switching signal and the comparator clock signal. The circuits that generate the proportional PTAT current or the reference REF current can have some overlap, which saves the circuit power consumption of the temperature sensing device and reduces the area of ​​the temperature sensing device.

[0016] The readout module responds to the comparator clock signal and generates a digital temperature signal by using a proportional PTAT current and a reference REF current. The readout module combines the proportional PTAT current and the reference REF current based on the timing control of the comparator clock signal to obtain the digital temperature signal, thereby expanding the detection range of the digital detection device and improving its utilization rate. Attached Figure Description

[0017] Figure 1 A flowchart illustrating a current-mode temperature sensing method based on a dynamically allocated bias circuit according to an embodiment of the present disclosure is shown.

[0018] Figure 2 A schematic diagram of a current-type temperature sensing device based on a dynamically allocated bias circuit according to an embodiment of the present disclosure is shown.

[0019] Figure 3 A schematic diagram of a current-type temperature sensing device based on a dynamically allocated bias circuit according to another embodiment of the present disclosure is shown.

[0020] Figure 4 A timing diagram of a current-type temperature sensing device based on a dynamically allocated bias circuit according to an embodiment of the present disclosure is shown schematically.

[0021] Figure 5 The illustration shows a schematic diagram of the current variation range with temperature of a current-type temperature sensing device based on a dynamically allocated bias circuit according to an embodiment of the present disclosure. Detailed Implementation

[0022] The embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0023] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0024] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0025] When using expressions such as "at least one of A, B, and C", they should generally be interpreted in accordance with the meaning that is commonly understood by a person skilled in the art (e.g., "a system having at least one of A, B, and C" should include, but is not limited to, a system having A alone, a system having B alone, a system having C alone, a system having A and B, a system having A and C, a system having B and C, and / or a system having A, B, and C, etc.).

[0026] In realizing the concept of this disclosure, the inventors discovered at least the following problems in the related technology:

[0027] Existing current-type temperature sensors can use two circuits to generate PTAT and CTAT currents simultaneously at the temperature sensing front end, while only one current is needed to charge or discharge the capacitor at the same time. The two circuits at the temperature sensing front end result in increased power consumption and wasted device area.

[0028] Existing dynamic current-distribution temperature sensors do not simultaneously generate PTAT and CTAT currents, which can solve the problems of increased circuit power consumption and wasted area. However, in order to further save area, they do not use a simple amplifier to generate PTAT current in the temperature sensing front end, resulting in a decrease in the circuit's power supply rejection ratio and affecting temperature sensing accuracy. In addition, existing dynamic current-distribution temperature sensors can obtain a digital temperature signal based on PTAT current and reference REF current. However, in the range of -55 to 125°C, the variation range of PTAT current only occupies one-third of the dynamic range of the analog-to-digital converter (ADC), resulting in wasted ADC resolution and reduced energy efficiency of the temperature sensor.

[0029] In order to at least partially solve the technical problems existing in the related art, this disclosure provides a current-type temperature sensing method based on a dynamically allocated bias circuit.

[0030] Figure 1 A flowchart illustrating a current-mode temperature sensing method based on a dynamically allocated bias circuit according to an embodiment of the present disclosure is shown.

[0031] Figure 1 A flowchart illustrating a current-mode temperature sensing method based on a dynamically allocated bias circuit according to an embodiment of the present disclosure is shown.

[0032] like Figure 1 As shown, the current-type temperature sensing method based on the dynamic bias circuit may include steps S110 to S130.

[0033] In step S110, the control logic module 210 generates a switch signal, a comparator clock signal, and a reset signal in response to the clock signal. The clock signal can be generated internally by the control logic module or introduced externally.

[0034] In step S120, the dynamic bias current generation module 220 generates a proportional PTAT current or a reference REF current in response to the switching signal and the comparator clock signal.

[0035] In step S130, the readout module 230 generates a digital temperature signal based on the PTAT current or REF current in response to the comparator clock signal.

[0036] According to embodiments of this disclosure, the PTAT current is a current whose magnitude is directly proportional to the absolute temperature (thermodynamic temperature), and the REF current is a current whose magnitude does not change with the absolute temperature (thermodynamic temperature).

[0037] According to an embodiment of this disclosure, the dynamic bias current generation module 220 includes: a combined current generation submodule and a current multiplexing submodule; the switching signals include: a first switching signal, a second switching signal and a third switching signal.

[0038] The dynamically allocated bias current generation submodule, responding to switching signals and comparator clock signals, generates a proportional PTAT current or REF current, including:

[0039] Using a combined current generation submodule, based on the first switch signal, a PTAT current is generated when the first switch signal is low, and a REF current is generated when the first switch signal is high. Using a current multiplexing submodule, based on the second and third switch signals, the PTAT current is connected to the readout module when the second switch signal is high and the third switch signal is low, and the REF current is connected to the readout module when the second switch signal is low and the third switch signal is high.

[0040] According to embodiments of this disclosure, the readout module 230 includes a capacitor, a comparator, and a digital filter.

[0041] According to embodiments of this disclosure, the readout module 230 generates a digital temperature signal based on the PTAT current or REF current in response to a comparator clock signal, including:

[0042] The capacitor charges in response to the applied PTAT current to obtain a first voltage, and discharges in response to the applied REF current to obtain a second voltage. The comparator includes a first input terminal and a second input terminal. The first input terminal receives a preset reference voltage, and the second input terminal receives either the first voltage or the second voltage. In response to a comparator clock signal, the comparator compares the preset reference voltage with the first voltage or the second voltage to generate a quantized signal. The digital filter, in response to the comparator clock signal, generates a digitized temperature signal based on the quantized signal.

[0043] According to embodiments of this disclosure, the preset reference voltage can be an adjustable voltage directly introduced from an external source or obtained based on a pull-up voltage source. Figure 2 A schematic diagram of a current-type temperature sensing device based on a dynamically allocated bias circuit according to an embodiment of the present disclosure is shown.

[0044] like Figure 2 As shown, the current-type temperature sensing device based on the dynamic bias distribution circuit 200 may include a control logic module 210, a dynamic bias distribution current generation module 220, and a readout module 230.

[0045] According to an embodiment of this disclosure, the control logic module 210 is used to generate a switch signal, a comparator clock signal, and a reset signal in response to a clock signal, wherein the clock signal is a signal generated internally by the control logic module or introduced externally.

[0046] According to embodiments of this disclosure, a dynamic bias current generation module 220 is used to generate a proportional PTAT current or a reference REF current in response to a switching signal and a comparator clock signal.

[0047] According to embodiments of the present disclosure, the readout module 230 is configured to generate a digital temperature signal based on the PTAT current or REF current in response to a switch signal and a comparator clock signal.

[0048] According to embodiments of this disclosure, the dynamic bias current generation circuit module 220 can generate a proportional PTAT current or a reference REF current based on the received switching signal and comparator clock signal. In the dynamic bias current generation circuit module 220, the circuits that generate the proportional PTAT current or the reference REF current may partially overlap, thereby saving circuit power consumption of the temperature sensing device and reducing the area of ​​the temperature sensing device.

[0049] According to embodiments of this disclosure, the readout module 230, in response to a comparator clock signal, generates a digital temperature signal by combining a proportional PTAT current and a reference REF current. The readout module obtains the digital temperature signal by combining the proportional PTAT current and the reference REF current based on the timing control of the comparator clock signal, thereby expanding the detection range of the digital detection device and improving its utilization rate.

[0050] The following is for reference. Figures 3-5 The current-type temperature sensing device based on the dynamic bias distribution circuit 200 will be further described in conjunction with specific embodiments.

[0051] Figure 3 A schematic diagram of a current-type temperature sensing device based on a dynamically allocated bias circuit according to another embodiment of the present disclosure is shown.

[0052] like Figure 3 As shown, the dynamic bias current generation module 220 includes: a combined current generation submodule and a current multiplexing submodule; the switching signals include: a first switching signal, a second switching signal and a third switching signal.

[0053] According to embodiments of this disclosure, a combined current generation submodule is configured to generate a PTAT current when the first switch signal is low and a REF current when the first switch signal is high, in response to a first switch signal. A current multiplexing submodule is configured to connect the PTAT current to the readout module when the second switch signal is high and the third switch signal is low, and to connect the REF current to the readout module when the second switch signal is low and the third switch signal is high, in response to a second switch signal and a third switch signal.

[0054] According to embodiments of this disclosure, the combined current generation submodule includes: a first current mirror group, a first switch aS1a, a first switch bS1b, a first reverse switch S1N, a first resistor, a second resistor group, a first transistor, a second transistor, a third transistor, and an operational amplifier.

[0055] One end of the first current mirror group is connected to a pull-up voltage source, and the other end includes a first output circuit, a second output circuit, a third output circuit, a fourth output circuit, and a fifth output circuit.

[0056] The first output circuit is connected to one end of the first resistor, and the other end of the first resistor is connected to the emitter of the first transistor. The base and collector of the first transistor are grounded.

[0057] The second resistor group includes a second resistor aR2a, a second resistor bR2b, and a third resistor.

[0058] The second output circuit is connected to one end of R2a, the third output circuit is connected to one end of R2b, the other ends of R2a and R2b are connected to one end of the third resistor, the other end of the third resistor is grounded, the other ends of R2a and R2b are also connected to one end of the S1N switch, the other end of S1N is connected to the emitter of the third transistor, and the base and collector of the third transistor are grounded.

[0059] The fourth output circuit is connected to the emitter of the second transistor, and the base and collector of the second transistor are grounded.

[0060] One end of the first resistor and one end of R2a are connected through S1a; one end of R2b and the emitter of the second transistor are connected through S1b.

[0061] S1a and S1b are closed or open at the same time, and the state of S1N being closed or open is the opposite of that of S1a.

[0062] The output terminal of the operational amplifier is connected to the first current mirror group, the first input terminal of the operational amplifier is connected to one end of the first resistor, one end of the first resistor is connected to the first output circuit, and the second input terminal of the operational amplifier is connected to the emitter of the second transistor.

[0063] The combined current generation submodule is used to control S1a, S1b and S1N to remain closed or open in response to the high or low level of the first switch signal, so as to generate PTAT current or REF current. The PTAT current or REF current is input to the current multiplexing module from the fifth output circuit.

[0064] According to embodiments of this disclosure, in conjunction with a Dynamic Element Matching (DEM) module, harmonic energy related to the input signal can be converted into white noise independent of the input signal by randomly selecting combinations of output voltage sources. This allows for high linearity even with significant mismatch, eliminating current errors. Adding the DEM module to the first current mirror group can stabilize the current in the first current mirror group.

[0065] According to embodiments of this disclosure, a first bias current V can also be connected to the first current mirror group. bias1 This allows the first current mirror group to start normally.

[0066] According to embodiments of this disclosure, the operational amplifier further includes a chopper circuit before the input and after the output. The chopper circuit can eliminate offset voltage and other low-frequency errors in the circuit, enabling the operational amplifier to operate stably.

[0067] According to embodiments of this disclosure, the current multiplexing submodule includes: a second switch, a third switch, a third quantization switch, a second current mirror group, a first MOSFET, and a second MOSFET.

[0068] One end of the second switch is connected to the fifth output circuit, and the other end can be selected to be connected to the second switch a interface or the second switch b interface.

[0069] One end of the third switch is connected to the b interface of the second switch, and the other end can be connected to either the a interface of the third switch or the b interface of the third switch.

[0070] One end of the third quantization switch is connected to the second switch b interface, and the other end can be selectively connected to the third quantization switch a interface or the third quantization switch b interface.

[0071] One end of the first MOSFET is connected to a pull-up voltage source, and the other end is connected to the third switch b interface.

[0072] One end of the second MOSFET is connected to the pull-up voltage source, and the other end is connected to the third quantization switch b interface.

[0073] The second current mirror group is grounded at one end, and the other end includes a first access circuit, a second access circuit and a third access circuit. The first access circuit is connected to the second switch a interface, the second access circuit is connected to the third switch a interface, and the third access circuit is connected to the third quantization switch a interface.

[0074] The current multiplexing submodule is used to control the connection state of the second switch, the third switch, and the third quantization switch in response to the second switch signal, the third switch signal, and the comparator clock signal, so that the PTAT current or REF current is connected to the capacitor to complete charging or discharging.

[0075] According to embodiments of this disclosure, adding a dynamic element matching module to the second current mirror group in conjunction with the dynamic element matching module 210 can keep the current in the second current mirror group stable.

[0076] According to embodiments of this disclosure, a second bias current V can also be connected to the first current mirror group. bias2 This allows the second current mirror group to start normally.

[0077] According to embodiments of this disclosure, the readout module 230 includes a capacitor, a comparator, and a digital filter.

[0078] The capacitor is used to charge in response to the applied PTAT current to obtain a first voltage, and also to discharge in response to the applied REF current to obtain a second voltage. The comparator includes a first input terminal and a second input terminal. The first input terminal receives a preset reference voltage, and the second input terminal receives either the first voltage or the second voltage. The comparator also compares the preset reference voltage with the first voltage or the second voltage in response to a comparator clock signal to generate a quantized signal. A digital filter is used to generate a digitized temperature signal based on the quantized signal in response to the comparator clock signal.

[0079] According to embodiments of this disclosure, the preset reference voltage can be directly provided by an external voltage source, and the preset reference voltage value can be adaptively adjusted in actual use. The preset reference voltage can also be generated internally by the device. A pull-up voltage source is connected via a voltage divider circuit, and a portion of the pull-up voltage is obtained as the preset reference voltage. The preset reference voltage can also be obtained by adding a device, but choosing an external voltage source or an internal voltage divider to obtain the preset reference voltage simplifies the circuit structure, reduces device size, and saves resources.

[0080] Figure 4 A timing diagram of a current-type temperature sensing device based on a dynamically allocated bias circuit according to an embodiment of the present disclosure is shown schematically.

[0081] like Figure 4 As shown, the dynamic bias current generation module 220, in response to a switching signal and a comparator clock signal, can generate a proportional PTAT current or a reference REF current. The switching signal may include: a first switching signal S1, a second switching signal S2, and a third switching signal S3.

[0082] like Figure 4 As shown in timing segment 4, the dynamic bias current generation module 220 generates PTAT current, and the capacitor is used to charge in response to the incoming PTAT current to obtain the first voltage. The process includes:

[0083] In the combined current generation submodule, PTAT current is generated.

[0084] According to an embodiment of this disclosure, in timing segment 4, the first switch signal controls S1a and S1b to open, and the first switch signal controls S1N to close. The second resistor group and the third transistor connected to the second and third output circuits do not participate in generating the PTAT current. The collector voltage of the first transistor in the circuit is V. BE1 The collector voltage of the second transistor is V. BE2The current density ratio flowing through the first and second transistors can be set to 1:N by adjusting the device parameters. In this embodiment, the current density ratio can be set to 1:8. Point A can be designated as the connection point between the first input terminal of the operational amplifier and one end of the first resistor, and point B can be designated as the connection point between the second input terminal of the operational amplifier and the emitter of the second transistor. Due to the negative feedback of the operational amplifier, the voltages at points A and B are the same, therefore the voltage difference across the first resistor R1 is ΔV. BE =V BE1 -V BE2 Let the current flowing through the first resistor R1 be the PTAT current, which can be expressed by the following formula (1):

[0085] I PTAT =ΔV BE / R1=V BE1 -V BE2 / R1 (1);

[0086] Among them, I PTAT For PTAT current, ΔV BE The voltage difference across the first resistor R1, V BE1 V is the voltage at point A, the connection point between the first input terminal of the operational amplifier and one end of the first resistor, under timing segment 4. BE2 R1 is the voltage at point B, the connection point between the second input terminal of the operational amplifier and the emitter of the second transistor, under timing segment 4, and R1 is the resistance value of the first resistor R1.

[0087] According to an embodiment of this disclosure, in the case of timing segment 4, the generated PTAT current value can be transformed by setting the circuit parameters in the combined current generation submodule, resulting in a generated current value of 3I. PTAT The PTAT current.

[0088] In the current multiplexing submodule, select to connect the PTAT current to the readout module 230.

[0089] According to an embodiment of this disclosure, in timing segment 4, the second switch is selected to connect to the second switch b interface, and the PTAT current is connected to the current multiplexing submodule circuit. The third switch is selected to connect to the third switch b interface, and in timing segment 4, the third quantization switch does not participate in the operation of connecting the PTAT current to the readout module 230, thereby realizing the connection of the PTAT current to the readout module 230.

[0090] In the readout module 230, the capacitor is charged in response to the incoming PTAT current to obtain a first voltage.

[0091] According to an embodiment of this disclosure, in the case of timing segment 4, a current value of 3I is used. PTAT The PTAT current charges the capacitor, the comparator obtains the first voltage across capacitor C, and compares this first voltage with a reference voltage to generate a 1-bit quantized signal bs. The reference voltage can be generated by the comparator based on the REF current.

[0092] like Figure 4 As shown in timing segment 1, in the readout module 230, after the incoming PTAT current has finished charging, the first hold timing sequence includes:

[0093] Maintain the voltage across capacitor C and prepare for the generation of REF current.

[0094] According to an embodiment of this disclosure, in the combined current generation submodule, a first switch signal controls S1a and S1b to close and a first switch signal controls S1N to open, thus preparing to generate REF current in the combined current generation submodule.

[0095] According to embodiments of this disclosure, in the current multiplexing submodule, the second switch is selected to connect to the second switch a interface, and no PTAT current is input into the current multiplexing submodule circuit. The readout module 230 has no current input or output, and the voltage across capacitor C remains constant.

[0096] like Figure 4 As shown in timing segment 2, the dynamic bias current generation module 220 generates a REF current, and the capacitor discharges in response to the incoming REF current to obtain the second voltage. The process includes:

[0097] In the combined current generation submodule, REF current is generated.

[0098] According to an embodiment of this disclosure, in the case of timing segment 2, the first switch signal controls S1a and S1b to close and the first switch signal controls S1N to open. The first resistor, the first transistor, and the third transistor connected to the first output circuit and the fourth output circuit participate in generating the PTAT current, and the second resistor group and the third transistor connected to the second output circuit and the third output circuit participate in generating the CTAT current.

[0099] According to embodiments of this disclosure, the CTAT current is a current whose magnitude is inversely proportional to the absolute temperature (thermodynamic temperature).

[0100] According to an embodiment of this disclosure, after the first switch signal controls S1a and S1b to close and the first switch signal controls S1N to open, the voltages at points A and B are the same, and the voltages at both points A and B are equal to V. BE1 Let the current flowing through the second resistor R2 be the CTAT current. The CTAT current can be expressed by the following formula (2):

[0101] I CTAT =V BE1 / (R2+Radj) (2);

[0102] Among them, I CTAT For CTAT current, V BE1 Let R1 be the voltage at point A, the connection point between the first input terminal of the operational amplifier and one end of the first resistor, and point B, the connection point between the second input terminal and the emitter of the second transistor, under timing segment 2. Let R2 be the resistance of the second resistor R2, and Radj be the voltage of the third resistor R. adj The resistance value.

[0103] According to embodiments of this disclosure, the REF current can be represented by the following equation (3):

[0104] I REF =I PTAT +I CTAT (3);

[0105] Among them, I REF This is the REF current.

[0106] According to embodiments of this disclosure, the circuit parameters in the combined current generation submodule can be set such that the resistance values ​​of R1 and R2 satisfy R2 = KR1, where K is a proportionality coefficient and K is a positive integer.

[0107] According to embodiments of this disclosure, by adjusting the proportional coefficients of resistors R1 and R2, I can be eliminated. REF The first-order temperature coefficient in the formula makes the REF current value more stable.

[0108] According to embodiments of this disclosure, in practical use, since the voltages generated by the first transistor and the second transistor have a large second-order temperature coefficient, the proportional coefficients of resistors R1 and R2 can be adjusted to make the REF current have a slight positive temperature coefficient, thereby achieving curvature compensation for the voltages generated by the first transistor and the second transistor.

[0109] According to embodiments of this disclosure, in practical use, the generated REF current value can be transformed by setting the circuit parameters in the combined current generation submodule to generate REF currents with different values ​​as actually needed.

[0110] In the current multiplexing submodule, select to connect the REF current to the readout module 230.

[0111] According to an embodiment of this disclosure, in timing segment 2, the second switch is selected to connect to the second switch a interface, allowing the REF current to be fed into the current multiplexing submodule circuit. The third switch is selected to connect to the third switch a interface, enabling the REF current to be fed into the readout module 230.

[0112] In the readout module 230, the capacitor is discharged in response to the incoming REF current to obtain a second voltage.

[0113] According to an embodiment of this disclosure, in timing segment 2, the capacitor is discharged using the REF current, the comparator obtains a second voltage on capacitor C, and compares the second voltage on capacitor C with a reference voltage to generate a 1-bit quantization signal bs. The reference voltage can be generated by the comparator based on the REF current.

[0114] According to embodiments of this disclosure, the magnitude of the discharge current of the capacitor can be controlled by a quantization signal bs generated in timing segment 2.

[0115] According to an embodiment of this disclosure, after the quantization signal bs is generated in timing segment 2, the quantization signal bs is processed by a negative feedback circuit located at the comparator output. When bs is low, the third quantization switch is controlled not to participate in the discharge operation of capacitor C, and capacitor C is discharged only through the third switch, with a discharge current of I. REF When bs is high, the third quantization switch is controlled to participate in the discharge operation of capacitor C. Capacitor C discharges through the third switch and the third quantization switch, and the discharge current is 2I. REF .

[0116] According to embodiments of this disclosure, such as Figure 4 As shown in timing segment 3, in the readout module 230, after the input REF current has finished discharging, the second holding timing includes:

[0117] Maintain the voltage across capacitor C and prepare for the generation of PTAT current.

[0118] According to an embodiment of this disclosure, in the combined current generation submodule, a first switch signal controls S1a and S1b to open and a first switch signal controls S1N to close, thus preparing to generate PTAT current in the combined current generation submodule.

[0119] According to embodiments of this disclosure, in the current multiplexing submodule, the second switch is selected to connect to the second switch a interface, and no REF current is input into the current multiplexing submodule circuit. The readout module 230 has no current input or output, and the voltage across capacitor C remains constant.

[0120] According to embodiments of this disclosure, based on Figure 4The timing diagram shows that capacitor C is periodically charged and discharged. According to the negative feedback adjustment, the charge on capacitor C is balanced. Within N oversampling periods, M high levels in bs can be obtained. The charge balance can be represented by the following equation (4):

[0121] N·3I PTAT =N·I REF +M·I REF (4);

[0122] Where N and M are positive integers, and N is greater than M.

[0123] According to embodiments of this disclosure, the number of sampling periods and the number of high-level events in the sampling periods obtained based on the quantized signal bs are input into a counter to obtain a digital signal, which can be represented by the following equation (5):

[0124]

[0125] Where X is a digital signal.

[0126] According to the embodiments of this disclosure, it can be seen from equation (5) that the only signal affected by temperature is the expression 3I representing the number of M high-level signals in bs. PTAT -I REF Therefore, the temperature signal can be set to 3I. PTAT -I REF .

[0127] Figure 5 The illustration shows a schematic diagram of the current variation range with temperature of a current-type temperature sensing device based on a dynamically allocated bias circuit according to an embodiment of the present disclosure.

[0128] like Figure 5 As shown in the figure, the horizontal axis represents the temperature detection range of the current-type temperature sensor, and the vertical axis represents the dynamic range of the ADC (Analog to Digital Converter) based on the temperature detection range of the current-type temperature sensor.

[0129] According to embodiments of this disclosure, the solid line represents the current value I of the REF current. REF It can be represented as I PTAT +I CTAT The solid line represents the temperature signal 3I. PTAT -I REF In a current-type temperature sensing device based on a dynamic bias circuit, when the temperature signal is within the temperature change range of [-55, 125], the available ADC dynamic range can reach 90% or more of the ADC dynamic range.

[0130] According to embodiments of this disclosure, such as Figure 5 The two dashed lines shown represent the dynamic range of the ADC when using PTAT and CTAT currents as temperature signals in related technologies. It can be seen that when the temperature range is [-55, 125], the usable ADC dynamic range for the temperature signal in related technologies is only about 30%.

[0131] According to embodiments of this disclosure, the current-based temperature sensing device of this disclosure uses a folded cascode amplifier as a voltage source in the dynamically allocated bias current generation module 220 to obtain PTAT current and REF current with high current rejection ratio and high current accuracy.

[0132] According to embodiments of this disclosure, a temperature signal with high ADC dynamic range utilization is obtained through the readout module 230, thereby expanding the detection range of the digital detection device and improving its utilization rate.

[0133] According to embodiments of this disclosure, by setting the circuit parameters in the combined current generation submodule, the REF current has a slight positive temperature coefficient, which can offset the influence of the curvature of the voltage generated by the first transistor and the second transistor on the temperature sensing accuracy, thereby improving the temperature sensing accuracy.

[0134] The flowcharts and block diagrams in the accompanying drawings schematically illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0135] Those skilled in the art will understand that the features described in the various embodiments and / or claims of this disclosure can be combined or combined in various ways, even if such combinations or combinations are not explicitly described in this disclosure. In particular, the features described in the various embodiments and / or claims of this disclosure can be combined or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0136] The embodiments of this disclosure have been described above. However, these embodiments are merely for illustrating the purpose, technical solutions, and beneficial effects of this disclosure, and are not intended to limit the scope of this disclosure. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. The scope of this disclosure is defined by the appended claims and their equivalents. Without departing from the scope of this disclosure, various substitutions and modifications can be made by those skilled in the art within the spirit and principles of this disclosure, and all such substitutions and modifications should fall within the protection scope of this disclosure.

Claims

1. A current-type temperature sensing method based on a dynamically allocated bias circuit, wherein the current-type temperature sensing circuit includes a control logic module, a dynamically allocated bias current generation module, and a readout module; the method includes: Using the control logic module, in response to the clock signal, a switch signal, a comparator clock signal, and a reset signal are generated, wherein the clock signal is a signal generated internally by the control logic module or introduced externally. The dynamic bias current generation module generates a proportional PTAT current or a reference REF current in response to the switching signal and the comparator clock signal. as well as Using the readout module, in response to the comparator clock signal, a digital temperature signal is generated based on the PTAT current or REF current; The dynamic bias current generation module includes a combined current generation submodule; the combined current generation submodule includes a first current mirror group, a first switch a, a first switch b, a first reverse switch, a first resistor, a second resistor group, a first transistor, a second transistor, a third transistor, and an operational amplifier; one end of the first current mirror group is connected to a pull-up voltage source, and the other end includes a first output circuit, a second output circuit, a third output circuit, a fourth output circuit, and a fifth output circuit; the first output circuit is connected to one end of the first resistor, the other end of the first resistor is connected to the emitter of the first transistor, and the base and collector of the first transistor are grounded; the second resistor group includes a second resistor a, a second resistor b, and a third resistor; the second output circuit is connected to one end of the second resistor a, the third output circuit is connected to one end of the second resistor b, and the other ends of the second resistor a and the second resistor b are jointly connected to one end of the third resistor, and the other end of the third resistor... The first resistor is grounded, and the other end of the second resistor a and the other end of the second resistor b are also connected to one end of the first reverse switch. The other end of the first reverse switch is connected to the emitter of the third transistor, and the base and collector of the third transistor are grounded. The fourth output circuit is connected to the emitter of the second transistor, and the base and collector of the second transistor are grounded. One end of the first resistor and one end of the second resistor a are connected through the first switch a. One end of the second resistor b and the emitter of the second transistor are connected through the first switch b. The first switch a and the first switch b are closed or open at the same time, and the closed or open state of the first reverse switch is opposite to that of the first switch a. The output terminal of the operational amplifier is connected to the first current mirror group. The first input terminal of the operational amplifier is connected to one end of the first resistor, and one end of the first resistor is connected to the first output circuit. The second input terminal of the operational amplifier is connected to the emitter of the second transistor.

2. The temperature sensing method as described in claim 1, wherein, The dynamic bias current generation module further includes a current multiplexing submodule; the switching signals include a first switching signal, a second switching signal, and a third switching signal. The submodule for generating a dynamically allocated bias current, in response to the switching signal and the comparator clock signal, generates a proportional PTAT current or REF current, including: Using the combined current generation module, a PTAT current is generated when the first switch signal is low, and a REF current is generated when the first switch signal is high, according to the first switch signal. Using the current multiplexing submodule, based on the second switch signal and the third switch signal, the PTAT current is connected to the readout module when the second switch signal is high and the third switch signal is low, and the REF current is connected to the readout module when the second switch signal is low and the third switch signal is high.

3. The temperature sensing method as described in claim 2, wherein, The readout module includes: a capacitor, a comparator, and a digital filter; The step of generating a digital temperature signal based on the PTAT current or REF current using a readout module in response to the comparator clock signal includes: The capacitor charges in response to the incoming PTAT current to obtain a first voltage, and discharges in response to the incoming REF current to obtain a second voltage; The comparator includes a first input terminal and a second input terminal. The first input terminal receives a preset reference voltage, and the second input terminal receives either the first voltage or the second voltage. In response to the comparator clock signal, the preset reference voltage is compared with the first voltage or the second voltage to generate a quantized signal. The digital filter responds to the comparator clock signal and generates the digitized temperature signal based on the quantization signal.

4. A current-type temperature sensing device based on a dynamically allocated bias circuit, comprising: The control logic module is used to generate a switch signal, a comparator clock signal, and a reset signal in response to a clock signal, wherein the clock signal is a signal generated internally by the control logic module or introduced externally. A dynamic bias current generation module is used to generate a proportional PTAT current or a reference REF current in response to a switching signal and a comparator clock signal. as well as The readout module is used to generate a digital temperature signal based on the PTAT current or REF current in response to the switch signal and the comparator clock signal. The dynamic bias current generation module includes a combined current generation submodule; the combined current generation submodule includes a first current mirror group, a first switch a, a first switch b, a first reverse switch, a first resistor, a second resistor group, a first transistor, a second transistor, a third transistor, and an operational amplifier; One end of the first current mirror group is connected to a pull-up voltage source, and the other end includes a first output circuit, a second output circuit, a third output circuit, a fourth output circuit, and a fifth output circuit. The first output circuit is connected to one end of the first resistor, the other end of the first resistor is connected to the emitter of the first transistor, and the base and collector of the first transistor are grounded. The second resistor group includes a second resistor a, a second resistor b, and a third resistor; The second output circuit is connected to one end of the second resistor a, the third output circuit is connected to one end of the second resistor b, the other end of the second resistor a and the other end of the second resistor b are connected together to one end of the third resistor, the other end of the third resistor is grounded, the other end of the second resistor a and the other end of the second resistor b are also connected together to one end of the first reverse switch, the other end of the first reverse switch is connected to the emitter of the third transistor, and the base and collector of the third transistor are grounded. The fourth output circuit is connected to the emitter of the second transistor, and the base and collector of the second transistor are grounded. One end of the first resistor and one end of the second resistor a are connected by a first switch a; one end of the second resistor b and the emitter of the second transistor are connected by a first switch b. The first switch a and the first switch b are simultaneously closed or open, and the state of the first reverse switch being closed or open is opposite to that of the first switch a. The output terminal of the operational amplifier is connected to the first current mirror group, the first input terminal of the operational amplifier is connected to one end of the first resistor, one end of the first resistor is connected to the first output circuit, and the second input terminal of the operational amplifier is connected to the emitter of the second transistor.

5. The temperature sensing device as described in claim 4, wherein, The dynamic bias current generation module further includes a current multiplexing submodule; the switching signals include a first switching signal, a second switching signal, and a third switching signal. The combined current generation submodule is configured to generate a PTAT current when the first switch signal is low and a REF current in response to the first switch signal. The current multiplexing submodule is configured to respond to the second switch signal and the third switch signal by connecting the PTAT current to the readout module when the second switch signal is high and the third switch signal is low, and by connecting the REF current to the readout module when the second switch signal is low and the third switch signal is high.

6. The temperature sensing device as claimed in claim 5, wherein, The readout module includes: a capacitor, a comparator, and a digital filter; The capacitor is used to charge in response to the incoming PTAT current to obtain a first voltage, and is also used to discharge in response to the incoming REF current to obtain a second voltage; The comparator includes a first input terminal and a second input terminal. The first input terminal is used to receive a preset reference voltage, and the second input terminal is used to receive either the first voltage or the second voltage. The comparator is also used to compare the preset reference voltage with the first voltage or the second voltage in response to a comparator clock signal, generating a quantized signal. The digital filter is used to generate the digitized temperature signal in response to the comparator clock signal, based on the quantization signal.

7. The temperature sensing device as claimed in claim 6, wherein the combined current generation submodule is used to control the first switch a, the first switch b and the first reverse switch to remain closed or open in response to the high level or low level of the first switch signal, so as to generate PTAT current or REF current, wherein the PTAT current or REF current is input to the current multiplexing module from the fifth output circuit.

8. The temperature sensing device as claimed in claim 7, wherein, The current multiplexing submodule includes: a second switch, a third switch, a third quantization switch, a second current mirror group, a first MOSFET, and a second MOSFET; One end of the second switch is connected to the fifth output circuit, and the other end can be selectively connected to the second switch a interface or the second switch b interface; One end of the third switch is connected to the b interface of the second switch, and the other end can be selectively connected to the a interface of the third switch or the b interface of the third switch. One end of the third quantization switch is connected to the second switch b interface, and the other end can be selectively connected to the third quantization switch a interface or the third quantization switch b interface. One end of the first MOSFET is connected to the pull-up voltage source, and the other end is connected to the interface of the third switch b. One end of the second MOSFET is connected to the pull-up voltage source, and the other end is connected to the interface of the third quantization switch b. The second current mirror assembly has one end grounded, and the other end includes a first access circuit, a second access circuit, and a third access circuit. The first access circuit is connected to the second switch a interface, the second access circuit is connected to the third switch a interface, and the third access circuit is connected to the third quantization switch a interface; and The current multiplexing submodule is used to control the connection state of the second switch, the third switch, and the third quantization switch in response to the second switch signal, the third switch signal, and the comparator clock signal, so that the PTAT current or REF current is connected to the capacitor to complete charging or discharging.

9. The temperature sensing device as claimed in claim 8, wherein, The first current mirror group and the third current mirror group also include: In conjunction with the dynamic element matching module, it is used to keep the current in the first current mirror group and the third current mirror group stable.

10. The temperature sensing device as claimed in claim 9, wherein, The operational amplifier also includes the following components before its input and after its output: A chopper circuit is used to eliminate offset voltage and other low-frequency errors in a circuit.

Images