Circuit board
By employing a multi-layer structure design in the vias of the circuit board, the problems of uneven plating and pitting in large-area vias are solved, achieving stable plating of the vias and improving the high reliability and heat dissipation performance of the circuit board.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- LG INNOTEK CO LTD
- Filing Date
- 2021-01-15
- Publication Date
- 2026-04-14
AI Technical Summary
Existing technologies are prone to pitting when manufacturing large-area vias, resulting in uneven plating and reduced circuit board reliability. Furthermore, the plating methods have design limitations, making it difficult to achieve high reliability and uniformity.
The design employs a multi-layer through-hole structure. By setting a first through-hole section and a second through-hole section in the through-hole, conductive material is filled in different areas of the insulating layer. By utilizing different surface roughness and shape designs, the uniformity and reliability of the plating are ensured.
Stable plating of large-diameter vias was achieved, improving the heat dissipation performance and signal transmission shielding effect of the circuit board, and enhancing the overall reliability and design freedom of the circuit board.
Smart Images

Figure CN115245057B_ABST
Abstract
Description
Technical Field
[0001] The embodiment relates to a circuit board. Background Technology
[0002] With the accelerated miniaturization, weight reduction, and integration of electronic components, the linewidth of circuits has been miniaturized. In particular, as semiconductor chip design rules are integrated at the nanometer scale, the linewidth of the packaging substrate or printed circuit board on which semiconductor chips are mounted has been miniaturized to a few micrometers or smaller.
[0003] Various methods have been proposed to improve the circuit integration density of printed circuit boards, i.e., to reduce circuit linewidth. To prevent the loss of circuit linewidth during the etching step that forms patterns after copper plating, the semi-additive process (SAP) method and the improved semi-additive process (MSAP) have been proposed.
[0004] Then, the embedded trace substrate (hereinafter referred to as "ETS") method has been used in industry to embed copper foil in an insulating layer to achieve fine circuit patterns. In the ETS method, instead of forming copper foil circuits on the surface of the insulating layer, the copper foil circuits are manufactured by embedding them in the insulating layer. Therefore, there is no circuit loss due to etching, and it is beneficial to miniaturize the circuit spacing.
[0005] Meanwhile, efforts have recently been made to develop improved 5G (5th generation) communication systems or pre-5G communication systems to meet the demands of wireless data services. Here, 5G communication systems use ultra-high frequency (mmWave) bands (below 6 GHz, 28 GHz, 38 GHz or higher) to achieve high data transmission rates.
[0006] Furthermore, to reduce path loss and increase transmission distance of radio waves in the ultra-high frequency band, 5G communication systems have developed technologies such as beamforming, massive MIMO, and integrated array antennas. Considering that these systems may consist of hundreds of active antennas spanning wavelengths within the frequency band, the antenna system becomes relatively large.
[0007] Since these antennas and AP modules are patterned or mounted on printed circuit boards, low loss on the printed circuit board is crucial. This means that the multiple substrates that make up the active antenna system—the antenna substrate, antenna feed substrate, transceiver substrate, and baseband substrate—should be integrated into a compact unit.
[0008] Meanwhile, recently, circuit boards incorporating large-area vias have been developed to improve heat dissipation or shielding properties. Large-area vias can be formed by filling large-diameter vias with metal. However, filling large-diameter vias with metal is not easy. Therefore, conventional large-area vias consist of a recessed area on a surface along the via direction. Furthermore, the recessed area may affect via fabrication during additional lamination, thus impacting the reliability of the circuit board. Summary of the Invention
[0009] Technical issues
[0010] The embodiment provides a circuit board including a via with a novel structure and a method for manufacturing the same.
[0011] Furthermore, the embodiments provide a circuit board including a via and a method for manufacturing the same, wherein the via has multiple via portions disposed in a multilayer structure within the via.
[0012] The technical problems to be solved by the proposed embodiments are not limited to those described above. Other technical problems not mentioned can be clearly understood by those skilled in the art through the following description of the proposed embodiments.
[0013] Technical solution
[0014] The circuit board according to an embodiment includes: an insulating layer, the insulating layer including a first through-hole; a first via disposed in the first through-hole of the insulating layer; wherein the first via includes: a first via portion disposed in a first region of the first through-hole; and a second via portion disposed in a second region of the first through-hole other than the first region, wherein the second region is a central region of the first through-hole, and the first region is an outer region surrounding the second region, wherein the first via portion and the second via portion include: a first surface in contact with each other; and a second surface exposed on the insulating layer other than the first surface, wherein the first surface has a first surface roughness; and wherein the second surface has a second surface roughness different from the first surface roughness.
[0015] Furthermore, the first surface roughness is less than the second surface roughness.
[0016] Furthermore, each of the first through-hole portion and the second through-hole portion includes: a first portion disposed in the first through-hole; and a second portion protruding on the upper surface of the insulating layer on the first portion, wherein the first surface includes the interface between the first portion of the first through-hole portion and the first portion of the second through-hole portion, and wherein the second surface includes the upper surface of the second portion of the first through-hole portion and the upper surface of the second portion of the second through-hole portion.
[0017] Furthermore, the height of the first surface decreases from the edge towards the center.
[0018] Furthermore, the distance from the upper surface of the second portion of the first through hole to the lowest point of the upper surface of the first portion of the first through hole corresponds to 30% to 70% of the thickness of the first through hole.
[0019] Furthermore, the distance from the upper surface of the second portion of the second through hole to the lowest point of the lower surface of the first portion of the second through hole corresponds to 30% to 70% of the thickness of the first through hole.
[0020] Furthermore, the upper surface of the first through hole and the upper surface of the second through hole are located on the same plane.
[0021] In addition, the circuit board also includes: a first pad disposed on the lower surface of the insulating layer and exposed through a first through hole, wherein a first portion of the first through hole is disposed on the first pad exposed through the first through hole, and wherein a first portion of the second through hole is disposed on the first portion of the first through hole.
[0022] In addition, the insulating layer includes a first insulating layer and a second insulating layer located on the first insulating layer, wherein the first through-hole passes through both the first insulating layer and the second insulating layer.
[0023] In addition, the circuit board also includes: a second via, disposed in a second through-hole formed through the first insulating layer or the second insulating layer, wherein the size of the second via is smaller than the size of the first via, and wherein a single portion of the second via is disposed in the second through-hole.
[0024] In addition, the second through-hole portion includes: a first sub-second through-hole portion, which contacts and fills a portion of the second region of the first through-hole; and a second sub-second through-hole portion, which contacts and fills the remaining portion of the second region of the first through-hole.
[0025] On the other hand, the circuit board according to the embodiment includes: a plurality of insulating layers; a first via disposed in a first through-hole that passes through the plurality of insulating layers; a second via disposed in a second through-hole that passes through any one of the plurality of insulating layers; a first pad disposed on the lower surface of the lowest layer of the plurality of insulating layers and connected to the first via; and a second pad disposed on the lower surface of the lowest layer and connected to the second via, wherein the first via includes a first via portion and a second via portion, the first via portion and the second via portion are disposed in the first through-hole and separated from each other by an interface, wherein the second via is disposed in a single portion in the second through-hole, and wherein the size of the first via is larger than the size of the second via.
[0026] Furthermore, the first through-hole portion and the second through-hole portion include a first surface that contacts the other through-hole portion and a second surface that, in addition to the first surface, is exposed on the uppermost surface of the uppermost layer of a plurality of insulating layers, wherein the first surface has a first surface roughness and the second surface has a second surface roughness greater than the first surface roughness.
[0027] Furthermore, each of the first through-hole portion and the second through-hole portion includes: a first portion disposed in the first through-hole; and a second portion protruding on the upper surface of the insulating layer on the first portion; wherein the first surface includes the interface between the first portion of the first through-hole portion and the first portion of the second through-hole portion, and wherein the second surface includes the upper surface of the second portion of the first through-hole portion and the upper surface of the second portion of the second through-hole portion, and wherein the height of the first surface decreases from the edge to the center.
[0028] Furthermore, the distance from the upper surface of the second portion of the first through hole to the lowest point of the upper surface of the first portion of the first through hole corresponds to 30% to 70% of the thickness of the first through hole, and the distance from the upper surface of the second portion of the second through hole to the lowest point of the lower surface of the first portion of the second through hole corresponds to 30% to 70% of the thickness of the first through hole.
[0029] On the other hand, a method for manufacturing a circuit board according to an embodiment includes: preparing an insulating layer and forming a first pad on the lower surface of the insulating layer; forming a first through-hole in the insulating layer that exposes the upper surface of the first pad; providing a first mask on the upper surface of the insulating layer, the first mask having a first opening that exposes the first through-hole and a portion extending from the first through-hole on the upper surface of the insulating layer; forming a first via portion that fills a portion of the first through-hole by performing a plating process on the upper surface of the first insulating layer and the first through-hole exposed through the first opening of the first mask; performing a first grinding on the upper surface of the first via portion; forming a second mask having a second opening that exposes a portion of the first opening on the first mask, the width of the second opening being smaller than the width of the first opening; forming a second via portion that fills the first through-hole on the first via portion exposed through the second opening of the second mask; removing the second mask; performing a second grinding on the upper surface of the second via portion; removing a third mask; and performing a third grinding on the upper surface of the first via portion and the upper surface of the second via portion to form a first via portion that fills the first through-hole.
[0030] Furthermore, the first through-hole portion and the second through-hole portion include a first surface that contacts the other through-hole portion and a second surface that, in addition to the first surface, is exposed on the uppermost surface of the uppermost layer of a plurality of insulating layers, wherein the first surface has a first surface roughness and the second surface has a second surface roughness greater than the first surface roughness.
[0031] Furthermore, each of the first through-hole portion and the second through-hole portion includes: a first portion disposed in the first through-hole; and a second portion protruding on the upper surface of the insulating layer on the first portion; wherein the first surface includes the interface between the first portion of the first through-hole portion and the first portion of the second through-hole portion; and wherein the second surface includes the upper surface of the second portion of the first through-hole portion and the upper surface of the second portion of the second through-hole portion, and wherein the height of the first surface decreases from the edge to the center.
[0032] Furthermore, the distance from the upper surface of the second portion of the first through hole to the lowest point of the upper surface of the first portion of the first through hole corresponds to 30% to 70% of the thickness of the first through hole, and the distance from the upper surface of the second portion of the second through hole to the lowest point of the lower surface of the first portion of the second through hole corresponds to 30% to 70% of the thickness of the first through hole.
[0033] Furthermore, forming the second through-hole portion includes: forming a first sub-second through-hole portion that fills a portion of the first through-hole on the first through-hole portion; and forming a second sub-second through-hole portion that fills the first through-hole on the first sub-second through-hole portion.
[0034] Furthermore, the preparation of the insulating layer includes: preparing a first insulating layer and a second insulating layer disposed on the first insulating layer; forming a second pad spaced apart from the first pad on the upper surface of the first insulating layer when forming the first pad; forming a second through-hole that passes through the second insulating layer and exposes the second pad when forming the first through-hole; wherein setting the first mask includes: setting a first mask having a third opening that exposes the second through-hole; and forming a second through-hole that fills the second through-hole exposed through the third opening when forming the first through-hole portion; grinding the upper surface of the second through-hole and the upper surface of the first through-hole portion during a single grinding cycle; wherein the second mask is formed to cover the upper surface of the second through-hole; and wherein the three grinding cycles include grinding the upper surface of the second through-hole and the upper surface of the first through-hole portion and the upper surface of the second through-hole portion.
[0035] Beneficial effects
[0036] According to the embodiments, there are limitations to the plating of large-diameter vias in the case of conventional large-area vias. However, the embodiments can overcome these limitations by changing the plating method, thereby achieving stable plating of large-diameter vias. Furthermore, according to the embodiments, compared to conventional methods, the uniformity of via plating can be ensured, and quality reliability can be ensured by improving laser quality after additional lamination.
[0037] Furthermore, in existing technologies, there are limitations to the methods for consistently achieving plating within vias, considering the thickness of the insulating layer and the size of the via. According to this embodiment, design limitations can be overcome to achieve a highly reliable plating state within the via, thus increasing design freedom. Additionally, this embodiment can completely shield interference between circuits in densely circuit areas by increasing the via size, and can improve heat dissipation characteristics in areas requiring heat dissipation.
[0038] Specifically, in the comparative example, the heat dissipation function is performed using multiple heat dissipation vias spaced at predetermined intervals in the horizontal direction. In this embodiment, a single large-area via is used to perform the heat dissipation function, ensuring the uniformity of its plating. Furthermore, due to the increased area of the via, the heat dissipation performance is improved compared to the comparative example. Attached Figure Description
[0039] Figure 1 The structure of a conventional stacked via in the first comparative example is shown.
[0040] Figure 2 The structure of the rod-shaped through-hole in the second comparative example is shown.
[0041] Figure 3 The structure of the pyramid-shaped through-hole in the third comparative example is shown.
[0042] Figure 4 A via formed by a comparative example is shown.
[0043] Figure 5 This is a diagram showing a circuit board according to the first embodiment.
[0044] Figure 6a yes Figure 5 Enlarged view of the first through hole.
[0045] Figure 6b yes Figure 5 Plan view of the first through hole.
[0046] Figure 7 and Figure 8 This is a diagram showing the surface roughness of the first through-hole according to an embodiment.
[0047] Figures 9 to 18 This is a diagram illustrating the manufacturing method of the circuit board according to the first embodiment, following the process sequence.
[0048] Figure 19 This is a diagram showing a circuit board according to the second embodiment.
[0049] Figure 20a It is used for explanation Figure 19 A diagram showing the interfaces of the various parts of the first through-hole.
[0050] Figure 20b yes Figure 19 The diagram shows a plan view of the first through hole.
[0051] Figures 21 to 24 The diagram illustrates the manufacturing method of the circuit board according to the second embodiment in the order of process steps. Detailed Implementation
[0052] In the following description, the embodiments disclosed herein will be described in detail with reference to the accompanying drawings. However, regardless of the reference numerals, identical or similar components will be indicated by the same reference numerals, and repeated descriptions will be omitted. The component suffixes “module” and “part” used in the following description are given or combined only for ease of creating the specification, and they have no distinguishing meaning or function in themselves. Furthermore, in describing the embodiments disclosed herein, detailed descriptions of relevant prior art will be omitted when it is determined that such detailed descriptions unnecessarily obscure the spirit of the embodiments disclosed herein. Moreover, the drawings are only for the purpose of facilitating understanding of the embodiments disclosed herein, and the scope of the technology disclosed herein is not limited by the drawings; it should be understood to include all modifications, equivalents, and substitutions falling within the spirit and scope of the invention.
[0053] It should be understood that although the terms "first," "second," etc., may be used in this document to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.
[0054] It should be understood that when an element is described as "connected" or "in contact" with another element, it can be directly connected to or combined with the other element, or there may be an intermediate element. Conversely, when an element is described as "directly connected" or "directly in contact" with another element, there is no intermediate element. Other terms used to describe the relationship between elements should be interpreted in a similar way (i.e., "between" vs. "directly between", "adjacent" vs. "directly adjacent", etc.).
[0055] As used in this article, the singular forms “a,” “one,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.
[0056] It will be further understood that the terms “comprising” and / or “including”, when used herein, specify the presence of the said feature, integer, step, operation, element, and / or component, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or combinations thereof.
[0057] In the following, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0058] Before describing this embodiment, a comparative example will be described.
[0059] Figures 1 to 3 This is a cross-sectional view of the via structure of the circuit board used to illustrate the comparative example. Figure 1 The structure of the conventional stacked vias in the first comparative example is shown. Figure 2 The structure of the rod-shaped via in the second comparative example is shown. Figure 3 The structure of the pyramid-shaped through-hole in the third comparative example is shown.
[0060] Reference Figure 1 The circuit board includes multiple interconnected insulating layers 1, inner pads 2 formed between different insulating layers, outer pads 3 formed on the surfaces of the uppermost and lowermost insulating layers, and multiple vias formed in the multiple insulating layers 1.
[0061] The plurality of vias in the first comparative example include a first via 4, a second via 5, a third via 6, and a fourth via 7, which are spaced apart from each other at regular intervals. The first via 4, the second via 5, the third via 6, and the fourth via 7 are connected to the inner layer pad 2 and the outer layer pad 3, respectively.
[0062] Reference Figure 2 The circuit board in the second comparative example includes multiple interconnected insulating layers 11, inner pads 12 formed between different insulating layers, outer pads 13 formed on the surfaces of the uppermost and lowermost insulating layers, and vias 14 formed in the multiple insulating layers 11 respectively.
[0063] The via 14 is formed to have a wider width than a conventional via. For example, the via 14 may have a width greater than that of a conventional via. Figure 1 The width is the sum of the widths of the first to fourth through holes 4, 5, 6 and 7 shown.
[0064] like Figure 2 As shown in the lower part, the aforementioned through hole 14 has a shape corresponding to the through hole by plating a metal material on the inner side of the cylindrical through hole with a relatively wide left and right width.
[0065] Reference Figure 3 The circuit board in the third comparative example includes multiple insulating layers 21 interconnected, inner pads 22 formed between different insulating layers, outer pads 23 formed on the surfaces of the uppermost and lowermost insulating layers, and vias 24 formed in the multiple insulating layers 21 respectively.
[0066] In this configuration, the vias 24 formed in each insulating layer 21 have different widths. For example, a via formed in the central insulating layer has a first width, a via with a second width wider than the first width is formed from the central insulating layer toward the upper insulating layer, and as described above, a via with a third width wider than the first width is formed from the central insulating layer toward the lower insulating layer. In this case, the third width is wider than the second width.
[0067] However, as in the comparative example, rod-shaped or pyramid-shaped vias have a relatively large volume and a long shape compared to ordinary stacked vias, making them highly likely to develop pits during the plating process.
[0068] Figure 4 A via formed by a comparative example is shown.
[0069] Reference Figure 4 The via can have a concave shape D where the height of the central region is lower than the height of the edge region, and this concave shape is called the pit phenomenon.
[0070] Therefore, in the comparative example, the area of the via is limited to minimize the pitting phenomenon described above. That is, in the comparative example, the size of the via is limited to an area that does not cause pitting, thus becoming a factor that degrades the heat dissipation characteristics of the via.
[0071] In particular, when the via size is machined to have a diameter of 100 μm or more, the via filling plating cannot be performed smoothly, resulting in the recessed pit region D as described above.
[0072] For example, in a comparative example, when the diameter of the via exceeds 100 μm, the via filling plating cannot be performed smoothly, resulting in a recessed area D that is recessed in the downward direction appearing on the upper surface of the via.
[0073] In addition, when the depth of the pit area D is greater than 10μm, it is judged to be defective and cannot be used, or when additional lamination is performed after forming the core layer of the circuit board, there is a problem that the processing of the vias in the corresponding area is not smooth.
[0074] Meanwhile, in recent years, in order to improve the heat dissipation, shielding, and signal transmission performance of vias, the size of vias has been greatly increased, and therefore the size of vias or conductive vias is also increasing. In the embodiments, as described above, even large-area vias of 10μm or more can be uniformly plated over the entire area of the via. Therefore, the object of the present invention is to provide a circuit board with a novel structure capable of removing the pit area of the via and a method for manufacturing the same.
[0075] Figure 5 This is a diagram showing a circuit board according to the first embodiment. Figure 6a yes Figure 5 Enlarged view of the first through hole in the middle. Figure 6b yes Figure 5 Plan view of the first through hole.
[0076] Reference Figure 5 , Figure 6a and Figure 6b The circuit board may include an insulating layer 110, a first pad 140 and a second pad 120 disposed on the surface of the insulating layer 110, and a first via 170 and a second via 130 disposed through the insulating layer 110.
[0077] In the above description, the first pad 140 can directly contact the first via 170, and therefore can be part of the circuit pattern connected to the first via 170. Similarly, the second pad 120 can contact the second via 130, and therefore can be part of the circuit pattern connected to the second via 130. In this case, the first via 170 can have a first cross-sectional area, and the second via 130 can have a second cross-sectional area smaller than the first cross-sectional area. For example, the first via 170 can be a heat dissipation via with heat dissipation function, and the second via 130 can be a signal via with signal transmission function, but is not limited thereto. Preferably, the first via 170 and the second via 130 have different cross-sectional areas, and therefore, the first via 170 and the second via 130 can have different shapes. Here, the different shapes do not refer to the overall shape of the first via 170 and the overall shape of the second via 130, but rather to the fact that the shape of each via portion constituting the first via 170 is different from the shape of the via portion constituting the second via 130.
[0078] This will be described in detail.
[0079] The circuit board includes an insulating layer 110. Preferably, the circuit board includes multiple insulating layers. For example, the circuit board may include a first insulating layer 111, a second insulating layer 112, a third insulating layer 113, and a fourth insulating layer 114, but is not limited thereto. For example, the circuit board may have fewer than four layers, or it may have more than four layers. However, the circuit board may include at least two insulating layers.
[0080] The insulating layer 110 may have a flat plate structure. The insulating layer 110 may be a printed circuit board (PCB). Here, the insulating layer 110 may be implemented as a multilayer substrate, wherein multiple insulating layers are continuously stacked as described above.
[0081] Furthermore, circuit patterns can be disposed on the surface of insulating layer 110. For example, circuit patterns can be disposed on each surface of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114. In this case, the circuit pattern may include via pads connected to vias, connection pads connected to an external substrate, mounting pads on which electronic components are mounted, and traces serving as signal transmission lines between pads. Furthermore, in the embodiments... Figure 5 A portion of the via pad can be shown as being connected to a via in a circuit pattern disposed on the surface of the insulating layer 110.
[0082] The insulating layer 110 is a substrate on which electronic circuitry capable of altering wiring is formed, and may include all of the following: a printed circuit board and an insulating substrate made of an insulating material capable of forming circuit patterns on the surface of the insulating layer.
[0083] At least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may include a prepreg containing glass fibers. More specifically, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may include an epoxy resin and a material in which glass fibers and silica fillers are dispersed.
[0084] Furthermore, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may be rigid or flexible. For example, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may comprise glass or plastic. More specifically, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may comprise chemically strengthened / semi-tempered glass (e.g., soda-lime glass or aluminosilicate glass), or reinforced or flexible plastic (e.g., polyimide (PI), polyethylene terephthalate (PET), propylene glycol (PPG), and polycarbonate (PC)), or sapphire.
[0085] Furthermore, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may include an optically isotropic film. For example, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may include COC (cyclic olefin copolymer), COP (cyclic olefin polymer), optically isotropic polycarbonate (polycarbonate, PC), or optically isotropic polymethyl methacrylate (PMMA).
[0086] Furthermore, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 can be bent and have a partially curved surface. That is, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 can be bent and have both a partially flat surface and a partially curved surface. In detail, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 can have a curved end while having a curved surface, or can have a surface including a random curvature and can be bent or folded.
[0087] Furthermore, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may be a flexible substrate with flexible properties.
[0088] Furthermore, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may be a bent or folded substrate.
[0089] The first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may each have a thickness of 20 μm to 500 μm. Preferably, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may have a thickness between 40 μm and 400 μm. More preferably, at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 may have a thickness between 60 μm and 250 μm. When the thickness of at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 is less than 20 μm, it may be difficult to form a circuit pattern on the surface of the insulating layer. When the thickness of at least one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114 exceeds 500 μm, the overall thickness of the circuit board increases.
[0090] The circuit pattern can be disposed on the surfaces of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114. For example, a first pad 140 and a second pad 120 can be disposed. The first pad 140 and the second pad 120 can be part of the circuit pattern and can refer to the portion of the circuit pattern disposed substantially on the surface of each insulating layer that is connected to the via.
[0091] The first pad 140 and the second pad 120 can be patterns for transmitting electrical signals or patterns formed differently for heat dissipation, and can be patterns for transmitting heat.
[0092] Therefore, at least one of the first pad 140 and the second pad 120 may be formed of at least one metallic material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu) and zinc (Zn).
[0093] Furthermore, at least one of the first pad 140 and the second pad 120 may be formed from a paste or solder paste comprising at least one metallic material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn), which have excellent bonding strength. Preferably, at least one of the first pad 140 and the second pad 120 may be formed from copper (Cu), which has high conductivity and a relatively low price.
[0094] The first pad 140 and the second pad 120 can be formed using additive processes, subtractive processes, modified semi-additive processes (MSAP), and semi-additive processes (SAP), which are typical circuit board manufacturing processes. Detailed descriptions of these processes will be omitted here.
[0095] The first pad 140 can be disposed on the surface of any one of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114. In other words, the first pad 140 can be connected to a large-area first via 170 that passes through multiple insulating layers. Therefore, the first pad 140 can be disposed on the surface of a specific insulating layer located in the center of the multiple insulating layers. For example, as... Figure 5 As shown, the first pad 140 may be disposed on the lower surface of the first insulating layer 111, but is not limited thereto. However, the first pad 140 is disposed at the interface between multiple insulating layers, so one end may be connected to a first via 170 disposed on the first pad 140, and the other end may be connected to another first via 170 disposed below the first pad 140.
[0096] The first pad 140 may have a first cross-sectional area. Preferably, the first pad 140 may have a first cross-sectional area that is larger than the upper or lower cross-sectional area of the first via 170.
[0097] The second pad 120 can be respectively disposed on the surfaces of the first insulating layer 111, the second insulating layer 112, the third insulating layer 113, and the fourth insulating layer 114. In other words, the second pad 120 can be connected to the second via 130 of normal size passing through each insulating layer. Therefore, the second pad 120 can be disposed on each surface of the multiple insulating layers.
[0098] The second pad 120 may have a second cross-sectional area. Preferably, the second pad 120 may have a second cross-sectional area larger than the upper or lower cross-sectional area of the second via 130. In this case, the second cross-sectional area of the second pad 120 may be smaller than the first cross-sectional area of the first pad 140. That is, the size of the second pad 120 may be smaller than the size of the first pad 140.
[0099] The first pad 140 and the second pad 120 can have a thickness ranging from 5 μm to 50 μm. For example, the first pad 140 and the second pad 120 can have a thickness ranging from 10 μm to 40 μm. For example, the first pad 140 and the second pad 120 can have a thickness ranging from 15 μm to 35 μm. When the thickness of the first pad 140 and the second pad 120 is less than 5 μm, it may be difficult to form them. Furthermore, when the thickness of the first pad 140 and the second pad 120 exceeds 50 μm, the overall thickness of the circuit board increases. Additionally, when the thickness of the first pad 140 and the second pad 120 exceeds the range of 5 μm to 50 μm, signal loss may occur during signal transmission.
[0100] The first via 170 and the second via 130 can be configured to pass through the insulating layer 110. In this case, the portions constituting the first via 170 and the second via 130 can have different shapes. This may occur because the dimensions of the first via 170 and the second via 130 are different from each other.
[0101] Preferably, the size of the first via 170 can be larger than the size of the second via 130. For example, the diameter of the first via 170 can be greater than 100 μm. Furthermore, the diameter of the second via 130 can be less than 100 μm. For example, the diameter of the first via 170 in the first direction can be greater than 500 μm. For example, the diameter of the first via 170 in the first direction can be greater than 1000 μm. For example, the diameter of the first via 170 in the first direction can be greater than 2000 μm. For example, the diameter of the first via 170 in the first direction can be greater than 2500 μm. For example, the diameter of the first via 170 in the second direction can be greater than 500 μm. For example, the diameter of the first via 170 in the second direction can be greater than 1000 μm. For example, the diameter of the first via 170 in the second direction can be greater than 2000 μm. For example, the diameter of the first via 170 in the first direction can be greater than 2500 μm.
[0102] In this case, the diameter of the first through hole 170 in the first direction can be the same as the diameter of the first through hole 170 in the second direction, but is not limited to this. That is, the diameter of the first through hole 170 in the first direction and the diameter in the second direction can be different from each other.
[0103] The second via 130 may be a signal transmission via included in a conventional circuit board, and therefore its detailed description will be omitted.
[0104] However, in the embodiments, the second via 130 can be formed together with the first via 170. In this case, the first via 170 includes multiple via portions formed by multiple processes, but the second via 130 includes a single portion.
[0105] The first via 170 and the second via 130 can be formed by filling the interior of a via (not shown) that penetrates at least one of a plurality of insulating layers with a conductive material.
[0106] Through-holes can be formed by any of the following methods: machining, laser processing, and chemical processing. When formed by machining, methods such as milling, drilling, and wiring can be used; when formed by laser processing, UV or CO2 laser methods can be used; and when formed by chemical processing, chemicals containing aminosilanes, ketones, etc., can be used. Therefore, at least one of the plurality of insulating layers 111, 112, 113, 114, and 115 can be open.
[0107] Meanwhile, laser processing is a cutting method that concentrates light energy on a surface to melt and evaporate part of the material to form the desired shape. Therefore, it can easily process complex shapes shaped by computer programs, and can even process composite materials that are difficult to cut by other methods.
[0108] In addition, laser processing has a cutting diameter of at least 0.005 mm and a wide range of possible thicknesses.
[0109] For laser processing drill bits, YAG (yttrium aluminum garnet) lasers, CO2 lasers, or ultraviolet (UV) lasers are preferred. YAG lasers can process both copper foil layers and insulating layers, while CO2 lasers can only process insulating layers.
[0110] When forming a through-hole, the first through-hole 170 and the second through-hole 130 can be formed by filling the interior of the through-hole with a conductive material. The metal material forming the first through-hole 170 and the second through-hole 130 can be any material selected from copper (Cu), silver (Ag), tin (Sn), gold (Au), nickel (Ni), and palladium (Pd). Furthermore, the conductive material filling can be performed using any one or a combination of electroless plating, electrolytic plating, screen printing, sputtering, vapor deposition, inkjet printing, and dispensing.
[0111] The structure of the first via 170 will be described in detail below.
[0112] The first through-hole 170 may include a first through-hole portion 150 and a second through-hole portion 160, wherein the first through-hole portion 150 is configured to fill a portion of a first through-hole that commonly passes through multiple insulating layers, and the second through-hole portion 160 is configured to fill the remaining portion of the first through-hole.
[0113] The first through-hole portion 150 may be formed in the first region of the first through-hole. Furthermore, the second through-hole portion 160 may be formed in a second region of the first through-hole, excluding the first region. The second region may be the central region of the upper region, excluding the lower region of the first through-hole. Alternatively, the first region may be a region other than the second region. Preferably, the first region may be the outer region of both the lower and upper regions of the first through-hole.
[0114] In other words, in the first embodiment, a portion of the first through-hole formed when it passes through multiple insulating layers can be filled with the first through-hole portion 150, and the remaining portion can be filled with the second through-hole portion 160.
[0115] Each of the first through-hole portion 150 and the second through-hole portion 160 may include a portion disposed in the first through-hole and a portion disposed on the portion disposed in the first through-hole and protruding from the surface of the insulating layer 110.
[0116] In other words, the first through-hole portion 150 includes a first portion 151 disposed in a first region of the first through-hole. The first portion 151 may be referred to as a connecting portion located in the first through-hole. For example, the first portion 151 of the first through-hole portion 150 may form part of the connecting portion of the first through-hole 170.
[0117] The first via portion 150 may include a second portion 152 disposed on the first portion 151 and protruding from the upper surface of the insulating layer 110. The second portion 152 may be located on the opposite side of the first pad 140 relative to the connection portion of the first via 170, and may be referred to as a via pad connected to the connection portion. For example, the second portion 152 of the first via portion 150 may form part of the pad of the first via 170.
[0118] The first portion 151 of the first through hole portion 150 can be formed by filling only a portion of the area corresponding to the first through hole, rather than the entire area of the first through hole.
[0119] Therefore, the upper surface of the first portion 151 of the first through-hole portion 150 can be curved rather than flat. Preferably, the upper surface of the first portion 151 of the first through-hole portion 150 can have a downwardly recessed shape. Therefore, the length of the upper surface of the first portion 151 of the first through-hole portion 150 can be greater than the upper width of the first through-hole. That is, the length of the upper surface of the first portion 151 of the first through-hole portion 150 can be greater than the upper width corresponding to the straight-line distance of the upper region of the first through-hole.
[0120] A portion of the upper surface of the first portion 151 of the first through-hole portion 150 may be located below the upper surface of the insulating layer 110. Here, the insulating layer 110 may refer to the uppermost insulating layer among the plurality of insulating layers in which the first through-hole is formed. For example, the center point of the upper surface of the first portion 151 of the first through-hole portion 150 may be below the upper surface of the insulating layer 110. In this case, the upper surface of the first portion 151 of the first through-hole portion 150 may gradually decrease in size from the outside to the center. Therefore, the center point of the upper surface of the first portion 151 of the first through-hole portion 150 may be the lowest, and the outer edge point of the upper surface of the first portion 151 of the first through-hole portion 150 may be the highest. Therefore, a recessed portion may be formed in the upper surface of the first portion 151 of the first through-hole portion 150. At the same time, the length of the lower surface of the first portion 151 of the first through-hole 170 may be the same as the lower width of the first through-hole.
[0121] The second portion 152 of the first through-hole portion 150 may be located on the first portion 151. That is, the second portion 152 of the first through-hole portion 150 is integrally formed with the first portion 151. That is, the second portion 152 of the first through-hole portion 150 may extend from the first portion 151 and protrude above the upper surface of the insulating layer 110.
[0122] Meanwhile, the first through hole 170 may have a first thickness H1. The first thickness H1 of the first through hole 170 may refer to the vertical straight-line distance from the lower surface of the first portion 151 of the first through hole portion 150 to the upper surface of the second portion 152.
[0123] In this case, the thickness of the recessed portion of the first through-hole portion 150 may have a second thickness H2. Here, the second thickness H2 of the recessed portion of the first through-hole portion 150 may refer to the vertical straight-line distance from the upper surface of the second part 152 of the first through-hole portion 150 to the lowest point of the upper surface of the first part 151.
[0124] The second thickness H2 can be 30% to 70% of the first thickness H1. For example, the second thickness H2 can be 40% to 65% of the first thickness H1. For example, the second thickness H2 can be 50% to 60% of the first thickness H1. When the second thickness H2 is less than 30% of the first thickness H1, the thickness of the area to be removed by polishing during the process of forming the first via 150 and the second via 160 increases, thus the manufacturing process may be complex. Furthermore, when the second thickness H2 is greater than 70% of the first thickness H1, even after the second via 160 is formed, a pit area may still be formed on the second via 160.
[0125] Meanwhile, the first through hole can have a first width W1.
[0126] Preferably, the first width W1 of the first through hole may include the width of the first through hole in a first direction and the width in a second direction. Furthermore, the width of the first through hole in the first direction may be greater than 500 μm. For example, the width of the first through hole in the first direction may be greater than 1000 μm. For example, the width of the first through hole in the first direction may be greater than 2000 μm. For example, the width of the first through hole in the first direction may be greater than 2500 μm. For example, the width of the first through hole in the second direction may be greater than 500 μm. For example, the width of the first through hole in the second direction may be greater than 1000 μm. For example, the width of the first through hole in the second direction may be greater than 2000 μm. For example, the width of the first through hole in the first direction may be greater than 2500 μm.
[0127] In this case, the width of the first through hole in the first direction can be the same as the width of the first through hole in the second direction, but is not limited to this. That is, the diameter of the first through hole in the first direction and the diameter in the second direction can be different from each other, and therefore can be rod-shaped or elliptical.
[0128] Meanwhile, when the width of the first through hole is less than the aforementioned range, it can have a size substantially corresponding to the second through hole 130, thus allowing only a single through hole portion to be formed therein. That is, when the width of the through hole is less than the aforementioned width range of the first through hole, no pitted area will appear even if the interior of the through hole is filled in a single process.
[0129] Meanwhile, the second through-hole portion 160 includes a first portion 161 disposed in the second region of the first through-hole. The first portion 161 may also be referred to as a connecting portion located in the first through-hole. For example, the first portion 161 of the second through-hole portion 160 may form part of the connecting portion of the first through-hole 170.
[0130] In other words, the first portion 161 of the second through hole portion 160 can be together with the first portion 151 of the first through hole portion 150 to form the connection portion of the first through hole 170.
[0131] The second via portion 160 may include a second portion 162 disposed on the first portion 161 and protruding from the upper surface of the insulating layer 110. The second portion 162 may be located on the opposite side of the first pad 140 relative to the connection portion of the first via 170, and may be referred to as a via pad connected to the connection portion. For example, the second portion 162 of the second via portion 160 may form a part of the pad of the first via 170. That is, the second portion 162 of the second via portion 160 may form a pad (specifically, an upper pad) together with the second portion 152 of the first via portion 150.
[0132] The first portion 161 of the second through hole portion 160 can be formed by filling only a portion of the area corresponding to the first through hole, rather than the entire area of the first through hole. Specifically, the first portion 161 of the second through hole portion 160 can be formed to fill the recess formed in the upper surface of the first area 151 of the first through hole portion 150.
[0133] Therefore, the lower surface of the first portion 161 of the second through-hole portion 160 can be curved rather than flat. Preferably, the lower surface of the first portion 161 of the second through-hole portion 160 can have a downwardly convex shape. Therefore, the length of the lower surface of the first portion 161 of the second through-hole portion 160 can be greater than both the upper and lower widths of the first through-hole. That is, the length of the lower surface of the first portion 161 of the second through-hole portion 160 can be greater than the upper width corresponding to the straight-line distance from the upper region of the first through-hole.
[0134] A portion of the lower surface of the first portion 161 of the second through-hole portion 160 may be located below the upper surface of the insulating layer 110. Here, the insulating layer 110 may refer to the uppermost insulating layer among the plurality of insulating layers in which the first through-hole is formed. For example, the center point of the lower surface of the first portion 161 of the second through-hole portion 160 may be below the upper surface of the insulating layer 110. In this case, the lower surface of the first portion 161 of the second through-hole portion 160 may gradually decrease in size from the outside to the center. Therefore, the center point of the lower surface of the first portion 161 of the second through-hole portion 160 may be located at the lowest position, and the outer edge point may be located at the highest position. Therefore, a protruding portion may be formed on the lower surface of the first portion 161 of the second through-hole portion 160.
[0135] The second portion 162 of the second through-hole portion 160 may be located on the first portion 161. That is, the second portion 162 of the second through-hole portion 160 is integrally formed with the first portion 161. In other words, the second portion 162 of the second through-hole portion 160 can extend from the first portion 161 to protrude above the upper surface of the insulating layer 110.
[0136] Meanwhile, the first through hole 170 may have a first thickness H1. The first thickness H1 of the first through hole 170 may refer to the vertical straight-line distance from the lower surface of the first portion 151 of the first through hole portion 150 to the upper surface of the second portion 152.
[0137] In this case, the thickness of the protruding portion of the second through hole 160 may have a second thickness H2. Here, the second thickness H2 of the protruding portion of the second through hole 160 may refer to the vertical straight-line distance from the upper surface of the second part 162 of the second through hole 160 to the lowest point of the lower surface of the first part 161.
[0138] The second thickness H2 can be 30% to 70% of the first thickness H1. For example, the second thickness H2 can be 40% to 65% of the first thickness H1. For example, the second thickness H2 can be 50% to 60% of the first thickness H1. When the second thickness H2 is less than 30% of the first thickness H1, the thickness of the area to be removed by polishing during the process of forming the first via 150 and the second via 160 increases, thus potentially complicating the manufacturing process. Furthermore, when the second thickness H2 is greater than 70% of the first thickness H1, even after the second via 160 is formed, a pitted area may still be formed on the second via 160.
[0139] In other words, the first portion 151 of the first through-hole portion 150 can be configured as the first portion 161 surrounding the second through-hole portion 160 disposed in the second region of the first through-hole. Furthermore, as... Figure 6b As shown, the second portion 152 of the first through hole portion 150 can be configured as the second portion 162 of the second through hole portion 160 that protrudes above the upper surface of the insulating layer 110.
[0140] Meanwhile, the first through-hole portion 150 and the second through-hole portion 160 can have different surface roughness for each point on the surface.
[0141] Figure 7 and Figure 8 This is a diagram showing the surface roughness of the first through-hole according to an embodiment.
[0142] The first through-hole portion 150 may include an upper surface S1 of a first portion 151 and an upper surface S2 of a second portion 152. Furthermore, the surface roughness of the upper surface S1 of the first portion 151 of the first through-hole portion 150 may be different from the surface roughness of the upper surface S2 of the second portion 152 of the first through-hole portion 150.
[0143] In this case, such as Figure 7 As shown, the surface roughness Ra of the upper surface S1 of the first portion 151 of the first via 150 can be from 150 nm to 180 nm. The average value of the surface roughness Ra of the upper surface S1 of the first portion 151 of the first via 150 can be 165.41 nm. Figure 7 (a), 7(b) and 7(c) show the surface roughness Ra at different points on the upper surface S1 of the first portion 151 of the first through hole 150.
[0144] Furthermore, the surface roughness Ra of the upper surface S2 of the second portion 152 of the first through-hole portion 150 can be greater than the surface roughness Ra of the upper surface S1 of the first portion 151 of the first through-hole portion 150. That is, as Figure 8 As shown, the surface roughness Ra of the upper surface S2 of the second portion 152 of the first via 150 can be from 170 nm to 205 nm. That is, the average surface roughness Ra of the upper surface S2 of the second portion 152 of the first via 150 can be 193.53 nm. Figure 8 (a), 8(b) and 8(c) show the surface roughness Ra at different points on the upper surface S2 of the second portion 152 of the first through hole 150.
[0145] In this case, the upper surface S1 of the first portion 151 of the first through-hole 150 corresponds to the lower surface of the first portion 161 of the second through-hole 160, and therefore, they are assigned the same reference numeral S1. In other words, the upper surface S1 of the first portion 151 of the first through-hole 150 or the lower surface of the first portion 161 of the second through-hole 160 can refer to the boundary surface between the upper surface S1 of the first through-hole 150 and the lower surface of the first portion 161 of the second through-hole 160.
[0146] The second through-hole portion 160 may include a lower surface S1 of a first portion 161 and an upper surface S3 of a second portion 162. Furthermore, the surface roughness of the lower surface S1 of the first portion 161 of the second through-hole portion 160 may be different from the surface roughness of the upper surface S3 of the second portion 162 of the second through-hole portion 160.
[0147] In this case, such as Figure 7As shown, the surface roughness Ra of the lower surface S1 of the first portion 161 of the second via 160 can be from 150 nm to 180 nm. The average value of the surface roughness Ra of the lower surface S1 of the first portion 161 of the second via 160 can be 165.41 nm. Figure 7 (a), 7(b) and 7(c) show the surface roughness Ra at different points on the lower surface S1 of the first portion 161 of the second through hole 160.
[0148] Furthermore, the surface roughness Ra of the upper surface S3 of the second portion 162 of the second through-hole portion 160 can be greater than the surface roughness Ra of the lower surface S1 of the first portion 161 of the second through-hole portion 160. That is, as Figure 8 As shown, the surface roughness Ra of the upper surface S3 of the second portion 162 of the second via 160 can be from 170 nm to 205 nm. That is, the average surface roughness Ra of the upper surface S3 of the second portion 162 of the second via 160 can be 193.53 nm. Figure 8 (a), 8(b) and 8(c) show the surface roughness Ra at different points on the upper surface S3 of the second portion 162 of the second through hole 160.
[0149] According to the embodiments, there are limitations to the plating of large-diameter vias in the case of conventional large-area vias. However, the embodiments can overcome these limitations by changing the plating method, thereby achieving stable plating of large-diameter vias. Furthermore, according to the embodiments, compared to conventional methods, the uniformity of via plating can be ensured, and quality reliability can be ensured by improving laser quality after additional lamination.
[0150] Furthermore, in existing technologies, there are limitations to the methods for consistently achieving plating within vias, considering the thickness of the insulating layer and the size of the via. According to this embodiment, design limitations can be overcome to achieve a highly reliable plating state within the via, thus increasing design freedom. Additionally, this embodiment can completely shield interference between circuits in densely circuit areas by increasing the via size, and can improve heat dissipation characteristics in areas requiring heat dissipation.
[0151] Specifically, in the comparative example, the heat dissipation function is performed using multiple heat dissipation vias spaced at predetermined intervals in the horizontal direction. In this embodiment, a single large-area via is used to perform the heat dissipation function, ensuring the uniformity of its plating. Furthermore, due to the increased area of the via, the heat dissipation performance is improved compared to the comparative example.
[0152] The following text will describe it in detail. Figure 5 The method for manufacturing a circuit board according to the first embodiment is shown.
[0153] Figures 9 to 18 This is a diagram illustrating the manufacturing method of the circuit board according to the first embodiment, following the process sequence.
[0154] Reference Figure 9 First, a basic lamination process for manufacturing the circuit board can be performed. Here, the basic lamination process may include an insulating layer lamination process and a circuit patterning process prior to the formation of the first via 170.
[0155] To this end, a process for preparing the first insulating layer 111 is first performed, and a process for forming a via VH1 in the first insulating layer 111 for forming the second via 130 can also be performed.
[0156] Subsequently, when the via VH1 is formed, the process of forming a second via 130 that fills the interior of the via VH1, and forming a first pad 140 and a second pad 120 on the surface of the first insulating layer 111 can be performed together with the formation of the second via 130.
[0157] Furthermore, the process of forming a second insulating layer 112 on the lower surface of the first insulating layer 111, the process of forming a fourth insulating layer 114 on the lower surface of the second insulating layer 112, and the lamination process of forming a third insulating layer 113 on the upper surface of the first insulating layer 111 can be performed. Meanwhile, as described above, the number of layers constituting the insulating layer 110 can be changed according to the embodiment, and their stacking order can also be changed.
[0158] The insulating layer 110 in the embodiments may include, but is not limited to, a first insulating layer 111, a second insulating layer 112, a third insulating layer 113, and a fourth insulating layer 114. For example, the circuit board may have fewer than four layers, or it may have more than four layers. However, the circuit board may include at least two insulating layers.
[0159] Furthermore, in the embodiments, a process for forming a circuit pattern on the surface of the insulating layer 110 can be performed. For example, a process for forming a circuit pattern on the surfaces of the first insulating layer 111 and the second insulating layer 112 can be preferentially performed. In this case, the circuit pattern may include via pads connected to vias, connection pads connected to an external substrate, mounting pads on which electronic components are mounted, and traces serving as signal transmission lines between the pads.
[0160] For example, a process can be performed to form a circuit pattern (which may include a first pad 140 and a second pad 120) on the surfaces of the first insulating layer 111 and the second insulating layer 112. The first pad 140 and the second pad 120 may be part of a circuit pattern formed on the surfaces of the first insulating layer 111 and the second insulating layer 112, and may refer to portions of the circuit pattern that are connected to vias in a substantially uniform area on the surface of each insulating layer.
[0161] The first pad 140 and the second pad 120 can be patterns for transmitting electrical signals or patterns formed differently for heat dissipation, and can be patterns for transmitting heat.
[0162] The first pad 140 may be disposed on the lower surface of the first insulating layer 111, but is not limited thereto. In other words, the first pad 140 may be connected to a large area of first vias 170 that share a common area through multiple insulating layers. However, since the first pad 140 is disposed at the interface between the multiple insulating layers, one end may be connected to the first via 170 disposed on the first pad 140, and the other end may be connected to another first via 170 disposed below the first pad 140.
[0163] The first pad 140 may have a first cross-sectional area. Preferably, the first pad 140 may have a first cross-sectional area that is larger than the upper or lower cross-sectional area of the first via 170.
[0164] The second pad 120 can be disposed on the surfaces of the first insulating layer 111 and the second insulating layer 112, respectively. In other words, the second pad 120 can be connected to the second via 130 of normal size that penetrates each insulating layer. Therefore, the second pad 120 can be disposed on each surface of the plurality of insulating layers.
[0165] Next, as Figure 10 As shown, a process that penetrates the insulating layer 110 can be performed to form a through-hole in the insulating layer 110. In this case, the through-hole may include a first through-hole and a second through-hole. The first through-hole may have a first region, and the second through-hole may have a second region. Furthermore, the first region and the second region may be different from each other. For example, the through-hole may include a first through-hole VH2 for forming a first conductive via 170 and a second through-hole VH1 for forming a second conductive via.
[0166] The first via VH2 can be formed to pass through multiple insulating layers. Furthermore, the second via VH1 can be formed to penetrate only one of the multiple insulating layers.
[0167] That is, the first through-hole VH2 can have a first width W1. Preferably, the first width W1 of the first through-hole VH2 can include the width of the first through-hole VH2 in a first direction and the width in a second direction. Furthermore, the width of the first through-hole VH2 in the first direction can be greater than 500 μm. For example, the width of the first through-hole VH2 in the first direction can be greater than 1000 μm. For example, the width of the first through-hole VH2 in the first direction can be greater than 2000 μm. For example, the width of the first through-hole VH2 in the first direction can be greater than 2500 μm. For example, the width of the first through-hole VH2 in the second direction can be greater than 500 μm. For example, the width of the first through-hole VH2 in the second direction can be greater than 1000 μm. For example, the width of the first through-hole VH2 in the second direction can be greater than 2000 μm. For example, the width of the first through-hole VH2 in the first direction can be greater than 2500 μm.
[0168] In this case, the width of the first through hole VH2 in the first direction can be the same as the width of the first through hole VH2 in the second direction, but is not limited to this. That is, the diameter of the first through hole VH2 in the first direction and the diameter in the second direction can be different from each other, and therefore can be rod-shaped or elliptical.
[0169] Meanwhile, when the width of the first through hole VH2 is less than the above range, it can be substantially the same as the size of the second through hole VH1.
[0170] The reason why the first through hole is VH2 and the second through hole is VH1 is because the through holes are numbered in ascending order of size. Therefore, the first through hole, which has a relatively larger size, is named VH2.
[0171] Next, as Figure 11 As shown, a process for forming a first mask M1 on the surface of the insulating layer 110 can be performed.
[0172] The first mask M1 may include multiple openings.
[0173] Specifically, the first mask M1 includes a first opening OR2 that exposes a first through-hole VH2 formed in the insulating layer 110 and a second opening OR1 that exposes a second through-hole VH1.
[0174] In this case, the width of the first opening OR2 can be greater than the upper width of the first via VH2. In other words, the first opening OR2 is not formed to have a width equal to or less than the upper width of the first via VH2, but can have a width greater than the upper width of the first via VH2. Therefore, the first opening OR2 can expose the upper surface of the insulating layer 110 surrounding the upper region of the first via VH2 and the upper region of the first via VH2. That is, the first opening OR2 can expose the region where the connection portion of the first via 170 is to be formed and the region where the pad of the first via 170 is to be formed, respectively. Here, the region where the connection portion is to be formed can be the first via VH2, and the region where the pad is to be formed can be the upper region of the first via VH2 and the adjacent upper surface region of the insulating layer 110.
[0175] In this case, the width of the second opening OR1 can be greater than the upper width of the second via VH1. In other words, the second opening OR1 is not formed to have a width equal to or less than the upper width of the second via VH1, but can have a width greater than the upper width of the second via VH1. Therefore, the second opening OR1 can expose the upper surface of the insulating layer 110 surrounding the upper region of the second via VH1 and the upper region of the second via VH1. That is, the second opening OR1 can expose the region where the connection portion of the second via 130 is to be formed and the region where the pad of the second via 130 is to be formed, respectively. Here, the region where the connection portion is to be formed can be the second via VH1, and the region where the pad is to be formed can be the upper region of the second via VH1 and the adjacent upper surface region of the insulating layer 110.
[0176] Next, as Figure 12 As shown, when forming the first through hole VH2 and the second through hole VH1, the first through hole 170 and the second through hole 130 can be formed by filling the first through hole VH2 and the second through hole VH1 with conductive material.
[0177] The metal material forming the first via 170 and the second via 130 can be any material selected from copper (Cu), silver (Ag), tin (Sn), gold (Au), nickel (Ni), and palladium (Pd). Furthermore, the conductive material filling can be achieved using any one or a combination of electroless plating, electrolytic plating, screen printing, sputtering, vapor deposition, inkjet printing, and dispensing.
[0178] In this case, the dimensions of the first via VH2 and the second via VH1 are different. Furthermore, the first via VH2 is a large-area via. Therefore, a second via can be formed in the second via VH1 in a single process to completely fill it, but it is difficult to form a first via that fills the first via VH2 in only one process.
[0179] Therefore, the first through hole portion 150 that fills a portion of the first through hole VH2 is formed by performing a single plating process, and at the same time, the second through hole 130a that fills the entire second through hole VH1 is formed.
[0180] In this case, the second via 130a includes a connection portion 131 disposed in the second via VH1 and a pad portion 132 protruding above the connection portion 131.
[0181] Furthermore, the upper surface of the pad portion 132 may not be flat. That is, the plating process for the second via VH1 is performed together with the plating process for the first via VH2. Additionally, the plating process for the second via VH1 can be performed under the condition that the first via portion 150 is used to form the first via 170 in the first via VH2. Therefore, the pad portion 132 of the formed second via 130a may have a curved upper surface and protrude above the first mask M1.
[0182] In the plating process described above, the first through hole portion 150 of the first through hole 170 can be formed in the first through hole VH2.
[0183] The first via portion 150 may include a first portion 151 disposed in the first via VH2, and a second portion 152 disposed on the first portion 151 to protrude above the upper surface of the insulating layer 110. Furthermore, the upper surface of the second portion 152 may have a curved shape similar to the pad portion 132 of the second via 130a.
[0184] The first through-hole portion 150 may be formed in the first region of the first through-hole. The first region may be an outer region other than the central region. Preferably, the first region may be an outer region of the lower region and the upper region of the first through-hole.
[0185] In other words, in the first embodiment, a portion of the first through hole that passes through multiple insulating layers can be filled by the first through hole portion 150 through a single plating process.
[0186] Furthermore, the first portion 151 of the formed first through hole 150 can be referred to as a connecting portion located in the first through hole. For example, the first portion 151 of the first through hole 150 can form part of the connecting portion of the first through hole 170.
[0187] The second portion 152 may be located on the opposite side of the first pad 140 relative to the connection portion of the first via 170, and may be referred to as the via pad connected to the connection portion. For example, the second portion 152 of the first via portion 150 may form part of the pad of the first via 170.
[0188] The first portion 151 of the first through hole 150 can be formed by filling only a portion of the area corresponding to the first through hole, rather than the entire area of the first through hole.
[0189] Therefore, the upper surface of the first portion 151 of the first through-hole portion 150 can be curved rather than flat. Preferably, the upper surface of the first portion 151 of the first through-hole portion 150 can have a downwardly recessed shape. Therefore, the length of the upper surface of the first portion 151 of the first through-hole portion 150 can be greater than the upper width of the first through-hole. That is, the length of the upper surface of the first portion 151 of the first through-hole portion 150 can be greater than the upper width corresponding to the straight-line distance to the upper region of the first through-hole.
[0190] A portion of the upper surface of the first portion 151 of the first through-hole portion 150 may be located below the upper surface of the insulating layer 110. Here, the insulating layer 110 may be the uppermost insulating layer among the plurality of insulating layers in which the first through-hole is formed. For example, the center point of the upper surface of the first portion 151 of the first through-hole portion 150 may be below the upper surface of the insulating layer 110. In this case, the upper surface of the first portion 151 of the first through-hole portion 150 may gradually decrease in size from the outside to the center. Therefore, the center point of the upper surface of the first portion 151 of the first through-hole portion 150 may be the lowest, and the outer edge point of the upper surface of the first portion 151 of the first through-hole portion 150 may be the highest. Therefore, a recessed portion may be formed in the upper surface of the first portion 151 of the first through-hole portion 150. At the same time, the length of the lower surface of the first portion 151 of the first through-hole 170 may be the same as the lower width of the first through-hole.
[0191] The second portion 152 of the first through-hole portion 150 may be located on the first portion 151. That is, the second portion 152 of the first through-hole portion 150 is integrally formed with the first portion 151. In other words, the second portion 152 of the first through-hole portion 150 can extend from the first portion 151 and protrude above the upper surface of the insulating layer 110.
[0192] Next, as Figure 13 As shown, a single grinding process can be performed.
[0193] A single grinding process can be a process that planarizes the upper surface of the second portion 152 of the first via 150 formed by a single plating process. Alternatively, a single grinding process can be a process that planarizes the upper surface of the pad portion 132 of the second via 130a that has already undergone a single plating process.
[0194] Next, as Figure 14As shown, the process of forming a second mask M2 on the first mask M1 can be performed.
[0195] The second mask M2 may include a third opening OR3. Preferably, the second mask M2 is configured to cover the upper surface of the first mask M1 and the pad portion 132 of the second via 130a, and may be provided with a third opening OR3 exposing the first via VH2.
[0196] The third opening OR3 can have a smaller size than the first opening OR2. Therefore, the second mask M2 can be configured to cover a portion of the upper surface of the second portion 152 of the first through-hole portion 150 formed in the first plating process. In this case, when the size of the third opening OR3 is the same as the size of the first opening OR2 of the first mask M1, the inner side of the first through-hole VH2 and the second portion 152 of the first through-hole portion 150 are plating in the subsequent second plating process. Therefore, a significant amount of time is required to fill the entire interior of the first through-hole VH2, and a significant amount of time is also required in the subsequent polishing process.
[0197] Next, as Figure 15 As shown, the process of forming the second through-hole portion 160 of the first through-hole 170 can be performed by performing a secondary plating process in the first through-hole VH2 exposed by the third opening OR3 through the second mask M2.
[0198] Meanwhile, the second through-hole portion 160 includes a first portion 161 disposed in the second region of the first through-hole. The first portion 161 may also be referred to as a connecting portion located in the first through-hole. For example, the first portion 161 of the second through-hole portion 160 may form part of the connecting portion of the first through-hole 170.
[0199] In other words, the first portion 161 of the second through hole portion 160 can be together with the first portion 151 of the first through hole portion 150 to form the connection portion of the first through hole 170.
[0200] The second via portion 160 may include a second portion 162 disposed on the first portion 161 and protruding from the upper surface of the insulating layer 110. The second portion 162 may be located on the opposite side of the first pad 140 relative to the connection portion of the first via 170, and may be referred to as a via pad connected to the connection portion. For example, the second portion 162 of the second via portion 160 may form a part of the pad of the first via 170. That is, the second portion 162 of the second via portion 160 may form a pad (specifically, an upper pad) together with the second portion 152 of the first via portion 150.
[0201] The first portion 161 of the second through hole portion 160 can be formed by filling only a portion of the area corresponding to the first through hole, rather than the entire area of the first through hole. Specifically, the first portion 161 of the second through hole portion 160 can be formed to fill the recess formed in the upper surface of the first area 151 of the first through hole portion 150.
[0202] Therefore, the lower surface of the first portion 161 of the second through-hole portion 160 can be curved rather than flat. Preferably, the lower surface of the first portion 161 of the second through-hole portion 160 can have a downwardly convex shape. Therefore, the length of the lower surface of the first portion 161 of the second through-hole portion 160 can be greater than both the upper and lower widths of the first through-hole. That is, the length of the lower surface of the first portion 161 of the second through-hole portion 160 can be greater than the upper width corresponding to the straight-line distance from the upper region of the first through-hole.
[0203] A portion of the lower surface of the first portion 161 of the second through-hole portion 160 may be located below the upper surface of the insulating layer 110. Here, the insulating layer 110 may refer to the uppermost insulating layer among the plurality of insulating layers in which the first through-hole is formed. For example, the center point of the lower surface of the first portion 161 of the second through-hole portion 160 may be below the upper surface of the insulating layer 110. In this case, the lower surface of the first portion 161 of the second through-hole portion 160 may gradually decrease in size from the outside to the center. Therefore, the center point of the lower surface of the first portion 161 of the second through-hole portion 160 may be located at the lowest position, and the outer edge point may be located at the highest position. Therefore, a protruding portion may be formed on the lower surface of the first portion 161 of the second through-hole portion 160.
[0204] The second portion 162 of the second through-hole portion 160, formed by a secondary plating process, can be located on the first portion 161. That is, the second portion 162 of the second through-hole portion 160 is integrally formed with the first portion 161. In other words, the second portion 162 of the second through-hole portion 160 can extend from the first portion 161 to protrude above the upper surface of the insulating layer 110.
[0205] In this case, the upper surface of the second portion 162 of the second through hole 160 may have curvature, and pitting may occur in certain areas.
[0206] Next, as Figure 16 As shown, a secondary grinding process is performed to remove the second mask M2 and flatten the upper surface of the second portion 162 of the second through hole portion 160.
[0207] Through a secondary grinding process, the upper surface of the second portion 162 of the second via 160 can be flattened, and the upper surface of the second portion 162 of the second via 160 can be on the same plane as the upper surface of the pad portion 132 of the second via 130a.
[0208] Next, as Figure 17 As shown, a three-stage polishing process can be performed, which includes polishing the upper surface of the second portion 152 of the first through-hole portion 150, the upper surface of the second portion 162 of the second through-hole portion 160, and the upper surface of the pad portion 132 of the second through-hole 130a.
[0209] In other words, the second portion 152 of the first via 150, the second portion 162 of the second via 160, and the pad portion 132 of the second via 130a formed in the previous process have a thickness greater than the actual designed thickness. This is to improve plating deviations that may occur in the secondary plating process. Furthermore, the pit area that may occur in the secondary plating process is located in the ineffective portion of the first via rather than the effective portion. The ineffective portion of the first via may refer to the portion removed in the secondary and tertiary polishing processes.
[0210] Then, by performing three grinding processes, the thickness of each of the second portion 152 of the first via 150, the second portion 162 of the second via 160, and the second via 130a can be adjusted to the same level as the thickness of the first pad 140 or the second pad 120.
[0211] Next, as Figure 18 As shown, a process of removing the first mask M1 can be performed to form a circuit board including a first via and a second via with different structural shapes.
[0212] Figure 19 This is a diagram showing a circuit board according to the second embodiment. Figure 20a It is used for explanation Figure 19 A diagram showing the interfaces of the various parts of the first through-hole. Figure 20b yes Figure 19 The diagram shows a plan view of the first through hole.
[0213] Reference Figure 19 , Figure 20a and Figure 20b In addition to the second through-hole portion of the first through-hole, the circuit board according to the second embodiment has a portion that is similar to... Figure 5 The circuit board shown has a substantially the same structure as the circuit board according to the first embodiment. Therefore, in the circuit board according to the second embodiment, the structural features of the second via portion of the first via will be mainly described below.
[0214] The circuit board according to the second embodiment may include an insulating layer 210, a first pad 240 and a second pad 220 disposed on the surface of the insulating layer 210, and a first via 270 and a second via 230 passing through the insulating layer 210.
[0215] Here, the insulating layer, the first pad, the second pad, and the first via have the same characteristics as the reference. Figure 5 The insulating layer, first pad, second pad, and first via in the circuit board according to the first embodiment have the same structure, so their description will be omitted.
[0216] The first through-hole 270 may include a first through-hole portion 250 and a second through-hole portion 260. The first through-hole portion 250 fills a portion of the first through-hole that passes through multiple insulating layers, and the second through-hole portion 260 fills the remaining portion of the first through-hole.
[0217] The first through-hole portion 250 may be formed in the first region of the first through-hole. Furthermore, the second through-hole portion 260 may be formed in a second region of the first through-hole, excluding the first region. The second region may be the central region of the upper region, excluding the lower region of the first through-hole. Alternatively, the first region may be a region other than the second region. Preferably, the first region may be the outer region of both the lower and upper regions of the first through-hole.
[0218] In other words, in the second embodiment, a portion of the first through hole formed by multiple insulating layers can be filled by the first through hole portion 250, and the remaining portion can be filled by the second through hole portion 260.
[0219] Each of the first through-hole portion 250 and the second through-hole portion 260 includes a portion disposed in the first through-hole and a portion disposed on the portion disposed in the first through-hole and protruding above the surface of the insulating layer 210.
[0220] In other words, the first through-hole portion 250 includes a first portion 251 disposed in a first region of the first through-hole. The first portion 251 may also be referred to as a connecting portion located in the first through-hole. For example, the first portion 251 of the first through-hole portion 250 may form part of the connecting portion of the first through-hole 270.
[0221] The first via portion 250 may be disposed on the first portion 251 and include a second portion 252 protruding from the upper surface of the insulating layer 210. The second portion 252 may be located on the opposite side of the first pad 240 relative to the connection portion of the first via 270, and may be referred to as a via pad connected to the connection portion. For example, the second portion 252 of the first via portion 250 may form part of the pad of the first via 270.
[0222] The first portion 251 of the first through hole 250 can be formed by filling only a portion of the area corresponding to the first through hole, rather than the entire area of the first through hole.
[0223] Here, the first through hole portion 250 has a structure that is substantially the same as that of the first through hole portion 150 described in the first embodiment, so its detailed description will be omitted.
[0224] The second through-hole portion 160 of the first through-hole 270 is disposed in the second region of the first through-hole.
[0225] In this case, in the first embodiment, the second region of the first through-hole is formed by performing a single plating process. Therefore, the second through-hole portion 160 in the first embodiment is composed of a single part.
[0226] In contrast, in the second embodiment, the second via 260 is formed by performing at least two plating processes instead of one plating process.
[0227] Therefore, the second through-hole portion 260 includes a first sub-second through-hole portion 260a, which has an outer surface that contacts the first through-hole portion 250 and fills a portion of the second region of the first through-hole. Furthermore, the second through-hole portion 260 includes a second sub-second through-hole portion 260b, the outer surface of which contacts the inner surface of the first sub-second through-hole portion 260a.
[0228] In other words, in the second embodiment, the first region of the first through hole is filled by multiple plating processes. Therefore, the second through hole portion 260 may include a first sub-second through hole portion 260a and a second sub-second through hole portion 260b having interfaces that are separated from each other.
[0229] Therefore, the first sub-second through hole portion 260a may include a first portion 261a disposed in the first through hole and a second portion 262a disposed on the first portion 261a and protruding above the upper surface of the insulating layer.
[0230] In addition, the second sub-second through hole portion 260b may also include a first portion 261b disposed in the first through hole and a second portion 262b disposed on the first portion 261b and protruding above the upper surface of the insulating layer.
[0231] Therefore, in the first embodiment, the interface of the through hole portion constituting the first through hole includes only one interface between the first through hole portion and the second through hole portion.
[0232] In contrast, in the second embodiment, the interface of the through hole portion constituting the first through hole may include a first interface BS1 between the first through hole portion and the first sub-second through hole portion 260a, and a second interface BS2 between the first sub-second through hole portion 260a and the second sub-second through hole portion 260b.
[0233] Here, the plating process is performed by repeatedly dividing the second through-hole portion 260 of the first through-hole in order to minimize plating deviation caused by the plating process. Furthermore, in order to form the second through-hole portion 260 in one process, the current conditions in the plating conditions can be greater than the current limit of a typical electroplating device. Therefore, the second through-hole portion 260 is formed by repeatedly dividing the plate under current conditions lower than the current limit.
[0234] Therefore, the outer surface of the first sub-second through hole portion 260a has features corresponding to the outer surface of the second through hole portion 160 in the first embodiment.
[0235] A portion of the inner surface of the first sub-second through-hole portion 260a may be located below the upper surface of the insulating layer 210. Here, the insulating layer 210 may refer to the uppermost insulating layer among the plurality of insulating layers in which the first through-hole is formed. For example, the center point of the inner surface of the first sub-second through-hole portion 260a may be below the upper surface of the insulating layer 210. In this case, the inner surface of the first portion 261a of the first sub-second through-hole portion 260a may gradually decrease from the outside to the center. Therefore, the center point of the inner surface of the first portion 261a of the first sub-second through-hole portion 260a may be the lowest, and the outer edge point of the inner surface of the first portion 261a of the first sub-second through-hole portion 260a may be located at the highest position. Therefore, a recessed portion may be formed in the upper surface of the first portion 151 of the first through-hole portion 150. Therefore, a protruding portion may be formed on the outer surface of the first sub-second through-hole portion 260a, and a recessed portion may be formed on its inner surface.
[0236] Therefore, as Figure 20b As shown, the second portion 261b of the first sub-second through-hole portion 260a can be configured to surround the second portion 262b of the second sub-second through-hole portion 260b. Furthermore, the second portion 252 of the first through-hole portion 250 can be configured to surround the periphery of the second portion 261b of the first sub-second through-hole portion 260a.
[0237] Figures 21 to 24 The diagram illustrates the manufacturing method of the circuit board according to the second embodiment in the order of process steps.
[0238] Reference Figure 21 It can be executed first. Figures 9 to 14 The process is shown in the figure.
[0239] Subsequently, in the first embodiment, a secondary plating process is performed to completely fill the remaining portion of the first through-hole in one step. Conversely, in the second embodiment, the first sub-secondary through-hole portion 260a can be formed by first performing a first sub-secondary plating process that only fills a portion of the remaining portion of the first through-hole.
[0240] Next, refer to Figure 22 The second sub-secondary through-hole portion 260b can be formed by performing a second sub-secondary plating process on the first sub-secondary through-hole portion 260a to fill all the remaining portions of the first through-hole.
[0241] Next, a process for removing the second mask M2 is performed, and a process for planarizing the upper surface of each second portion of the first sub-second via portion 260a and the second sub-second via portion 260b can be performed.
[0242] Then, thereafter, as Figure 24 As shown, a first via and a second via with pad thickness corresponding to the actual design value can be formed by grinding the pad portions of the first via and the second via (the second portion of the first via portion, the second portion of the first sub-second via portion, and the second portion of the second sub-second via portion).
Claims
1. A circuit board, comprising: First insulating layer; A second insulating layer is disposed on the first insulating layer; A first through electrode is disposed in a first through hole that penetrates the first insulating layer and the second insulating layer in a vertical direction; a second through electrode is disposed in a second through hole that penetrates at least a portion of the first insulating layer in the vertical direction. as well as The third through electrode is disposed in a third through hole that penetrates at least a portion of the second insulating layer along the vertical direction. The first through electrode includes: The first electrode portion contacts the inner wall of the first through hole and fills a portion of the first through hole; and A second electrode portion is disposed on the first electrode portion and fills the remaining portion of the first through hole; and Wherein, the width in the horizontal direction and the thickness in the vertical direction of the first through electrode are greater than the width in the horizontal direction and the thickness in the vertical direction of the second through electrode or the third through electrode, and Each of the second through electrode and the third through electrode overlaps with the first through electrode along the horizontal direction.
2. The circuit board according to claim 1, wherein, The first through electrode includes a through portion disposed in the first through hole and a pad portion disposed on the through portion and protruding on the second insulating layer. The pad portion includes and is divided along the horizontal direction into a first pad portion configured as a first electrode portion and a second pad portion configured as a second electrode portion.
3. The circuit board according to claim 2, wherein, The first electrode portion includes: The first part is disposed in the first through hole and corresponds to the through portion; and The second part is disposed on the first part and corresponds to the first pad portion. The second electrode portion includes: The third part is disposed on the first portion of the first electrode portion in the first through hole and corresponds to the through portion. The fourth part is disposed on the third part and corresponds to the second pad part.
4. The circuit board according to claim 2, wherein, The first electrode portion includes a concave surface that contacts the second electrode portion, and The second electrode portion includes a convex surface that contacts the concave surface of the first electrode portion.
5. The circuit board according to claim 4, wherein, The first surface roughness of the concave surface or the convex surface is less than the second surface roughness of the upper surface of the pad portion.
6. The circuit board according to claim 4, wherein, The vertical distance from the uppermost end of the first electrode portion to the lowermost end of the concave surface of the first electrode portion is in the range of 30% to 70% of the total thickness of the first through electrode.
7. The circuit board according to claim 4, wherein, The vertical distance from the uppermost end of the second electrode portion to the lowermost end of the concave surface of the second electrode portion is in the range of 30% to 70% of the total thickness of the first through electrode.
8. The circuit board according to claim 1, wherein, The uppermost ends of the first electrode portion and the uppermost ends of the second electrode portion are located on the same plane.
9. The circuit board according to claim 1, further comprising: The first pad is disposed on the lower surface of the first insulating layer and overlaps perpendicularly with the first via. The first electrode portion is disposed on the first pad.
10. The circuit board according to claim 1, wherein, The first through electrode has an inclined portion whose width in the horizontal direction gradually decreases from the upper surface of the first through electrode toward the lower surface of the first through electrode, and Each of the second through electrode and the third through electrode overlaps with the inclined portion in the horizontal direction.
11. The circuit board according to claim 1, wherein, The lowest point of the second electrode portion is below the interface between the first insulating layer and the second insulating layer.
12. The circuit board according to claim 10, wherein, The second through electrode has an inclined portion whose width in the horizontal direction gradually decreases from the upper surface of the second through electrode toward the lower surface of the second through electrode, and The third through electrode has an inclined portion whose width in the horizontal direction gradually decreases from the upper surface of the third through electrode toward the lower surface of the third through electrode.
13. The circuit board according to claim 3, wherein, The first through electrode also includes a third electrode portion disposed on the second electrode portion.
14. The circuit board according to claim 13, wherein, The third electrode portion includes: The fifth part is disposed in the first through hole and corresponds to the through portion; and The sixth part is disposed on the fifth part and protrudes on the second insulating layer.
15. The circuit board according to claim 14, wherein, The second electrode portion includes a concave surface that contacts the third electrode portion, and The third electrode portion includes a convex surface that contacts the concave surface of the second electrode portion.
16. The circuit board according to claim 14, wherein, The pad portion along the horizontal direction also includes a third pad portion configured as the third electrode portion, as well as the first pad portion and the second pad portion.
17. The circuit board according to claim 15, wherein, The surface roughness of the third surface of the convex surface of the third electrode portion is less than the surface roughness of the upper surface of the third electrode portion.
18. The circuit board according to claim 16, wherein, The first pad portion, the second pad portion, and the third pad portion are located on the same plane.
Citation Information
Patent Citations
Printed circuit board and method for manufacturing same
KR1020150031031A