All-MOSFET Low-Voltage Bandgap Reference Circuit Based on Depletion MOS Transistors

Abstract

The present invention discloses a fully MOSFET low-voltage bandgap reference circuit based on a depletion-type MOS transistor, which includes a PTAT current unit (1), a compensation and matching unit (2), a current mirror unit (3), a current mirror unit (4), and a CTAT voltage unit (5). The PTAT current unit (1) is used to generate a PTAT current proportional to temperature; the compensation and matching unit (2) is used to generate a matching current to eliminate the noise of the PTAT current; the current mirror unit (3) is used to copy the current proportional to temperature generated by the PATA current unit; the current mirror unit (4) is used to copy the matching current generated by the compensation and matching unit (2); the CTAT voltage unit (5) is used to generate a voltage with a negative temperature coefficient. The present invention uses a depletion-type NMOS transistor to generate the PTAT current, which is applicable to high-frequency circuits and does not require gate biasing, and the circuit structure is simple. Moreover, a fully MOSFET circuit structure is adopted, and the process compatibility is good. The present invention is applicable to occasions of low bandgap voltage output and high-frequency circuit design.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic circuits, and particularly relates to a fully MOSFET low-voltage bandgap reference circuit based on a depletion-type MOS transistor. Background Art

[0002] The bandgap voltage reference is almost an indispensable circuit module in every high-performance IC, and is widely used in various integrated circuits, such as high-precision sensor detection circuits, digital-to-analog and analog-to-digital conversion circuits, high-precision portable devices, system-on-chip (SOC), etc. With the development of modern technology, integrated circuits have higher and higher requirements in terms of scale, power consumption and precision, and are becoming more and more high-performance, high-precision, low-voltage and low-power, and also tend to be miniaturized in volume. This puts higher requirements on the bandgap reference voltage module, and the designed reference voltage needs to have higher precision, lower power consumption and more stable performance. Especially in the photocurrent detection in light sensing, a bandgap voltage output with high precision and low power consumption is required.

[0003] The traditional bandgap reference circuit is as Figure 1 shown. This circuit is mainly a bandgap reference circuit designed based on the base-emitter voltages of two bipolar transistors. By matching the positive and negative temperature coefficients of the circuit, the temperature coefficient of the bandgap voltage can be made very low. However, the output voltage of this circuit can generally only be fixed at about 1.25V, and it is difficult to achieve a low bandgap voltage output. At the same time, bipolar circuits generally have large power consumption and are not suitable for low-power design occasions.

[0004] The common subthreshold bandgap reference circuit is as Figure 2 shown. This circuit is mainly a bandgap reference circuit designed based on the subthreshold effect of MOS transistors. This bandgap circuit makes the MOS transistors work in the subthreshold region, and in terms of power consumption, it is much smaller than the traditional bandgap reference circuit. But at the same time, since the MOS transistors in the circuit work in the subthreshold region, the current is too small, and there are certain problems in terms of noise, speed, etc. Summary of the Invention

[0005] In view of the above problems existing in the bandgap reference circuit, the present invention proposes a fully MOSFET low-voltage bandgap reference circuit based on a depletion-type MOS transistor. The present invention uses a depletion-type NMOS transistor with a small threshold voltage to make the circuit work in the saturation region. At this time, the working current is greater than the current when the MOS transistor works in the subthreshold region, and since V GS is small, the working current is not large, taking into account both power consumption and noise. At the same time, the circuit uses a fully MOSFET structure and realizes a low bandgap voltage output.

[0006] The present invention can be implemented by the following technical solutions:

[0007] A full-MOSFET low-voltage bandgap reference circuit based on depletion-mode MOS transistors uses a depletion-mode NMOS transistor to generate a PTAT current without gate biasing. The circuit structure is simple, and it adopts a full-MOSFET structure with good process compatibility. The full-MOSFET low-voltage bandgap reference circuit based on depletion-mode MOS includes a PTAT current unit 1, a compensation and matching unit 2, a current mirror unit 3, a current mirror unit 4, and a CTAT voltage unit 5. The PTAT current unit 1 is used to generate a PTAT current proportional to temperature. The compensation and matching unit 2 is used to generate a matching current to eliminate the noise of the PTAT current. The current mirror unit 3 is used to copy the PTAT current generated by the PTAT current unit. The current mirror unit 4 is used to copy the matching current generated by the compensation and matching unit 2. The CTAT voltage unit 5 is used to generate a voltage with a negative temperature coefficient.

[0008] The above-mentioned PTAT current unit 1 includes a first depletion-mode NMOS transistor MN1. Among them: for the first depletion-mode NMOS transistor MN1, its gate, source, and substrate are all connected to GND, and its drain outputs a positive temperature coefficient current IPTAT.

[0009] The above-mentioned compensation and matching unit 2 includes a second depletion-mode NMOS transistor MN2. Among them: for the second depletion-mode NMOS transistor MN2, its gate, source, and substrate are all connected to GND, and its drain outputs a matching current Imatch.

[0010] The above-mentioned current mirror unit 3 includes a first PMOS transistor MP1, a second PMOS transistor MP2, a third PMOS transistor MP3, a fourth PMOS transistor MP4, and a first resistor R1, which together form a self-biased low-voltage cascode current mirror structure. Among them:

[0011] For the first PMOS transistor MP1 and the second PMOS transistor MP2, their sources are commonly connected and used as the first input terminal to connect to the power supply VDD, and their gates are connected and connected to the drain of the third PMOS transistor MP3. The drain of the first PMOS transistor MP1 is connected to the source of the third PMOS transistor MP3 and one end of the first resistor R1, and the drain of the second PMOS transistor MP2 is connected to the source of the fourth PMOS transistor MP4.

[0012] For the third PMOS transistor MP3 and the fourth PMOS transistor MP4, their gates are connected and connected to the other end of the first resistor R1 and used as the second input terminal to connect to the positive temperature coefficient current IPTAT. The drain of the fourth PMOS transistor MP4 is used as the output terminal to output a copied current IBAK.

[0013] The above-mentioned current mirror unit 4 includes a fifth PMOS transistor MP5 and a sixth PMOS transistor MP6. Among them:

[0014] The source electrodes of the fifth PMOS transistor MP5 and the sixth PMOS transistor MP6 are commonly connected and serve as a first input terminal to connect the replicated current IBAK, and their gate electrodes are connected to each other and connected to the drain electrode of the fifth PMOS transistor MP5 and serve as a second input terminal to connect the matching current Imatch; the drain electrode of the sixth PMOS transistor MP6 serves as an output terminal to output a signal to the CTAT voltage unit 5.

[0015] The above CTAT voltage unit 5 includes a third NMOS transistor MN3; wherein: for the third NMOS transistor MN3, its gate electrode, drain electrode are connected to the drain electrode of the sixth PMOS transistor MP6, serving as an output terminal of the bandgap reference voltage; its source electrode is connected to GND.

[0016] Compared with the prior art, the present invention has the following advantages:

[0017] 1. The present invention uses a depletion-type NMOS transistor to generate a PTAT current, and uses a depletion-type NMOS transistor with a smaller threshold voltage to make the circuit operate in the saturation region. At this time, the working current is greater than the current when the MOS transistor operates in the subthreshold region, and because V GS is small, the working current is not large, taking into account both power consumption and noise.

[0018] 2. The present invention uses a self-biased low-voltage cascode current mirror and a matching compensation circuit to improve the accuracy of the output bandgap voltage.

[0019] 3. The present invention realizes a low bandgap voltage output, and the circuit structure is simple, suitable for the occasion of low power supply voltage.

[0020] 4. The present invention adopts a full MOSFET structure, with good process compatibility. Description of the Drawings

[0021] Figure 1 is a circuit diagram of a traditional bipolar transistor-based bandgap reference.

[0022] Figure 2 is a circuit diagram of a common MOS transistor subthreshold effect-based bandgap reference.

[0023] Figure 3 is a circuit diagram of the bandgap reference of this patent based on depletion-type MOS transistors. Detailed Embodiment

[0024] Next, the present invention will be further described in combination with the drawings of the specification and relevant knowledge, and described clearly and completely.

[0025] Refer to Figure 3, a full-MOSFET low-voltage bandgap reference circuit based on depletion-mode MOS transistors provided by an embodiment of the present invention, includes a PTAT current unit 1, a compensation matching unit 2, a current mirror unit 3, a current mirror unit 4, and a CTAT voltage unit 5. The PTAT current unit 1 is used to generate a PTAT current proportional to temperature; the compensation matching unit 2 is used to generate a matching current to eliminate noise of the PTAT current; the current mirror unit 3 is used to copy the PTAT current generated by the PATA current unit; the current mirror unit 4 is used to copy the matching current generated by the compensation matching unit 2; the CTAT voltage unit 5 is used to generate a voltage with a negative temperature coefficient.

[0026] The full-MOSFET low-voltage bandgap reference circuit based on depletion-mode MOS transistors is characterized in that the PATA current unit 1 includes a first depletion-mode NMOS transistor MN1; where:

[0027] For the first depletion-mode NMOS transistor MN1, its gate, source, and substrate are all connected to GND, and its drain is connected to the common terminal of the gate of the third PMOS transistor MP3, the gate of the fourth PMOS transistor MP4, and one end of the first resistor R1.

[0028] The threshold voltage V of the first depletion-mode NMOS transistor MN1 TH1 is negative, approximately V TH1 =-80 mV. Since its gate, source, and substrate are all connected to GND, then V GS1 >VT H1 is in a constant conduction state. By adjusting the aspect ratios of the first PMOS transistor MP1, the third PMOS transistor MP3, and the first depletion-mode NMOS transistor MN1 and the resistance value of the first resistor R1, the first depletion-mode NMOS transistor MN1 is located in the saturation region, and the magnitude of the saturation current can be expressed as:

[0029]

[0030] The compensation matching unit 2 includes a second depletion-mode NMOS transistor MN2; where: For the second depletion-mode NMOS transistor MN2, its gate, source, and substrate are all connected to GND, and its drain is connected to the gate of the fifth PMOS transistor MP35 and the gate of the sixth PMOS transistor MP6.

[0031] The threshold voltage V of the second depletion-mode NMOS transistor MN2 TH2 is negative, approximately V TH2 =-80 mV. Since its gate, source, and substrate are all connected to GND, then V GS2 >VT H2It is in a constant conduction state. By adjusting the aspect ratios of the second PMOS transistor MP2, the fourth PMOS transistor MP4, the fifth PMOS transistor MP5, and the first depletion NMOS transistor MN2, the second depletion NMOS transistor MN2 is located in the saturation region, and the magnitude of the saturation current can be expressed as:

[0032]

[0033] The current mirror unit 3 consists of a first PMOS transistor MP1, a second PMOS transistor MP2, a third PMOS transistor MP3, a fourth PMOS transistor MP4, and a first resistor R1 to form a self - biased low - voltage cascode current mirror structure; where:

[0034] For the first PMOS transistor MP1, its gate is connected to the gate of the second PMOS transistor MP2 and the other end of the first resistor R1; its drain is connected to the source of the third PMOS transistor MP3; its source is connected to the power supply VDD;

[0035] For the second PMOS transistor MP2, its gate is connected to the gate of the first PMOS transistor MP1 and the other end of the first resistor R1; its drain is connected to the source of the fourth PMOS transistor MP4; its source is connected to the power supply VDD;

[0036] For the third PMOS transistor MP3, its gate is connected to the gate of the fourth PMOS transistor MP4 and one end of the first resistor R1;

[0037] For the fourth PMOS transistor MP4, its gate is connected to the gate of the third PMOS transistor MP3 and one end of the first resistor R1;

[0038] For the first resistor R1, one end of it is connected to the common terminal of the gate of the third PMOS transistor MP3, the gate of the fourth PMOS transistor MP4, and the drain of the first depletion NMOS transistor MN1.

[0039] The aspect ratios of the first PMOS transistor MP1 and the second PMOS transistor MP2 are exactly equal. Therefore, the currents flowing through the first PMOS transistor MP1 and the second PMOS transistor MP2 are equal, that is:

[0040] I MP1 =I MP2 (3)

[0041] The current mirror unit 4 includes a fifth PMOS transistor MP5 and a sixth PMOS transistor MP6; where:

[0042] The fifth PMOS transistor MP5 has its gate connected to the gates of the sixth PMOS transistor MP6 and the drain of the second depletion-mode NMOS transistor MN2; its drain is connected to the gates of the fifth PMOS transistor MP5, the sixth PMOS transistor MP6 and the drain of the second depletion-mode NMOS transistor MN2; its source is connected to the drain of the fourth PMOS transistor and the source of the sixth PMOS transistor;

[0043] For the sixth PMOS transistor MP6, its gate is connected to the gates, drain of the fifth PMOS transistor MP5 and the drain of the second depletion-mode NMOS transistor MN2; its drain is connected to the gates and drain of the third NMOS transistor MN3 and serves as the output terminal of the bandgap reference voltage.

[0044] The width-to-length ratios of the fifth PMOS transistor MP5 and the sixth PMOS transistor MP6 are exactly equal. Therefore, the currents flowing through the fifth PMOS transistor MP5 and the sixth PMOS transistor MP6 are equal, that is:

[0045] I MP5 = I MP6 (4)

[0046] Combining equations (1), (2), (3), and (4), the current flowing through the sixth PMOS transistor MP6 is:

[0047]

[0048] The current mirror unit 4 can also adopt the same circuit structure as the current mirror unit 3. Similarly, the current mirror unit 3 can also adopt the same circuit structure as the current mirror unit 4.

[0049] The CTAT voltage unit (5) includes the third NMOS transistor MN3; where: for the third NMOS transistor MN3, its gate, drain are connected to the drain of the sixth PMOS transistor MP6 and serves as the output terminal of the bandgap reference voltage; its source is connected to GND.

[0050] The current flowing through the third NMOS transistor NM3 is equal to the current flowing through the sixth PMOS transistor MP6, that is:

[0051] I MN3 = I MP6 (6)

[0052]

[0053] The third NMOS transistor NM3 is in diode connection and in the saturation region, and its current is:

[0054]

[0055] Then,

[0056] Combined with equations (7), (8), and (9), the reference output voltage is as follows:

[0057]

[0058] In the formula, both VTH1 and VTH3 have negative temperature coefficients, and |VTH1| has a positive temperature coefficient. By adjusting the aspect ratios of the first depletion-type NMOS transistor MN1, the second depletion-type NMOS transistor MN2, and the fourth NMOS transistor MN4, the bandgap reference voltage output can be obtained.

[0059] The above description is only a specific example of the present invention and does not constitute any limitation to the present invention. Obviously, for those skilled in the art, after understanding the content and principle of the present invention, various modifications and changes in form and details may be made without departing from the principle and structure of the present invention. However, these modifications and changes based on the idea of the present invention are still within the protection scope of the claims of the present invention.

Claims

1. A fully MOSFET low-voltage bandgap reference circuit based on depletion-mode MOS transistors, characterized in that It includes a PTAT current unit (1), a compensation and matching unit (2), a first current mirror unit (3), a second current mirror unit (4), and a CTAT voltage unit (5); The PTAT current unit (1) is used to generate a PTAT current proportional to temperature and output a positive temperature coefficient current IPTAT. It includes a first depletion-mode NMOS transistor MN1, whose gate, source, and substrate are all connected to GND, and its drain outputs the positive temperature coefficient current IPTAT; The compensation and matching unit (2) is used to generate a matching current Imatch to eliminate the noise of the PTAT current. It includes a second depletion-mode NMOS transistor MN2; whose gate, source, and substrate are all connected to GND, and its drain outputs the matching current Imatch; The first current mirror unit (3) is used to copy the positive temperature coefficient current IPTAT output by the PTAT current unit (1) and output a copied current IBAK to the second current mirror unit (4). The first current mirror unit (3) includes a first PMOS transistor MP1, a second PMOS transistor MP2, a third PMOS transistor MP3, a fourth PMOS transistor MP4, and a first resistor R1, which together form a self-biased low-voltage cascode current mirror structure. Among them: the sources of MP1 and MP2 are commonly connected and used as the first input terminal to connect to the power supply VDD, and their gates are connected and connected to the drain of MP3 and one end of R1; the drain of MP1 is connected to the source of MP3, and the drain of MP2 is connected to the source of MP4; for MP3 and MP4, their gates are connected and connected to the other end of R1 and used as the second input terminal to connect to the positive temperature coefficient current IPTAT; the drain of MP4 is used as the output terminal to output the copied current IBAK; The second current mirror unit (4) is used to copy the matching current generated by the compensation and matching unit (2) and supply it to the CTAT voltage unit (5). The second current mirror unit (4) includes a fifth PMOS transistor MP5 and a sixth PMOS transistor MP6; the sources of MP5 and MP6 are commonly connected and used as the first input terminal to connect to the copied current IBAK, and their gates are connected and connected to the drain of MP5 and used as the second input terminal to connect to the matching current Imatch; the drain of MP6 is used as the output terminal to output a signal to the CTAT voltage unit (5); The CTAT voltage unit (5) is used to generate a voltage V with a negative temperature coefficient REF ; the CTAT voltage unit (5) includes a third NMOS transistor MN3; wherein: for the MN3, its gate, drain are connected to the drain of MP6 in the second current mirror unit (4), serving as the output terminal of the bandgap reference circuit, and its source is connected to GND.

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