A manufacturing method of a driving circuit, a driving circuit and a display module

Abstract

The application discloses a manufacturing method of a driving circuit, the driving circuit and a display module. The manufacturing method of the driving circuit comprises the following steps: forming a first polysilicon layer pattern on a substrate; forming an insulating layer with a lap joint hole on the first polysilicon layer pattern, and the first polysilicon layer pattern is exposed at the lap joint hole; forming a first pre-prepared amorphous silicon layer with conductivity on the insulating layer by adopting a deposition amorphous silicon process and a heavy doping process at the same time, the first pre-prepared amorphous silicon layer is lapped with the first polysilicon layer pattern through the lap joint hole; converting the first pre-prepared amorphous silicon layer into a first pre-prepared polysilicon layer, the first pre-prepared polysilicon layer has a first channel pre-prepared area and first conductive areas located on both sides of the first channel pre-prepared area, and the first conductive areas are projected onto the insulating layer and cover the lap joint hole; performing semiconductorization on the first channel pre-prepared area, and forming a second polysilicon layer pattern. The manufacturing method can effectively lap the first polysilicon layer pattern and the second polysilicon layer pattern.

Description

Technical Field

[0001] The present invention relates to the technical field of display devices, and in particular to a manufacturing method of a drive circuit, a drive circuit and a display module. Background Art

[0002] In high-resolution (PPI) display panels, to minimize the area occupied by each pixel unit, some thin-film transistors (TFTs) in the pixel unit's driver circuit need to be stacked one above the other. Low-temperature polysilicon (LTPS) TFTs are commonly used in driver circuits. When the source and drain electrodes of two stacked TFTs in a driver circuit are connected, this can be achieved by overlapping the two low-temperature polysilicon (LTPS) layers in the upper and lower TFTs. Currently, two layers of low-temperature polysilicon layers are overlapped using vias. The low-temperature polysilicon layer is formed by amorphous silicon (a-Si) undergoing an excimer laser annealing process and then heavily doping the non-channel area through ion implantation. However, the excimer laser annealing process cannot crystallize the amorphous silicon located at the upper and lower edges of the via sidewalls, and the doping concentration of the polysilicon located at the upper and lower edges of the via sidewalls is low during subsequent ion implantation in the low-temperature polysilicon layer. This will cause the portion of the upper low-temperature polysilicon layer that passes through the via to be unable to be conductive after doping, which in turn causes abnormal resistance at the overlap between the upper and lower low-temperature polysilicon layers, and the two low-temperature polysilicon layers cannot be effectively overlapped. Summary of the Invention

[0003] The present invention provides a method for manufacturing a driving circuit, a driving circuit and a display module. The above-mentioned driving circuit can make the area of ​​the upper low-temperature polysilicon layer that cannot be normally crystallized and doped conductive, completely solving the conductivity problem of the upper and lower low-temperature polysilicon layers, and can effectively overlap the first polysilicon layer pattern and the second polysilicon layer pattern.

[0004] To achieve the above object, the present invention provides the following technical solutions:

[0005] A method for manufacturing a driving circuit, comprising:

[0006] forming a first polysilicon layer pattern on a substrate;

[0007] forming an insulating layer having a landing hole on the first polysilicon layer pattern, wherein the first polysilicon layer pattern is exposed at the landing hole;

[0008] Amorphous silicon is deposited and a heavy doping process is performed simultaneously to form a first prefabricated amorphous silicon layer having conductivity on the insulating layer, wherein the first prefabricated amorphous silicon layer is overlapped with the first polysilicon layer pattern layer through the overlap hole;

[0009] converting the first prefabricated amorphous silicon layer into a first prefabricated polysilicon layer, wherein the first prefabricated polysilicon layer has a first channel prefabricated region and first conductive regions located on both sides of the first channel prefabricated region, wherein the orthographic projection of the first conductive region on the insulating layer covers the overlapping hole;

[0010] The first channel prefabricated region is semiconductorized to form a second polysilicon layer pattern, wherein the second polysilicon layer pattern includes a first channel formed by the semiconductorization of the first channel prefabricated region and a first electrode formed by the first conductive region.

[0011] In the manufacturing method of the driving circuit provided by the present invention, after forming a first polysilicon layer pattern on a substrate, in the process of forming a second polysilicon layer pattern, a process of depositing amorphous silicon and performing heavy doping at the same time is first used to form a first prefabricated amorphous silicon layer with conductivity on the insulating layer. In this way, the doping concentration of the doping ions of the amorphous silicon located at the upper and lower edge positions of the overlapping hole can be guaranteed, so that the first prefabricated amorphous silicon layer can effectively conduct electricity at the overlapping hole. Then, the first prefabricated amorphous silicon layer is converted into a first prefabricated polysilicon layer. At this time, the first prefabricated polysilicon layer is a conductive polysilicon layer. In this way, the parts of the first prefabricated polysilicon layer located at the upper and lower edge positions of the overlapping hole are still conductive. Finally, the first channel prefabricated area of ​​the first prefabricated polysilicon layer is semiconductorized to form a second polysilicon layer pattern. Compared with the existing technology, the manufacturing method of the above-mentioned driving circuit can make the area of ​​the upper low-temperature polysilicon layer that could not be normally crystallized and doped conductive, completely solving the conductivity problem of the upper and lower low-temperature polysilicon layers, and can effectively overlap the first polysilicon layer pattern and the second polysilicon layer pattern. Moreover, the implementation method is simple and the effect is good.

[0012] Optionally, the semiconductorizing the first channel prefabricated region includes:

[0013] forming a photoresist layer on the first prefabricated polysilicon layer;

[0014] removing a portion of the photoresist layer located on the first channel prefabricated region to expose the first channel prefabricated region;

[0015] semiconductorizing the first channel prefabricated region by using a reverse doping process;

[0016] The photoresist layer is removed.

[0017] Optionally, removing the portion of the photoresist layer located on the first channel prefabricated region includes:

[0018] Using a first mask plate to expose and develop the photoresist layer to form a photoresist completely reserved area, a photoresist semi-reserved area, and a photoresist completely removed area, wherein the orthographic projection of the photoresist completely reserved area on the first prefabricated polysilicon layer overlaps with the first conductive area, and the orthographic projection of the photoresist semi-reserved area on the first prefabricated polysilicon layer overlaps with the first channel prefabricated area;

[0019] Removing the portion of the first prefabricated polysilicon layer located in the photoresist completely removed area by an etching process to form a prefabricated pattern of the second polysilicon layer;

[0020] The remaining photoresist layer is ashed to completely remove the photoresist layer on the first channel prefabricated region.

[0021] Optionally, removing the portion of the photoresist layer located on the first channel prefabricated region includes:

[0022] The photoresist layer is exposed and developed using a second mask to form a photoresist completely retained area and a photoresist completely removed area, wherein the orthographic projection of the photoresist completely removed area on the first prefabricated polysilicon layer overlaps with the first channel prefabricated area.

[0023] Optionally, after semiconductorizing the first channel pre-region, a second polysilicon layer pattern is formed.

[0024] Optionally, after forming the second polysilicon layer pattern, the method further includes:

[0025] forming a first gate insulating layer on a side of the second polysilicon layer pattern away from the substrate;

[0026] forming a first gate metal layer on a side of the first gate insulating layer away from the substrate;

[0027] The first gate metal layer is patterned using a third mask to form a first gate layer pattern.

[0028] Optionally, the second mask plate and the third mask plate are the same mask plate.

[0029] Optionally, forming a first polysilicon layer pattern on one side of the substrate includes:

[0030] forming a second prefabricated amorphous silicon layer on one side of the substrate;

[0031] converting the second prefabricated amorphous silicon layer into a second prefabricated polysilicon layer, wherein the second prefabricated polysilicon layer includes a second channel prefabricated region and second conductive regions located on both sides of the second channel prefabricated region;

[0032] performing a heavy doping process on the second conductive region to make the second conductive region conductive, wherein the type of heavy doping in the second conductive region is the same as the type of heavy doping in the first conductive region;

[0033] The second prefabricated polysilicon layer is patterned to form the first polysilicon layer pattern, wherein the first polysilicon layer pattern includes a second channel formed by the second channel prefabricated region and a second electrode formed by heavily doping the second conductive region.

[0034] Optionally, the ions doped in the second conductive region and the ions doped in the first conductive region are both B+ ions or P- ions.

[0035] Optionally, the heavily doped concentration of the second conductive region is the same as the heavily doped concentration of the first conductive region.

[0036] Optionally, converting the first prefabricated amorphous silicon layer into a first prefabricated polycrystalline silicon layer includes:

[0037] performing a high-temperature dehydrogenation treatment on the first prefabricated amorphous silicon layer;

[0038] The first prefabricated amorphous silicon layer after high-temperature dehydrogenation is subjected to excimer laser annealing to form a first prefabricated polycrystalline silicon layer.

[0039] The present invention further provides a driving circuit, which is manufactured by any one of the driving circuit manufacturing methods provided in the above technical solutions, and the driving circuit comprises:

[0040] substrate;

[0041] a first polysilicon layer pattern located on the substrate;

[0042] an insulating layer located on a side of the first polysilicon layer pattern away from the substrate, the insulating layer having a lap hole;

[0043] A second polysilicon layer pattern is located on a side of the insulating layer away from the substrate. The second polysilicon layer pattern includes a first channel and first electrodes located on both sides of the first channel. The first electrode overlaps the first polysilicon layer pattern through the overlapping hole.

[0044] The present invention also provides a display module, comprising the driving circuit provided in the above technical solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A flowchart of a method for manufacturing a driving circuit provided by an embodiment of the present invention;

[0046] Figures 2 to 5 A schematic diagram of a manufacturing process of a driving circuit provided by an embodiment of the present invention;

[0047] Figure 6 for Figure 1 The specific process flow chart of step S15 is shown in FIG;

[0048] Figure 7 for Figure 6 The specific process flow chart of step S152 is shown in FIG;

[0049] Figures 8 to 10 for Figure 6 Schematic diagram of the production process of step S152 shown in FIG;

[0050] Figure 11 For another Figure 6 Schematic diagram of the manufacturing process of step S152 shown in FIG;

[0051] Figure 12 for Figure 1 The specific process flow chart of step S16 is shown in FIG;

[0052] Figure 13 A schematic structural diagram of a driving circuit provided by an embodiment of the present invention;

[0053] Figure 14 for Figure 1 The specific process flow chart of step S11 is shown in FIG;

[0054] Figure 15 for Figure 1 The specific process flow chart of step S14 is shown in FIG.

[0055] icon:

[0056] 1-substrate; 2-first buffer layer; 31-first polysilicon layer pattern; 32-second gate layer pattern; 33-connecting trace; 4-insulating layer; 41-second gate insulating layer; 42-third gate insulating layer; 43-second buffer layer; 5-overlapping hole; 61A-first prefabricated amorphous silicon layer; 61B-first prefabricated polysilicon layer; 61C-prefabricated pattern of second polysilicon layer pattern; 61-second polysilicon layer pattern; 611-first channel; 612-first electrode; 62-first gate layer pattern; 7-photoresist layer; 8-first mask plate; 91-first gate insulating layer; 92-planarization layer; 10-data line. DETAILED DESCRIPTION

[0057] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0058] Please refer to Figure 1 An embodiment of the present invention provides a method for manufacturing a driving circuit, comprising: Figure 1 The following steps are shown:

[0059] Step S11: forming a first polysilicon layer pattern 31 on the substrate 1;

[0060] Among them, such as Figure 2 As shown, a first buffer layer 2 may be formed between the substrate 1 and the first polysilicon layer pattern 31 , which is not limited here and depends on actual conditions.

[0061] Step S12: forming an insulating layer 4 having a landing hole 5 on the first polysilicon layer pattern 31, wherein the first polysilicon layer pattern 31 is exposed at the landing hole 5. Figure 2 As shown;

[0062] Step S13: A process of depositing amorphous silicon and performing heavy doping is used to form a first prefabricated amorphous silicon layer 61A having conductivity on the insulating layer 4. The first prefabricated amorphous silicon layer 61A is overlapped with the first polysilicon layer pattern 31 through the overlap hole 5. Figure 3 As shown;

[0063] Step S14: converting the first prefabricated amorphous silicon layer 61A into a first prefabricated polysilicon layer 61B, wherein the first prefabricated polysilicon layer 61B has a first channel prefabricated region and first conductive regions located on both sides of the first channel prefabricated region, and the orthographic projection of the first conductive region on the insulating layer 4 covers the overlapping hole 5, as shown in FIG. Figure 4 As shown;

[0064] Step S15: semiconductorizing the first channel prefabricated region and forming a second polysilicon layer pattern 61. The second polysilicon layer pattern 61 includes a first channel 611 formed by semiconductorizing the first channel prefabricated region and a first electrode 612 formed by the first conductive region. Figure 5 shown.

[0065] In the manufacturing method of the driving circuit provided by the embodiment of the present invention, after forming the first polysilicon layer pattern 31 on the substrate 1, in the process of forming the second polysilicon layer pattern 61, a process of depositing amorphous silicon and performing heavy doping is first used to form a conductive first prefabricated amorphous silicon layer 61A on the insulating layer 4. This can ensure the doping concentration of the doping ions of the amorphous silicon located at the upper and lower edges of the overlapping hole 5, so that the first prefabricated amorphous silicon layer 61A can effectively conduct electricity at the overlapping hole 5. Then, the first prefabricated amorphous silicon layer 61A is converted into a first prefabricated polysilicon layer 61B. At this time, the first prefabricated polysilicon layer 61B is a conductive polysilicon layer. In this way, the parts of the first prefabricated polysilicon layer 61B located at the upper and lower edges of the overlapping hole 5 are still conductive. Finally, the first channel prefabricated area of ​​the first prefabricated polysilicon layer 61B is semiconductorized to form the second polysilicon layer pattern 61. Compared with the existing technology, the manufacturing method of the above-mentioned driving circuit can make the area of ​​the upper low-temperature polysilicon layer that could not be normally crystallized and doped conductive, completely solving the conductivity problem of the upper and lower low-temperature polysilicon layers, and can effectively overlap the first polysilicon layer pattern 31 and the second polysilicon layer pattern 61. Moreover, the implementation method is simple and the effect is good.

[0066] In the manufacturing method of the driving circuit provided by the above embodiment of the invention, Figure 6 As shown, in step S15, the first channel prefabricated region is semiconductorized, which specifically includes the following steps:

[0067] Step S151: forming a photoresist layer 7 on the first pre-fabricated polysilicon layer 61B;

[0068] Step S152: removing the portion of the photoresist layer 7 located on the first trench prefabricated region to expose the first trench prefabricated region;

[0069] Step S153: semiconductorizing the first channel prefabricated region using a reverse doping process;

[0070] Step S154: removing the photoresist layer 7.

[0071] Specifically, if Figure 7 As shown, the above step S152 removes the portion of the photoresist layer 7 located on the first trench prefabricated region, which specifically includes the following steps:

[0072] Step S1521: Use the first mask plate 8 to expose and develop the photoresist layer 7, such as Figure 8 As shown, a photoresist completely reserved area, a photoresist semi-reserved area and a photoresist completely removed area are formed. The orthographic projection of the photoresist completely reserved area on the first prefabricated polysilicon layer 61B overlaps with the first conductive area, and the orthographic projection of the photoresist semi-reserved area on the first prefabricated polysilicon layer 61B overlaps with the first channel prefabricated area. Figure 9 As shown;

[0073] At this time, the photoresist layer 7 can be a positive resist layer or a negative resist layer. Different resist layers correspond to different shapes of the first mask 8 , which is not limited here and can be determined according to actual conditions.

[0074] Step S1522: The portion of the first prefabricated polysilicon layer 61B located in the photoresist completely removed area is removed by etching to form a prefabricated pattern 61C of the second polysilicon layer pattern, as shown in FIG. Figure 10 As shown;

[0075] Step S1523: performing an ashing process on the remaining photoresist layer 7 to completely remove the photoresist layer 7 on the first trench prefabricated region.

[0076] In the above-mentioned manufacturing method, after step S1523, step S153 is performed to semiconductorize the first channel prefabricated area using a reverse doping process, thereby directly forming a second polysilicon layer pattern 61. The processing of the photoresist layer 7 and the preparation of the second polysilicon layer pattern 61 can be completed through one mask plate, which can reduce the number of mask plates used, simplify the manufacturing process, and save manufacturing costs.

[0077] Optionally, in step S152, the portion of the photoresist layer 7 located on the first trench prefabricated region is removed, and the specific steps may also be:

[0078] The photoresist layer 7 is exposed and developed using a second mask to form a photoresist completely retained area and a photoresist completely removed area. The orthographic projection of the photoresist completely removed area on the first prefabricated polysilicon layer 61B overlaps with the first channel prefabricated area. Figure 11 shown.

[0079] In the above manufacturing method, the photoresist layer 7 is directly exposed and developed through the second mask plate, and the portion of the photoresist layer 7 located on the first channel prefabricated area is directly removed to expose the first channel prefabricated area, and then the first channel prefabricated area is semiconductorized. The manufacturing process is simple and convenient to manufacture.

[0080] At this time, the photoresist layer 7 can be a positive resist layer or a negative resist layer. Different resist layers correspond to different shapes of the first mask 8 , which is not limited here and can be determined according to actual conditions.

[0081] At this time, after the first channel pre-region is semiconductorized in step S15 , the first pre-polysilicon layer 61B needs to be patterned to form a second polysilicon layer pattern 61 , thereby completing the overlap between the first polysilicon layer pattern 31 and the second polysilicon layer pattern 61 .

[0082] In the manufacturing method of the driving circuit provided by the above embodiment of the invention, Figure 12As shown, after forming the second polysilicon layer pattern 61 in step S15, the following steps are further included:

[0083] Step S161 : forming a first gate insulating layer 91 on a side of the second polysilicon layer pattern 61 away from the substrate 1 ;

[0084] Step S162: forming a first gate metal layer on a side of the first gate insulating layer 91 away from the substrate 1;

[0085] Step S163: patterning the first gate metal layer using a third mask to form a first gate layer pattern 62, such as Figure 13 shown.

[0086] In the above-described fabrication method, since the first gate layer pattern 62 is located above the second polysilicon layer pattern 61 and the two are arranged in correspondence, a single mask plate can be used when fabricating the first gate layer pattern 62 and the second polysilicon layer pattern 61. That is, the second mask plate and the third mask plate can be the same mask plate, which can reduce the number of masks used and save fabrication costs. In this case, the above-described photoresist layer 7 can be a negative photoresist.

[0087] The first gate layer pattern 62 and the second polysilicon layer pattern 61 can constitute the upper thin-film transistor of the driving circuit. The first electrodes 612 located on both sides of the first channel 611 in the second polysilicon layer pattern 61 serve as the source and drain of the upper thin-film transistor. The source of the upper thin-film transistor can overlap with the first polysilicon layer pattern 31 via the overlap hole 5. The first gate layer pattern 62 serves as the gate of the upper thin-film transistor. After step S163, the process can further include forming a planarization layer 92 on the first gate layer pattern 62, and forming a data line 10 on the planarization layer 92. The data line 10 can be connected to the drain of the upper thin-film transistor via a via.

[0088] In the manufacturing method of the driving circuit provided by the above embodiment of the invention, Figure 14 As shown, step S11 forms a first polysilicon layer pattern 31 on one side of the substrate 1, which may include the following steps:

[0089] S111: forming a second prefabricated amorphous silicon layer on one side of the substrate 1;

[0090] S112: converting the second prefabricated amorphous silicon layer into a second prefabricated polysilicon layer, where the second prefabricated polysilicon layer includes a second channel prefabricated region and second conductive regions located on both sides of the second channel prefabricated region;

[0091] S113: performing a heavy doping process on the second conductive region to make the second conductive region conductive. The heavy doping type of the second conductive region is the same as that of the first conductive region, so that the first polysilicon layer pattern 31 and the second polysilicon layer pattern 61 can achieve good overlap.

[0092] S114 : patterning the second prefabricated polysilicon layer to form a first polysilicon layer pattern 31 . The first polysilicon layer pattern 31 includes a second channel formed by the second channel prefabricated region and a second electrode formed by heavily doping the second conductive region.

[0093] Specifically, the ions doped in the second conductive region and the ions doped in the first conductive region can be both B+ ions or P- ions. Specifically, when depositing and forming the first prefabricated amorphous silicon layer 61A, a doping gas B2H6 / PH3 is used to form the first prefabricated amorphous silicon layer 61A into n+ a-Si or p+ a-Si, and the doping type of the second conductive region needs to be the same as the doping type of the first conductive region. That is, if the second prefabricated polysilicon layer is a PMOS, the second conductive region is heavily doped with B+, and the first prefabricated amorphous silicon layer 61A must be doped with B2H6 during deposition. If the second prefabricated polysilicon layer is an NMOS, the second conductive region is heavily doped with P-, and the first prefabricated amorphous silicon layer must be doped with PH3 during deposition.

[0094] Specifically, the heavily doped concentration of the second conductive region is the same as the heavily doped concentration of the first conductive region, which can reduce the rectification effect.

[0095] In particular, step S12 forms an insulating layer 4 having a landing hole 5 on the first polysilicon layer pattern 31. Specifically, this may include sequentially forming a second gate insulating layer 41, a second gate layer pattern 32, a third gate insulating layer 42, a connecting trace 33, and a second buffer layer 43 on the first polysilicon layer pattern 31. The second gate insulating layer 41, the third gate insulating layer 42, and the second buffer layer 43 constitute the insulating layer 4. The landing hole 5 is formed through the second gate insulating layer 41, the third gate insulating layer 42, and the second buffer layer 43. The second gate layer pattern 32 and the first polysilicon layer pattern 31 may constitute a lower thin-film transistor in the driving circuit. The second electrodes located on both sides of the second channel in the first polysilicon layer pattern 31 serve as the source and drain of the lower thin-film transistor. The drain of the lower thin-film transistor may be connected to the first electrode 612 of the second polysilicon layer pattern 61 via the landing hole 5. The source of the lower thin-film transistor may be connected to the connecting trace 33 via a via. The second gate layer pattern 32 serves as the gate of the lower thin-film transistor.

[0096] In the manufacturing method of the driving circuit provided by the above embodiment of the invention, Figure 15 As shown, step S14 converts the first prefabricated amorphous silicon layer 61A into the first prefabricated polysilicon layer 61B, which may specifically include the following steps:

[0097] S141: performing a high-temperature dehydrogenation treatment on the first prefabricated amorphous silicon layer 61A;

[0098] S142 : performing excimer laser annealing on the first pre-formed amorphous silicon layer 61A after high-temperature dehydrogenation to form a first pre-formed polycrystalline silicon layer 61B.

[0099] Similarly, to convert the second prefabricated amorphous silicon layer into a second prefabricated polysilicon layer, the second prefabricated amorphous silicon layer needs to be subjected to high-temperature dehydrogenation treatment first, and then subjected to excimer laser annealing treatment on the second prefabricated amorphous silicon layer after the high-temperature dehydrogenation treatment to form a second prefabricated polysilicon layer.

[0100] The present invention also provides a driving circuit, which is manufactured by any one of the manufacturing methods of the driving circuit provided in the above technical solutions, such as Figure 13 As shown, the driving circuit includes:

[0101] substrate1;

[0102] a first polysilicon layer pattern 31 located on the substrate 1;

[0103] An insulating layer 4 located on a side of the first polysilicon layer pattern 31 away from the substrate 1 , the insulating layer 4 having a bonding hole 5 ;

[0104] The second polysilicon layer pattern 61 is located on the side of the insulating layer 4 away from the substrate 1 . The second polysilicon layer pattern 61 includes a first channel 611 and first electrodes 612 located on both sides of the first channel 611 . The first electrode 612 overlaps the first polysilicon layer pattern 31 through the overlapping hole 5 .

[0105] In the above-mentioned driving circuit, compared with the existing technology, the area of ​​the upper low-temperature polysilicon layer that could not be normally crystallized and doped can be made conductive, which completely solves the conductivity problem of the upper and lower low-temperature polysilicon layers, and can effectively overlap the first polysilicon layer pattern 31 and the second polysilicon layer pattern 61. Moreover, the implementation method is simple and the effect is good.

[0106] The present invention also provides a display module, comprising the driving circuit provided in the above technical solution.

[0107] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the present invention. Thus, if such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. A method for manufacturing a driving circuit, characterized in that: include: forming a first polysilicon layer pattern on a substrate; forming an insulating layer having a landing hole on the first polysilicon layer pattern, wherein the first polysilicon layer pattern is exposed at the landing hole; A process of depositing amorphous silicon and performing heavy doping simultaneously is used to form a first prefabricated amorphous silicon layer having conductivity on the insulating layer, wherein the first prefabricated amorphous silicon layer is overlapped with the first polysilicon layer pattern layer through the overlap hole; converting the first prefabricated amorphous silicon layer into a first prefabricated polysilicon layer, wherein the first prefabricated polysilicon layer has a first channel prefabricated region and first conductive regions located on both sides of the first channel prefabricated region, wherein the orthographic projection of the first conductive region on the insulating layer covers the overlapping hole; Semiconductorizing the first channel prefabricated region and forming a second polysilicon layer pattern, wherein the second polysilicon layer pattern includes a first channel formed by semiconductorizing the first channel prefabricated region and a first electrode formed by the first conductive region; The semiconductorizing the first channel prefabricated region includes: forming a photoresist layer on the first prefabricated polysilicon layer; removing a portion of the photoresist layer located on the first channel prefabricated region to expose the first channel prefabricated region; semiconductorizing the first channel prefabricated region by using a reverse doping process; The photoresist layer is removed.

2. The method for manufacturing a driving circuit according to claim 1, wherein: The removing of the portion of the photoresist layer located on the first channel prefabricated region comprises: Using a first mask plate to expose and develop the photoresist layer to form a photoresist completely reserved area, a photoresist semi-reserved area, and a photoresist completely removed area, wherein the orthographic projection of the photoresist completely reserved area on the first prefabricated polysilicon layer overlaps with the first conductive area, and the orthographic projection of the photoresist semi-reserved area on the first prefabricated polysilicon layer overlaps with the first channel prefabricated area; Removing the portion of the first prefabricated polysilicon layer located in the photoresist completely removed area by an etching process to form a prefabricated pattern of the second polysilicon layer; The remaining photoresist layer is ashed to completely remove the photoresist layer on the first channel prefabricated region.

3. The method for manufacturing a driving circuit according to claim 1, wherein: The removing of the portion of the photoresist layer located on the first channel prefabricated region comprises: The photoresist layer is exposed and developed using a second mask to form a photoresist completely retained area and a photoresist completely removed area, wherein the orthographic projection of the photoresist completely removed area on the first prefabricated polysilicon layer overlaps with the first channel prefabricated area.

4. The method for manufacturing a driving circuit according to claim 3, wherein: After semiconductorizing the first channel pre-region, a second polysilicon layer pattern is formed.

5. The method for manufacturing a driving circuit according to claim 4, wherein: After forming the second polysilicon layer pattern, the method further includes: forming a first gate insulating layer on a side of the second polysilicon layer pattern away from the substrate; forming a first gate metal layer on a side of the first gate insulating layer away from the substrate; The first gate metal layer is patterned using a third mask to form a first gate layer pattern.

6. The method for manufacturing a driving circuit according to claim 5, wherein: The second mask plate and the third mask plate are the same mask plate.

7. The method for manufacturing a driving circuit according to any one of claims 1 to 6, wherein: The forming of a first polysilicon layer pattern on one side of the substrate comprises: forming a second prefabricated amorphous silicon layer on one side of the substrate; converting the second prefabricated amorphous silicon layer into a second prefabricated polysilicon layer, wherein the second prefabricated polysilicon layer includes a second channel prefabricated region and second conductive regions located on both sides of the second channel prefabricated region; performing a heavy doping process on the second conductive region to make the second conductive region conductive, wherein the type of heavy doping in the second conductive region is the same as the type of heavy doping in the first conductive region; The second prefabricated polysilicon layer is patterned to form the first polysilicon layer pattern, wherein the first polysilicon layer pattern includes a second channel formed by the second channel prefabricated region and a second electrode formed by heavily doping the second conductive region.

8. The method for manufacturing a driving circuit according to claim 7, wherein: The ions doped in the second conductive region and the ions doped in the first conductive region are both B + ions or P - ion.

9. The method for manufacturing a driving circuit according to claim 8, wherein: The heavily doped concentration of the second conductive region is the same as the heavily doped concentration of the first conductive region.

10. The method for manufacturing a driving circuit according to any one of claims 1 to 6, wherein: The converting the first prefabricated amorphous silicon layer into a first prefabricated polysilicon layer comprises: performing a high-temperature dehydrogenation treatment on the first prefabricated amorphous silicon layer; The first prefabricated amorphous silicon layer after high-temperature dehydrogenation is subjected to excimer laser annealing to form a first prefabricated polycrystalline silicon layer.

11. A driving circuit, characterized in that: The driving circuit is manufactured by the manufacturing method according to any one of claims 1 to 10, wherein the driving circuit comprises: substrate; a first polysilicon layer pattern located on the substrate; an insulating layer located on a side of the first polysilicon layer pattern away from the substrate, the insulating layer having a lap hole; A second polysilicon layer pattern is located on a side of the insulating layer away from the substrate. The second polysilicon layer pattern includes a first channel and first electrodes located on both sides of the first channel. The first electrode overlaps the first polysilicon layer pattern through the overlapping hole.

12. A display module, characterized in that: comprising the driving circuit as claimed in claim 11.

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