Method, device and storage medium for locating faulty chip on computing device
By sending broadcast commands and adjusting the baud rate on the computing device, the chip with a damaged PLL circuit can be quickly identified and located, solving the problems of low efficiency and high cost in traditional methods and improving the productivity of computing devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-01
- Publication Date
- 2026-04-07
AI Technical Summary
Traditional methods for locating faulty chips require the introduction of testing equipment and have high operational requirements, resulting in low location efficiency and high cost, which cannot meet the production capacity requirements of computing devices.
By sending a broadcast command at the first baud rate and receiving the response information, the number of chips is determined based on the response information and the location information is written. Then, a broadcast command is sent at a higher second baud rate to locate the faulty chip. The faulty chip is identified by utilizing the characteristic that the PLL circuit cannot respond at high baud rates.
This technology enables rapid and low-cost location of damaged PLL circuit chips in computing devices, improving the productivity and testing efficiency of computing devices.
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Figure CN115308567B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of computers, and in particular to a method for locating a faulty chip on a computing device, a device and a storage medium. BACKGROUND
[0002] At present, various chips on a computing device are connected in series to form a chip array, and the chips output computing power through a serial port. When the chips output computing power, a large amount of data information is transmitted in a very short time through an internal PLL (Phase Locked Loop) circuit. During production or storage of the computing device, electrostatic ESD generated due to various reasons damages the PLL circuit of the chip, resulting in a decrease in computing power of the chip. In order to ensure the computing power of the computing device, the chip with a faulty PLL circuit needs to be quickly located and replaced and repaired.
[0003] In a conventional method for locating a faulty chip, an oscilloscope is used to measure the baud rate of each chip to locate the faulty chip. On the one hand, a test device needs to be introduced, and the operator of the test device needs to meet higher operation requirements. On the other hand, in the case of a high failure rate, the efficiency of locating the faulty chip is low, the cost is high, and it is time-consuming and laborious, which cannot meet the demand for production capacity. SUMMARY
[0004] The present application provides a method for locating a faulty chip on a computing device, a device and a storage medium, which is used to quickly locate a chip with a damaged PLL circuit in the computing device after the computing device is assembled, so as to reduce detection cost and detection time and improve the production capacity of the computing device.
[0005] In a first aspect, the present application provides a method for locating a faulty chip on a computing device, which comprises:
[0006] sending a first broadcast command to the chip on the computing device at a first baud rate, so that the chip responds to the first broadcast command and returns first response information;
[0007] determining the number of chips according to the first response information, and if the number of chips is equal to a preset number, sending locating information to the chip, so that the chip writes the locating information;
[0008] sending a configuration command to the chip to change the working baud rate of the chip to a second baud rate, the second baud rate being greater than the first baud rate;
[0009] sending a second broadcast command to the chip at the second baud rate, so that the chip responds to the second broadcast command and returns second response information, the second response information including the locating information;
[0010] The faulty chip is located based on the second response information.
[0011] In a second aspect, this application provides a computer device, the computer device including a memory and a processor;
[0012] The memory is used to store computer programs;
[0013] The processor is configured to execute the computer program and, when executing the computer program, implement the method for locating a faulty chip on a computing device provided in any of the embodiments of this application.
[0014] Fourthly, this application provides a computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program, which, when executed by a processor, causes the processor to implement a method for locating a faulty chip on a computing device as provided in any of the embodiments of this application.
[0015] This application discloses a method, device, and storage medium for locating faulty chips on a computing device. The method includes: sending a first broadcast command to a chip on the computing device at a first baud rate, causing the chip to respond to the first broadcast command and return first response information; determining the number of chips based on the first response information; if the number of chips equals a preset number, sending location information to the chip to cause the chip to write the location information; sending a configuration command to the chip, changing the chip's operating baud rate to a second baud rate, the second baud rate being greater than the first baud rate; sending a second broadcast command to the chip at the second baud rate, causing the chip to respond to the second broadcast command and return second response information, the second response information including the location information; and locating the faulty chip based on the second response information. Based on this, it is possible to quickly locate chips with damaged PLL circuits in a computing device after assembly, thereby reducing detection costs and time, and increasing the productivity of the computing device. Attached Figure Description
[0016] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of a computing system provided in an embodiment of this application;
[0018] Figure 2 This is a schematic flowchart of a method for locating a faulty chip on a computing device, provided in an embodiment of this application.
[0019] Figure 3This is an application flowchart of a method for locating a faulty chip on a computing device, provided in an embodiment of this application.
[0020] Figure 4 This is a schematic block diagram of the structure of a computer device provided in an embodiment of this application. Detailed Implementation
[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0022] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content and operations / steps, nor does it necessarily have to be performed in the order described. For example, some operations / steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.
[0023] It should be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of the application. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.
[0024] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0025] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.
[0026] Please see Figure 1 , Figure 1 A schematic diagram of a computing system provided in an embodiment of this application is shown. Figure 1 As shown, the computing system includes a server, a control board, and computing devices. The computing devices include multiple chips, and the computing devices and control board communicate and exchange information via a serial interface. The control board acts as a communication relay between the server and the computing devices, controlling the operating status of the computing devices and relaying data information from the server to the computing devices.
[0027] The chip includes a PLL (Phase Locked Loop) circuit, also known as a phase-locked loop circuit. The PLL circuit is used to integrate clock signals to ensure the normal operation of high-frequency devices, such as memory data access. For a chip to function properly, it typically requires synchronization between the external input signal and the internal oscillation signal. Due to manufacturing process and cost limitations, chip crystal oscillators cannot achieve very high frequencies; therefore, when high-frequency applications are required, a PLL circuit is used to provide a stable and high-frequency clock signal.
[0028] Please see Figure 2 , Figure 2 This illustration shows a schematic flowchart of a method for locating a faulty chip on a computing device according to an embodiment of this application. Figure 2 As shown, the method for locating a faulty chip on a computing device in this embodiment includes the following specific steps: S101-S105.
[0029] S101. Send a first broadcast command to the chip on the computing device at a first baud rate, so that the chip responds to the first broadcast command and returns first response information.
[0030] The chip outputs computing power through a serial interface. Therefore, devices connected to the computing device need to pre-agree on the communication baud rate of the serial interface with the chip to achieve information exchange with the chip and obtain the chip's computing power output. The chip has a default baud rate, which is used to start the chip and also for the chip to complete the initial communication handshake with other devices.
[0031] For example, if the default baud rate of a Class A chip on a computing device is 115200bps, and the control board is connected to the computing device, then the control board can send handshake information at a baud rate of 115200bps to complete the communication connection with the Class A chip.
[0032] During the manufacturing process of computing devices, in order to confirm whether the chips on the assembled computing devices can be started and initialized, the server sends an initialization command to each chip at the default baud rate. The chip completes the initialization according to the initialization command and returns an initialization completion response message to the server.
[0033] In some embodiments, the first baud rate is the chip's default baud rate, and the first response information is the response information returned by the chip to the server in response to the initialization command. If the chip cannot respond to the initialization command and return response information, then there is a fault in the chip and / or the computing device that affects chip startup.
[0034] In some embodiments, the server can establish a communication handshake with the chip via a first broadcast command.
[0035] S102. Determine the number of chips based on the first response information. If the number of chips is equal to the preset number, send positioning information to the chips so that the chips write the positioning information.
[0036] Specifically, each chip returns a first response message to the server. The number of first response messages represents the number of chips that have completed initialization. The server receives the first response messages from the chips, counts the number of first response messages, and sets this count as the number of chips. If the number of chips that have completed initialization equals a preset number (the number of chips installed on the computing device), it means that all chips on the computing device have been initialized. After the server confirms that all chips have been initialized, it sends the chip location information to the control board, which then programs or stores the location information onto the corresponding chip.
[0037] It should be noted that the location information in this embodiment consists of multiple uniquely located information entries generated by the server based on the number of chips on the computing device. Each location information entry corresponds to one chip, and the location of the corresponding chip on the computing device can be accurately determined through this location information.
[0038] In some embodiments, before sending location information to the chip, multiple location information entries with unique addresses are generated based on the number of chips; and a location information lookup table is generated based on the location information and the corresponding chip.
[0039] For example, if all chips have been initialized, the server configures address information for each chip using a uniform address space allocation method. Assume the computing device has 80 chips, with corresponding component numbers U1, U2, U3, ..., U80. The server assigns location information to each of the 80 serially connected chips as follows: 0, 3, 6, ..., 237. Specifically, U1 corresponds to location information 0, U2 to location information 3, U3 to location information 6, and U80 to location information 237. This ensures that the numerical sequence of location information is unique, assigning each chip a unique address. After address configuration, a location information lookup table is generated based on the location information and the corresponding chip component number, enabling quick location of the corresponding chip using the location information.
[0040] In some embodiments, if the number of chips that have completed initialization is less than the number of chips installed on the computing device, it indicates that there are chips on the computing device that have failed initialization. The server marks the computing device as needing repair and outputs a repair prompt on the display screen, for example, displaying the number of chips on the computing device that need repair. It should be noted that the default baud rate is usually lower than the highest baud rate supported by the chip. The chip can achieve clock synchronization at the default baud rate through a crystal oscillator. The chip can receive and / or respond to command information generated at the default baud rate without running the PLL circuit. The reason why the chip cannot return the first response information may be due to the chip or the computing device. Therefore, the computing device needs to be manually tested and repaired to initially rule out possible operational faults and prevent interference with the next step of PLL circuit detection.
[0041] S103. Send a configuration command to the chip to change the chip's operating baud rate to a second baud rate, which is greater than the first baud rate.
[0042] Specifically, the server sends a configuration command to the chip at the default baud rate. This configuration command is used to change the chip's current baud rate from the default baud rate table to the working baud rate. The second baud rate is the working baud rate, which is generally greater than the default baud rate.
[0043] In practical applications, when the baud rate of a chip on a computing device changes, the control board that controls the computing device also needs to change its current baud rate to match the chip's operating baud rate. This is necessary to achieve clock synchronization between the two, thereby enabling communication.
[0044] It should be noted that the default baud rate is usually lower than the chip's highest supported baud rate. The chip can receive and / or respond to command information generated at the default baud rate without running the PLL circuitry. The chip's operating baud rate is the highest baud rate multiplied by a calculated factor, for example, 0.9. The higher the chip's operating baud rate, the higher the requirements for the PLL circuitry within the chip.
[0045] In some embodiments, if a portion of the PLL circuits in a chip's multiple PLL circuits is damaged, the chip may still function normally at the default baud rate, but may fail to perform some functions at the operating baud rate. Therefore, it is necessary to test the chip at the operating baud rate.
[0046] S104. Send a second broadcast command to the chip at the second baud rate so that the chip responds to the second broadcast command and returns second response information, which includes positioning information.
[0047] Specifically, the server generates a second broadcast command at a second baud rate and sends this command to the chip. The second broadcast command is used to retrieve positioning information from the chip. Since the second baud rate is close to the chip's maximum baud rate, the chip must receive and / or respond to the second broadcast command via a PLL circuit. The chip is configured to, upon receiving the second broadcast command, retrieve the stored positioning information, generate a second response based on that information, and send the second response to the server.
[0048] In some embodiments, the chip receives a second broadcast command through a PLL circuit, then responds to the second broadcast command by generating second response information based on the positioning information, and returns the second response information through the PLL circuit.
[0049] In some embodiments, if the PLL circuit in the chip is damaged by electrostatic discharge, then the chip cannot receive / or respond to the second broadcast command.
[0050] S105. Locate the faulty chip based on the second response information.
[0051] Specifically, after receiving the second response information, the server can use relevant software to sequentially parse the location information in the second response information and search for chips that have not returned location information in the location information lookup table. Chips that have not returned location information are those with PLL circuit faults. Since the location information and the chip's component number are in a one-to-one correspondence, the faulty chip's component number can be found based on the missing location information. Then, the location of the faulty chip on the computing device can be located based on the component number, and this result is displayed on the screen, prompting the user to replace or repair the faulty chip.
[0052] In some embodiments, after obtaining the location information in the second response information, the location information is matched with a location information lookup table. If there is missing location information in the location information lookup table, the location of the faulty chip is obtained based on the missing location information.
[0053] In some embodiments, after obtaining the location of the faulty chip, the location of the faulty chip is sent to the display screen, and the location of the faulty chip is displayed on the display screen.
[0054] For example, after launching the application of the method for locating a faulty chip on a computing device as described in this application embodiment, the detection process is displayed to the user through a detection interface on the screen. The detection interface can display a structural diagram of the computing device, which includes the component numbers of each chip. After determining the component number of the faulty chip based on the missing location information and the location information lookup table, the chip corresponding to that component number is highlighted in the structural diagram, for example, by using a contrasting color of the structural diagram.
[0055] To better understand the technical solution of this application, a specific embodiment will be described below.
[0056] Please see Figure 3 , Figure 3 This document illustrates an application flowchart for a method to locate a faulty chip on a computing device. The user controls this process via a terminal, which includes a display screen. The user performs detection operations on the terminal, and the server responds to these operations. Figure 3 As shown, in response to the detection operation, the server executes S201, starts the computing device, performs a chip quantity test, sends a first broadcast message to the chips on the computing device to establish a handshake between the server and the chips, obtains the first response information returned by the chips, and counts the number of chips based on the number of the first response information. The server executes S202, determines whether the number of chips on the computing device matches the expected number. If the number of chips does not match the expected number, the server executes S203, outputs the actual number of chips and maintenance prompts on the terminal's display screen; if the number of chips matches the expected number, the server executes S204, sequentially configures the address of each chip so that each chip is assigned a unique location information. After completing the address configuration, the server executes S205, sends a configuration command to the chips and control board, changing the current baud rate (default baud rate) of the chips and control board to the chip's operating baud rate. Then, the server executes S206, sends a second broadcast command to the chips and obtains the second response information returned by the chips, including location information. All normal chips will return second response information after receiving the second broadcast command, where the second response information includes the location information corresponding to the chip. Upon receiving the second response information, the server executes S207, comparing the location information in the second response information with the location information lookup table to obtain the comparison result. During the comparison process, the server executes S208, determining whether any chips have not responded based on the comparison result. If all chips have successfully responded, the server executes S209, outputting a test success message on the display screen and ending the process; if any chips have not responded, the server executes S210, determining the location information of the unresponsive chips and displaying the result on the display screen to prompt the user to repair the corresponding chips.
[0057] The method for locating faulty chips on computing devices described in this application enables the testing of assembled computing devices, preventing the entry of assembled devices with damaged PLL circuits into the market and thus avoiding customer complaints. This method optimizes the testing process through software and can be combined with other conventional testing methods to quickly locate chips with damaged PLL circuits in computing devices, thereby reducing testing costs and time and increasing the production capacity of computing devices.
[0058] Please see Figure 4 , Figure 4 This is a schematic block diagram illustrating the structure of a computer device according to an embodiment of this application. The computer device may be a server or a terminal. Figure 4 As shown, this application embodiment proposes a computer device 20, which includes a memory 21, a processor 22, a program stored in the memory and executable on the processor, and a data bus 23 for communication between the processor 21 and the memory 22. When the program is executed by the processor, it performs the following functions: Figure 2 The specific steps are as follows: A first broadcast command is sent to the chip on the computing device at a first baud rate, so that the chip responds to the first broadcast command and returns first response information; the number of chips is determined according to the first response information. If the number of chips is equal to a preset number, positioning information is sent to the chip so that the chip writes the positioning information; a configuration command is sent to the chip to change the chip's operating baud rate to a second baud rate, which is greater than the first baud rate; a second broadcast command is sent to the chip at the second baud rate, so that the chip responds to the second broadcast command and returns second response information, which includes positioning information; the faulty chip is located according to the second response information.
[0059] It should be understood that processor 22 can be a Central Processing Unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among these, a general-purpose processor can be a microprocessor or any conventional processor.
[0060] In some embodiments, when the processor 22 determines the number of chips based on the first response information, it is further configured to: count the number of first response information and set the number of first response information as the number of chips.
[0061] In some embodiments, before sending location information to the chip, the processor 22 is further configured to: generate multiple location information entries with unique addresses based on the number of chips; and generate a location information lookup table based on the location information and the corresponding chip.
[0062] In some embodiments, when the processor 22 locates the faulty chip based on the second response information, it is further specifically configured to: obtain the location information in the second response information; match the location information with a location information lookup table, and if there is missing location information in the location information lookup table; obtain the location of the faulty chip based on the missing location information.
[0063] In some embodiments, after the processor 22 obtains the location of the faulty chip based on the missing location information, it is further configured to: send the location of the faulty chip to the display screen; and display the location of the faulty chip on the display screen.
[0064] In some embodiments, after determining the number of chips based on the first response information, the processor 22 is further configured to: if the number of chips is less than a preset number, mark the computing device as needing repair and output repair prompt information.
[0065] This application provides a computer-readable storage medium that stores one or more programs that can be executed by one or more processors to implement any of the faulty chip location methods provided in this application.
[0066] The computer-readable storage medium may be an internal storage unit of the computer device described in the foregoing embodiments, such as the hard disk or memory of the computer device. The computer-readable storage medium may also be an external storage device of the computer device, such as a plug-in hard disk, SmartMedia Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the computer device.
[0067] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.
[0068] In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processing unit, or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0069] The preferred embodiments of this application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and spirit of this application shall be within the scope of the claims.
Claims
1. A method for locating a faulty chip on a computing device, characterized in that, The method includes: A first broadcast command is sent to a chip on the computing device at a first baud rate, so that the chip responds to the first broadcast command and returns first response information, the chip including a phase-locked loop circuit; The number of chips is determined based on the first response information. If the number of chips is equal to a preset number, positioning information is sent to the chips so that the chips write the positioning information. A configuration command is sent to the chip to change the chip's operating baud rate to a second baud rate corresponding to the phase-locked loop circuit, wherein the second baud rate is greater than the first baud rate; At the second baud rate, a second broadcast command is sent to the chip so that the chip receives the second broadcast command through the phase-locked loop circuit; in response to the second broadcast command, a second response information is generated based on the positioning information, and the second response information is returned through the phase-locked loop circuit, wherein the second response information includes the positioning information; The faulty chip is located based on the second response information.
2. The method for locating a faulty chip on a computing device as described in claim 1, characterized in that, The chip includes multiple phase-locked loop circuits.
3. The method for locating a faulty chip on a computing device as described in claim 1, characterized in that, Determining the number of chips based on the first response information includes: The number of the first response messages is counted, and the number of the first response messages is set as the number of chips.
4. The method for locating a faulty chip on a computing device as described in claim 1, characterized in that, Before sending the positioning information to the chip, the method further includes: Multiple location information entries with unique addresses are generated based on the number of chips; A location information lookup table is generated based on the location information and the component serial number of the chip on the computing device.
5. The method for locating a faulty chip on a computing device as described in claim 4, characterized in that, The chip for locating the fault based on the second response information includes: Obtain the location information from the second response information; The location information is matched with the location information lookup table. If there is missing location information in the location information lookup table, the location of the faulty chip is obtained based on the missing location information.
6. The method for locating a faulty chip on a computing device as described in claim 5, characterized in that, After obtaining the location of the faulty chip based on the missing location information, the method further includes: Send the location of the faulty chip to the display screen; The location of the faulty chip is displayed on the screen.
7. The method for locating a faulty chip on a computing device as described in claim 1, characterized in that, After determining the number of chips based on the first response information, the method further includes: If the number of chips is less than a preset number, the computing device is marked as needing repair, and a repair prompt message is output.
8. The method for locating a faulty chip on a computing device as described in claim 1, characterized in that, The first baud rate is the default baud rate of the chip, the second baud rate is the operating baud rate of the chip, and the operating baud rate is the product of the highest baud rate supported by the chip and a calculated coefficient.
9. A computer device, characterized in that, The computer device includes a memory and a processor; The memory is used to store computer programs; The processor is configured to execute the computer program and, in executing the computer program, implement the method for locating a faulty chip on a computing device as described in any one of claims 1 to 8.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, causes the processor to implement the method for locating a faulty chip on a computing device as described in any one of claims 1 to 8.
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