A switching power supply overcurrent high-speed recovery circuit and method

Abstract

A high-speed overcurrent recovery circuit for a switching power supply is characterized in that the circuit includes: a control signal generation circuit, disposed between the output terminal of the switching power supply and a logic drive unit, for providing a logic control signal to the logic drive unit based on the output voltage of the switching power supply output terminal and the soft-start voltage of the switching power supply; wherein the logic control signal limits the inductor current in the switching power supply based on the overload state of the output voltage; and wherein the logic control signal limits the overcurrent state of the power transistor and the freewheeling transistor based on the switching voltage of the switching power supply. The overcurrent recovery circuit of the present invention has a fast recovery speed and good performance.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and more particularly to a switching power supply overcurrent high-speed recovery circuit and method. Background Art

[0002] Currently, many DC-DC converters feature a constant on-time (COT) control mode. This mode maintains a constant on-time (Ton) during the control process to achieve ripple compensation, avoid harmonic oscillations in the system, and thus ensure system stability.

[0003] The constant on-time control mode in the prior art usually has only a limited number of structures, such as V 2 Control, etc. However, in these structures, when the switching power supply has an overcurrent when the load is large, or when the switching power supply has a short circuit fault, its output voltage will be lower than the set value, causing the error amplifier EA output to be high. When the load is reduced or the short circuit fault is removed, it takes a certain amount of time for the error amplifier EA output to recover from the high level to the normal level. During this period, the output voltage is overcharged (higher than the set value).

[0004] In addition, existing switching power supply chips utilize a soft-start circuit to prevent overcharging of the chip's output voltage. Specifically, in this soft-start circuit, when the chip is overloaded for a prolonged period, the soft-start voltage is discharged to an appropriate level, thereby preventing the output voltage from being too high. When the overload condition ends and the switching power supply chip returns to normal operation, the output voltage is powered up synchronously with the soft-start circuit, thereby achieving voltage recovery. However, this soft-start circuit, while achieving overload limitation and post-overload recovery, has a long recovery time, making it difficult to quickly restore the output voltage to its pre-overload normal state.

[0005] Therefore, there is an urgent need for a new switching power supply overcurrent high-speed recovery circuit and method that can be applied to the COT control loop. Summary of the Invention

[0006] To address the deficiencies in the prior art, the present invention aims to provide a switching power supply overcurrent high-speed recovery circuit and method. By adding first and second overcurrent comparison units to the COT circuit of the prior art, the circuit performs overcurrent judgment on the pulse width modulation signal, thereby determining the output of an appropriate control signal.

[0007] The present invention adopts the following technical solutions. In its first aspect, the present invention relates to a high-speed overcurrent recovery circuit for a switching power supply, comprising: a control signal generation circuit disposed between an output terminal of the switching power supply and a logic drive unit, configured to provide a logic control signal to the logic drive unit based on an output voltage of the switching power supply output terminal and a soft-start voltage of the switching power supply; wherein the logic control signal limits the inductor current in the switching power supply based on an overload condition of the output voltage; and the logic control signal limits the overcurrent condition of a power transistor and a freewheeling transistor based on a switching voltage of the switching power supply.

[0008] Preferably, the control signal generating circuit includes a voltage dividing unit, a comparison unit, a first overcurrent control unit, a second overcurrent control unit and a logic unit; wherein the voltage dividing unit has one end connected to the output end of the switching power supply and the other end connected to the comparison unit, and is used to provide a divided voltage of the output end of the switching power supply based on the voltage dividing resistor; the comparison unit has one end connected to the voltage dividing unit and the other end connected to the first and second overcurrent control units, and is used to determine a pulse width modulation signal based on the divided voltage of the voltage dividing unit, the soft start voltage of the switching power supply and the first reference voltage Vref; the first overcurrent control unit is connected to the logic unit, and is used to determine the first overcurrent control signal based on the switching voltage SW, the second reference voltage Vref1 and the pulse width modulation signal; the second overcurrent control unit is connected to the logic unit, and is used to determine the second overcurrent control signal based on the switching voltage SW, the third reference voltage Vref2 and the delayed turn-on signal; the logic unit has one end connected to the first and second overcurrent control units, and the other end connected to the logic driving unit, and is used to generate a logic control signal for the logic driving unit based on the outputs of the first and second overcurrent control units, and control the logic driving unit to achieve high-speed recovery from overcurrent.

[0009] Preferably, the voltage dividing unit includes first to second voltage dividing resistors R3~R4 and a voltage dividing branch FB; wherein, the first and second voltage dividing resistors are connected in series, one end is connected to the output end of the switching power supply, and the other end is grounded, and the connection between the first and second voltage dividing resistors is the interface of the voltage dividing branch FB; the comparison unit includes an error amplifier EA, an amplifier capacitor Cea, and a comparator PWM; wherein, the positive phase input end of the error amplifier EA is connected to the reference voltage Vref and the soft start voltage Vss generated in the soft start module, the negative phase input end is connected to the voltage dividing branch FB, the output end is connected to the amplifier capacitor Cea and the positive phase input end of the comparator PWM respectively, and the other end of the amplifier capacitor is grounded; the negative phase input end of the comparator PWM is connected to the voltage dividing branch FB, and the output end is a pulse width modulation signal.

[0010] Preferably, the first overcurrent control unit includes a freewheeling tube overcurrent comparator OC1, an AND gate, and a NOT gate; wherein, the negative phase input terminal of the freewheeling tube overcurrent comparator OC1 is connected to the switching voltage SW, the positive phase input terminal is connected to the second reference voltage Vref1, and the output terminal serves as the output terminal of the freewheeling tube overcurrent protection signal Locp; the freewheeling tube overcurrent protection signal Locp passes through the NOT gate and is input into the AND gate together with the pulse width modulation signal to generate a first overcurrent control signal.

[0011] Preferably, the second overcurrent control unit includes a power tube overcurrent comparator OC2, a delayed conduction unit Ton and an OR gate; wherein, the positive input terminal of the power tube overcurrent comparator OC2 is connected to the third reference voltage Vref2, the negative input terminal is connected to the switch voltage SW, and the output terminal serves as the output terminal of the power tube overcurrent protection signal Hocp; the input terminal of the delayed conduction unit is respectively connected to the output voltage Vout and the power supply voltage Vin of the output terminal of the switching power supply, the enable input terminal EN is connected to the output terminal of the logic unit, and the output terminal serves as the output terminal of the delayed conduction signal Ton; the power tube overcurrent protection signal Hocp and the delayed conduction signal Ton are input into the OR gate together to generate a second overcurrent control signal.

[0012] Preferably, the logic unit RS trigger is used to generate a logic control signal based on the first and second overcurrent control signals.

[0013] Preferably, the control signal generation circuit also includes a counter Counter, the input end of the counter is connected to the power tube overcurrent protection signal Hocp, and the output end is connected to the soft start module SOFT; the counter Counter is used to count based on the power tube overcurrent protection signal Hocp and control the shutdown and reopening of the soft start module SOFT.

[0014] Preferably, the control signal generating circuit further includes a clamping control unit Clamp; the clamping control unit Clamp is used to clamp the output voltage of the error amplifier EA based on the freewheeling tube overcurrent protection signal Locp and the power tube overcurrent protection signal Hocp.

[0015] Preferably, the clamping control unit includes a NOR gate, an RS trigger, and a clamping switch; wherein, the input end of the NOR gate is connected to the freewheeling tube overcurrent protection signal Locp, and the output end is connected to one input end of the RS trigger; the other input end of the RS trigger is connected to the power tube overcurrent protection signal Hocp, and the output end is connected to the clamping switch, which serves as a control signal for turning the clamping switch on or off; one end of the clamping switch is connected to the voltage divider branch FB, and the other end is connected to the output end of the error amplifier EA, so as to perform a clamping operation on the output signal COMP of the error amplifier EA.

[0016] A second aspect of the present invention relates to a high-speed overcurrent recovery method for a switching power supply, characterized in that: a high-speed overcurrent circuit for a switching power supply as described in the first aspect of the present invention is used to limit the inductive current in the switching power supply when the switching power supply is overloaded or short-circuited, and to restore the inductive current in the switching power supply after the switching power supply fault is eliminated.

[0017] The beneficial effect of the present invention is that, compared with the prior art, the present invention provides a high-speed overcurrent recovery circuit and method for a switching power supply. By adding a first overcurrent control unit and a second overcurrent control unit to the existing COT internal ripple compensation circuit and clamping the input voltage when the system is overloaded, the circuit ensures that the inductor current is limited, preventing overcharging of the output voltage when the switching power supply experiences overcurrent under a heavy load or a load short circuit fault. The overcurrent recovery circuit of the present invention has a fast recovery speed and good performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of a circuit structure of a switching power supply with a constant on-time loop in the prior art of the present invention;

[0019] Figure 2 A schematic diagram of the circuit structure of an overcurrent recovery circuit of a switching power supply in the present invention;

[0020] Figure 3 This is a schematic diagram of the circuit structure of a switching power supply overcurrent high-speed recovery circuit of the present invention;

[0021] Figure 4 The figure is a schematic diagram of simulation results of overcurrent recovery in a switching power supply overcurrent high-speed recovery circuit according to the present invention. DETAILED DESCRIPTION

[0022] The present application will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present application.

[0023] Figure 1 FIG. 1 is a schematic diagram of a circuit structure of a switching power supply having a constant on-time loop in the prior art of the present invention. Figure 1 As shown, a conventional DC-DC converter includes an internal ripple compensation circuit (COT), namely, the constant on-time circuit described in the present invention. The COT includes a low-bandwidth error amplifier EA, a loop comparator PWM, a delayed on-state unit Ton, and an RS trigger.

[0024] Specifically, if Figure 1As shown, the error amplifier's negative input is connected to the voltage divider FB of the output voltage Vout, its positive input is connected to the reference voltage Vref and the soft-start voltage Vss generated by the soft-start module, and its output generates a comparison voltage COMP. Its output is connected to the positive input of the loop comparator PWM and the capacitor Cea of ​​the error amplifier, respectively. The other end of capacitor Cea is grounded. It can be understood that the soft-start module SOFT can output a voltage Vss that gradually and slowly rises from 0V to the first reference voltage Vref during the entire chip startup process. When it rises to Vref, the soft-start ends. It can be seen that the time it takes for Vss to slowly rise is the soft-start time of the entire circuit. After startup is complete, the soft-start voltage Vss is pulled high, but the input voltage of the error amplifier EA, namely the first reference voltage Vref, remains unchanged.

[0025] The negative input of the loop comparator PWM is connected to the voltage divider terminal FB of the output voltage Vout, which is used to compare FB with COMP. When the voltage at the FB terminal is less than the output voltage of the error amplifier EA, the output of the loop comparator PWM is high; otherwise, it is low. The output of the loop comparator PWM is connected to one input of the RS flip-flop.

[0026] The delayed-on unit Ton determines the state of the delayed output signal based on the output voltage Vout and the power supply voltage Vin of the switching power supply, as well as feedback from its enable terminal EN. Based on the feedback from the enable terminal EN, the delayed-on unit can time the on-time of the power transistor HS and control the on and off times of the power transistor based on the timed state. The output of the delayed-on unit Ton is connected to the other input of the RS flip-flop.

[0027] In one embodiment of the present invention, the output terminal of the loop comparator PWM can be connected to the R terminal of the RS trigger, and the output terminal of the delay conduction unit Ton can be connected to the S terminal of the RS trigger. The Q terminal of the RS trigger is used as the enable terminal feedback of the delay conduction unit, and is also input into the DC-DC converter as the logic control signal of the logic controller. Therefore, in the embodiment of the present invention, as the soft start begins, when the comparison voltage COMP rises to a voltage higher than the FB point, the output of the loop comparator is high, which causes the output signal of the RS trigger to also become high, thereby prompting the logic starter ( Figure 1 The Logic & Driver (shown in Figure 1) turns on the high-side switch, power transistor HS. Since power transistor HS is on at this time, the voltage at point FB is greater than COMP, and the output of the loop comparator is low.

[0028] After the power tube HS is turned on, the Ton module also receives an input signal at the enable terminal EN and starts timing. In one embodiment of the present invention, the timing time can be: T on =V out / V in *T sw This timing time is also the power tube on time, Ton. In this formula, V out is the output voltage of the switching power supply, V in is the power supply voltage, T sw The target period for periodically turning on and off HS and LS, respectively, is a constant. After the Ton module finishes timing, it flips its output state, setting the output voltage to a high level and feeding it into the RS flip-flop. Upon receiving the high-level signal from the Ton module, the RS flip-flop notifies the logic initiator to turn off the power transistor HS and simultaneously turn on the low-side switch, the slow-current transistor LS.

[0029] With the slow-flow tube LS turned on and the power tube HS turned off, the voltage of the divided voltage FB at the output terminal Vout decreases and is lower than COMP, thereby causing the loop comparator to output a high level again to turn on the power tube HS, thereby completing a target cycle.

[0030] In the present invention, the low-bandwidth error amplifier EA blocks the high-frequency AC ripple voltage on the output voltage Vout due to its low bandwidth, thereby eliminating the error between the DC component of the output voltage and the comparison voltage COMP. Generally speaking, it can be roughly assumed that the error amplifier can filter out half the value of the ripple AC voltage. Regarding the error amplifier EA itself, when the output voltage decreases, the comparison voltage COMP increases. When the output voltage Vout decreases to its minimum value, the comparison voltage COMP reaches its peak value. When the output voltage Vout equals the comparison voltage COMP, a new switching cycle begins.

[0031] However, Figure 1 When the circuit in the circuit is in an overload state, the state of the logic driver cannot be controlled based on the overload.

[0032] Figure 2 FIG. 1 is a schematic diagram of a circuit structure of a switching power supply overcurrent recovery circuit in the present invention. Figure 2 As shown, a switching power supply overcurrent high-speed recovery circuit includes: a control signal generation circuit, which is arranged between the output end of the switching power supply and the logic drive unit, and is used to provide a logic control signal to the logic drive unit based on the output voltage of the switching power supply output end and the soft start voltage of the switching power supply; wherein the logic control signal limits the inductor current in the switching power supply based on the overload state of the output voltage; the logic control signal limits the overcurrent state of the power tube and the freewheeling tube based on the switching voltage of the switching power supply.

[0033] Specifically, relative to Figure 1 The circuit in Figure 2 Two overcurrent control circuits, OC1 and OC2, have been added to the high-speed overcurrent recovery circuit for the switching power supply. These control signals control the logic driver to shut down the power transistor HS or the slow-flow transistor LS when the chip is in an overcurrent state, thereby preventing overcurrent in the power transistor or slow-flow transistor. Furthermore, the addition of a counter module effectively shields against faults that occur after only a few overcurrent events before returning to normal. This ensures that soft-start discharge is only executed when the circuit is truly in an overcurrent state, preventing erroneous triggering of the soft-start circuit discharge.

[0034] Preferably, the control signal generating circuit includes a voltage dividing unit, a comparison unit, a first overcurrent control unit, a second overcurrent control unit and a logic unit; wherein the voltage dividing unit has one end connected to the output end of the switching power supply and the other end connected to the comparison unit, and is used to provide a divided voltage of the output end of the switching power supply based on the voltage dividing resistor; the comparison unit has one end connected to the voltage dividing unit and the other end connected to the first and second overcurrent control units, and is used to determine a pulse width modulation signal based on the divided voltage of the voltage dividing unit, the soft start voltage of the switching power supply and the first reference voltage Vref; the first overcurrent control unit is connected to the logic unit, and is used to determine the first overcurrent control signal based on the switching voltage SW, the second reference voltage Vref1 and the pulse width modulation signal; the second overcurrent control unit is connected to the logic unit, and is used to determine the second overcurrent control signal based on the switching voltage SW, the third reference voltage Vref2 and the delayed turn-on signal; the logic unit has one end connected to the first and second overcurrent control units, and the other end connected to the logic driving unit, and is used to generate a logic control signal for the logic driving unit based on the outputs of the first and second overcurrent control units, and control the logic driving unit to achieve high-speed recovery from overcurrent.

[0035] Preferably, the voltage dividing unit includes first to second voltage dividing resistors R3~R4 and a voltage dividing branch FB; wherein, the first and second voltage dividing resistors are connected in series, one end is connected to the output end of the switching power supply, and the other end is grounded, and the connection between the first and second voltage dividing resistors is the interface of the voltage dividing branch FB.

[0036] Preferably, the comparison unit includes an error amplifier EA, an amplifier capacitor Cea, and a comparator PWM; wherein, the positive phase input terminal of the error amplifier EA is connected to the reference voltage Vref and the soft start voltage Vss generated in the soft start module, the negative phase input terminal is connected to the voltage divider branch FB, the output terminal is respectively connected to the amplifier capacitor Cea and the positive phase input terminal of the comparator PWM, and the other end of the amplifier capacitor is grounded; the negative phase input terminal of the comparator PWM is connected to the voltage divider branch FB, and the output terminal is a pulse width modulation signal.

[0037] Specifically, when the reference voltage Vref is greater than the soft-start voltage Vss, the non-inverting input terminal of the error amplifier EA will recognize the soft-start voltage Vss as the input of the error amplifier EA. When the reference voltage Vref is less than the soft-start voltage Vss, the non-inverting input terminal of the error amplifier EA will recognize the reference voltage Vref as the input of the error amplifier EA.

[0038] Preferably, the logic unit RS trigger is used to generate a logic control signal based on the first and second overcurrent control signals.

[0039] Preferably, the first overcurrent control unit includes a freewheeling tube overcurrent comparator OC1, an AND gate, and a NOT gate; wherein, the negative phase input terminal of the freewheeling tube overcurrent comparator OC1 is connected to the switching voltage SW, the positive phase input terminal is connected to the second reference voltage Vref1, and the output terminal serves as the output terminal of the freewheeling tube overcurrent protection signal Locp; the freewheeling tube overcurrent protection signal Locp passes through the NOT gate and is input into the AND gate together with the pulse width modulation signal to generate a first overcurrent control signal.

[0040] Specifically, the freewheeling tube overcurrent control circuit begins operating after the freewheeling tube is turned on. It compares the switch voltage SW with the second reference voltage Vref1. When the switch voltage SW is greater than the second reference voltage Vref1, the freewheeling tube overcurrent protection signal Locp it outputs is low, and the freewheeling tube's operating state is not changed. However, when it recognizes that the switch voltage SW is less than the second reference voltage Vref1, it is considered that the freewheeling tube is in an overcurrent state, and the freewheeling tube overcurrent protection signal Locp it outputs becomes high. When Locp is high, the freewheeling tube remains on. Until the switch voltage SW is greater than the second reference voltage Vref, Locp flips to a low level, and after passing through the NOT gate, the output of the RS trigger is high, and the power tube is turned on again.

[0041] Preferably, the second overcurrent control unit includes a power tube overcurrent comparator OC2, a delayed conduction unit Ton and an OR gate; wherein, the positive input terminal of the power tube overcurrent comparator OC2 is connected to the third reference voltage Vref2, the negative input terminal is connected to the switch voltage SW, and the output terminal serves as the output terminal of the power tube overcurrent protection signal Hocp; the input terminal of the delayed conduction unit is respectively connected to the output voltage Vout and the power supply voltage Vin of the output terminal of the switching power supply, the enable input terminal EN is connected to the output terminal of the logic unit, and the output terminal serves as the output terminal of the delayed conduction signal Ton; the power tube overcurrent protection signal Hocp and the delayed conduction signal Ton are input into the OR gate together to generate a second overcurrent control signal.

[0042] Specifically, the power tube overcurrent control circuit begins operating after the power tube is turned on. It compares the switch voltage SW with a third reference voltage Vref2. When the switch voltage SW is greater than the third reference voltage Vref2, the power tube overcurrent protection signal Hocp it outputs is low, and the operating state of the power tube remains unchanged. However, when the switch voltage SW is less than the third reference voltage Vref2, the power tube overcurrent protection signal Hocp inverts to a high level, causing the output of the RS flip-flop to become low, thereby causing the logic driver to drive the power tube off.

[0043] Preferably, the control signal generation circuit also includes a counter Counter, the input end of the counter is connected to the power tube overcurrent protection signal Hocp, and the output end is connected to the soft start module SOFT; the counter Counter is used to count based on the power tube overcurrent protection signal Hocp and control the shutdown and reopening of the soft start module SOFT.

[0044] Specifically, each time the power tube overcurrent protection signal Hocp achieves a high or low potential flip, the counter will increase the number of counts. When the power tube overcurrent protection signal Hocp flips continuously, the counting is performed continuously. When the power tube overcurrent protection signal Hocp flips intermittently, the data previously recorded by the counter is cleared. Since when the circuit is operating in an overload state, the flip of the power tube overcurrent protection signal Hocp is triggered once in each cycle, after the counter reaches a certain number of consecutive counts, the counter can start the soft start module SOFT to discharge the soft start voltage Vss, so that the soft start voltage is discharged to 0V. By setting this counter, overcharging can be avoided when the circuit is continuously overloaded.

[0045] However, solving the overload problem in this way means that after the overload ends, the soft-start module must be restarted to allow the voltage of the soft-start module to slowly return to the Vref state before the chip can be restarted and the switching power supply can be controlled. Testing has shown that the soft-start time is relatively long, typically lasting from 1ms to nms.

[0046] In order to avoid overcharging while improving the response speed of the circuit so that the circuit can quickly recover to the original output voltage after the overload problem ends, the present invention provides a new switching power supply overcurrent high-speed recovery circuit.

[0047] Figure 3 This is a schematic diagram of the circuit structure of a switching power supply overcurrent high-speed recovery circuit of the present invention. Figure 3 As shown, the present invention no longer uses a counter Counter to control the closing and reopening of the soft start module SOFT, but uses a clamp control unit to control the output signal of the loop amplifier.

[0048] Preferably, the control signal generating circuit further includes a clamping control unit Clamp; the clamping control unit Clamp is used to clamp the output voltage of the error amplifier EA based on the freewheeling tube overcurrent protection signal Locp and the power tube overcurrent protection signal Hocp.

[0049] Preferably, the clamping control unit includes a NOR gate, an RS trigger, and a clamping switch; wherein, the input end of the NOR gate is connected to the freewheeling tube overcurrent protection signal Locp, and the output end is connected to one input end of the RS trigger; the other input end of the RS trigger is connected to the power tube overcurrent protection signal Hocp, and the output end is connected to the clamping switch, which serves as a control signal for turning the clamping switch on or off; one end of the clamping switch is connected to the voltage divider branch FB, and the other end is connected to the output end of the error amplifier EA, so as to perform a clamping operation on the output signal COMP of the error amplifier EA.

[0050] The clamp control unit in the present invention is a dynamic clamp circuit. When the system is overloaded, the voltage at point FB will be less than the first reference voltage Vref. At this point, the comparison voltage COMP outputted by terminal EA is relatively large. The addition of the clamp control unit allows the comparison voltage COMP to be limited to near FB, thereby preventing overload from affecting the comparison voltage COMP and the DC-DC converter output.

[0051] Specifically, when the power transistor turns on and reaches the current limit, the power transistor overcurrent protection signal Hocp flips to a high level. At this point, the clamp switch in the clamp control unit closes, pulling the COMP voltage down to the voltage at FB. At this point, the power transistor is shut down by the power transistor overcurrent protection signal Hocp, causing the switch voltage SW to decrease. The freewheeling transistor current then waits until it drops to a level that flips the freewheeling transistor overcurrent protection signal Locp, at which point the power transistor turns back on, releasing the clamp switch. After the clamp switch releases, the comparison voltage COMP is no longer affected by the clamp control unit and rises under the control of the error amplifier EA. Since the output of the error amplifier is still connected to the capacitor Cea, the comparison voltage COMP at the output does not rise rapidly, thus preventing overcharging of the entire circuit output. Since the soft-start unit does not need to be discharged and the clamp control unit only controls the COMP voltage within a certain range, the COMP voltage recovery time is very short, typically around tens of μs, resulting in a fast recovery.

[0052] In summary, since the present invention replaces the discharge process of the soft start module with the clamp control unit, after the overload ends, the system will not be affected by the restart of the soft start module, thus ensuring rapid recovery.

[0053] Figure 4 This is a schematic diagram of the simulation results of overcurrent recovery in a switching power supply overcurrent high-speed recovery circuit of the present invention. Figure 4 As shown, based on the high-speed overcurrent recovery circuit of the present invention, when the output voltage Vout is normal, the voltage at the output of the error amplifier, i.e., the non-inverting input of the PWM comparator, is at a certain ratio of the output voltage Vout due to the action of the voltage divider resistor. At this point, a control signal generated based on the output voltage of the error amplifier controls the inductor current at the output to a low level. In one embodiment, by selecting component parameters, the output voltage can be controlled to 3V. At this point, the output voltage of the error amplifier is half of Vout, i.e., 1.5V, and the inductor current is approximately 1.2A.

[0054] When the switching power supply chip is overloaded, the output voltage Vout drops, and the output voltage of the error amplifier also decreases. This causes the inductor current to increase. In this embodiment of the present invention, when the output voltage Vout drops to 1.8V, the output voltage of the error amplifier is clamped to approximately 0.9V. At this time, the inductor current IL increases, oscillating between 2A and 3.2A.

[0055] When the overload state of the switching power supply chip is restored, that is, Figure 4 In the approximately 2mSecs shown in the figure, the output voltage returns to approximately 3V, and the error amplifier output voltage quickly recovers to 1.5V. The inductor current decreases to approximately 1.2A, the normal operating state. During the recovery process, the time from overload recovery to the inductor current returning to a stable 1.2A is approximately 50μS, which is much shorter than the soft-start time of conventional soft-start circuits. Furthermore, there is essentially no overcharging during the output process. This shows that the technical solution of the present invention achieves perfect and high-speed recovery from overcurrent in the switching power supply.

[0056] The beneficial effect of the present invention is that, compared with the prior art, the present invention provides a high-speed overcurrent recovery circuit and method for a switching power supply. By adding a first overcurrent control unit and a second overcurrent control unit to the existing COT internal ripple compensation circuit and clamping the input voltage when the system is overloaded, the circuit ensures that the inductor current is limited, preventing overcharging of the output voltage when the switching power supply experiences overcurrent under a heavy load or a load short circuit fault. The overcurrent recovery circuit of the present invention has a fast recovery speed and good performance.

[0057] The applicant of the present invention has made a detailed explanation and description of the implementation examples of the present invention in conjunction with the drawings in the specification. However, those skilled in the art should understand that the above implementation examples are only preferred implementation plans of the present invention, and the detailed description is only to help readers better understand the spirit of the present invention, and is not a limitation on the scope of protection of the present invention. On the contrary, any improvements or modifications based on the inventive spirit of the present invention should fall within the scope of protection of the present invention.

Claims

1. A switching power supply overcurrent high-speed recovery circuit, characterized in that: The circuit comprises: a control signal generating circuit, the circuit being provided between the output terminal of the switching power supply and the logic driving unit, and being configured to provide a logic control signal to the logic driving unit based on an output voltage of the output terminal of the switching power supply and a soft-start voltage of the switching power supply; Wherein, the logic control signal limits the inductor current in the switching power supply based on the overload state of the output voltage; The logic control signal limits the overcurrent state of the power transistor and the freewheeling transistor in the switching power supply based on the switching voltage of the switching power supply; The control signal generating circuit includes a voltage dividing unit, a comparison unit, a first overcurrent control unit, a second overcurrent control unit and a logic unit; wherein, The voltage dividing unit has one end connected to the output end of the switching power supply and the other end connected to the comparison unit, and is used to provide a divided voltage at the output end of the switching power supply based on a voltage dividing resistor; The comparison unit has one end connected to the voltage dividing unit and the other end connected to the first and second overcurrent control units respectively, and is used to determine the pulse width modulation signal based on the divided voltage of the voltage dividing unit, the soft start voltage of the switching power supply and the first reference voltage Vref; The first overcurrent control unit is connected to the logic unit and is used to determine a first overcurrent control signal based on the switch voltage SW, the second reference voltage Vref1 and the pulse width modulation signal; The second overcurrent control unit is connected to the logic unit and is used to determine a second overcurrent control signal based on the switch voltage SW, the third reference voltage Vref2 and the delayed turn-on signal; The logic unit has one end connected to the first and second overcurrent control units respectively, and the other end connected to the logic drive unit, and is used to generate a logic control signal of the logic drive unit based on the output of the first and second overcurrent control units, and control the logic drive unit to achieve high-speed recovery of overcurrent.

2. A switching power supply overcurrent high-speed recovery circuit according to claim 1, characterized in that: The voltage dividing unit includes first to second voltage dividing resistors R3-R4 and a voltage dividing branch FB; wherein, The first and second voltage-dividing resistors are connected in series, one end of which is connected to the output end of the switching power supply and the other end is grounded, and the connection point between the first and second voltage-dividing resistors forms an interface of the voltage-dividing branch FB; The comparison unit includes an error amplifier EA, an amplifier capacitor Cea, and a comparator PWM; wherein, The positive phase input terminal of the error amplifier EA is connected to the reference voltage Vref and the soft start voltage Vss generated in the soft start module, the negative phase input terminal is connected to the voltage divider branch FB, the output terminal is respectively connected to the amplifier capacitor Cea and the positive phase input terminal of the comparator PWM, and the other end of the amplifier capacitor is grounded; The negative phase input terminal of the comparator PWM is connected to the voltage dividing branch FB, and the output terminal is the pulse width modulation signal.

3. The switching power supply overcurrent high-speed recovery circuit according to claim 1, characterized in that: The first overcurrent control unit includes a freewheeling tube overcurrent comparator OC1, an AND gate, and a NOT gate; wherein, The negative phase input terminal of the freewheeling tube overcurrent comparator OC1 is connected to the switch voltage SW, the positive phase input terminal is connected to the second reference voltage Vref1, and the output terminal serves as the output terminal of the freewheeling tube overcurrent protection signal Locp; The freewheeling tube overcurrent protection signal Locp passes through a NOT gate and is input into an AND gate together with the pulse width modulation signal to generate a first overcurrent control signal.

4. A switching power supply overcurrent high-speed recovery circuit according to claim 1, characterized in that: The second overcurrent control unit includes a power tube overcurrent comparator OC2, a delayed conduction unit Ton and an OR gate; wherein, The positive input terminal of the power tube overcurrent comparator OC2 is connected to the third reference voltage Vref2, the negative input terminal is connected to the switch voltage SW, and the output terminal serves as the output terminal of the power tube overcurrent protection signal Hocp; The input end of the delayed conduction unit is respectively connected to the output voltage Vout and the power supply voltage Vin of the output end of the switching power supply, the enable input end EN is connected to the output end of the logic unit, and the output end serves as the output end of the delayed conduction signal Ton; The power tube over-current protection signal Hocp and the delayed turn-on signal Ton are input into an OR gate together to generate a second over-current control signal.

5. The switching power supply overcurrent high-speed recovery circuit according to claim 1, characterized in that: The logic unit RS trigger is used to generate the logic control signal based on the first and second overcurrent control signals.

6. A switching power supply overcurrent high-speed recovery circuit according to claim 1, characterized in that: The control signal generating circuit further includes a counter Counter, the input end of the counter is connected to the power tube overcurrent protection signal Hocp, and the output end is connected to the soft start module SOFT; The counter Counter is used to count based on the power tube overcurrent protection signal Hocp and control the closing and reopening of the soft start module SOFT.

7. The switching power supply overcurrent high-speed recovery circuit according to claim 2, characterized in that: The control signal generating circuit also includes a clamp control unit Clamp; The clamp control unit Clamp is used to clamp the output voltage of the error amplifier EA based on the freewheeling tube overcurrent protection signal Locp and the power tube overcurrent protection signal Hocp.

8. The switching power supply overcurrent high-speed recovery circuit according to claim 7, characterized in that: The clamp control unit includes a NOR gate, an RS trigger, and a clamp switch; wherein, The input end of the NOR gate is connected to the freewheeling tube overcurrent protection signal Locp, and the output end is connected to an input end of the RS trigger; Another input end of the RS trigger is connected to the power tube overcurrent protection signal Hocp, and the output end is connected to the clamp switch as a control signal for turning the clamp switch on or off; One end of the clamp switch is connected to the voltage dividing branch FB, and the other end is connected to the output end of the error amplifier EA, so as to perform a clamping operation on the output signal COMP of the error amplifier EA.

9. A high-speed overcurrent recovery method for a switching power supply, characterized by: A switching power supply overcurrent high-speed circuit as described in claims 1-8 is used to limit the inductor current in the switching power supply when the switching power supply is overloaded or short-circuited, and to restore the inductor current in the switching power supply after the switching power supply fault is eliminated.

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