Semiconductor structure and its fabrication method

Abstract

This invention relates to the field of semiconductor structure technology, specifically to a semiconductor structure and a method for fabricating a semiconductor structure. This invention addresses the problem of easily broken metal wires in related technologies. The semiconductor structure includes a film layer structure and a redistribution layer formed on the film layer structure. The redistribution layer includes a contact portion and a connecting line connected to the contact portion. One end of the connecting line away from the contact portion is connected to a contact pad in the film layer structure. The edge of the connecting line has a protrusion extending parallel to the direction of the film layer structure. The protrusion increases the width of the connecting line, increases its stability, and prevents breakage of the connecting line in the redistribution layer.

Description

Technical Field

[0001] This invention relates to the field of semiconductor structure technology, and in particular to a semiconductor structure and a method for fabricating the semiconductor structure. Background Technology

[0002] After a chip is manufactured, a packaging structure is typically created to encapsulate it. This packaging structure includes a redistribution layer, which is positioned on the side of the chip with contact pads. The redistribution layer contains multiple metal lines, one end of which is connected to a contact pad, and the other end of each metal line has a soldering structure. By strategically designing the shape of the metal lines, the arrangement of the soldering structure can be altered.

[0003] In related technologies, when fabricating a redistribution layer, a photolithography layer is formed on the chip, then the photolithography layer is patterned, and trenches of a certain shape are formed on the photolithography layer. Metal material is formed in the trenches to form metal lines with the same shape as the trenches.

[0004] However, the metal wires on the redistribution layer are long and narrow, which can easily lead to breakage during the fabrication process. Summary of the Invention

[0005] This invention provides a semiconductor structure and a method for fabricating the semiconductor structure, in order to solve the problem of easy breakage of metal wires in related technologies.

[0006] This invention provides a semiconductor structure, comprising:

[0007] A membrane structure and a redistribution layer formed on the membrane structure, the redistribution layer including a contact portion and a connecting line connected to the contact portion, one end of the connecting line away from the contact portion being connected to a contact pad in the membrane structure; the edge of the connecting line having a protrusion protruding in a direction parallel to the membrane structure.

[0008] In one possible implementation, the connecting line includes a first connecting line for connecting to the contact pad and a second connecting line connected to the first connecting line, the second connecting line having the protrusion; the first connecting line has a first width in a direction perpendicular to its extension direction and parallel to the membrane structure, the second connecting line has a second width in a direction perpendicular to its extension direction and parallel to the membrane structure, the first width being greater than the second width.

[0009] In one possible implementation, there are multiple protrusions, which are spaced apart along the extension direction of the second connecting line.

[0010] In one possible implementation, the second connecting line has the protrusions on both sides perpendicular to its extension direction.

[0011] In one possible implementation, the second width is less than or equal to a first preset value.

[0012] In one possible implementation, the first preset value is 7μm-8μm.

[0013] In one possible implementation, the length of the second connecting line along its extension direction is greater than or equal to 300 μm.

[0014] In one possible implementation, the width of the protrusion along the direction perpendicular to the connecting line and parallel to the direction of the membrane structure is a third width, which is 2 to 5 times the second width.

[0015] In one possible implementation, the contact portion is connected to the second connecting line, and the contact portion is used to connect solder balls.

[0016] In one possible implementation, the membrane structure includes a substrate, a passivation layer stacked on the substrate, and an insulating layer, the passivation layer being disposed close to the substrate; the contact pad is disposed on the substrate, and the passivation layer partially covers the contact pad;

[0017] Blind holes are provided on the insulating layer and the passivation layer. The connecting wire is disposed on the insulating layer, and one end of the first connecting wire extends into the blind hole and is connected to the contact pad.

[0018] In one possible implementation, the insulating layer is covered with a conductive layer, which also covers the walls and bottom of the blind via, and the connecting wire is disposed on the conductive layer.

[0019] In one possible implementation, the conductive layer includes a first conductive layer and a second conductive layer stacked together, the first conductive layer being disposed close to the insulating layer.

[0020] This invention provides a method for fabricating a semiconductor structure, comprising:

[0021] Provides membrane structure;

[0022] A photoresist layer is formed on the film structure, the photoresist layer has trenches, the trenches extend on the photoresist layer in a direction parallel to the film structure, and the trenches expose a portion of the contact pads; reinforcing grooves are provided on the sidewalls of the trenches;

[0023] Conductive material is formed in the groove to form a connecting line for connecting the contact pad, and a protrusion is formed in the reinforcing groove at the edge of the connecting line.

[0024] In one feasible approach, the process prior to forming a photoresist layer on the film structure includes:

[0025] Blind holes are formed in the membrane structure, and the blind holes extend to the contact pad;

[0026] A conductive layer is formed on the film structure and on the walls and bottom of the blind holes.

[0027] In one feasible manner, forming the conductive material within the trench includes:

[0028] Using the conductive layer as an electrode, the conductive material is formed in the trench by electroplating.

[0029] In one feasible manner, forming the trench on the photoresist layer includes:

[0030] A mask layer is formed on the photoresist layer, and the mask layer has exposure holes. The photoresist layer inside the exposure holes is removed by exposure and development.

[0031] This invention provides a semiconductor structure and a method for fabricating the semiconductor structure. The semiconductor structure includes a film layer structure and a redistribution layer formed on the film layer structure. The redistribution layer includes a contact portion and a connecting line connected to the contact portion. One end of the connecting line away from the contact portion is connected to a contact pad in the film layer structure. The edge of the connecting line has a protrusion that protrudes along a direction parallel to the film layer structure. The protrusion can increase the width of the connecting line, increase the stability of the connecting line, and prevent the connecting line of the redistribution layer from breaking. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. It is obvious that the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A top view of a semiconductor structure provided in an embodiment of the present invention;

[0034] Figure 2 for Figure 1 A cross-sectional view of a semiconductor structure (AA).

[0035] Figure 3 A flowchart illustrating a method for fabricating a semiconductor structure according to an embodiment of the present invention;

[0036] Figure 4A cross-sectional view of a membrane structure provided in an embodiment of the present invention;

[0037] Figure 5 A cross-sectional view of a photomask layer formed on a film structure provided in an embodiment of the present invention;

[0038] Figure 6 A cross-sectional view of a blind hole formed in a membrane structure provided in an embodiment of the present invention;

[0039] Figure 7 A cross-sectional view of a conductive layer formed on a film structure provided in an embodiment of the present invention;

[0040] Figure 8 This is a cross-sectional view of a photolithographic layer formed on a conductive layer, provided in an embodiment of the present invention.

[0041] Figure 9 A top view of a trench formed in a photolithographic layer, provided as an embodiment of the present invention;

[0042] Figure 10 for Figure 9 BB cross-sectional view of a semiconductor structure;

[0043] Figure 11 This is a top view of a redistribution layer formed in a trench, provided as an embodiment of the present invention;

[0044] Figure 12 for Figure 11 BB cross-sectional view of a semiconductor structure;

[0045] Figure 13 A top view of the process of removing the photolithographic layer provided in an embodiment of the present invention;

[0046] Figure 14 for Figure 13 A top view of the semiconductor structure in the middle.

[0047] Explanation of reference numerals in the attached figures:

[0048] 10. Membrane structure;

[0049] 11. Base;

[0050] 12. Contact pad;

[0051] 13. Passivation layer;

[0052] 14. Insulation layer;

[0053] 141. Blind hole;

[0054] 15. First conductive layer;

[0055] 16. Second conductive layer;

[0056] 20. Rewire layer;

[0057] 21. First connecting line;

[0058] 22. Second connecting line;

[0059] 221. Protrusion;

[0060] 23. Contact part;

[0061] 30. Photoresist layer;

[0062] 31. First trench;

[0063] 32. Second trench;

[0064] 321. Reinforcing groove;

[0065] 322. Contact trench;

[0066] 40. Photomask layer. Detailed Implementation

[0067] To clearly understand the technical solution of this application, the solutions of related technologies will be described in detail first.

[0068] After a chip is manufactured, a packaging structure is typically created to encapsulate it. Wafer-level packaging (WLP) is a type of chip packaging method where the entire wafer is manufactured first, and then the packaging and testing are performed directly on the wafer before it is diced into individual chips. Wafer-level packaging structures usually include a redistribution layer, which is located on the side of the chip with contact pads. This redistribution layer contains multiple metal lines, one end of which connects to a contact pad, and the other end of the metal line has a solder joint. By strategically designing the shape of the metal lines, the arrangement of the solder joint can be modified.

[0069] In related technologies, when fabricating a redistribution layer, a photolithography layer is formed on the chip. This photolithography layer is then patterned, and trenches of a specific shape are formed on it. Metal material is then formed within these trenches to create metal lines with the same shape as the trenches. However, due to limitations in spacing, some metal lines on the redistribution layer are quite long and narrow, making them prone to breakage during fabrication.

[0070] In view of this, embodiments of the present invention provide a semiconductor structure and a method for fabricating the semiconductor structure. Specifically, the semiconductor structure includes a redistribution layer formed on a film structure. The redistribution layer includes connecting lines, and the edges of the connecting lines have protrusions extending parallel to the direction of the film structure. The protrusions can increase the width of the connecting lines, increase the stability of the connecting lines, and prevent the connecting lines of the redistribution layer from breaking.

[0071] The following describes several optional implementations of the present invention with reference to the accompanying drawings. Those skilled in the art should understand that the following implementations are merely illustrative and not exhaustive. Based on these implementations, those skilled in the art may replace, splice, or combine certain features or examples, and these should still be considered as the disclosure of the present invention.

[0072] This embodiment provides a semiconductor structure. For example, the semiconductor structure can be DRAM (Dynamic Random Access Memory), wherein the DRAM includes a transistor structure and a capacitor structure connected to the transistor structure. The capacitor structure is used to store data, and the transistor structure is used to read data from the capacitor structure or write data to the capacitor structure. Of course, this embodiment is not limited to this, and the semiconductor structure in this embodiment can also be other structures.

[0073] like Figure 1 and Figure 2 As shown, the semiconductor structure includes a film structure 10 and a redistribution layer 20 formed on the film structure 10.

[0074] The film structure 10 includes a substrate 11, a passivation layer 13 stacked on the substrate 11, and an insulating layer 14. The substrate 11 may be made of monocrystalline silicon, polycrystalline silicon, amorphous silicon, silicon-germanium compound, or silicon-on-insulator, or other materials known to those skilled in the art. The passivation layer 13 is disposed close to the substrate 11 and is used to seal the chip, protecting the microcircuit from scratches, contamination, moisture, etc. The passivation layer 13 may be made of silicon oxide or silicon nitride. Contact pads 12 are disposed on the substrate 11, and the passivation layer 13 may partially cover the contact pads 12 to form openings in the passivation layer, thereby exposing part of the contact pads. The contact pads 12 may be made of tungsten or gold, and can serve as solder points for chip package pins. An insulating layer 14 covers the passivation layer and provides insulation and stress buffering. The insulating layer 14 may be made of polyimide. Blind vias 141 are provided on the insulating layer 14 and the passivation layer 13. For example, a portion of the insulating layer 14 may cover the sidewall of the passivation layer 13 to form a blind via 141; alternatively, the passivation layer 13 may completely cover the contact pad 12, with the insulating layer 14 covering the passivation layer 13, and then a hole may be formed in the insulating layer 14, penetrating the passivation layer 13 and contacting the contact pad 12 to form the blind via 141. A redistributable layer 20 is disposed on the insulating layer 14, with one end of the redistributable layer 20 extending into the blind via 141 and connected to the contact pad 12.

[0075] Specifically, the redistribution layer 20 includes a contact portion 23 and a connecting line connected to the contact portion 23. One end of the connecting line, away from the contact portion 23, is connected to a contact pad 12. The contact portion 23 is used to connect to solder balls so that it can subsequently serve as a pin for connection to external electrical components. The edge of the connecting line has a protrusion 221 protruding in a direction parallel to the film structure 10. It is worth noting that the projection of the protrusion 221 onto the film structure 10 can be a rectangle, circle, ellipse, regular octagon, or other closed shape, and is not limited here.

[0076] In the above implementation, the redistribution layer 20 can be formed by electroplating or deposition. Since the connecting line has a protrusion 221, the protrusion 221 can increase the width of the connecting line during its formation, thereby preventing the connecting line from breaking. It is worth noting that the position of the protrusion 221 is reasonably set so that it is located at a position where the connecting line width is smaller, in order to further prevent the connecting line from breaking.

[0077] The semiconductor structure provided in this embodiment includes a film structure 10 and a redistribution layer 20 formed on the film structure 10. The redistribution layer 20 includes a contact portion 23 and a connecting line connected to the contact portion 23. One end of the connecting line away from the contact portion 23 is connected to a contact pad 12 in the film structure 10. The edge of the connecting line has a protrusion 221 protruding in a direction parallel to the film structure 10. The protrusion 221 can increase the width of the connecting line, increase the stability of the connecting line, and prevent the connecting line of the redistribution layer 20 from breaking.

[0078] In this embodiment, a conductive layer may also be disposed between the insulating layer 14 and the redistribution layer. The conductive layer also covers the hole wall and bottom of the blind via 141, so that the redistribution layer 20 can be connected to the contact pad 12 through the conductive layer. In one possible implementation, the conductive layer includes a first conductive layer 15 and a second conductive layer 16 stacked together, with the first conductive layer 15 disposed close to the insulating layer 14. The materials of the first conductive layer 15 and the second conductive layer 16 may be different to reduce production costs. For example, the material of the first conductive layer 15 may include titanium or titanium-tungsten, and the material of the second conductive layer 16 may include copper.

[0079] Optionally, the connection lines of the redistribution layer 20 include a first connection line 21 for connection to the contact pad 12 and a second connection line 22 for connection to the first connection line 21, the second connection line 22 having a protrusion 221.

[0080] Specifically, the first connecting line 21 has a first width along a direction perpendicular to its extension direction and parallel to the membrane structure 10, and the second connecting line 22 has a second width along a direction perpendicular to its extension direction and parallel to the membrane structure 10. The first width is greater than the second width so that the second connecting line 22 can be applied to wiring positions with smaller spacing.

[0081] Of course, such as Figure 1 As shown, when the requirements for wiring location are not high, the first width of the redistribution layer 20 can also be equal to the second width.

[0082] Reference Figure 1 As shown, the second connecting line 22 has multiple protrusions 221, and the multiple protrusions 221 are spaced apart along the extension direction of the second connecting line 22 in order to further increase the stability of the second connecting line 22 and further prevent the second connecting line 22 from breaking or deforming.

[0083] Specifically, the second connecting line 22 has protrusions 221 on both sides perpendicular to its extension direction. For example, the second connecting line 22 may have four protrusions 221, with two protrusions 221 spaced apart on the left side perpendicular to the extension direction of the second connecting line 22, and the other two protrusions 221 spaced apart on the right side perpendicular to the extension direction of the second connecting line 22. As shown in the figure, in this embodiment, the projected shape of the protrusions 221 on the film structure 10 can be rectangular, and the extension direction of the rectangle is perpendicular to the extension direction of the second connecting line 22.

[0084] Optionally, the second width is less than or equal to the first preset value, facilitating the routing of the second connecting line 22 at locations with smaller spacing. In one implementation, the first preset value can be 7μm-8μm, for example, 7μm, 7.5μm, or 8μm. In another implementation, the length of the second connecting line 22 along its extension direction is greater than or equal to 300μm, facilitating the routing of the second connecting line 22 at a location farther from the contact pad 12.

[0085] Optionally, the width of the protrusion 221 extending along the direction perpendicular to the connecting line and parallel to the direction of the membrane structure 10 is the third width. For example, in this embodiment, the side length of the rectangular protrusion 221 in its extension direction is the second width. In one possible implementation, the third width is 2-5 times the second width, thereby further increasing the stability of the second connecting line 22 and preventing the second connecting line 22 from breaking. The ratio of the third width to the second width can be, for example, 2, 2.4, or 4.

[0086] Another embodiment of the present invention provides a method for fabricating a semiconductor structure, which is used to fabricate the semiconductor structure in the above embodiment. The semiconductor structure fabricated by this method increases the stability of the interconnects in the redistribution layer and avoids the breakage of the interconnects.

[0087] like Figures 3 to 14 As shown, the method for fabricating a semiconductor structure includes the following steps:

[0088] Step S101: Provide a membrane structure.

[0089] It should be noted that, as Figures 4 to 8 As shown, the film structure 10 includes a substrate 11, a passivation layer 13 stacked on the substrate 11, and an insulating layer 14. The substrate 11 may be made of monocrystalline silicon, polycrystalline silicon, amorphous silicon, silicon-germanium compound, or silicon-on-insulator, or other materials known to those skilled in the art. The passivation layer 13 is disposed close to the substrate 11 and is used to seal the chip, protecting the microcircuit from scratches, contamination, moisture, etc. The material of the passivation layer 13 may include silicon oxide or silicon nitride. Contact pads 12 are disposed on the substrate 11, and the passivation layer 13 partially covers the contact pads 12. The material of the contact pads 12 may include tungsten or gold, and the contact pads 12 can serve as solder points for chip package pins. The insulating layer 14 covers the passivation layer 13 and part of the contact pads 12, and the insulating layer 14 can act as a stress buffer. The material of the insulating layer 14 may include polyimide.

[0090] Step S102: A photoresist layer is formed on the film structure. The photoresist layer has trenches that extend on the photoresist layer in a direction parallel to the film structure. The trenches expose a portion of the contact pads. Reinforcing grooves are provided on the sidewalls of the trenches.

[0091] It should be noted that, as Figure 9 and Figure 10 As shown, the trench includes a first trench 31 for exposing a portion of the contact pad 12 and a second trench 32 communicating with the first trench 31. The end of the second trench 32 opposite to the contact pad 12 is also provided with a contact trench 322 so that a contact portion 23 for connection with the solder ball can be subsequently formed in the contact trench 322.

[0092] Step S103: Form conductive material in the trench to form a connecting line connecting the contact pad, and reinforce the protrusions formed in the trench at the edge of the connecting line.

[0093] Specifically, such as Figure 11 and Figure 12 As shown, a first connecting line 21 for connecting with the contact pad 12 is formed in the first groove 31, and a second connecting line 22 and a contact portion 23 are formed in the second groove 32, wherein the second connecting line 22 and the contact portion 23 are connected. A protrusion 221 formed in the reinforcing groove 321 is located at the edge of the second connecting line 22.

[0094] In one feasible manner, forming a conductive material within a trench includes: using a conductive layer as an electrode, forming the conductive material within the trench by electroplating.

[0095] In the above implementation, since the connecting line has a protrusion 221, the protrusion 221 can increase the width of the connecting line during its formation, thereby preventing breakage. It is worth noting that the position of the protrusion 221 is appropriately positioned so that it is located where the connecting line width is relatively small, further preventing breakage.

[0096] The method for fabricating a semiconductor structure provided in this embodiment specifically includes: providing a film structure 10; forming a photoresist layer 30 on the film structure 10, the photoresist layer 30 having trenches extending in a direction parallel to the film structure 10, the trenches exposing a portion of the contact pad 12; providing reinforcing grooves 321 on the sidewalls of the trenches; forming a conductive material within the trenches to form connecting lines to the contact pads 12, and forming protrusions 221 located at the edges of the connecting lines within the reinforcing grooves 321. The protrusions 221 can increase the width of the connecting lines, increase the stability of the connecting lines, and prevent the connecting lines of the redistribution layer 20 from breaking.

[0097] In this embodiment, before forming the photoresist layer 30 on the film structure 10, the following steps are included:

[0098] Reference Figure 5 and Figure 6 The membrane structure 10 also includes forming blind holes 141 on the membrane structure 10, the blind holes 141 extending to the contact pad 12.

[0099] For example, a passivation layer 13 covers a portion of the contact pad 12, and an insulating layer 14 covers the passivation layer 13. A patterned photomask layer 40 is then formed on the insulating layer 14, giving the photomask layer 40 an opening structure that the contact pad 12 can cover the projection of its opening structure onto the substrate 11. The insulating layer 14 inside the opening structure is removed using exposure and development to form a blind via 141. Finally, the photomask layer 40 is removed to avoid affecting subsequent processes.

[0100] Reference Figure 7 The film structure 10 also includes forming a conductive layer on the film structure 10 and on the walls and bottom of the blind hole 141.

[0101] In one possible implementation, the conductive layer includes a first conductive layer 15 and a second conductive layer 16 stacked together, with the first conductive layer 15 disposed close to the insulating layer 14. The first conductive layer 15 and the second conductive layer 16 may be made of different materials to reduce production costs; for example, the first conductive layer 15 may be made of titanium or titanium-tungsten, and the second conductive layer 16 may be made of copper.

[0102] In this embodiment, the first conductive layer 15 and the second conductive layer 16 can be formed by sputtering.

[0103] Reference Figure 8 After providing the film structure 10, a photoresist layer 30 can be formed on the film structure 10 by coating.

[0104] After forming a photoresist layer 30 on the film structure 10, trenches need to be formed on the photoresist layer 30. (Refer to...) Figure 9 and Figure 10 Forming trenches on the photoresist layer 30 includes:

[0105] In the implementation where the photoresist layer 30 is made of positive photoresist, a mask layer needs to be formed on the photoresist layer 30. The mask layer has exposure holes, and the photoresist layer 30 inside the exposure holes is removed by exposure and development.

[0106] Of course, the photoresist layer 30 can also be made of negative photoresist. In the implementation of the photoresist layer 30 being made of negative photoresist, a mask layer needs to be formed on the photoresist layer 30. The mask layer extends on the photoresist layer 30 in a direction parallel to the film structure 10, and the mask layer partially masks the contact pad 12. The projection portion of the mask layer on the photoresist layer 30 is removed by exposure and development.

[0107] Specifically, the trench includes a first trench 31 and a second trench 32. The first trench 31 has a first trench width along a direction perpendicular to its extension direction and parallel to the membrane structure 10. The second trench 32 has a second trench width along a direction perpendicular to its extension direction and parallel to the membrane structure 10. The first trench width is greater than the second trench width so that the second trench 32 can be applied to wiring locations with small spacing.

[0108] Optionally, the width of the second trench 32 is less than or equal to the first preset value, which facilitates the formation of connecting lines in wiring locations with small spacing. In one possible implementation, the first preset value can be 7μm-8μm, for example, 7μm, 7.5μm, or 8μm.

[0109] Optionally, there can be multiple reinforcing grooves 321, which are spaced apart along the extension direction perpendicular to the second groove 32. Optionally, both sidewalls of the second groove 32 have reinforcing grooves 321.

[0110] Optionally, the width of the reinforcing groove 321 extending along the direction perpendicular to the connecting line and parallel to the direction of the membrane structure 10 is the width of the third groove. In one possible embodiment, the width of the third groove is 2-5 times the width of the second groove 32.

[0111] It should be noted that the projection of the reinforcing groove 321 onto the membrane structure 10 can be a rectangle, a circle, an ellipse, a regular octagon, or other closed shape, and is not limited here.

[0112] Accordingly, refer to Figure 11 and Figure 12 The first connecting line 21 has a first width along a direction perpendicular to its extension direction and parallel to the membrane structure 10, and the second trench 32 has a second width along a direction perpendicular to its extension direction and parallel to the membrane structure 10, wherein the first width is greater than the second width.

[0113] Optionally, the second width is less than or equal to the first preset value. In one possible implementation, the first preset value can be 7μm-8μm, for example, 7μm, 7.5μm, or 8μm.

[0114] Accordingly, there can be multiple protrusions 221, which are spaced apart along the extension direction perpendicular to the second connecting line 22. Both sides of the second connecting line 22 have protrusions 221.

[0115] Accordingly, the width of the protrusion 221 extending along the vertical connecting line and parallel to the direction of the membrane structure 10 is the third width. In one possible implementation, the third width is 2 to 5 times the second width, and the ratio of the third width to the second width can be, for example, 2, 2.4, or 4.

[0116] It should be noted that the projection of the protrusion 221 on the membrane structure 10 is consistent with the projection of the reinforcing groove 321 on the membrane structure 10, and can be a rectangle, circle, ellipse, regular octagon or other closed shape, which is not limited here.

[0117] It is worth noting that, such as Figure 13 and 14 As shown, after the conductive material is formed in the trench, the photoresist layer 30 and the conductive layer need to be removed. In one feasible approach, the photoresist layer 30 and the conductive layer can be removed by etching.

[0118] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional modules is merely an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. The specific working process of the device described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0119] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A semiconductor structure, characterized in that, include: A membrane structure and a redistribution layer formed on the membrane structure, the redistribution layer including a contact portion and a connecting line connected to the contact portion, one end of the connecting line away from the contact portion being connected to a contact pad in the membrane structure; the edge of the connecting line having a protrusion protruding in a direction parallel to the membrane structure. The connecting line includes a first connecting line for connecting to the contact pad and a second connecting line for connecting to the first connecting line, the second connecting line having the protrusion; the first connecting line has a first width along a direction perpendicular to its extension direction and parallel to the membrane structure, the second connecting line has a second width along a direction perpendicular to its extension direction and parallel to the membrane structure, the first width being greater than the second width.

2. The semiconductor structure according to claim 1, characterized in that, The protrusions are multiple, and the multiple protrusions are spaced apart along the extension direction of the second connecting line.

3. The semiconductor structure according to claim 1, characterized in that, The second connecting line has the protrusions on both sides perpendicular to its extension direction.

4. The semiconductor structure according to any one of claims 2-3, characterized in that, The second width is less than or equal to the first preset value.

5. The semiconductor structure according to claim 4, characterized in that, The first preset value is 7μm-8μm.

6. The semiconductor structure according to claim 4, characterized in that, The length of the second connecting line along its extension direction is greater than or equal to 300 μm.

7. The semiconductor structure according to any one of claims 2-3, characterized in that, The width of the protrusion extending perpendicularly to the connecting line and parallel to the direction of the membrane structure is the third width, which is 2-5 times the second width.

8. The semiconductor structure according to any one of claims 2-3, characterized in that, The contact portion is connected to the second connecting line, and the contact portion is used to connect solder balls.

9. The semiconductor structure according to any one of claims 2-3, characterized in that, The membrane structure includes a substrate, a passivation layer and an insulating layer stacked on the substrate, wherein the passivation layer is disposed close to the substrate; the contact pad is disposed on the substrate, and the passivation layer partially covers the contact pad; Blind holes are provided on the insulating layer and the passivation layer. The connecting wire is disposed on the insulating layer, and one end of the first connecting wire extends into the blind hole and is connected to the contact pad.

10. The semiconductor structure according to claim 9, characterized in that, The insulating layer is covered with a conductive layer, which also covers the wall and bottom of the blind hole, and the connecting wire is disposed on the conductive layer.

11. The semiconductor structure according to claim 10, characterized in that, The conductive layer includes a first conductive layer and a second conductive layer stacked together, with the first conductive layer disposed close to the insulating layer.

12. A method for fabricating a semiconductor structure, characterized in that, include: Provides membrane structure; A photoresist layer is formed on the film structure, the photoresist layer has trenches, the trenches extend on the photoresist layer in a direction parallel to the film structure, and the trenches expose a portion of the contact pad; The sidewalls of the trench are provided with reinforcing grooves; Conductive material is formed in the groove to form a connecting line for connecting the contact pad, and a protrusion is formed in the reinforcing groove at the edge of the connecting line; The connecting line includes a first connecting line for connecting to the contact pad and a second connecting line for connecting to the first connecting line, the second connecting line having the protrusion; the first connecting line has a first width along a direction perpendicular to its extension direction and parallel to the membrane structure, the second connecting line has a second width along a direction perpendicular to its extension direction and parallel to the membrane structure, the first width being greater than the second width.

13. The method for fabricating a semiconductor structure according to claim 12, characterized in that, Before forming the photoresist layer on the film structure, the following steps are included: Blind holes are formed in the membrane structure, and the blind holes extend to the contact pad; A conductive layer is formed on the film structure and on the walls and bottom of the blind holes.

14. The method for fabricating a semiconductor structure according to claim 13, characterized in that, Forming the conductive material within the trench includes: Using the conductive layer as an electrode, the conductive material is formed in the trench by electroplating.

15. The method for fabricating a semiconductor structure according to claim 14, characterized in that, Forming the trench on the photoresist layer includes: A mask layer is formed on the photoresist layer, and the mask layer has exposure holes. The photoresist layer inside the exposure holes is removed by exposure and development.

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