A digital-based locking detection system

Abstract

The present invention discloses a digital-based lock detection system, belonging to the field of large-scale digital integrated circuits, which includes a ring oscillator, a clock / reset module, a phase difference detection module, and a lock window counter module; the ring oscillator selects a suitable one of the generated multiple periodic pulse signals to detect the magnitude of the phase difference; the clock / reset module provides a clock for the phase difference detection module and the lock window counting module, and simultaneously generates a reset signal for the ring oscillator; the phase difference detection module detects whether each phase difference signal meets the requirements according to the pulse signal selected by the ring oscillator, and outputs a reset signal for the lock window counter module; the lock window counter module controls the counting and reset of the lock window counter module according to whether the phase difference magnitude meets the preset detection standard, and outputs a lock or unlock signal.

Description

Technical Field

[0001] The present invention relates to the technical field of large-scale digital integrated circuits, and particularly to a digital-based lock detection system. Background Art

[0002] The phase-locked loop (PLL) frequency synthesizer is currently the most widely used frequency synthesis technology. Based on the closed-loop tracking characteristic of the phase-locked loop, the phase of the clock output after dividing the voltage-controlled oscillator (VCO) is compared with the frequency and phase of the input reference clock through a phase-frequency detector (PFD) to generate a phase difference signal, thereby generating a feedback control voltage to adjust the output clock frequency and phase of the voltage-controlled oscillator to reduce or eliminate the phase difference, and finally locking the output frequency of the voltage-controlled oscillator at a certain frequency that is in a multiple frequency relationship with the reference clock. According to the characteristics of the negative feedback control system, the phase difference between the clock after dividing the voltage-controlled oscillator and the reference clock always fluctuates within a small range. Therefore, how to judge the lock according to the magnitude of the phase difference is crucial for the accuracy of the output clock frequency and phase of the final voltage-controlled oscillator. Summary of the Invention

[0003] The purpose of the present invention is to provide a digital-based lock detection system to meet the lock judgment of multiple phase differences at different frequencies, that is, the output clock of the voltage-controlled oscillator can meet the requirements of different application fields.

[0004] To solve the above technical problems, the present invention provides a digital-based lock detection system, including a ring oscillator, a clock / reset module, a phase difference detection module, and a lock window counter module;

[0005] The ring oscillator selects a suitable one of the generated multiple periodic pulse signals to detect the magnitude of the phase difference;

[0006] The clock / reset module provides a clock for the phase difference detection module and the lock window counting module, and simultaneously generates a reset signal for the ring oscillator;

[0007] The phase difference detection module detects whether each phase difference signal meets the requirements according to the pulse signal selected by the ring oscillator, and outputs a reset signal for the lock window counter module;

[0008] The lock window counter module controls the counting and reset of the lock window counter module according to whether the magnitude of the phase difference meets the preset detection standard, and simultaneously outputs a lock or unlock signal.

[0009] In one embodiment, the ring oscillator can generate 4-channel pulse signals to detect 4 different phase differences.

[0010] In one embodiment, the lowest-level register in the structure of the loop oscillator can use a structure connected by two BUFFs to flexibly adjust the phase difference detection pulse within a small range.

[0011] In one embodiment, four register circuit structures connected end to end are used in the structure of the loop oscillator to flexibly adjust the phase difference detection pulse within a large range.

[0012] In one embodiment, the clock / reset control module realizes two-way control of providing clock and reset signals, thereby improving the detection accuracy.

[0013] In one embodiment, the clock generated by the clock / reset control module uses the rising edge for sampling in the phase difference detection module and the falling edge for sampling in the lock detection window counter module; at the same time, when each PFD1 / PFD0 signal outputs a high level, the reset of the loop oscillator is cancelled. After the loop oscillator starts, the detection begins. When the phase difference detection judgment ends, the reset signal of the loop oscillator is output, and this phase difference detection ends, realizing cyclic detection.

[0014] In one embodiment, the phase difference detection module detects whether the phase difference meets the phase difference magnitude selected by the loop oscillator, that is, samples the PFD1 / PFD0 signal at the rising edge of the clock generated by the clock / reset control module, judges the phase difference of each output clock in real time and generates a reset / enable signal; when there is any phase difference that does not meet the condition during the detection process, the lock window counter module is reset.

[0015] A digital-based lock detection system provided by the present invention has the following beneficial effects:

[0016] (1) For phase differences of different magnitudes, loop oscillators with various precisions can be flexibly designed for detection;

[0017] (2) According to different application scenarios, counters with different ranges can be designed to quickly judge the unlock or lock signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a schematic structural diagram of a digital-based lock detection system provided by the present invention;

[0019] Figure 2 is a schematic flow diagram of digital lock detection;

[0020] Figure 3 is a schematic structural diagram of the loop oscillator;

[0021] Figure 4It is a schematic diagram of the timing for lock detection and judgment. Specific Embodiments

[0022] The following further elaborates on a digital-based lock detection system proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise scales, only for conveniently and clearly assisting in explaining the purpose of the embodiments of the present invention.

[0023] The present invention provides a digital-based lock detection system, and its design block diagram is as shown in the dashed box Figure 1 The part outside the dashed box is the traditional PLL design structure. The present invention mainly designs the part inside the dashed line, including a Loop Oscillator Module, a Clock / Reset Control Module, a Phase Difference Detection Module, and a Lock Window Counter Module; the Loop Oscillator is used to generate a phase difference detection pulse signal; the Clock / Reset Control Module provides a clock for the Phase Difference Detection Module and the Lock Window Counter Module, and also provides a reset signal for the Loop Oscillator; the Phase Difference Detection Module makes a correct judgment on the phase difference signal that meets the requirements and controls the counting and reset of the Lock Window Counter; the Lock Window Counter Module continuously counts the output clock that meets the phase difference requirements and determines whether to generate a lock or unlock signal according to the set lock window size.

[0024] Please refer to Figure 1 and Figure 2 , the PFD1 / PFD0 signals output by the phase frequency detector control the start and reset of the Loop Oscillator. Any one of the detection pulse signals generated by the Loop Oscillator can detect its phase difference signal. According to the actual application, that is, the phase difference accuracy of the output clock, the width of the detection pulse is selected. The Loop Oscillator adopts a circuit structure with the outputs of registers connected end to end. As shown in Figure 3 , the output of each stage of the register and the signal terminal of the lowest stage register can both be used as the detection pulse of the phase difference. When the output of the lowest stage register is selected as the detection pulse, the requirement for the phase difference accuracy of the output clock is the highest. From the bottom up in sequence, the accuracy gradually decreases. At the same time, for the case of a small phase difference, different BUFF chains can be selected for detection, thus realizing the detection of phase differences of different sizes.

[0025] The clock / reset control module mainly provides clocks for the phase difference detection module and the lock window counter module. As Figure 4 shown, the phase difference detection module samples at the rising edge, and the lock detection window counter module samples at the falling edge. This design can better meet the timing requirements. At the same time, an OR logic is taken for each PFD1 and PFD0 signal. When the output is high, the reset of the loop oscillator is cancelled. After the loop oscillator starts, the detection begins. When the phase difference detection is completed, the reset signal of the loop oscillator is output, and this phase difference detection is completed, realizing cyclic detection.

[0026] The phase difference detection module mainly detects whether the phase difference meets the magnitude of the phase difference selected by the loop oscillator, that is, samples the PFD1||PFD0 signal at the rising edge of the clock generated by the clock / reset control module, and judges the phase difference of each output clock in real time and generates a reset / enable signal. When there is any phase difference that does not meet the conditions during the detection process, the lock window counter module can be reset, so a very high accuracy can be achieved.

[0027] The lock window counter module mainly works when the phase difference meets the requirements. At this time, the phase difference detection module outputs a reset cancellation signal, continuously counts at the falling edge of the clock generated by the clock / reset control module, and compares it with the set lock window value. When the preset lock window value is reached, it is judged as locked. When the preset lock window value is not reached and there is any phase difference detection that does not meet the conditions during the continuous counting process, the phase difference detection module outputs a reset signal, and the lock window counter module is reset to 0 and judged as unlocked. The design of using this kind of counter to judge locking can ensure the continuous stability of the output clock.

[0028] The above description is only a description of the preferred embodiments of the present invention, and does not limit the scope of the present invention in any way. Any changes and modifications made by those of ordinary skill in the art of the present invention according to the above disclosure shall fall within the protection scope of the claims.

Claims

1. A digital-based locking detection system, characterized in that, It includes a ring oscillator, a clock / reset module, a phase difference detection module and a lock window counter module; The ring oscillator selects a suitable pulse signal to detect the phase difference according to the multiple periodic pulse signals generated; The clock / reset module provides a clock for the phase difference detection module and the lock window counter module, and generates a reset signal for the ring oscillator; The phase difference detection module detects whether each phase difference signal meets the requirements according to the pulse signal selected by the ring oscillator, and outputs a reset signal of the locking window counter module; The locking window counter module controls the counting and resetting of the locking window counter module according to whether the phase difference meets the preset detection standard, and outputs a locking or unlocking signal at the same time.

2. The digital-based lock detection system according to claim 1, characterized in that The external phase frequency detector outputs PFD1 / PFD0 signals to control the start and reset of the ring oscillator. The ring oscillator can generate 4 pulse signals and detect 4 different phase differences.

3. The digital-based lock detection system according to claim 2, wherein The lowest level register in the structure of the ring oscillator can use a structure in which two BUFFs are connected to flexibly adjust the phase difference detection pulse in a small range.

4. The digital-based lock detection system according to claim 3, wherein The structure of the ring oscillator uses a circuit structure of four registers connected end to end, and the output of each level of registers and the signal end of the lowest level register can be used as a detection pulse of the phase difference, so that the phase difference detection pulse can be flexibly adjusted in a wide range.

5. The digital-based lock detection system according to claim 4, wherein The clock / reset control module provides bidirectional control of clock and reset signals, thereby improving detection accuracy.

6. The digital-based lock detection system according to claim 5, wherein, The clock generated by the clock / reset control module is sampled on the rising edge in the phase difference detection module, and is sampled on the falling edge in the lock window counter module; At the same time, when each PFD1 / PFD0 signal outputs a high level, the ring oscillator is reset and canceled, and the detection begins after the ring oscillator is started. When the phase difference detection is completed, the reset signal of the ring oscillator is output, and the current phase difference detection is completed to realize the cyclic detection.

7. The digital-based lock detection system according to claim 6, wherein The phase difference detection module detects whether the phase difference meets the phase difference size selected by the ring oscillator, that is, the PFD1 / PFD0 signal is sampled at the rising edge of the clock generated by the clock / reset control module, and the phase difference of each output clock is judged in real time and a reset / enable signal is generated; when there is any phase difference that does not meet the conditions during the detection process, the lock window counter module is reset.

Images