Fault detection circuit and detection system

Abstract

The fault detection circuit has a sensor signal line connected to the sensor, a pull-up resistor connected between a power supply voltage and the sensor signal line, and a first comparator having the sensor signal line connected to a non-inverting input terminal, an inverting input terminal input with a predetermined upper threshold voltage, and an output terminal outputting a first fault determination result signal indicating the presence or absence of a fault related to the connection of the sensor. In addition, the fault detection circuit further includes a second comparator having the sensor signal line connected to an inverting input terminal, a non-inverting input terminal input with a predetermined lower threshold voltage, and an output terminal outputting a second fault determination result signal indicating the presence or absence of a fault related to the connection of the sensor.

Description

TECHNICAL FIELD

[0001] The present application relates to a failure detection circuit and a detection system. BACKGROUND

[0002] A disconnection detection circuit that detects disconnection of an output terminal of a bridge circuit whose intermediate voltage varies according to a physical quantity as a detection object is disclosed in Patent Document 1.

[0003] PRIOR ART DOCUMENTS

[0004] PATENT DOCUMENT

[0005] Patent Document 1: Japanese Patent Application Publication No. 2012-008014 SUMMARY

[0006] PROBLEMS TO BE SOLVED BY THE INVENTION

[0007] However, the technology of Patent Document 1 is configured so that, in the case of disconnection of the output terminal, the potential of the output terminal becomes the ground potential (i.e., below the reference potential) due to the resistance, and thus it is difficult to distinguish the failure from the case where the output terminal is short-circuited to the ground. That is, the technology of Patent Document 1 is difficult to detect various failures related to the connection of the sensor.

[0008] MEANS FOR SOLVING THE PROBLEMS

[0009] The failure detection circuit of one embodiment includes a sensor signal line connected to a sensor, a pull-up resistor connected between a power supply voltage and the sensor signal line, and a first comparator whose non-inverting input terminal is connected to the sensor signal line and whose inverting input terminal is input with a predetermined upper limit threshold voltage, and outputs a first failure determination result signal indicating the presence or absence of a failure related to the connection of the sensor from an output terminal thereof.

[0010] EFFECT OF THE INVENTION

[0011] According to the failure detection circuit of one embodiment, various failures related to the connection of the sensor can be easily detected. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 A configuration of a detection system of one embodiment is described.

[0013] Figure 2 A circuit configuration of a signal processing circuit and a failure detection circuit of one embodiment is described.

[0014] Figure 3 A disconnection failure site that can be detected by the failure detection circuit of one embodiment is described.

[0015] Figure 4A short-circuit failure site that can be detected by the failure detection circuit of one embodiment is indicated. DETAILED DESCRIPTION

[0016] One embodiment will be described below with reference to the drawings.

[0017] Structure of detection system 10

[0018] Figure 1 Structure of detection system 10 of one embodiment is indicated. Figure 1 Detection system 10 indicated is a system capable of detecting different two kinds of detection objects using first sensor 12 and second sensor 14. As Figure 1 First sensor 12, second sensor 14, and signal processing circuit 20 are provided as indicated.

[0019] First sensor 12 is a differential type sensor that outputs a differential signal indicating a detection result as a first detection signal. First sensor 12 is connected to signal processing circuit 20 through two output signal lines 12A, 12B. First sensor 12 outputs a first detection signal (differential signal) indicating a detection result to signal processing circuit 20 via two output signal lines 12A, 12B.

[0020] Second sensor 14 is a single-ended type sensor that outputs a single-ended signal indicating a detection result as a second detection signal. Second sensor 14 is connected to signal processing circuit 20 through one output signal line 14A. Second sensor 14 outputs a second detection signal (single-ended signal) indicating a detection result to signal processing circuit 20 via one output signal line 14A.

[0021] Signal processing circuit 20 is a circuit (so-called AFE (Analog Front End)) that connects first sensor 12 and second sensor 14 which output analog signals to external device 60 which performs digital signal processing. As Figure 1 Signal processing circuit 20 is provided with multiplexer (MUX) 22, A-D converter (ADC) 24, and failure detection circuit 30 as indicated.

[0022] Input terminals of multiplexer 22 are connected to two output signal lines 12A, 12B connected to first sensor 12 and one output signal line 14A connected to second sensor 14. Output terminals of multiplexer 22 are connected to two signal lines 23A, 23B connected to A-D converter 24. Multiplexer 22 selectively switches a first detection signal (differential signal) output from first sensor 12 and a second detection signal (single-ended signal) output from second sensor 14 to output to A-D converter 24.

[0023] The input terminal of the AD converter 24 is connected to two signal lines 23A and 23B connected to the multiplexer 22. The output terminal of the AD converter 24 is connected to an output signal line 25 connected to the external device 60. The AD converter 24 converts the first detection signal (differential signal) and the second detection signal (single-ended signal) output from the multiplexer 22 from analog signals into digital signals, and outputs them to the external device 60. In addition, as the external device 60, it is envisaged to use a microcomputer, but it is not limited to this. Depending on the purpose of use of the detection system 10, various processing devices that perform digital signal processing (such as IC, personal computer, smartphone, tablet terminal, server, etc.) may also be used.

[0024] The fault detection circuit 30 detects a fault related to the connection between the first sensor 12 and the second sensor 14. The fault detection circuit 30 is connected to two signal lines 23A and 23B connected to the AD converter 24 via two switches 26A and 26B (an example of a "switching unit").

[0025] When detecting a fault, the fault detection circuit 30 switches both of the two switches 26A and 26B to the on state, thereby connecting to the two signal lines 23A and 23B.

[0026] On the other hand, when fault detection is not performed (ie, when the signal processing circuit 20 is normally used), the fault detection circuit 30 switches both switches 26A and 26B to the OFF state, thereby disconnecting the two signal lines 23A and 23B.

[0027] (Circuit Configurations of Signal Processing Circuit 20 and Fault Detection Circuit 30)

[0028] Figure 2 FIG. 2 shows the circuit configuration of the signal processing circuit 20 and the fault detection circuit 30 according to one embodiment. Figure 2 As shown, the signal processing circuit 20 includes a power supply voltage terminal VDD, four input terminals INP1 , INM1 , INP2 , and INM2 , an input terminal EN_MASK, a first multiplexer 31 , a fault detection circuit 30 , and two output terminals OUT_H and OUT_L.

[0029] The failure detection circuit 30 includes a second multiplexer 32 , a sensor signal line 33 , a pull-up resistor R1 , a first comparator 34 , a second comparator 35 , and an AND circuit 37 .

[0030] In addition, if Figure 2As shown, first sensor 12 includes four resistors R2, R3, R4, and R5 forming a bridge circuit. In first sensor 12, resistors R2 and R4 are connected in series between power supply voltage terminal VDD and ground. In first sensor 12, an output signal line 12A is connected between resistors R2 and R4. Furthermore, in first sensor 12, resistors R3 and R5 are connected in series between power supply voltage terminal VDD and ground. In first sensor 12, an output signal line 12B is connected between resistors R3 and R5.

[0031] In addition, if Figure 2 As shown, second sensor 14 includes two resistors R6 and R7 connected in series. In second sensor 14, an output signal line 14A is connected between resistors R6 and R7. Resistor R6 has one end connected to power supply voltage terminal VDD and the other end connected to resistor R7. Resistor R7 has one end connected to resistor R6 and the other end connected to ground.

[0032] The input terminal of the first multiplexer 31 is connected to the two output signal lines 12A and 12B connected to the first sensor 12 via the input terminals INP1 and INM1. In addition, the input terminal of the first multiplexer 31 is connected to the one output signal line 14A connected to the second sensor 14 via the input terminal INP2. In addition, the input terminal of the first multiplexer 31 is connected to the pre-set input terminal INM2. The first multiplexer 31 selectively switches the signal output as the fault judgment object to one of the first detection signal (differential signal) supplied from the two output signal lines 12A and 12B connected to the first sensor 12 and the second detection signal (single-ended signal) supplied from the one output signal line 14A connected to the second sensor 14. In addition, in Figure 2 In the signal processing circuit 20 shown in FIG. 1 , the first multiplexer 31 is equivalent to Figure 1 The multiplexer 22 is shown. In addition, Figure 2 In the signal processing circuit 20 shown in FIG. 1 , two output signal lines 31A and 31B correspond to Figure 1 The two signal lines 23A and 23B are shown.

[0033] In addition, the detection system 10 of this embodiment may also use another differential type sensor instead of the second sensor 14. In this case, the detection system 10 of this embodiment can also connect two output signal lines connected to the other sensor to the input terminals INP2 and INM2, and input the detection signal (differential signal) from the other sensor to the fault detection circuit 30 via the two output signal lines.

[0034] The input terminal of the second multiplexer 32 is connected to the two output signal lines 31A, 31B connected to the output terminal of the first multiplexer 31. The output terminal of the second multiplexer 32 is connected to the sensor signal line 33. The second multiplexer 32 selectively switches the signal output as the object of failure determination to either the signal supplied from the output signal line 31A or the signal supplied from the output signal line 31B.

[0035] The failure detection circuit 30 is able to selectively switch the signal supplied to the sensor signal line 33 as the object of failure determination to either one of the four signals input from the four input terminals INP1, INM1, INP2, INM2 by controlling the first multiplexer 31 and the second multiplexer 32. That is, the first multiplexer 31 and the second multiplexer 32 are an example of the "selection unit that connects either one of a plurality of input terminals connected to a sensor to a sensor signal line".

[0036] For example, in a case where the output of the first multiplexer 31 is switched to the first detection signal (differential signal) and the output of the second multiplexer 32 is switched to the signal supplied from the output signal line 31A, the signal of one of the first detection signals (differential signals) is supplied to the sensor signal line 33.

[0037] In addition, for example, in a case where the output of the first multiplexer 31 is switched to the first detection signal (differential signal) and the output of the second multiplexer 32 is switched to the signal supplied from the output signal line 31A, the signal of the other of the first detection signals (differential signals) is supplied to the sensor signal line 33.

[0038] In addition, for example, in a case where the output of the first multiplexer 31 is switched to the second detection signal (single-ended signal) and the output of the second multiplexer 32 is switched to the signal supplied from the output signal line 31A, the second detection signal (single-ended signal) is supplied to the sensor signal line 33.

[0039] In addition, for example, in a case where the output of the first multiplexer 31 is switched to the second detection signal (single-ended signal) and the output of the second multiplexer 32 is switched to the signal supplied from the output signal line 31B, the signal input from the prepared input terminal INM2 is supplied to the sensor signal line 33.

[0040] As described above, the sensor signal line 33 is supplied with either one of the four signals input from the four input terminals INP1, INM1, INP2, INM2 as the signal of the object of failure determination. The output side of the sensor signal line 33 is connected to the non-inverting terminal (+) of the first comparator 34 and the inverting terminal (−) of the second comparator 35.

[0041] The pull-up resistor R1 is connected between the power supply voltage terminal VDD and the sensor signal line 33. The pull-up resistor R1 pulls up the potential of the sensor signal line 33 to a high potential (a potential higher than the predetermined upper limit voltage threshold value) when a disconnection failure occurs. In addition, the pull-up resistor R1 uses a pull-up resistor having a resistance value sufficiently higher (for example, 10 times or more) than the resistors R2 to R7, so that the potential of the sensor signal line 33 can be made higher than the upper limit threshold voltage VREFH when a failure related to the connection of the first multiplexer 31 and the second multiplexer 32 occurs, and the potential of the sensor signal line 33 is hardly affected when no failure related to the connection of the first multiplexer 31 and the second multiplexer 32 occurs.

[0042] The non-inverting terminal (+) of the first comparator 34 is connected to the sensor signal line 33. The inverting terminal (−) of the first comparator 34 inputs a predetermined upper limit threshold voltage VREFH. The output terminal of the first comparator 34 is connected to the output terminal OUT_H. In addition, the upper limit threshold voltage VREFH is a voltage value higher than the predetermined normal voltage range.

[0043] The first comparator 34 outputs a first failure determination result signal indicating the presence of a failure related to the connection of the first sensor 12 or the second sensor 14 as a high level when the voltage value of the failure determination object signal input from the non-inverting terminal (+) is higher than the upper limit threshold voltage VREFH input from the inverting terminal (−).

[0044] On the other hand, the first comparator 34 outputs a first failure determination result signal indicating the absence of a failure related to the connection of the first sensor 12 or the second sensor 14 as a low level when the voltage value of the failure determination object signal input from the non-inverting terminal (+) is lower than the upper limit threshold voltage VREFH input from the inverting terminal (−).

[0045] The inverting terminal (−) of the second comparator 35 is connected to the sensor signal line 33. The non-inverting terminal (+) of the second comparator 35 inputs a predetermined lower limit threshold voltage VREFL. The output terminal of the second comparator 35 is connected to the output terminal OUT_L via the AND circuit 37. In addition, the lower limit threshold voltage VREFL is a voltage value lower than the predetermined normal voltage range.

[0046] The second comparator 35 outputs a second failure determination result signal indicating the presence of a failure related to the connection of the first sensor 12 or the second sensor 14 as a high level when the voltage value of the failure determination object signal input from the inverting terminal (−) is lower than the lower limit threshold voltage VREFL input from the non-inverting terminal (+).

[0047] On the other hand, the second comparator 35 outputs a low-level second fault determination result signal indicating no fault related to the connection of the first sensor 12 or the second sensor 14, in a case where the voltage value of the fault determination object signal input from the inverting terminal (-) is higher than the lower limit threshold voltage VREFL input from the non-inverting terminal (+).

[0048] Thus, the fault detection circuit 30 outputs a high-level signal (first fault determination result signal or second fault determination result signal) from the first comparator 34 or the second comparator 35 when the fault determination object signal is outside the predetermined normal voltage range, thereby being able to notify the outside (for example, the external device 60 shown in FIG. 1) that there is a fault related to the connection of the sensor (first sensor 12 or second sensor 14) that is the output source of the fault determination object signal. Figure 1

[0049] Further, the "fault related to the connection of the sensor" that the fault detection circuit 30 is able to detect is a disconnection fault (i.e., an open circuit fault) and a short circuit fault.

[0050] (Detection of disconnection fault by fault detection circuit)

[0051] Figure 3 The disconnection fault sites that the fault detection circuit 30 according to one embodiment is able to detect.

[0052] In Figure 3 , the fault sites F1 to F10 indicated by filled-in marks "X" are sites where the fault detection circuit 30 is able to detect a disconnection fault, and are sites where the voltage value of the sensor signal line 33 is pulled up to a high potential higher than the upper limit threshold voltage VREFH by the pull-up resistor R1 when a disconnection fault occurs, and thus a high-level first fault determination result signal is output from the output terminal OUT H.

[0053] Fault site F1: output signal line 12A of first sensor 12

[0054] Fault site F2: output signal line 12B of first sensor 12

[0055] Fault site F3: output signal line 14A of second sensor 14

[0056] Fault site F4: between resistor R4 in first sensor 12 and ground

[0057] Fault site F5: between resistor R5 in first sensor 12 and ground

[0058] Fault site F6: between resistor R7 in second sensor 14 and ground

[0059] ​Fault site F7: between switch 36 and first multiplexer 31

[0060] Fault site F8: output signal line 31A of first multiplexer 31

[0061] Fault site F9: output signal line 31B of first multiplexer 31

[0062] Fault site F10: sensor signal line 33 (part of the sensor signal line 33 on the side closer to the connection point of pull-up resistor Rl)

[0063] For example, when a disconnection fault occurs at fault site Fl on output signal line 12A, the potential of sensor signal line 33 is pulled up to a high potential higher than upper limit threshold voltage VREFH by pull-up resistor Rl at the time of connecting output signal line 12A to sensor signal line 33. Thus, a voltage higher than upper limit threshold voltage VREFH is input to the non-inverting terminal (+) of first comparator 34. As a result, first comparator 34 outputs a first fault determination result signal of high level indicating that a disconnection fault exists on output signal line 12A.

[0064] In addition, in Figure 3 Fault sites Fl 1, F12 indicated by unfilled marks "X" in Fig. 6 are sites where a disconnection fault can be detected by fault detection circuit 30, and in which the voltage value of sensor signal line 33 becomes "0 V" lower than lower limit threshold voltage VREFL when a disconnection fault occurs, thus being sites in which a second fault determination result signal of high level is output from output terminal OUT_L.

[0065] Fault site Fl 1: between resistor R2 in first sensor 12 and power supply voltage VDD

[0066] Fault site F12: between resistor R3 in first sensor 12 and power supply voltage VDD

[0067] For example, when a disconnection fault occurs at fault site Fl 1 between resistor R2 and power supply voltage VDD, the supply of power supply voltage VDD to first sensor 12 is interrupted, but the supply of power supply voltage VDD to fault detection circuit 30 is not interrupted, and thus the voltage V_F11 of sensor signal line 33 at the time of disconnection of fault site Fl 1 can be represented by the following equation.

[0068] V_F11 = VDD * R5 / (Rl + R5)

[0069] In this embodiment, as described above, as the pull-up resistor Rl, a pull-up resistor having a resistance value higher than that of the resistor R5, for example, by a factor of 10 or more is used. Therefore, according to the above equation, in a case where the resistance value of the pull-up resistor Rl is set to a sufficiently high resistance value, the voltage V_Fll of the sensor signal line 33 is substantially 0 V. Thus, a voltage "0 V" lower than the lower limit threshold voltage VREFL is input to the inverting terminal (-) of the second comparator 35. As a result, the second comparator 35 outputs a high-level second fault determination result signal indicating the presence of a disconnection fault between the resistor R2 and the power supply voltage VDD.

[0070] Further, the fault detection circuit 30 arbitrarily adjusts the upper limit threshold voltage VREFH and the lower limit threshold voltage VREFL by setting of a register or the like, whereby the voltage range in which fault detection can be performed can be arbitrarily set. Thus, the fault detection circuit 30 can also perform refinement of fault site discrimination.

[0071] (Detection of short-circuit faults by the fault detection circuit)

[0072] Figure 4 The fault detection circuit 30 according to the embodiment can detect the short-circuit fault sites.

[0073] In Figure 4 , the fault sites F21, F22 indicated by the filled-in marks "X" are sites at which the fault detection circuit 30 can detect short-circuit faults, and are sites at which a high-level first fault determination result signal is output from the output terminal OUT_H when a short-circuit fault with the power supply voltage VDD occurs, and a high-level second fault determination result signal is output from the output terminal OUT_L when a short-circuit fault with the ground occurs.

[0074] Fault site F21: output signal line 12A of the first sensor 12

[0075] Fault site F22: output signal line 12B of the first sensor 12

[0076] Further, in Figure 4 , the fault site F23 indicated by the unfilled mark "X" is a site at which the fault detection circuit 30 can detect a short-circuit fault with the power supply voltage VDD, and is a site at which a high-level first fault determination result signal is output from the output terminal OUT_H when a short-circuit fault with the power supply voltage VDD occurs.

[0077] Fault site F23: output signal line 14A of the second sensor 14

[0078] Further, as Figures 2 to 4In the case where the single-ended sensor is connected to the INP2 and the INM2 as shown, the input terminal INM2 is in a non-connected state. In this case, the input of the first multiplexer 31 is short-circuited to the ground by switching the switch 36 provided between the input of the first multiplexer 31 and the ground to the on state. However, in this case, the input voltage of the first multiplexer 31 is "0 V", and in the case where the input terminal INM2 is the object of the failure determination, the second failure determination result signal at the high level is output from the second comparator 35. That is, a false determination is made as "failure". Therefore, in this case, the failure detection circuit 30 inputs the second failure determination result signal from the second comparator 35 to one input terminal of the AND circuit 37 and inputs the inverted signal of the mask signal at the high level input from the input terminal EN_MASK to the other input terminal of the AND circuit 37, whereby the second failure determination result signal at the low level is output from the AND circuit 37 to the output terminal OUT L.

[0079] As described above, the failure detection circuit 30 of one embodiment includes a sensor signal line 33 connected to a sensor, a pull-up resistor R1 connected between a power supply voltage terminal VDD and the sensor signal line 33, and a first comparator 34 whose non-inverting input terminal is connected to the sensor signal line 33 and whose inverting input terminal inputs a predetermined upper threshold voltage VREFH, and outputs a first failure determination result signal indicating the presence or absence of a failure related to connection to the sensor from an output terminal of the first comparator 34.

[0080] Thus, the failure detection circuit 30 of one embodiment can output the first failure determination result signal indicating the presence of a failure related to connection to the sensor from the output terminal of the first comparator 34 by pulling up the potential of the sensor signal line 33 with the pull-up resistor R1 in the case where a failure related to connection to the sensor occurs.

[0081] In addition, the failure detection circuit 30 of one embodiment includes a second comparator 35 whose inverting input terminal is connected to the sensor signal line 33 and whose non-inverting input terminal inputs a predetermined lower threshold voltage VREFL, and outputs a second failure determination result signal indicating the presence or absence of a failure related to connection to the sensor from an output terminal of the second comparator 35.

[0082] Thus, the failure detection circuit 30 of one embodiment can output the second failure determination result signal indicating the presence of a failure related to connection to the sensor from the output terminal of the second comparator 35 in the case where the potential of the sensor signal line 33 is lower than the normal voltage range due to a failure related to connection to the sensor.

[0083] Further, the failure detection circuit 30 of one embodiment includes the first multiplexer 31 and the second multiplexer 32.

[0084] Thus, the failure detection circuit 30 of one embodiment can determine whether there is a failure related to connection of a sensor for each of a plurality of signal lines connected to a plurality of input terminals.

[0085] Further, the failure detection circuit 30 of one embodiment has two input terminals with respect to one sensor, can connect two output signal lines of a differential sensor to the two input terminals, and can connect one output signal line of a single-ended sensor to either of the two input terminals.

[0086] Thus, the failure detection circuit 30 of one embodiment can determine whether there is a failure related to connection of a sensor for each of a differential sensor and a single-ended sensor.

[0087] The above describes one embodiment of the present application, but the present application is not limited to the embodiments, and various modifications or changes can be made within the scope of the gist of the present application described in the scope of the claims.

[0088] For example, in one embodiment, the structure is configured to detect a failure related to connection of two sensors 12 and 14 by the failure detection circuit 30, but is not limited thereto, and the structure of one embodiment can be modified to detect a failure related to connection of three or more sensors.

[0089] Further, for example, in one embodiment, the structure is configured to be able to perform both failure detection based on the comparator 34 and failure detection based on the comparator 35, but is not limited thereto, and for example, the structure of one embodiment can be modified to be configured not to provide the comparator 35 and to perform only failure detection based on the comparator 34.

[0090] This international application claims priority from Japanese Patent Application No. 2020-070474 filed on April 9, 2020, and the entire contents of the above application are incorporated herein by reference.

[0091] Explanation of Reference Signs

[0092] 10 Detection system

[0093] 12 First sensor

[0094] 12A, 12B Output signal line

[0095] 14 Second sensor

[0096] 14A Output signal line

[0097] 20 signal processing circuit

[0098] 22 multiplexer

[0099] 23A, 23B signal line

[0100] 24A-D converter

[0101] 26A, 26B switch (switching unit)

[0102] 30 fault detection circuit

[0103] 31 first multiplexer (selection unit)

[0104] 32 second multiplexer (selection unit)

[0105] 33 sensor signal line

[0106] 34 first comparator

[0107] 35 second comparator

[0108] 36 switch

[0109] 37 AND circuit (masking unit)

[0110] 60 external device

[0111] R1 pull-up resistor

[0112] INP1, INM1, INP2, INM2, EN_MASK input terminal

[0113] OUT_H, OUT_L output terminal

[0114] VDD power voltage terminal.

Claims

1. A fault detection circuit, characterized in that: have: A sensor signal line connected to the sensor; a pull-up resistor connected between a power supply voltage and the sensor signal line; a selection unit configured to connect one of a plurality of input terminals connected to the sensor to the sensor signal line; a first comparator, wherein a non-inverting input terminal of the comparator is connected to the sensor signal line, and an inverting input terminal of the comparator is input with a predetermined upper threshold voltage; as well as The second comparator has an inverting input terminal connected to the sensor signal line and a non-inverting input terminal inputted with a predetermined lower threshold voltage. outputting a first fault determination result signal indicating whether there is a fault related to the connection of the sensor from an output terminal of the first comparator; outputting a second fault determination result signal indicating whether or not there is a fault related to the connection of the sensor from an output terminal of the second comparator, and outputting the second fault determination result signal indicating the presence of a fault related to the connection of the sensor when a short-circuit fault of the sensor occurs, For 1 sensor with 2 input terminals, The two input terminals are connected to two output signal lines of the differential sensor, and one input terminal of the two input terminals is connected to one output signal line of the single-ended sensor. The fault detection circuit further includes a shielding unit that shields the second fault determination result signal indicating a fault into the second fault determination result signal indicating no fault when the other of the two input terminals is internally connected to the ground potential by the selection unit.

2. The fault detection circuit according to claim 1, characterized in that: When a failure related to the connection of the sensor occurs, the pull-up resistor causes the potential of the sensor signal line to be higher than the upper limit threshold voltage.

3. The fault detection circuit according to claim 2, characterized in that: When a disconnection failure of the sensor occurs, the first failure determination result signal indicating that a failure related to the connection of the sensor exists is output.

4. A detection system, characterized in that: have: sensor; a signal processing circuit for performing predetermined processing on the output signal of the sensor; and The fault detection circuit according to any one of claims 1 to 3.

5. The detection system according to claim 4, characterized in that: The detection system further includes a switching unit that disconnects the fault detection circuit from the sensor signal line when the signal processing circuit performs the predetermined processing, and connects the fault detection circuit to the sensor signal line when the signal processing circuit does not perform the predetermined processing.

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