An emergency destruction system for sensitive information in airborne complex electronic products

Abstract

The present invention relates to an emergency destruction system for sensitive information in airborne complex electronic products, belonging to the field of airborne complex electronic products. When designing the main processor software of the present invention, the storage unit is divided into two areas. One area stores important and sensitive information in a direct addressing manner, and the other area stores daily data. In this way, when the conventional power supply unit fails and the main processor cannot work, the microprocessor destruction control unit can destroy the important and sensitive information in the memory in a direct addressing manner. The present invention uses a dedicated low-power microprocessor to erase the classified or sensitive information stored in a direct addressing manner within the address space of a specific area in the external storage device of the main processor in the shortest time, so as to achieve the purpose of preventing the loss of control of important classified or sensitive information.

Description

Technical Field

[0001] The present invention belongs to the field of airborne complex electronic products, and particularly relates to a sensitive information emergency destruction system in an airborne complex electronic product. Background Art

[0002] With the gradual development of aircraft towards intelligence and unmannedness, the processing logic and processor architecture therein are becoming increasingly complex, posing higher requirements for relevant security and confidentiality work. Especially when working in a harsh environment for a long time, it is inevitable for the aircraft to have active or passive failures. How to ensure that the classified information in the aircraft does not get out of control after the main body function of the aircraft fails has become an important issue.

[0003] In the design process of intelligent devices in aircraft, computer systems are widely used. At the hardware level, they often have relatively high operating power consumption, and at the software level, they often include complex operating systems, drivers, file system addressing functions, etc. This poses higher requirements for the emergency destruction system.

[0004] First of all, the emergency power supply power is limited. The so-called emergency situation is usually a power failure of the system due to reasons. In an emergency, in order to delete sensitive information in a short time, it is necessary to prepare an emergency power supply device to supply power to the system temporarily. And the emergency power supply device is usually a spare battery or a super capacitor. Considering from the aspects of size, weight, cost, etc., neither the spare battery nor the super capacitor can provide enough power to support the normal operation of the entire system or even the main processor unit.

[0005] Secondly, since the time from the occurrence of a failure in the aircraft to its crash (or out of control) may be very short. Considering comprehensively, the classified or sensitive information in the system needs to be completely deleted within the shortest possible time (usually 1 second). Solving the emergency destruction problem cannot be completely achieved only through hardware design. Because sensitive information is randomly stored on the storage unit in the form of a file system together with other non-sensitive information in the operating system. The time required for erasing the entire storage unit is too long. It cannot meet the requirement of destroying sensitive information within a short time in emergency destruction. Summary of the Invention

[0006] (1) Technical Problems to be Solved

[0007] The technical problem to be solved by the present invention is how to provide a sensitive information emergency destruction system in an airborne complex electronic product to solve the problem that the main processor has too high power consumption and the spare battery or super capacitor acting as the power source during the emergency destruction process cannot drive it to work stably.

[0008] (2) Technical Solutions

[0009] To solve the above technical problems, the present invention proposes a sensitive information emergency destruction system in an airborne complex electronic product, which system includes a storage unit, a bus switching unit, a main processor unit, a microprocessor destruction control unit, a conventional power supply unit, an emergency power supply unit, and a fault detection unit;

[0010] The main processor unit includes a main processor and peripheral clock and reset circuits, and is responsible for processing system services;

[0011] The storage unit is connected to the bus switching unit and is used for storing data required for the startup and operation of the main processor; it is divided into two independent areas, with sensitive information stored in a specific area in a direct addressing manner and non-sensitive information stored in other areas in a file system addressing manner, and the main processor unit accesses them through direct addressing and file system addressing methods respectively;

[0012] The bus switching unit is connected to the main processor unit and the microprocessor destruction control unit, and is used for switching the control power of the storage unit between the main processor unit and the microprocessor destruction control unit;

[0013] The microprocessor destruction control unit consists of a low-power microprocessor, is connected to the fault detection unit and the bus switching unit, does not work usually, and is responsible for controlling the bus switching unit when receiving the emergency destruction instruction from the fault detection unit, bypassing the main processor unit from the storage bus of the storage unit, and instead performing read, write, and destruction of the storage unit through the microprocessor destruction control unit;

[0014] The conventional power supply unit supplies power to the entire system;

[0015] The emergency power supply unit supplies power to the storage unit, the bus switching unit, and the microprocessor destruction control unit in an emergency;

[0016] The fault detection unit is connected to the microprocessor destruction control unit, is used for detecting whether the conventional power supply unit is working properly, and notifies the microprocessor destruction control unit after the conventional power supply unit fails, and the microprocessor destruction control unit determines whether to perform a destruction operation.

[0017] Further, the conventional power supply unit is an airborne generator or a battery.

[0018] Further, the emergency power supply unit is an airborne backup battery.

[0019] Further, the bus switching unit includes an analog switch chip.

[0020] Further, the system further includes other circuits and actuators, and the other circuits and actuators are connected to the main processing unit and are the peripheral circuits of the main processor unit, and are responsible for signal conversion and input / output.

[0021] Further, the microprocessor destruction control unit performs a destruction operation after the normal power supply unit fails and an emergency destruction instruction is received. The so-called destruction operation is to send a destruction instruction to the storage unit, commanding it to set the values in a specific storage area to all 0s or all 1s.

[0022] Further, when the system is operating in the normal working state, the power required by all electronic components in the system is provided by the normal power supply unit. The main processor unit directly accesses the storage unit through the bus switching unit. The sensitive information therein is stored in a specific area of the storage unit and is accessed through direct addressing. Other data is accessed by the operating system in the form of a file system.

[0023] Further, when the system is operating in the normal working state, the normal power supply unit also needs to charge the emergency power supply unit.

[0024] Further, when a serious fault occurs in the system, the fault detection unit sends the detected fault information to the microprocessor destruction control unit; the microprocessor destruction control unit determines the fault type. If it is an irreparable fault above the serious level, it starts the emergency destruction state; at this time, the system power is provided by the emergency power supply unit; the microprocessor destruction control unit issues a bus switching instruction to the bus control unit, and through the bus control unit, switches the bus control right of the storage unit from the main processor unit to the microprocessor destruction control unit; then it executes a predetermined emergency destruction program to erase the sensitive information in a specific area through direct addressing.

[0025] Further, the occurrence of a serious fault in the system is an airborne battery or engine fault, resulting in the plane about to crash.

[0026] (III) Beneficial Effects

[0027] The present invention proposes a sensitive information emergency destruction system in an airborne complex electronic product. When designing the main processor software of the present invention, the storage unit is divided into two areas. One area stores important and sensitive information through direct addressing, and the other area stores daily data. In this way, when the normal power supply unit fails and the main processor cannot work, the microprocessor destruction control unit can destroy the important and sensitive information in the memory through direct addressing. The present invention uses a dedicated low-power microprocessor to erase the classified or sensitive information stored in a specific area address space in the external storage device of the main processor in the shortest time, so as to achieve the purpose of preventing the loss of control of important classified or sensitive information. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of the system composition and normal working state of the present invention;

[0029] Figure 2 It is a schematic diagram of the storage unit access of the present invention;

[0030] Figure 3 Schematic diagram of the emergency destruction process of the present invention;

[0031] Figure 4 Schematic diagram of the emergency destruction state of the present invention. Specific implementation manners

[0032] To make the objectives, contents and advantages of the present invention clearer, the specific implementation manners of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0033] The present invention relates to the technical field of airborne complex electronic products, and particularly to the field of airborne complex electronic products with an operating system in the main processor. In an emergency situation (such as: before important or sensitive information inside is obtained by unauthorized personnel due to a failure of the aircraft power or power supply system), the present invention uses a dedicated low-power microprocessor to erase classified or sensitive information stored in a specific area address space of the external storage device of the main processor in the shortest time in a direct addressing manner, so as to achieve the purpose of preventing important classified or sensitive information from getting out of control.

[0034] Since the power consumption of the main processor is too large, the backup battery or super capacitor acting as the power source during the emergency destruction process cannot drive it to work stably. For this reason, a low-power processor for emergency destruction is specially adopted. The low-power processor has bus control rights. After receiving the emergency destruction instruction, the low-power microprocessor switches the control right of the storage unit from the main processor to the microprocessor through the bus switch. At this time, the emergency power supply unit only needs to supply power to the low-power microprocessor unit and the storage unit.

[0035] In addition, based on the hardware design and combined with the operating system partition addressing technology, the storage unit is divided into two independent storage areas. The sensitive information is stored in a specific area in a direct addressing manner, and the non-sensitive information is stored in other areas in a file system addressing manner. During the emergency destruction process, only the direct addressing space storing the sensitive information is executed for the destruction operation to minimize the destruction time.

[0036] The sensitive information emergency destruction system in the airborne complex electronic product of the present invention includes a storage unit, a bus switching unit, a main processor unit, a microprocessor destruction control unit, a conventional power supply unit, an emergency power supply unit, and a fault detection unit. As Figure 1 shown in the system composition. Under normal working conditions, the entire system is powered by the conventional power supply unit. In an emergency situation, the conventional power supply unit fails and cannot supply power to the entire system. At this time, the emergency power supply unit (mainly composed of a battery and a power management circuit) supplies power to such as Figure 1Power the storage unit, bus switching unit, and microprocessor destruction control unit shown to ensure that the emergency destruction function can be normally executed in case of emergency. The main processor unit with high power consumption, other circuits, and actuators do not work at this time.

[0037] Among them, the main processor unit is mainly composed of a main processor and peripheral circuits such as clocks and resets, and is responsible for processing the main business functions of the system.

[0038] The storage unit is connected to the bus switching unit and is used to store the data required for the startup and operation of the main processor. It is divided into two independent areas internally. Sensitive information is stored in a specific area in a direct addressing manner, and non-sensitive information is stored in other areas in a file system addressing manner. The main processor unit accesses them through direct addressing and file system addressing methods respectively.

[0039] The bus switching unit connects the main processor unit and the microprocessor destruction control unit, and is mainly composed of an analog switch chip, which is used to switch the control rights of the main processor unit and the microprocessor destruction control unit over the storage unit.

[0040] The microprocessor destruction control unit is mainly composed of a low-power microprocessor, which is connected to the fault detection unit and the bus switching unit. It does not work usually. When receiving the emergency destruction instruction from the fault detection unit, it is responsible for controlling the bus switching unit to bypass the main processor unit from the storage bus of the storage unit, and instead perform read, write, destruction, etc. operations on the storage unit through the microprocessor destruction control unit.

[0041] The conventional power supply unit is usually an airborne generator or battery, which powers the entire system.

[0042] The emergency power supply unit is usually an airborne backup battery, which powers the storage unit, bus switching unit, and microprocessor destruction control unit in case of emergency.

[0043] The fault detection unit is connected to the microprocessor destruction control unit and is used to detect whether the conventional power supply unit is working properly. After the conventional power supply unit fails, it notifies the microprocessor destruction control unit, and the microprocessor destruction control unit judges whether to perform the destruction operation.

[0044] The system also includes other circuits and actuators. The other circuits and actuators are connected to the main processing unit and are the peripheral circuits of the main processor unit, mainly responsible for signal conversion and input / output.

[0045] The main processor unit runs the operating system and application software to implement all software functions. The microprocessor destruction control unit has a relatively single function. When the normal power supply unit fails and an emergency destruction instruction is received, it performs the destruction operation. The so-called destruction operation is to send a destruction instruction to the storage unit, commanding it to set the values in a specific storage area to all 0s or all 1s. The main differences between the main processor unit and the microprocessor destruction control unit are functions and power consumption. More importantly, their addressing methods for the storage unit are different. The main processor unit needs to run the operating system, so it usually addresses through the file system, which is convenient for writing complex upper-layer application software and better managing memory. However, the file system addressing has a drawback that the storage location of the stored data is randomly allocated by the operating system. In an emergency, when the normal power supply unit fails and cannot supply power to the main processor unit, only the microprocessor unit can perform the destruction operation. At this time, because the file system of the main processor unit stores important information in a fragmented manner in various corners of the storage unit. In order to delete the important information completely, the microprocessor unit has to erase the entire storage unit, but this is too inefficient and the destruction time is very long. Therefore, when designing the main processor software in the present invention, the storage unit is divided into two areas. One area stores important and sensitive information through direct addressing, and the other area stores daily data. In this way, when the normal power supply unit fails and the main processor cannot work, the microprocessor destruction control unit can destroy the important and sensitive information in the memory through direct addressing.

[0046] There are mainly two working states for the airborne electronic equipment described in the present invention: the normal working state and the emergency destruction state. See Figure 3 .

[0047] When the system works in the normal working state, the power required by all the electronic components in the system is provided by the normal power supply unit. The main processor unit can directly access the storage unit through the bus switching unit. The sensitive information is stored in a specific area of the storage unit and is accessed through direct addressing. Other data is accessed through the operating system in the form of a file system. At this time, the normal power supply unit also needs to charge the emergency power supply unit. As Figure 1 shown, when the system is working normally, the normal power supply unit supplies power to all the modules within the dotted line box.

[0048] When a serious fault occurs in the system (usually an on-board battery or engine fault, causing the aircraft to be about to crash), the fault detection unit sends the detected fault information to the microprocessor destruction control unit. The microprocessor destruction control unit determines the fault type. If it is an irreparable fault above the serious level, it starts the emergency destruction state. At this time, the conventional power supply unit is likely to have failed, and the main processor unit and other circuits and actuators stop working. At this time, the conventional power supply unit has failed, and the system power is provided by the emergency power supply unit. The microprocessor destruction control unit sends a bus switching instruction to the bus control unit, and through the bus control unit, switches the bus control right of the storage unit from the main processor unit to the microprocessor destruction control unit. Subsequently, a predetermined emergency destruction program is executed to erase the sensitive information in a specific area by direct addressing. To ensure that after the aircraft crashes or gets out of control, the sensitive information stored in it cannot be obtained by personnel outside the controlled range. Such as Figure 4 is the emergency destruction state. When the system performs emergency destruction work, the emergency power supply unit supplies power to the storage unit, bus switching unit, and microprocessor destruction control unit within the dotted line box.

[0049] When designing the main processor software of the present invention, the storage unit is divided into two areas. One area stores important and sensitive information by direct addressing, and the other area stores daily data. In this way, when the conventional power supply unit fails and the main processor cannot work, the microprocessor destruction control unit can erase the important and sensitive information in the memory by direct addressing. The present invention uses a dedicated low-power microprocessor to erase the classified or sensitive information stored in a specific area address space of the external storage device of the main processor by direct addressing in the shortest time, so as to achieve the purpose of preventing the important classified or sensitive information from getting out of control.

[0050] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and deformations can still be made, and these improvements and deformations should also be regarded as the protection scope of the present invention.

Claims

1. An emergency destruction system for sensitive information in an airborne complex electronic product, characterized in that, The system includes a storage unit, a bus switching unit, a main processor unit, a microprocessor destruction control unit, a normal power supply unit, an emergency power supply unit, and a fault detection unit; The main processor unit includes a main processor and peripheral clock and reset circuits, and is responsible for processing system services; The storage unit is connected to the bus switching unit and is used to store data required for the startup and operation of the main processor; it is divided into two independent areas. Sensitive information is stored in a specific area in a direct addressing manner, and non-sensitive information is stored in other areas in a file system addressing manner. The main processor unit accesses them through direct addressing and file system addressing methods respectively; The bus switching unit is connected to the main processor unit and the microprocessor destruction control unit, and is used to switch the control rights of the main processor unit and the microprocessor destruction control unit over the storage unit; The microprocessor destruction control unit consists of a low-power microprocessor, is connected to the fault detection unit and the bus switching unit, and does not work normally. When receiving an emergency destruction instruction from the fault detection unit, it is responsible for controlling the bus switching unit to bypass the main processor unit from the storage bus of the storage unit, and instead perform read, write, and destruction operations on the storage unit through the microprocessor destruction control unit; The normal power supply unit supplies power to the entire system; The emergency power supply unit supplies power to the storage unit, the bus switching unit, and the microprocessor destruction control unit in case of emergency; The fault detection unit is connected to the microprocessor destruction control unit and is used to detect whether the normal power supply unit is working properly. After the normal power supply unit fails, it notifies the microprocessor destruction control unit, and the microprocessor destruction control unit determines whether to perform a destruction operation.

2. The sensitive information emergency destruction system in the airborne complex electronic product according to claim 1, characterized in that The normal power supply unit is an airborne generator or battery.

3. The sensitive information emergency destruction system in the airborne complex electronic product according to claim 1, characterized in that, The emergency power supply unit is an airborne backup battery.

4. The sensitive information emergency destruction system in the airborne complex electronic product according to claim 1, characterized in that, The bus switching unit includes an analog switch chip.

5. The sensitive information emergency destruction system in the airborne complex electronic product according to claim 1, characterized in that, The system also includes other circuits and actuators. The other circuits and actuators are connected to the main processing unit and are the peripheral circuits of the main processor unit, responsible for signal conversion and input / output.

6. The sensitive information emergency destruction system in the airborne complex electronic product according to claim 1, characterized in that, The microprocessor destruction control unit performs a destruction operation after the normal power supply unit fails and receives an emergency destruction instruction. The so-called destruction operation is to send a destruction instruction to the storage unit, commanding it to set the values in a specific storage area to all 0s or all 1s.

7. The sensitive information emergency destruction system in the airborne complex electronic product according to any one of claims 1-6, characterized in that, When the system is working in the normal working state, the power required by all electronic components in the system is provided by the normal power supply unit. The main processor unit directly accesses the storage unit through the bus switching unit. The sensitive information is stored in a specific area of the storage unit and is accessed through direct addressing. Other data is accessed by the operating system in a file system manner.

8. The sensitive information emergency destruction system in the airborne complex electronic product according to claim 7, characterized in that, When the system is working in the normal working state, the normal power supply unit also needs to charge the emergency power supply unit.

9. The sensitive information emergency destruction system in the airborne complex electronic product according to claim 7, characterized in that, When a serious fault occurs in the system, the fault detection unit sends the detected fault information to the microprocessor destruction control unit; the microprocessor destruction control unit judges the fault type. If it is an irreparable fault above the serious level, it starts the emergency destruction state; at this time, the system power is provided by the emergency power supply unit; the microprocessor destruction control unit sends a bus switching instruction to the bus control unit, and through the bus control unit, the bus control right of the storage unit is switched from the main processor unit to the microprocessor destruction control unit; then a predetermined emergency destruction program is executed to erase the sensitive information in a specific area by direct addressing.

10. The sensitive information emergency destruction system in the airborne complex electronic product according to claim 9, characterized in that, The serious fault occurring in the system is an airborne battery or engine fault, resulting in the plane about to crash.

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