Dielectric composition and laminated ceramic electronic component

Abstract

A dielectric composition, wherein there are: dielectric particles containing a perovskite compound represented by ABO3 as a main component; and a first segregation containing Ba, Ti, Si, Ni, and O. Also, in a multilayer ceramic electronic component having the dielectric composition, there is the first segregation containing Ba, Ti, Si, Ni, and O at the boundary of a ceramic layer and an internal electrode layer.

Description

Technical Field

[0001] The present invention relates to a dielectric composition and a laminated ceramic electronic component comprising the dielectric composition. Background Technology

[0002] As shown in Patent Document 1, a stacked ceramic electronic component is known, in which a ceramic layer composed of a dielectric composition and an internal electrode layer are alternately stacked. In this stacked ceramic electronic component, characteristics such as shrinkage rate or coefficient of linear expansion differ between the ceramic layer and the internal electrode layer. Due to this difference in characteristics, structural defects such as cracks or interlayer delamination may sometimes occur, reducing durability in high-temperature and high-humidity environments.

[0003] [Existing Technical Documents]

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2013-012418 Summary of the Invention

[0006] [The problem the invention aims to solve]

[0007] The present invention was made in view of this actual situation, and its object is to provide a dielectric composition and a laminated ceramic electronic component with excellent durability in high temperature and high humidity environments.

[0008] [Technical solution used to solve the problem]

[0009] To achieve the above objectives, the present invention provides a dielectric composition comprising:

[0010] Dielectric particles comprising a perovskite-type compound represented by ABO3 as the main component; and

[0011] The first segregation contains Ba, Ti, Si, Ni, and O.

[0012] The dielectric composition of the present invention, having the above-described features, can be applied to multilayer ceramic electronic components. The inventors have conducted in-depth research and have found that multilayer ceramic electronic components having the above-described dielectric composition exhibit excellent durability even in high-temperature and high-humidity environments.

[0013] Preferably, the molar ratio of Ni to Si in the first segregation (Ni / Si) is 0.1 or higher.

[0014] Preferably, the average particle size of the first segregation is 0.05 μm or more and 0.30 μm or less.

[0015] Preferably, the dielectric composition also has a second segregation containing Mg.

[0016] Preferably, the perovskite compound is barium titanate.

[0017] In addition, to achieve the above objectives, the present invention provides a stacked ceramic electronic component, wherein the component body is formed by alternating layers of a ceramic layer mainly composed of a perovskite-type compound represented by ABO3 and an internal electrode layer containing Ni.

[0018] A first segregation containing Ba, Ti, Si, Ni and O exists at the boundary between the ceramic layer and the internal electrode layer.

[0019] The inventors conducted in-depth research and discovered that the laminated ceramic electronic components, by possessing the aforementioned characteristics, exhibit improved durability under high-temperature and high-humidity environments. The reason for this improved durability is not yet clear, but it is believed that the first segregation containing specified elements enhances the bonding strength between the ceramic layer and the internal electrodes, thereby leading to the aforementioned improved durability.

[0020] Preferably, the number of the first segregations per unit length of the boundary is more than 0.2 per μm and less than 3.2 per μm.

[0021] Furthermore, in the laminated ceramic electronic components, it is preferable that the molar ratio of Ni to Si in the first segregation (Ni / Si) is 0.1 or more.

[0022] Furthermore, in the laminated ceramic electronic components, it is preferable that the average particle size of the first segregation is 0.05 μm or more and 0.30 μm or less.

[0023] Furthermore, in the laminated ceramic electronic components, the perovskite compound is preferably barium titanate.

[0024] In addition, it is preferable that the interior of the ceramic layer contains a second segregation containing Mg. Attached Figure Description

[0025] Figure 1 This is a schematic diagram showing a cross-section of a multilayer ceramic capacitor according to one embodiment of the present invention.

[0026] Figure 2 It is Figure 1 The enlarged cross-sectional view of region II is shown. Detailed Implementation

[0027] In this embodiment, as an example of the ceramic electronic component of the present invention, [the following is an example of the ceramic electronic component of the present invention]. Figure 1 The multilayer ceramic capacitor 2 shown will be described below. The multilayer ceramic capacitor 2 has an element body 4 and a pair of external electrodes 6 formed on the outer surface of the element body 4.

[0028] Figure 1 The component body 4 shown is typically roughly rectangular, having two opposing end faces 4a along the X-axis, two opposing side faces 4b along the Y-axis, and two opposing side faces 4b along the Z-axis. However, there are no particular limitations on the shape of the component body 4; it can also be elliptical, cylindrical, or other prismatic shapes. Furthermore, there are no particular limitations on the external dimensions of the component body 4. For example, the length L0 along the X-axis can be set to 0.4 mm to 5.7 mm, the width W0 along the Y-axis to 0.2 mm to 5.0 mm, and the height T0 along the Z-axis to 0.2 mm to 3.0 mm. In this embodiment, the X-axis, Y-axis, and Z-axis are perpendicular to each other.

[0029] Furthermore, the component body 4 has a ceramic layer 10 and an internal electrode layer 12 that are substantially parallel to the plane containing the X and Y axes. Inside the component body 4, the ceramic layer 10 and the internal electrode layer 12 are alternately stacked along the Z-axis direction. Here, "substantially parallel" means that most parts are parallel, but there may also be slightly non-parallel parts. The ceramic layer 10 and the internal electrode layer 12 may also be slightly uneven or tilted.

[0030] There is no particular limitation on the average thickness (interlayer thickness) of each ceramic layer 10; for example, it can be set to 100 μm or less, and preferably 30 μm or less. Furthermore, the number of ceramic layers 10 can be determined according to the desired characteristics and is not particularly limited. For example, it can be set to 20 layers or more, and more preferably 50 layers or more.

[0031] On the other hand, the internal electrode layer 12 is stacked between each ceramic layer 10, and the number of stacked layers is determined according to the number of stacked ceramic layers 10. Furthermore, there is no particular limitation on the average thickness of each internal electrode layer 12; for example, it can be set to 3.0 μm or less. Moreover, the average thickness of the ceramic layer 10 or the average thickness of the internal electrode layer 12 can be determined by observing it using a metal microscope. Figure 1 The thickness of each layer (10, 12) can be calculated by measuring the thickness at at least 5 locations in the cross-section shown.

[0032] Furthermore, the internal electrode layer 12 is stacked in such a way that one end is alternately exposed on two end faces 4a facing each other in the X-axis direction of the component body 4. Moreover, a pair of external electrodes 6 are formed on one end face 4a of the component body 4 and are electrically connected to the exposed ends of the alternately arranged internal electrode layers 12. By forming the external electrodes 6 in this way, a capacitor circuit is formed using the external electrodes 6 and the internal electrode layer 12.

[0033] like Figure 1As shown, the pair of external electrodes 6 integrally have: an end portion formed on the end face 4a of the element body 4; and an extension portion formed at one end of each side face 4b in the X-axis direction. That is, the pair of external electrodes 6 are formed in such a way that they wrap around from the end face 4a of the element body 4 into the side face 4b, and are insulated from each other in such a way that they do not contact each other in the X-axis direction.

[0034] Furthermore, the extension portion of the external electrode 6 is not necessary, and the external electrode 6 may be formed only by the end portion. Alternatively, when the stacked ceramic capacitor 2 is mounted on the substrate, the extension portion of the external electrode 6 may be formed only on the side 4b that is at least opposite to the mounting surface of the substrate, or it may not be formed on the side 4b opposite to the mounting surface.

[0035] Furthermore, the external electrode 6 can include a sintered electrode layer, a resin electrode layer, a plated electrode layer, etc., and can be composed of a single electrode layer or by stacking multiple electrode layers. For example, the external electrode 6 can be configured as a three-layer structure consisting of a sintered electrode layer, a Ni plated layer, and a Sn plated layer (stacked in the order described above). In this case, the Sn plated layer is located on the outermost surface of the external electrode 6, thus improving the solder wettability of the external electrode 6.

[0036] Next, the firing of the composition or internal structure of the ceramic layer 10 or the internal electrode layer 12 will be explained.

[0037] The ceramic layer 10 is composed of a dielectric composition with a perovskite-type compound represented by the general formula ABO3 as the main component. Here, the main component of the ceramic layer 10 (the main component of the dielectric composition) refers to the component comprising 80 mol% or more in the ceramic layer 10. In this embodiment, the perovskite-type compound as the main component is preferably barium titanate (BT), which can be expressed with the formula (Ba... (1－a－b) Sr a Ca b ) m (Ti (1－c－d) Zr c Hf d O3 indicates.

[0038] In the above composition formula, the symbols a, b, c, d, and m represent element ratios, and there are no particular limitations on each element ratio; they can be set to known ranges. For example, m represents the element ratio of site A to site B, which is usually set to the range of 1.0 to 1.1. Additionally, a represents the element ratio of Sr to site A, and b represents the element ratio of Ca to site A. In this embodiment, it is preferably set to 0 ≤ a + b ≤ 0.1. Furthermore, c represents the element ratio of Zr to site B, and d represents the element ratio of Hf to site B. In this embodiment, it is preferably set to 0 ≤ c + d ≤ 0.15. Moreover, the element ratio of oxygen (O) in the above composition formula can also deviate slightly from the stoichiometric composition.

[0039] In addition to the main components mentioned above, the ceramic layer 10 may also contain secondary components. Examples of secondary components include Mn compounds, Mg compounds, Cr compounds, Ni compounds, rare earth element compounds, Si compounds, Li compounds, B compounds, V compounds, Al compounds, and Ca compounds. There are no particular limitations on the types or combinations of secondary components or their amounts.

[0040] On the other hand, the internal electrode layer 12 is made of a conductive material and contains at least Ni. More specifically, the conductive material of the internal electrode layer 12 is preferably pure Ni or a Ni alloy, and the Ni content in the internal electrode layer 12 is more preferably 85 wt% or more. When the conductive material is a Ni alloy, it may also contain one or more secondary components for the internal electrode selected from Mn, Cu, Cr, etc.

[0041] In addition to the conductive material described above, the inner electrode layer 12 may also contain particles of a perovskite-type compound having the same composition as the main component of the ceramic layer 10 as a general-purpose material, and may also contain particles of the first segregation 11b described later. Furthermore, the inner electrode layer 12 may contain trace amounts (e.g., less than 0.1% by mass) of non-metallic components such as S or P, and may also contain voids. As described above, when the inner electrode layer 12 contains non-metallic components such as general-purpose material particles, particles of the first segregation 11b, and voids, sometimes interruptions in the inner electrode layer 12 may occur due to the influence of these non-metallic components, resulting in the absence of electrodes (conductive material).

[0042] Furthermore, the composition of the ceramic layer 10 or the internal electrode layer 12 can be analyzed using inductively coupled plasma optical emission spectrometry (ICP), laser ablation ICP quality analysis (LA-ICP-MS), fluorescence X-ray analysis (XRF), energy dispersive X-ray analysis (EDX), or electron probe microanalysis (EPMA) with wavelength dispersive X-ray spectrometer (WDS).

[0043] The ceramic layer 10 containing the above components has Figure 2 The internal structure shown includes dielectric particles 11a as the parent phase, segregated phases (11b, 11c) with defined characteristics, and grain boundaries 11d located between the dielectric particles 11a in the ceramic layer 10.

[0044] The dielectric particles 11a are composed of the main component (perovskite-type compound) of the ceramic layer 10 described above. When the ceramic layer 10 contains secondary components, the dielectric particles 11a may also contain secondary components dissolved in solid solution in addition to the main component. Furthermore, the dielectric particles 11a may also have a core-shell structure. The average particle size of the dielectric particles 11a can be set to 0.05 μm to 2 μm, preferably 0.1 μm to 1 μm. This average particle size can be observed using a scanning electron microscope (SEM) or a scanning transmission electron microscope (STEM). Figure 2 The cross-section of the ceramic layer 10 as shown can be measured by image analysis of the obtained cross-sectional photograph. For example, the average particle size of the dielectric particles 11a can be calculated by measuring the circumferential equivalent diameter of at least 100 dielectric particles 11a.

[0045] like Figure 2 As shown, the main body 4 of this embodiment includes a first segregation 11b. This first segregation 11b is a phase of composite oxide in which the total concentration of Si and Ni is higher than that of dielectric particles 11a. Moreover, the first segregation 11b contains at least Ba, Ti, Si, Ni and O, and may also contain other constituent elements of the ceramic layer 10 (elements such as Sr, Ca, Zr, Hf, etc., which may be contained in the main components, as well as secondary component elements, etc.).

[0046] In the first segregation 11b, it is particularly preferable that Ni is contained in a predetermined ratio. Specifically, the molar ratio of Ni to Si (Ni / Si) in the first segregation 11b is preferably 0.1 or more. There is no particular upper limit to this molar ratio Ni / Si, but for example, it is preferably 0.8 or less. Furthermore, if the total content of elements other than oxygen contained in the first segregation 11b is set to 100 moles, the sum of the Ni content and the Si content is preferably 3 mol% or more, and more preferably 5 mol% to 20 mol%. In addition, there is no particular limitation on the content ratio of other elements in the first segregation 11b, and the first segregation 11b can be set, for example, with the composition Ba2(Ni e Ti 1－e Si2O 8―e The composite oxide phase is represented by . In the above composition formula, 'e' represents the atomic ratio of Ni that has substituted Ti sites.

[0047] Preferably, the first segregation 11b is determined using mapping analysis and point analysis performed by EDX or WDS. For example, in Figure 2 In the cross-section of the component body 4 as shown, mapping analysis is performed, and the location of Si segregation is determined from the obtained Si mapping image. Furthermore, point analysis is performed at the Si segregation location; if Ba, Ti, Si, Ni, and O are detected in this segregation, it is identified as the first segregation 11b. In addition, the "Si segregation location" determined in the above mapping analysis specifically refers to the region where the Si concentration is higher than that of the dielectric particles 11a. Furthermore, there are no particular limitations regarding the measurement conditions such as the measurement field of view or resolution in the mapping analysis, as long as they are appropriately set to conditions that allow for the analysis of segregation.

[0048] The average particle size of the first segregation 11b can be set to 0.5 μm or less, preferably 0.05 μm to 0.30 μm. Furthermore, regarding the average particle size of the first segregation 11b, it is sufficient to determine the equivalent diameter of the circle of at least five first segregations 11b by image analysis and perform calculations after determining at least five first segregations 11b using the method described above.

[0049] In this embodiment, such as Figure 2 As shown, the first segregation 11b exists at the boundary 20 between the ceramic layer 10 and the inner electrode layer 12. "The first segregation 11b exists at the boundary 20" means that the first segregation 11b is in direct contact with both the dielectric particles 11a of the ceramic layer 10 and the inner electrode layer 12. For example, the first segregation 11b may sometimes exist in a manner that is in contact with the inner electrode layer 12 within the ceramic layer 10. Additionally, the first segregation 11b may sometimes exist further towards the inner electrode layer 12 than the ceramic layer 10 side. Furthermore, a portion of the first segregation 11b may not exist at the boundary 20, but rather exist within the ceramic layer 10 without being in contact with the inner electrode layer 12.

[0050] The number N1 of first segregations 11b per unit length of boundary 20 can be set to 0.15 or more per μm, preferably 0.20 to 3.20 per μm. This number N1 per unit length can be calculated by observing the cross-section of the element body 4 in multiple fields of view using SEM or STEM, measuring at least a total of 100 μm of first segregations 11b present in boundary 20, and then performing the calculation. That is, it can be expressed as the number of measured first segregations 11b NL / the total length L of the resolved boundary 20. Z N1 represents the number of items.

[0051] Furthermore, when observed at high magnification using SEM or STEM, boundary 20 exhibits serpentine or partial interruptions. When measuring the number of samples N1, it is not necessary to accurately measure the serpentine or interrupted portions of boundary 20 and calculate the total length L. Z This can be achieved by simply considering the width of the cross-sectional photograph as the length of the boundary 20. For example, as... Figure 2 As shown, a cross-sectional photograph was taken with the internal electrode layer 12 and one side of the cross-sectional photograph practically parallel, and the width L in the X-axis direction of the cross-sectional photograph was... Z1 Consider it as the length of the boundary 20 in the field of view.

[0052] In the ceramic layer 10 of this embodiment, in addition to the first segregation 11b, a second segregation 11c containing Mg is preferably present. This second segregation 11c is a phase in which the concentration of Mg is higher than that of the composite oxide of the dielectric particles 11a. Furthermore, in addition to Mg, the second segregation 11c may also contain constituent elements of the ceramic layer 10, particularly preferably O, Ba, and Ti. The detailed composition of the second segregation 11c is not particularly limited; for example, the second segregation 11c is preferably hexagonal Ba(Ti) crystal. (1－X) Mg X O3. In this composition formula, x represents the atomic ratio of Mg. Moreover, the value of x can be arbitrary, for example, it can be set to 0.02 to 0.30. In addition, the atomic ratio of oxygen in the above composition formula is 3.0, but it can also deviate slightly from 3.0.

[0053] The second segregation 11c can be determined by mapping analysis based on EDX or EDS. In this case, the mapping analysis can be performed in the same manner as the analysis of the first segregation 11b. Furthermore, the region with a Mg concentration higher than that of the dielectric particles 11a can be extracted from the Mg mapping image obtained through mapping analysis, and this region can be identified as the second segregation 11c.

[0054] The average particle size of the second segregation 11c can be set to 2 μm or less, preferably 0.01 μm to 1 μm. Furthermore, the average particle size of the second segregation 11c can be measured in the same manner as the average particle size of the first segregation 11b. That is, after determining at least five or more second segregations 11c using the above method, the circle equivalent diameter of these second segregations 11c is measured by image analysis, and the average particle size is calculated from this.

[0055] Furthermore, regarding the second segregation 11c, it is preferable that it exists within the ceramic layer 10. "Within the ceramic layer 10" means that the second segregation 11c is not directly in contact with the inner electrode layer 12, but exists surrounded by dielectric particles 11a. However, it is also possible that a portion of the second segregation 11c exists at the boundary 20 in a manner that is in contact with the inner electrode layer 12. The number N2 of second segregations 11c per unit cross-sectional area of ​​the ceramic layer 10 is preferably 0.002 particles / μm. 2 ~1 per μm 2 Furthermore, regarding the number N2, it can be calculated by dividing the number of second segregations 11c determined by the total area of ​​the measured fields of view by performing the above mapping analysis in multiple fields of view.

[0056] Furthermore, the grain boundaries 11d existing between the dielectric particles 11a are composed of either the constituent elements of the main component or the constituent elements of the secondary component. Additionally, other segregated phases (segregated phases other than the first segregation 11b and the second segregation 11c) caused by secondary components may also exist in the grain boundaries 11d. Furthermore, in addition to the aforementioned dielectric particles 11a or segregated phases, voids or secondary phase particles may also exist in the ceramic layer 10.

[0057] Next, the explanation Figure 1 An example of a method for manufacturing the multilayer ceramic capacitor 2 shown.

[0058] First, the manufacturing process of the component body 4 will be explained. In the manufacturing process of the component body 4, dielectric paste that will become ceramic layer 10 after firing and internal electrode paste that will become internal electrode layer 12 after firing are prepared.

[0059] The dielectric paste is manufactured by, for example, the following method: First, the dielectric raw materials are uniformly mixed by means of wet mixing or the like, and then dried. Next, they are heat-treated under specified conditions to obtain calcined powder. Then, a known organic carrier or a known aqueous carrier is added to the obtained calcined powder and the mixture is kneaded to prepare the dielectric paste. Furthermore, the dielectric paste may, as needed, contain additives selected from various dispersants, plasticizers, dielectrics, by-product compounds, glass powder, etc.

[0060] Furthermore, when a second segregation 11c is formed in the ceramic layer 10, a second segregation raw material powder is added to the dielectric paste. This second segregation raw material powder is obtained, for example, by mixing MgCO3 powder, BaCO3 powder, and TiO2 powder in a prescribed ratio, calcining them, and then appropriately pulverizing them. The dielectric paste can then be prepared by mixing the prepared second segregation raw material powder together with the calcined powder of the dielectric raw material and a carrier.

[0061] On the other hand, the internal electrode paste is prepared by mixing a conductive powder (preferably Ni powder or Ni alloy powder) composed of a conductive metal or its alloy, a first segregation raw material powder, and a known binder or solvent. The first segregation raw material powder added here is obtained, for example, by mixing BaCO3 powder, TiO2 powder, SiO2 powder, and NiO powder in a predetermined ratio, calcining, and then appropriately pulverizing. By adding this first segregation raw material powder to the internal electrode paste, the first segregation 11b can be present at the boundary 20.

[0062] Furthermore, ceramic powder (e.g., barium titanate powder) can be included as a general-purpose material in the internal electrode paste, as needed. This general-purpose material helps to inhibit the sintering of the conductive powder during the firing process.

[0063] Next, the dielectric paste is sheeted using methods such as a scraper to obtain a ceramic green sheet. Then, an internal electrode paste is applied to this ceramic green sheet using various printing or transfer methods, in a predetermined pattern. The green sheets with the internal electrode pattern are then stacked multiple times and pressed along the stacking direction to obtain a master laminate. Furthermore, at this point, the ceramic green sheet and the internal electrode pattern are stacked such that the ceramic green sheet exists on both the upper and lower surfaces of the master laminate in the stacking direction.

[0064] The master laminate obtained through the above processes is cut into specified dimensions by cutting or slitting to obtain multiple green chips. For the green chips, curing and drying may be performed as needed to remove plasticizers, etc., or tumbling may be performed using a horizontal centrifugal tumbling mill or similar equipment after curing and drying. In tumbling, the green chips, along with a medium and polishing fluid, are placed into a tumbling container, which is then subjected to rotational motion or vibration. This tumbling process removes unwanted areas such as burrs generated during cutting, forming rounded corners (corner R) at the corners of the green chips. Furthermore, the tumbling-polished green chips are cleaned with a cleaning solution such as water and then dried.

[0065] Next, the green chip obtained above is subjected to a binder removal process and a firing process to obtain the component body 4.

[0066] The conditions for the binder removal process can be appropriately determined based on the main component composition of the ceramic layer 10 or the internal electrode layer 12, and are not particularly limited. For example, it is preferable to set the heating rate to 5–300°C / hour, the holding temperature to 180–400°C, and the temperature holding time to 0.5–24 hours. In addition, the binder removal atmosphere can be set to air or a reducing atmosphere.

[0067] Regarding the firing conditions, they can be appropriately determined based on the main component composition of the ceramic layer 10 or the main component composition of the internal electrode layer 12, and are not particularly limited. For example, the holding temperature during firing is preferably 1200–1350°C, more preferably 1220–1300°C, and the holding time is preferably 0.5–8 hours, more preferably 1–3 hours. Furthermore, the firing atmosphere is preferably a reducing atmosphere; for example, a humidified mixture of N2 and H2 can be used as the atmosphere gas. Then, when the internal electrode layer 12 is composed of a base metal such as Ni or a Ni alloy, the oxygen partial pressure in the firing atmosphere is preferably set to 1.0 × 10⁻⁶. －14 ~1.0×10 －10 MPa.

[0068] Furthermore, annealing can be performed as needed after firing. Annealing is a process used to re-oxidize the ceramic layer 10, and it is preferable to perform annealing when firing is carried out in a reducing atmosphere. The conditions for annealing can be appropriately determined according to the main component composition of the ceramic layer 10, and there are no particular limitations. For example, it is preferable to set the holding temperature to 950–1150°C, the temperature holding time to 0–20 hours, and the heating and cooling rates to 50–500°C / hour. In addition, it is preferable to use humidified N2 gas or the like as the atmosphere gas, and the oxygen partial pressure in the annealing atmosphere is preferably set to 1.0 × 10⁻⁶. －9 ~1.0×10 －5 MPa.

[0069] In the aforementioned debinding, firing, and annealing processes, water can be used to humidify the N2 gas or mixed gas; in this case, the water temperature is preferably around 5–75°C. Furthermore, the debinding, firing, and annealing processes can be performed continuously or independently.

[0070] Next, a pair of external electrodes 6 are formed on the outer surface of the component body 4 obtained above. There are no particular limitations on the method for forming the external electrodes 6. For example, when forming a sintered electrode as the external electrode 6, it is sufficient to apply a conductive paste containing glass powder to the end face of the component body 4 by impregnation and then heat the component body 4 at a predetermined temperature. Alternatively, when forming a resin electrode as the external electrode 6, it is sufficient to apply a conductive paste containing a thermosetting resin to the end face of the component body 4 and then heat the component body 4 at the temperature at which the thermosetting resin cures. Alternatively, after forming the sintered electrode or resin electrode by the above method, sputtering, vapor deposition, electroplating, or electroless plating may be performed to form an external electrode 6 with a multilayer structure.

[0071] Through the above process, a multilayer ceramic capacitor 2 with external electrodes 6 is obtained.

[0072] (Summary of Implementation Methods)

[0073] The multilayer ceramic capacitor 2 of this embodiment has a structure in which a ceramic layer 10, mainly composed of a perovskite-type compound represented by ABO3, and an internal electrode layer 12 containing Ni are alternately stacked. Moreover, a first segregation containing Ba, Ti, Si, Ni, and O exists at the boundary 20 between the ceramic layer 10 and the internal electrode layer 12.

[0074] The multilayer ceramic capacitor 2, by possessing the aforementioned characteristics, exhibits improved durability in high-temperature and high-humidity environments due to its insulation resistance not easily decreasing. The reason for this improved durability is not yet clear, but it is believed that the first segregation 11b containing a specified element enhances the bonding strength between the ceramic layer 10 and the internal electrode layer 12, thereby resulting in the aforementioned improved durability.

[0075] Generally, the ceramic layer made of dielectric ceramic and the internal electrode layer made of Ni differ in material properties such as shrinkage rate or coefficient of linear expansion. Due to these differences, peeling of the internal electrode layer or cracks in the ceramic layer can easily occur. The inventors believe that in the multilayer ceramic capacitor 2 of this embodiment, because the first segregation 11b present at the boundary 20 is a composite oxide containing Ba or Ti, it has the characteristic of easily bonding with the dielectric particles 11a. Furthermore, it is believed that the first segregation 11b, because it contains Ni, also has the characteristic of easily bonding with the internal electrode layer 12.

[0076] It is believed that: Thus, the first segregation 11b has a high affinity for both the dielectric particles 11a of the ceramic layer 10 and the Ni of the inner electrode layer 12. Because this first segregation 11b exists at the boundary 20, the bonding strength between the ceramic layer 10 and the inner electrode layer 12 can be improved. It is believed that: As a result, in the multilayer ceramic capacitor 2 of this embodiment, the peeling of the inner electrode layer 12 or the generation of cracks in the ceramic layer 10 can be suppressed, and durability in high-temperature and high-humidity environments is improved.

[0077] In particular, in this embodiment, the Ni / Si ratio in the first segregation 11b is 0.1 or higher. The inventors believe that this structure can further improve the bonding strength between the ceramic layer 10 and the internal electrode layer 12. As a result, durability in high-temperature and high-humidity environments can be further improved.

[0078] Furthermore, by setting the average particle size of the first segregation 11b to 0.05 μm or more and 0.30 μm or less, the peeling of the internal electrode layer 12 or the generation of cracks in the ceramic layer 10 can be more appropriately suppressed. As a result, durability in high-temperature and high-humidity environments can be further improved.

[0079] Furthermore, in the multilayer ceramic capacitor 2 of this embodiment, a second segregation 11c containing Mg exists inside the ceramic layer 10 (preferably, the second segregation 11c is hexagonal Ba(Ti) crystal). (1－X) Mg X The second segregation 11c further improves the durability in high-temperature and high-humidity environments. Additionally, the second segregation 11c improves the sinterability of the ceramic layer 10.

[0080] The embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments in any way, and various changes can be made without departing from the spirit of the present invention.

[0081] For example, in this embodiment, a multilayer ceramic capacitor 2 is exemplified as a multilayer ceramic electronic component, but the multilayer ceramic electronic component of the present invention can also be, for example, a bandpass filter, a multilayer three-terminal filter, a piezoelectric element, a thermistor, a rheostat, etc.

[0082] In this embodiment, the ceramic layer 10 and the internal electrode layer 12 are stacked along the Z-axis direction, but the stacking direction can also be the X-axis direction or the Y-axis direction. In this case, the external electrode 6 can be formed according to the exposed surface of the internal electrode layer 12. Alternatively, the internal electrode layer 12 can be led out to the outer surface of the component body 4 via a through-hole electrode, in which case the through-hole electrode and the external electrode 6 are electrically bonded.

[0083] Example

[0084] The present invention will now be described with reference to more detailed embodiments, but the present invention is not limited to these embodiments.

[0085] (Experiment 1)

[0086] Example 1

[0087] In Example 1, the following were prepared in order: Figure 1 The stacked ceramic capacitor 2 shown.

[0088] First, dielectric paste and internal electrode paste were prepared. Specifically, the dielectric paste was prepared by mixing barium titanate powder (BaTiO3 powder), which is the main component of the ceramic layer 10, secondary component powders (MgCO3 powder, Dy2O3 powder, MnCO3 powder, SiO2 powder), and an organic carrier. Furthermore, the barium titanate powder used as the dielectric raw material was prepared by a hydrothermal synthesis method.

[0089] On the other hand, an internal electrode paste was prepared by mixing Ni powder, a first segregation raw material powder, a general-purpose material (barium titanate powder), a binder, and a solvent. The first segregation raw material powder added to the internal electrode paste was a Ba-Ti-Si-Ni-O composite oxide powder, which was obtained by mixing BaCO3 powder, TiO2 powder, SiO2 powder, and NiO powder in a specified ratio, calcining, and then pulverizing.

[0090] Next, using the aforementioned dielectric paste and internal electrode paste, a green chip is manufactured using a sheet method. Then, the green chip is subjected to a binder removal process, a firing process, and an annealing process to obtain a component body 4 with dimensions L0×W0×T0=2.0mm×1.25mm×1.25mm. Furthermore, in the obtained component body 4, the number of ceramic layers 10 sandwiched between the internal electrode layer 12 is set to 600, the average thickness of the ceramic layer 10 is set to 0.8μm, and the average thickness of the internal electrode layer 12 is set to 0.8μm.

[0091] Next, a Cu-containing sintered electrode layer, a Ni plating layer, and a Sn plating layer are formed on the outer surface of the aforementioned component body 4 in the order described. Through the above processes, the capacitor sample of Example 1 is obtained.

[0092] Example 2

[0093] In Example 2, the Ba-Ti-Si-Ni-O composite oxide powder, i.e., the first segregation raw material powder, was added not only to the internal electrode paste but also to the dielectric paste. Other experimental conditions in Example 2 were the same as in Example 1, resulting in the capacitor sample of Example 2.

[0094] Example 3

[0095] In Example 3, a dielectric paste was prepared by mixing barium titanate powder, a second segregation raw material powder, by-component powders (MgCO3 powder, Dy2O3 powder, MnCO3 powder, SiO2 powder), and an organic carrier. The second segregation raw material powder added to the dielectric paste was a composite oxide powder represented by Ba(Ti,Mg)O3, which was obtained by mixing MgCO3 powder, BaCO3 powder, and TiO2 powder in a specified ratio, calcining, and then pulverizing. In addition, in Example 3, a first segregation raw material powder was also added to the internal electrode paste. Except for the above, the experimental conditions were the same as in Example 1, and the capacitor sample of Example 3 was obtained.

[0096] Comparative Example 1

[0097] In Comparative Example 1, dielectric paste and internal electrode paste were prepared without using the raw material powder for segregation. Specifically, the dielectric paste in Comparative Example 1 was prepared by mixing barium titanate powder, byproduct powder (the same byproduct as in Example 1), and an organic carrier; the internal electrode paste in Comparative Example 1 was prepared by mixing Ni powder, a general-purpose material (barium titanate powder), a binder, and a solvent. The experimental conditions in Comparative Example 1 were the same as in Example 1, except as described above, and a capacitor sample of Comparative Example 1 was obtained.

[0098] Comparative Example 2

[0099] In Comparative Example 2, Ni-free ceramic powder was added to the internal electrode paste. Specifically, Ba-Ti-Si-O based barium silicate powder was added to the internal electrode paste in Comparative Example 2. This barium silicate powder was obtained by mixing and calcining BaCO3 powder, TiO2 powder, and SiO2 powder. The experimental conditions in Comparative Example 2 were the same as in Example 1, except as described above, and a capacitor sample of Comparative Example 2 was obtained.

[0100] Comparative Example 3

[0101] In Comparative Example 3, the Ba-Ti-Si-Ni-O composite oxide powder, i.e., the first segregation raw material powder, was not added to the internal electrode paste, but only to the dielectric paste. The experimental conditions in Comparative Example 3 were the same as in Example 1, except as described above, and a capacitor sample of Comparative Example 3 was obtained.

[0102] The capacitor samples of each embodiment and each comparative example manufactured in Experiment 1 were evaluated as shown below.

[0103] <Analysis of Segregation>

[0104] In Experiment 1, the cross-sections of each capacitor sample were observed using STEM, and mapping and point analysis were performed using EDX. This identified the segregated phases present at boundary 20 and within the ceramic layer 10. The measurement results for each embodiment and comparative example are shown in Table 1. Furthermore, the "-" in the segregated phase column of Table 1 indicates that no segregated phase was observed at the corresponding location.

[0105] <Durability Evaluation>

[0106] To evaluate the durability of the capacitor sample under high temperature and high humidity conditions, a high temperature and high humidity bias test (PCBT) was conducted. Specifically, with a voltage of 4V applied to the capacitor sample, the sample was subjected to a temperature of 121℃, humidity of 95%, and atmospheric pressure of 2.026 × 10⁻⁶. 5The samples were placed in an environment of Pa for 24 hours. Then, the insulation resistance of the capacitor samples was measured before and after the PCPT. Samples whose insulation resistance after PCPT decreased to less than 1 / 10 of the insulation resistance before the test were judged as unqualified (NG). In each example and comparative example, 80 samples were subjected to this test, and the NG rate (number of NG samples / number of test samples (80)) was calculated. In addition, for the NG rate after 24 hours of PCPT, 0 / 80 was set as the benchmark for acceptance. The evaluation results are shown in Table 1.

[0107] Table 1

[0108]

[0109] As shown in Table 1, in Comparative Examples 1-3, the boundary 20 between the ceramic layer 10 and the internal electrode layer 12 lacked a first segregation 11b containing Ni, resulting in insufficient durability. On the other hand, in Examples 1-3 where the first segregation 11b was present at the boundary 20, the NG rate of the PCPT was confirmed to be 0 / 80, indicating improved durability in high-temperature and high-humidity environments compared to the comparative examples. In Examples 1-3, compared to the comparative examples, cracks in the ceramic layer 10 and peeling of the internal electrode layer 12 were more effectively suppressed, thus indicating improved durability.

[0110] Furthermore, for each of Examples 1 to 3, durability evaluation was conducted under more stringent conditions than the aforementioned PCPT 24h (condition 1). Specifically, in the PCPT under condition 2, which is more stringent than condition 1, the placement time was set to 500 hours, and the number of test samples in each example was set to 400. All other conditions (applied voltage, etc.) were the same as in condition 1. As shown in Table 1, in the 500-hour PCPT, the NG rate of Example 3 was 0 / 400, confirming that the durability of Example 3 was particularly good compared to Examples 1 and 2. Based on this result, it can be demonstrated that by forming a first segregation 11b at boundary 20 and a second segregation 11c at ceramic layer 10, durability under high temperature and high humidity conditions can be further improved.

[0111] (Experiment 2)

[0112] In Experiment 2, the Ni / Si ratio in the first segregation 11b present at boundary 20 was changed, resulting in capacitor samples of Examples 11-14. Specifically, the Ni / Si ratio in the first segregation 11b was controlled by changing the amount of NiO powder added relative to the amount of SiO2 powder added while keeping the total amount of SiO2 powder and NiO powder added constant during the preparation of the raw material powder for the first segregation. The experimental conditions in Experiment 2, except as described above, were the same as in Example 1 of Experiment 1, and the same evaluation was performed as in Experiment 1.

[0113] In the durability evaluation of Experiment 2, a 24-hour PCBT (condition 1) was conducted, similar to Experiment 1, and a 240-hour PCBT (condition 3) was also conducted with the test duration extended. More specifically, in the 240-hour PCBT, the capacitor sample was subjected to a voltage of 4V at a temperature of 121°C, a humidity of 95%, and an atmospheric pressure of 2.026 × 10⁻⁶. 5 The capacitors were placed in an environment of Pa for 240 hours, and the insulation resistance before and after the test was measured. In Experiment 2, for each of Examples 11-14, 400 capacitor samples were subjected to PCBT for 240 hours, and their NG rate was calculated. The evaluation results of Experiment 2 are shown in Table 2.

[0114] Table 2

[0115]

[0116] As shown in Table 2, in Examples 11 to 14, the presence of a first segregation 11b of the Ba-Ti-Si-Ni-O system at boundary 20 was confirmed, and the NG rate of the PCPT after 24 hours was 0 / 80. On the other hand, in the PCPT after 240 hours, the NG rate of samples 12 to 14 was 0 / 400, which is a particularly good result. Based on this result, it can be seen that the Ni / Si ratio in the first segregation 11b is preferably 0.1 or higher.

[0117] (Experiment 3)

[0118] In Experiment 3, the average particle size of the first segregation 11b was varied to prepare capacitor samples of Examples 21-24. The average particle size of the first segregation 11b was controlled by the pulverization conditions used to prepare the raw material powder for the first segregation. Except for the above-mentioned experimental conditions, the experimental conditions in Experiment 3 were the same as those in Example 1 of Experiment 1. In Experiment 3, the same evaluation as in Experiment 2 (segregation resolution, 24-hour PCBT, 240-hour PCBT) was also performed. The evaluation results of Experiment 3 are shown in Table 3.

[0119] Table 3

[0120]

[0121] According to the results in Table 3, the average particle size of the first segregation 11b is preferably above 0.05 μm and below 0.30 μm.

[0122] (Experiment 4)

[0123] In Experiment 4, the number N1 of the first segregation 11b per unit length of boundary 20 was varied to prepare capacitor samples of Examples 31-33. The number N1 was controlled by the amount of the first segregation raw material powder added to the internal electrode paste, and the number N1 was determined by STEM-based cross-sectional analysis. Except for the above, the experimental conditions in Experiment 4 were the same as in Example 1 of Experiment 1, and the same evaluation as in Experiment 2 was performed in Experiment 4. The evaluation results of Experiment 4 are shown in Table 4.

[0124] Table 4

[0125]

[0126] According to the results in Table 4, the number N1 of the first segregation 11b per unit length of the boundary 20 is preferably more than 0.2 per μm and less than 3.2 per μm.

[0127] [Explanation of reference numerals in the attached figures]

[0128] 2-Layer Ceramic Capacitor

[0129] 4. Main body of the component

[0130] 4a end face

[0131] 4b Side view

[0132] 10 Ceramic Layers

[0133] 12 Internal electrode layer

[0134] 20 Boundaries

[0135] 11a Dielectric Particles

[0136] 11b First Separation

[0137] 11c Second Separation

[0138] 11d grain boundary

[0139] 6. External electrodes.

Claims

1. A laminated ceramic electronic component, wherein, It has a component body, which is composed of alternating layers of ceramic layers mainly composed of perovskite-type compounds represented by ABO3 and internal electrode layers containing Ni. At the boundary between the ceramic layer and the internal electrode layer, there exists a first segregation containing Ba, Ti, Si, Ni, and O. Compared to the total content of elements other than oxygen in the first segregation of 100 mol%, the sum of the contents of Ni and Si in the first segregation is more than 3 mol% and less than 20 mol%.

2. The laminated ceramic electronic component according to claim 1, wherein, The number of the first segregations per unit length of the boundary is more than 0.2 per μm and less than 3.2 per μm.

3. The laminated ceramic electronic component according to claim 1 or 2, wherein, The molar ratio of Ni to Si in the first segregation is greater than 0.

1.

4. The laminated ceramic electronic component according to claim 1 or 2, wherein, The average particle size of the first segregation is greater than 0.05 μm and less than 0.30 μm.

5. The laminated ceramic electronic component according to claim 1 or 2, wherein, The interior of the ceramic layer contains a second segregation containing Mg.

6. The laminated ceramic electronic component according to claim 1 or 2, wherein, The perovskite-type compound is barium titanate.

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