Power supply circuit, chip and electronic equipment

Abstract

The present application provides a power-on circuit, chip, and electronic device. The power-on circuit includes a reference circuit for outputting a reference voltage signal and a reference establishment completion signal; a first delay module for delaying a first preset time after receiving the reference establishment completion signal and outputting a reference delay completion signal; a power detection module for detecting the power voltage of the power signal according to the reference delay completion signal, and outputting a power release signal after the power voltage is greater than or equal to a first preset voltage threshold; a second delay module for delaying a second preset time after receiving the power release signal and outputting a power reset signal; a voltage stabilization module for generating a voltage stabilization signal according to the power reset signal, and outputting a power-on completion signal after the voltage stabilization signal reaches a second preset voltage threshold. The power-on circuit provided by the present application can effectively ensure that other functional modules operate normally in the event of power supply noise disturbance.

Description

Technical Field

[0001] The present application relates to the field of power-on technology, and in particular to a power-on circuit, a chip, and an electronic device. Background Art

[0002] Power supply power-up schemes are widely used in the integrated circuit and chip fields. Their main function is to detect whether the power supply voltage exceeds a threshold voltage when powered on. If so, power-up is complete and a power-up signal is provided to other circuits or chips. In traditional power supply power-up schemes, if noise is present on the power supply, it will affect the threshold voltage determination, making the functions of other modules in the power system unreliable. Summary of the Invention

[0003] The purpose of this application is to provide a power supply circuit, chip and electronic device to solve the above technical problems.

[0004] In a first aspect, an embodiment of the present application provides a power-on circuit, comprising a reference circuit, a first delay module, a power detection module, a second delay module, and a voltage stabilization module. The reference circuit is used to output a reference voltage signal and a reference establishment completion signal; the first delay module is used to delay for a first preset time after receiving the reference establishment completion signal and output a reference delay completion signal; the power detection module is used to receive a power signal and a reference voltage signal, and detect the power voltage of the power signal according to the reference delay completion signal, and output a power release signal after the power voltage is greater than or equal to a first preset voltage threshold; the second delay module is used to delay for a second preset time after receiving the power release signal and output a power reset signal; the voltage stabilization module is used to receive the power signal and the reference voltage signal, and generate a voltage stabilization signal according to the power reset signal, and output a power-on completion signal after the voltage stabilization signal reaches a second preset voltage threshold.

[0005] In a second aspect, an embodiment of the present application further provides a chip comprising the above-mentioned power-on circuit.

[0006] In a third aspect, an embodiment of the present application provides an electronic device, including a device body and a chip as described above disposed in the device body.

[0007] The embodiments of the present application provide a power supply circuit, chip, and electronic device, wherein the power supply circuit includes a reference circuit, a first delay module, a power detection module, a second delay module, and a voltage stabilization module. The reference circuit is used to output a reference voltage signal and a reference establishment completion signal; the first delay module is used to delay for a first preset time after receiving the reference establishment completion signal and output a reference delay completion signal; the power detection module is used to receive a power supply signal and a reference voltage signal, and detect the power supply voltage of the power supply signal according to the reference delay completion signal, and output a power release signal after the power supply voltage is greater than or equal to a first preset voltage threshold; the second delay module is used to delay for a second preset time after receiving the power release signal and output a power reset signal; the voltage stabilization module is used to receive the power supply signal and the reference voltage signal, and generate a voltage stabilization signal according to the power reset signal, and output a power-on completion signal after the voltage stabilization signal reaches a second preset voltage threshold. The power supply power-on circuit outputs a power release signal after the power supply voltage reaches a first preset threshold value, and outputs a power-on completion signal after the voltage regulation signal reaches a second preset voltage threshold value. Therefore, when the power-on completion signal is output, the power supply voltage has reached a stable state, thereby enabling other functional modules under the power supply system to work normally. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0009] Figure 1 A circuit structure diagram of a power supply circuit according to an embodiment of the present application is shown;

[0010] Figure 2 Another circuit structure schematic diagram of the power supply circuit of an embodiment of the present application is shown;

[0011] Figure 3 Another circuit structure schematic diagram of the power supply circuit of an embodiment of the present application is shown;

[0012] Figure 4 The power-on timing diagram of the power supply power-on circuit of an embodiment of the present application is shown. DETAILED DESCRIPTION

[0013] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0014] In the embodiments of this application, "at least one" refers to one or more; "a plurality" refers to two or more. In the description of this application, the terms "first," "second," "third," etc. are used only for the purpose of distinguishing descriptions and should not be understood as indicating or implying relative importance or order.

[0015] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, the terms "including," "comprising," "having," and their variations in this specification all mean "including but not limited to," unless otherwise specifically stated.

[0016] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0017] Figure 1 It is a circuit structure diagram of the power supply circuit of the embodiment of the present application. It should be noted that if there is substantially the same result, the power supply circuit provided in the present application is not used as the power supply circuit of the embodiment of the present application. Figure 1 The structure shown is limited. The power-on circuit includes a reference circuit 110, a first delay module 120, a power detection module 130, a second delay module 140, and a voltage stabilization module 150: the reference circuit 110 is configured to output a reference voltage signal and a reference establishment completion signal; the first delay module 120 is configured to delay for a first preset duration after receiving the reference establishment completion signal and output a reference delay completion signal; the power detection module 130 is configured to receive a power signal and a reference voltage signal, detect the power voltage of the power signal based on the reference delay completion signal, and output a power release signal when the power voltage is greater than or equal to a first preset voltage threshold; the second delay module 140 is configured to delay for a second preset duration after receiving the power release signal and output a power reset signal; the voltage stabilization module 150 is configured to receive the power signal and the reference voltage signal, generate a stabilization signal based on the power reset signal, and output a power-on completion signal when the stabilization signal reaches a second preset voltage threshold.

[0018] like Figure 2 As shown, in this embodiment, the reference circuit 110 outputs a reference voltage signal Vbg, which can provide a reference for the power detection module 130 and the voltage regulation module 150. After outputting the reference voltage signal Vbg, the reference circuit 110 also outputs a reference establishment completion signal Vbg_A. In some embodiments, the reference circuit 110 outputs the reference establishment completion signal Vbg_A after the reference voltage signal Vbg has been established. That is, after the voltage of the reference voltage signal Vbg reaches the reference threshold voltage, the reference circuit 110 outputs the reference establishment completion signal Vbg_A, indicating that the reference voltage signal Vbg has been established. The first delay module 120 receives the reference establishment completion signal Vbg_A and begins delaying after receiving the reference establishment completion signal Vbg_A. After the delay time reaches a first preset duration, the first delay module 120 outputs a reference delay completion signal BGR_OK. After the first delay module 120 outputs the reference delay completion signal BGR_OK, the power detection module 130 begins detecting the power supply voltage of the power supply signal VDD and, when the power supply voltage is greater than or equal to a first preset voltage threshold, outputs a power release signal VDD_S. The second delay module 140 receives the power release signal VDD_S and begins a delay after receiving it. After the delay reaches a second preset duration, the second delay module 140 outputs a power reset signal Por_rst. After the second delay module 140 outputs the power reset signal Por_rst, the voltage regulation module 150 begins generating the voltage regulation signal LDO and, after the voltage of the voltage regulation signal LDO reaches a second preset voltage threshold, outputs a power-on completion signal LDO_rst, indicating that power-on is complete. This power-on completion signal LDO_rst can be output to other modules.

[0019] In the power supply power-on circuit provided in this embodiment, since the reference voltage signal Vbg may still be in a rising phase after establishment, the first delay module 120 performs a delay after the reference voltage signal Vbg is established, and the power detection module 130 starts operating after the delay, thereby ensuring that the reference voltage signal Vbg has reached stability when the power detection module 130 starts operating. Similarly, since the power supply voltage of the power supply signal VDD may still be in a rising phase after reaching the first preset voltage threshold, the voltage stabilization module 150 starts operating after a delay, and outputs the power-on completion signal LDO_rst after the voltage stabilization signal LDO reaches the second preset voltage threshold. Therefore, when power-on is completed, both the power supply voltage and the power-on completion signal LDO_rst are stable. At this time, even if noise disturbance occurs in the power supply, it will not affect the normal operation of other functional modules.

[0020] In some embodiments, the reference circuit 110 is further configured to receive a reference enable signal Pad_rstn. After receiving the reference enable signal Pad_rstn, the reference circuit 110 starts to operate and outputs a reference voltage signal Vbg.

[0021] In some embodiments, the power-on circuit further includes a first logic circuit 160, wherein a first input terminal of the first logic circuit 160 receives a reference enable signal Pad_rstn, a second input terminal of the first logic circuit 160 receives a reference delay completion signal BGR_OK, and an output terminal of the first logic circuit 160 outputs a power detection enable signal Por_en to the power detection module 130, and the power detection module 130 is configured to detect the power voltage of the power signal VDD after receiving the power detection enable signal Por_en.

[0022] like Figure 3 As shown, as one approach, the first logic circuit 160 can be an AND gate circuit. Specifically, the first input of the AND gate circuit receives the reference enable signal Pad_rstn; the second input of the AND gate circuit is connected to the output of the reference delay module and receives the reference delay completion signal BGR_OK; the output of the AND gate circuit is connected to the power detection module 130 and outputs the power detection enable signal Por_en to the power detection module 130. When the first delay module 120 delays for the first preset time period and outputs the reference delay completion signal BGR_OK, the AND gate circuit outputs the power detection enable signal Por_en to the power detection module 130, causing the power detection module 130 to begin operation. By enabling the power detection module 130 only after the delay is complete, the power consumption of the power detection module 130 can be reduced.

[0023] In some embodiments, the power-on circuit further includes a second logic circuit 170, wherein a first input terminal of the second logic circuit 170 receives a reference enable signal Pad_rstn, a second input terminal of the second logic circuit 170 receives a power reset signal Por_rst, and an output terminal of the second logic circuit 170 outputs a voltage regulation enable signal LDO_en to the voltage regulation module 150, and the voltage regulation module 150 is configured to generate a voltage regulation signal LDO after receiving the voltage regulation enable signal LDO_en.

[0024] As one approach, the second logic circuit 170 may include an inverter and a NOR gate circuit. Specifically, the input of the inverter receives the reference enable signal Pad_rstn, the first input of the NOR gate circuit is connected to the output of the inverter, the second input of the NOR gate circuit is connected to the output of the second delay module 140, and receives the power reset signal Por_rst. The output of the NOR gate circuit is connected to the voltage regulator module 150, and outputs the voltage regulator enable signal LDO_en to the voltage regulator module 150. When the second delay module 140 delays the power reset signal Por_rst for a second preset time period, the NOR gate circuit outputs the voltage regulator enable signal LDO_en to the voltage regulator module 150, causing the voltage regulator module 150 to begin operation. By enabling the power detection module 130 only after the delay is complete, the power consumption of the voltage regulator module 150 can be reduced.

[0025] like Figure 4 As shown in FIG, the power-on timing diagram of the power supply circuit provided in the embodiment of the present application is shown. Figure 3 and Figure 4 The working principle of the power supply circuit provided in the embodiment of the present application is described in detail.

[0026] like Figure 3 and Figure 4 As shown, during the power-on process, the power supply voltage gradually rises. The reference circuit 110 receives the power supply signal VDD and the reference enable signal Pad_rstn. After the reference enable signal Pad_rstn is enabled, the reference circuit 110 begins to output the reference voltage signal Vbg. That is, the reference voltage signal Vbg begins to establish. This reference voltage signal Vbg can be output to the power detection module 130 and the voltage regulation module 150. When the voltage of the reference voltage signal Vbg rises to the reference voltage threshold, the reference circuit 110 outputs a high-level reference establishment completion signal Vbg_A to the first delay module 120. This reference establishment completion signal Vbg_A is a flag signal indicating that the reference voltage signal Vbg has established the reference voltage threshold.

[0027] Upon receiving the high-level reference establishment completion signal Vbg_A, the first delay module 120 begins delaying. After the first preset delay duration T1, the delay is completed and a high-level reference delay completion signal BGR_OK is output. The first input terminal of the first logic circuit 160 continues to receive the high-level reference enable signal Pad_rstn. Upon receiving the high-level reference delay completion signal BGR_OK at the second input terminal of the first logic circuit 160, the first logic circuit 160 outputs a high-level power detection enable signal Por_en to the power detection module 130.

[0028] The power detection module 130 receives the power signal VDD, the reference voltage signal Vbg, and the power detection enable signal Por_en. Upon receiving the high-level power detection enable signal Por_en, the power detection module 130 begins operation and detects the power voltage of the power signal VDD. If the power signal VDD is greater than or equal to a first predetermined voltage threshold, the power detection module 130 outputs a low-level power release signal VDD_S. If the power voltage of the power signal VDD is less than the first predetermined voltage threshold, the power detection module 130 continues detecting and waits until the power voltage rises to the first predetermined voltage threshold before outputting a low-level power release signal VDD_S.

[0029] After receiving the low-level power release signal VDD_S, the second delay module 140 begins a delay. After the second preset delay duration T2, the delay is completed and the low-level power reset signal Por_rst is output. The first input terminal of the second logic circuit 170 continues to receive the high-level reference enable signal Pad_rstn. When the second input terminal of the second logic circuit 170 receives the low-level power reset signal Por_rst, the second logic circuit 170 outputs a high-level voltage regulation enable signal LDO_en to the voltage regulation module 150.

[0030] The voltage stabilizing module 150 can be a low dropout regulator (LDO). The voltage stabilizing module 150 receives a power supply signal VDD, a reference voltage signal Vbg, and a voltage stabilizing enable signal LDO_en. When the voltage stabilizing module 150 receives a high-level voltage stabilizing enable signal LDO_en, the voltage stabilizing module 150 starts working and starts generating a stabilizing signal LDO. When the voltage of the stabilizing signal LDO reaches a second preset voltage threshold, the voltage stabilizing module 150 outputs a high-level power-on completion signal LDO_rst. The second preset voltage threshold can be 1.5V. When the voltage of the stabilizing signal LDO reaches 1.5V, the voltage stabilizing module 150 outputs a 1.5V stabilizing signal LDO and a power-on completion signal LDO_rst. The 1.5V stabilizing signal LDO can be used as the power supply signal VDD for other modules, and the power-on completion signal LDO_rst can be used as a trigger signal for other modules.

[0031] During the power-on process of the present embodiment, when it is detected that the power voltage is greater than or equal to the first preset voltage threshold, the power release signal VDD_S is output and a delay is performed. After the delay, the voltage stabilizing module 150 is enabled and the power-on is completed only when the voltage of the voltage stabilizing signal LDO generated by the voltage stabilizing module 150 reaches the second preset voltage threshold. After the voltage stabilizing module 150 outputs the power-on completion signal LDO_rst, the power signal VDD has reached a stable state. At this time, the power-on completion signal LDO_rst is used as a trigger signal for other modules. In the case of noise disturbance on the power signal VDD, the influence of the power disturbance on other modules in the power supply system can be effectively reduced, thereby ensuring the normal operation of other modules.

[0032] In some embodiments, the power supply power-on circuit may further include a third delay module, which is connected to the voltage stabilizing module 150 and receives the power-on completion signal LDO_rst output by the voltage stabilizing module 150. After receiving the power-on completion signal LDO_rst output by the voltage stabilizing module 150, the third delay module may perform a delay, and output a voltage stabilizing delay reset signal after a third preset delay time, and use the voltage stabilizing delay reset signal as a trigger signal for other modules. By performing another delay after the voltage stabilizing module 150 outputs the power-on completion signal LDO_rst, and using the voltage stabilizing delay reset signal output after the delay as the final power-on completion signal LDO_rst, and as a trigger signal for other modules, the impact of power supply disturbances on other modules in the power supply system can be further reduced when the power supply signal VDD is disturbed.

[0033] The power supply power-on circuit provided in the embodiment of the present application includes a reference circuit, a first delay module, a power detection module, a second delay module and a voltage stabilization module. The reference circuit is used to output a reference voltage signal and a reference establishment completion signal; the first delay module is used to delay a first preset time after receiving the reference establishment completion signal and output a reference delay completion signal; the power detection module is used to receive the power signal and the reference voltage signal, and detect the power voltage of the power signal according to the reference delay completion signal, and output a power release signal after the power voltage is greater than or equal to the first preset voltage threshold; the second delay module is used to delay a second preset time after receiving the power release signal and output a power reset signal; the voltage stabilization module is used to receive the power signal and the reference voltage signal, and generate a voltage stabilization signal according to the power reset signal, and output a power-on completion signal after the voltage stabilization signal reaches the second preset voltage threshold. The power supply power-on circuit outputs a power release signal after the power voltage reaches the first preset threshold, and outputs a power-on completion signal after the voltage stabilization signal reaches the second preset voltage threshold, so that when the power-on completion signal is output, the power voltage has reached a stable state, thereby enabling other functional modules under the power supply system to work normally.

[0034] The present invention also provides a chip including the power supply circuit described above, which may be, but is not limited to, a SOC (System on Chip) chip or a SIP (System in Package) chip.

[0035] The chip provided in the embodiment of the present application includes a reference circuit, a first delay module, a power detection module, a second delay module and a voltage stabilization module. The reference circuit is used to output a reference voltage signal and a reference establishment completion signal; the first delay module is used to delay a first preset time after receiving the reference establishment completion signal and output a reference delay completion signal; the power detection module is used to receive a power signal and a reference voltage signal, and detect the power voltage of the power signal according to the reference delay completion signal, and output a power release signal after the power voltage is greater than or equal to a first preset voltage threshold; the second delay module is used to delay a second preset time after receiving the power release signal and output a power reset signal; the voltage stabilization module is used to receive a power signal and a reference voltage signal, and generate a voltage stabilization signal according to the power reset signal, and output a power-on completion signal after the voltage stabilization signal reaches a second preset voltage threshold. The power supply power-on circuit outputs a power release signal after the power supply voltage reaches the first preset threshold, and outputs a power-on completion signal after the voltage stabilization signal reaches the second preset voltage threshold, so that when the power-on completion signal is output, the power voltage has reached a stable state, so that other functional modules under the power supply system can work normally.

[0036] An embodiment of the present application also provides an electronic device, which includes a device body and the above-mentioned chip, and the chip is arranged in the device body. The electronic device can be, but is not limited to, a weight scale, a body fat scale, a nutrition scale, an infrared electronic thermometer, a pulse oximeter, a body composition analyzer, a mobile power supply, a wireless charger, a fast charger, a car charger, an adapter, a display, a USB (Universal Serial Bus) docking station, a stylus, a true wireless headset, a car central control screen, a car, a smart wearable device, a mobile terminal, and a smart home device. Smart wearable devices include, but are not limited to, smart watches, smart bracelets, and cervical massagers. Mobile terminals include, but are not limited to, smart phones, laptops, tablet computers, and POS (point of sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart sweepers, and smart lights.

[0037] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0038] The above embodiments merely represent preferred embodiments of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A power supply circuit, characterized in that: include: A reference circuit, configured to output a reference voltage signal and a reference establishment completion signal; A first delay module, configured to delay for a first preset time after receiving the reference establishment completion signal and output a reference delay completion signal; a power detection module, configured to receive a power signal and the reference voltage signal, detect the power voltage of the power signal according to the reference delay completion signal, and output a power release signal after the power voltage is greater than or equal to a first preset voltage threshold; A second delay module, configured to delay for a second preset time after receiving the power release signal and output a power reset signal; as well as The voltage stabilization module is configured to receive the power supply signal and the reference voltage signal, generate a voltage stabilization signal according to the power reset signal, and output a power-on completion signal after the voltage stabilization signal reaches a second preset voltage threshold.

2. The power supply circuit according to claim 1, characterized in that: The reference circuit is further configured to output the reference establishment completion signal after the voltage of the reference voltage signal reaches a reference voltage threshold.

3. The power supply circuit according to claim 1, characterized in that: The reference circuit is further configured to receive a reference enable signal and output the reference voltage signal after receiving the reference enable signal.

4. The power supply circuit according to claim 3, characterized in that: The power supply power-on circuit also includes a first logic circuit, a first input end of the first logic circuit receives the reference enable signal, a second input end of the first logic circuit receives the reference delay completion signal, and an output end of the first logic circuit outputs a power supply detection enable signal to the power supply detection module, and the power supply detection module is used to detect the power supply voltage of the power supply signal after receiving the power supply detection enable signal.

5. The power supply circuit according to claim 4, characterized in that: The first logic circuit includes an AND gate circuit.

6. The power supply circuit according to claim 3, characterized in that: The power-on circuit also includes a second logic circuit, a first input end of the second logic circuit receives the reference enable signal, a second input end of the second logic circuit receives the power reset signal, and an output end of the second logic circuit outputs a voltage regulation enable signal to the voltage regulation module, and the voltage regulation module is used to generate the voltage regulation signal after receiving the voltage regulation enable signal.

7. The power supply circuit according to claim 6, characterized in that: The second logic circuit includes an inverter and a NOR gate circuit, the input end of the inverter receives the reference enable signal, the output end of the inverter is connected to the first input end of the NOR gate circuit, the second input end of the NOR gate circuit receives the power reset signal, and the output end of the NOR gate circuit outputs the voltage regulation enable signal.

8. The power supply circuit according to any one of claims 1 to 7, characterized in that: The power supply power-on circuit further includes a third delay module, which is connected to the voltage stabilization module and delays for a third preset time length after receiving the power-on completion signal and outputs a voltage stabilization delay reset signal.

9. A chip, characterized in that: The invention comprises the power supply circuit according to any one of claims 1 to 8.

10. An electronic device, characterized in that: The device comprises a device body and the chip according to claim 9 arranged in the device body.

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