Method and apparatus for failure recovery of internal memory

Abstract

The present disclosure provides a method and device for repairing a failure of an internal memory, comprising: determining a first failure unit of a main array in a first internal memory; determining a risk priority of the first failure unit; and repairing the first failure unit with a risk priority higher than or equal to a pre-trained priority threshold as a second failure unit. One aspect can reduce the number of repaired failure units, that is, reduce the number of redundant units required to repair the failure units, leaving more redundant units for subsequent detection, which helps to improve the overall yield and reduce the failure rate. In addition, since the first failure unit with a higher risk priority is repaired first, the number of serious failure units can be reduced as much as possible, the decrease in read-write accuracy caused by serious failure units is alleviated, the read-write accuracy is improved, and the yield is further improved, and the failure rate is reduced.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to a method and apparatus for repairing internal memory faults. Background Technology

[0002] Internal memory is a core component of various computing devices and can be divided into several types, including DRAM (Dynamic Random Access Memory) and NAND flash memory. Internal memory can include primary arrays and redundant arrays, both of which contain multiple memory cells, with primary arrays having more cells than redundant arrays. When a memory cell in the primary array fails, it can be repaired using cells in the redundant array. Therefore, a memory cell in the primary array is called a primary cell, and a memory cell in the redundant array is called a redundant cell.

[0003] In the existing technology, the internal memory needs to be tested for performance during the production process to detect whether the main unit of the internal memory is faulty, and all faulty units are repaired through redundant units to ensure that the yield of the internal memory reaches the expected level and that the storage performance of the internal memory is normal.

[0004] However, the above method results in a high failure rate and low yield of the internal memory. Summary of the Invention

[0005] This disclosure provides a method and apparatus for repairing internal memory faults, thereby reducing the failure rate and improving the yield of internal memory.

[0006] In a first aspect, embodiments of this disclosure provide a method for repairing faults in an internal memory, the method comprising:

[0007] Identify the first faulty cell in the main array within the first internal memory;

[0008] Determine the risk priority of the first fault unit;

[0009] The first fault unit whose risk priority is higher than or equal to the priority threshold obtained through pre-training is designated as the second fault unit;

[0010] Repair the second faulty unit.

[0011] In some embodiments, prior to repairing the second faulty unit, the method further includes:

[0012] Add the first fault unit corresponding to the target test item to the second fault unit.

[0013] In some embodiments, prior to repairing the second faulty unit, the method further includes:

[0014] For at least one error-correcting code block, a portion of the first fault units included in each error-correcting code block are selected and added to the second fault unit.

[0015] In some implementations, determining the first faulty cell of the main array in the first internal memory includes:

[0016] With the error correction function disabled, a fault test is performed on the main array in the first internal memory to obtain the first faulty unit.

[0017] In some implementations, the training process for the priority threshold includes:

[0018] Initialize the current priority threshold;

[0019] The number of redundant units required to repair the second internal memory is determined based on the current priority threshold.

[0020] If the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to the first preset error, then the yield rate of the second internal memory after repair is determined when the error correction function is enabled.

[0021] If the absolute error between the yield rate and the preset yield rate is less than or equal to the second preset error, then the current priority threshold is determined as the priority threshold obtained through training.

[0022] In some implementations, determining the number of redundant units required to repair the second internal memory based on the current priority threshold includes:

[0023] Determine the third faulty unit in the main array of the second internal memory, and the risk priority of the third faulty unit;

[0024] The third fault unit whose risk priority is higher than or equal to the current priority threshold is identified as the fourth fault unit;

[0025] The number of redundant units is determined based on the number of the fourth fault units.

[0026] In some implementations, determining the third faulty cell in the main array of the second internal memory includes:

[0027] With the error correction function disabled, a fault test is performed on the main array of the second internal memory to obtain the third fault unit.

[0028] In some implementations, before determining the number of redundant units based on the number of the fourth faulty units, the method further includes:

[0029] Add the third fault unit corresponding to the target test item to the fourth fault unit.

[0030] In some implementations, before determining the number of redundant units based on the number of the fourth faulty units, the method further includes:

[0031] For at least one error-correcting code block, a portion of the third fault units included in each error-correcting code block are selected and added to the fourth fault unit.

[0032] In some embodiments, the method further includes:

[0033] If the absolute error between the number of redundant units and the maximum number of redundant units is greater than the first preset error, then the current priority threshold is adjusted for the first time.

[0034] In some implementations, the first adjustment to the current priority threshold includes:

[0035] If the number of redundant units is greater than the maximum number of redundant units, then the current priority threshold is increased;

[0036] If the number of redundant units is less than the maximum number of redundant units, then the current priority threshold is reduced.

[0037] In some implementations, it also includes:

[0038] If the absolute error between the yield rate and the preset yield rate is greater than the second preset error, then the current priority threshold is adjusted for the second time, and the process proceeds to the step of determining the number of redundant units required to repair the second internal memory based on the current priority threshold.

[0039] In some implementations, the second adjustment to the current priority threshold includes:

[0040] If the yield rate is greater than the preset yield rate, then the current priority threshold is increased;

[0041] If the yield rate is less than the preset yield rate, then the current priority threshold is reduced.

[0042] In some implementations, determining the yield of the repaired second internal memory when the error correction function is enabled includes:

[0043] The repaired second internal memory is classified to determine the use cases of the second internal memory;

[0044] Determine the target test conditions based on the described use case;

[0045] With the error correction function enabled, the yield of the second internal memory is tested under the target test conditions.

[0046] In some embodiments, the method further includes:

[0047] After the second faulty unit is repaired, the first internal memory is used as the second internal memory, and the process proceeds to the step of testing the yield of the second internal memory under the target test conditions when the error correction function is enabled.

[0048] In some embodiments, the fault test includes at least one of the following: fault test with different test items, fault test with different test conditions, wherein the test conditions include at least one of the following: temperature, time, and voltage.

[0049] In some implementations, the risk priority is associated with at least one of the following: the test item corresponding to the faulty unit, the test conditions corresponding to the faulty unit, and the fault mode of the faulty unit.

[0050] Secondly, embodiments of this disclosure provide an internal memory fault repair apparatus, comprising:

[0051] The first fault unit determination module is used to determine the first fault unit of the main array in the first internal memory.

[0052] The risk priority determination module is used to determine the risk priority of the first fault unit;

[0053] The second fault unit determination module is used to identify the first fault unit whose risk priority is higher than or equal to the priority threshold obtained by pre-training as the second fault unit.

[0054] The second fault unit repair module is used to repair the second fault unit.

[0055] In some implementations, it also includes:

[0056] The first unit adding module is used to add the first fault unit corresponding to the target test item to the second fault unit before repairing the second fault unit.

[0057] In some implementations, it also includes:

[0058] The second unit adding module is used to, before repairing the second fault unit, select a portion of the first fault units from the first fault units included in each error correction code block and add them to the second fault unit.

[0059] In some implementations, the first fault unit determining module is further configured to:

[0060] With the error correction function disabled, a fault test is performed on the main array in the first internal memory to obtain the first faulty unit.

[0061] In some implementations, the training process for the priority threshold includes:

[0062] The initialization module is used to initialize the current priority threshold.

[0063] A redundancy unit determination module is used to determine the number of redundant units required to repair the second internal memory based on the current priority threshold.

[0064] The yield determination module is used to determine the yield of the second internal memory after repair if the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to a first preset error, when the error correction function is turned on.

[0065] The priority threshold determination module is used to determine the current priority threshold as the priority threshold obtained by training if the absolute error between the yield and the preset yield is less than or equal to the second preset error.

[0066] In some implementations, the redundancy unit determination module is further configured to:

[0067] Determine the third faulty unit in the main array of the second internal memory, and the risk priority of the third faulty unit;

[0068] The third fault unit whose risk priority is higher than or equal to the current priority threshold is identified as the fourth fault unit;

[0069] The number of redundant units is determined based on the number of the fourth fault units.

[0070] In some implementations, the redundancy unit determination module is further configured to:

[0071] With the error correction function disabled, a fault test is performed on the main array of the second internal memory to obtain the third fault unit.

[0072] In some embodiments, the apparatus further includes:

[0073] The third unit adding module is used to add the third fault unit corresponding to the target test item to the fourth fault unit before determining the number of redundant units based on the number of the fourth fault units.

[0074] In some embodiments, the apparatus further includes:

[0075] The fourth unit adding module is used to select a portion of the third fault units from the third fault units included in each error correction code block and add them to the fourth fault unit before determining the number of redundant units based on the number of the fourth fault units.

[0076] In some embodiments, the apparatus further includes:

[0077] The first adjustment module is used to make a first adjustment to the current priority threshold if the absolute error between the number of redundant units and the maximum number of redundant units is greater than the first preset error.

[0078] In some implementations, the first adjustment module is further configured to:

[0079] If the number of redundant units is greater than the maximum number of redundant units, then the current priority threshold is increased;

[0080] If the number of redundant units is less than the maximum number of redundant units, then the current priority threshold is reduced.

[0081] In some implementations, it also includes:

[0082] The adjustment loop module is used to adjust the current priority threshold a second time if the absolute error between the yield rate and the preset yield rate is greater than the second preset error, and then proceed to the step of determining the number of redundant units required to repair the second internal memory based on the current priority threshold.

[0083] In some implementations, the adjustment cycle module is further configured to:

[0084] If the yield rate is greater than the preset yield rate, then the current priority threshold is increased;

[0085] If the yield rate is less than the preset yield rate, then the current priority threshold is reduced.

[0086] In some implementations, the yield determination module is further used for:

[0087] The repaired second internal memory is classified to determine the use cases of the second internal memory;

[0088] Determine the target test conditions based on the described use case;

[0089] With the error correction function enabled, the yield of the second internal memory is tested under the target test conditions.

[0090] In some embodiments, the apparatus further includes:

[0091] The second loop module is used to, after repairing the second faulty unit, use the first internal memory as the second internal memory and proceed to the step of testing the yield of the second internal memory under the target test conditions when the error correction function is enabled.

[0092] In some embodiments, the fault test includes at least one of the following: fault test with different test items, fault test with different test conditions, wherein the test conditions include at least one of the following: temperature, time, and voltage.

[0093] In some implementations, the risk priority is associated with at least one of the following: the test item corresponding to the faulty unit, the test conditions corresponding to the faulty unit, and the fault mode of the faulty unit.

[0094] Thirdly, embodiments of this disclosure also provide an electronic device, including: at least one processor and a memory;

[0095] The memory stores computer-executed instructions;

[0096] The at least one processor executes computer execution instructions stored in the memory, causing the electronic device to implement the method described in the first aspect.

[0097] Fourthly, embodiments of this disclosure also provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a computing device, cause the computing device to implement the method described in the first aspect.

[0098] Fifthly, embodiments of this disclosure also provide a computer program product for performing the method described in the first aspect.

[0099] The internal memory fault repair method and apparatus provided in this disclosure include: identifying a first faulty unit in the main array of a first internal memory; determining the risk priority of the first faulty unit; and repairing the first faulty unit whose risk priority is higher than or equal to a pre-trained priority threshold as a second faulty unit. This disclosure can identify all faulty units in the main array through fault detection, referred to as first faulty units, and determine the risk priority of the first faulty units. First faulty units with a risk priority greater than the pre-trained priority threshold are identified as more serious faulty units and repaired. This reduces the number of faulty units to be repaired, i.e., reduces the number of redundant units required for repair, allowing for more redundant units to be detected later, thus improving overall yield and reducing the failure rate. Furthermore, prioritizing the repair of the first faulty units with higher risk priority minimizes the number of serious faulty units, mitigating the decrease in read / write accuracy caused by serious faulty units, improving read / write accuracy, and further improving yield and reducing the failure rate. Attached Figure Description

[0100] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the embodiments of the present disclosure.

[0101] Figure 1 This is a schematic diagram of the structure of a storage array for an internal memory provided in an embodiment of this disclosure;

[0102] Figure 2 This is a flowchart of the steps of a fault repair method for internal memory provided in an embodiment of this disclosure;

[0103] Figure 3 This is a schematic diagram of the structure of a fault bitmap provided in an embodiment of this disclosure;

[0104] Figure 4 This is a schematic diagram of another fault bitmap provided in an embodiment of this disclosure;

[0105] Figure 5 This is provided by the embodiments of this disclosure. Figure 3 and Figure 4 The composite fault bitmap obtained from the two fault bitmaps shown;

[0106] Figure 6 This is a detailed flowchart illustrating the training process of a priority threshold provided in an embodiment of this disclosure;

[0107] Figure 7 This is a detailed flowchart illustrating a fault repair process using priority thresholds provided in an embodiment of this disclosure.

[0108] Figure 8This is a schematic diagram of the structure of an internal memory fault repair device provided in an embodiment of this disclosure;

[0109] Figure 9 This is a structural block diagram of an electronic device provided in an embodiment of this disclosure.

[0110] The accompanying drawings have illustrated specific embodiments of the present disclosure, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the present disclosure in any way, but rather to illustrate the concepts of the present disclosure to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0111] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this disclosure as detailed in the appended claims.

[0112] The method provided in this disclosure is used to repair faulty cells in the main array of internal memory to ensure the read / write accuracy of internal memory. Figure 1 This is a schematic diagram of the structure of a storage array for an internal memory provided in an embodiment of this disclosure. Figure 1 The storage array shown can be a primary array or a redundant array used to repair the primary array, where a redundant unit in the redundant array is used to repair a primary unit. (Refer to...) Figure 1 As shown, the aforementioned storage array 100 may include 9 rows and 9 columns, which is 81 storage units 101.

[0113] To ensure the read / write accuracy of the internal memory, fault detection can be performed on the main array of the internal memory before it leaves the factory to identify faulty cells and repair them using redundant cells. However, since fault detection and repair are typically performed multiple times, the faulty cells corresponding to different fault detections may differ. Therefore, if the redundant cells are exhausted by the previously detected faulty cells, subsequent detected faulty cells will be unrepairable, leading to low yield and high failure rate of the internal memory. Furthermore, if the subsequently detected faulty cells have serious faults, it may cause a significant drop in the read / write accuracy of the internal memory.

[0114] To address the aforementioned issues, embodiments of this disclosure can identify all faulty units in the main array through fault detection, referred to as first faulty units, and determine the risk priority of these first faulty units. First faulty units with a risk priority greater than a pre-trained priority threshold are identified as more severe faulty units and repaired. This reduces the number of faulty units requiring repair, thus reducing the number of redundant units needed for repair, allowing for more redundant units to be detected later, which helps improve overall yield and reduce the failure rate. Furthermore, prioritizing the repair of the higher-risk first faulty units minimizes the number of severe faulty units, mitigating the decrease in read / write accuracy caused by severe faulty units, improving read / write accuracy, and further improving yield and reducing the failure rate.

[0115] Figure 2 This is a flowchart illustrating the steps of a fault repair method for internal memory provided in an embodiment of this disclosure. Please refer to... Figure 2 The aforementioned methods for repairing internal memory faults include:

[0116] S201: Identify the first faulty cell in the main array of the first internal memory.

[0117] The first faulty unit refers to all or some faulty units in the main array, which can be determined through fault testing. This fault testing can be performed once or multiple times, and each test yields a corresponding test result. The test result indicates whether each storage unit detected in the fault test has failed. The test result can include multiple test result markers, each corresponding to a storage unit. For example, a test result marker of 1 for a storage unit indicates that the storage unit has failed, while a test result marker of 0 indicates that the storage unit has not failed. Based on this, the storage unit corresponding to a test result marker of 1 in the test results can be considered the aforementioned first faulty unit.

[0118] The order of the test result markers can be consistent with the order of the storage units, so that the corresponding test result marker can be determined according to the location of the storage unit. For example, the third test result marker can be used as the test result marker for the third storage unit.

[0119] In one implementation, the test result tags of all memory cells are arranged sequentially to form a sequence. For example, the sequence corresponding to 9 memory cells can be 000000100. The eighth test result is marked as 1, indicating that the 8th memory cell is faulty. The remaining test results are marked as 0, indicating that the remaining memory cells are not faulty.

[0120] In another implementation, the test results can be represented by a fault bitmap, with one fault bitmap corresponding to the main array of the internal memory. The size of the fault bitmap is the same as the number of memory cells included in the main array of the internal memory. Each test result marker in the fault bitmap indicates whether a memory cell at the corresponding location in the main array is faulty. For example, if the main array of the internal memory has I rows and J columns of memory cells, then the fault bitmap can also be I rows and J columns. The i-th row and j-th column of the fault bitmap stores the test result marker of the memory cell in the i-th row and j-th column. Here, I and J are integers greater than or equal to 1, i is an integer greater than or equal to 1 and less than or equal to 1, and j is an integer greater than or equal to 1 and less than or equal to J.

[0121] Figure 3 This is a schematic diagram of a fault bitmap provided in an embodiment of this disclosure. (Refer to...) Figure 3 As shown, the fault bitmap 102 includes 9 rows and 9 columns of test result markers 103, which is a total of 81 test result markers 103. Figure 3 The fault bitmap shown can be Figure 1 The fault bitmap of the main array is shown. Figure 3 The test result marker 103 in the first row and second column, and the test result marker 103 in the eighth row and fourth column are both 1, indicating that the memory cell located in the first row and second column and the memory cell located in the eighth row and fourth column are both faulty. Figure 3 The remaining test results marked 103 are all 0, indicating that there are no faults in the remaining storage units.

[0122] It should be noted that if L fault tests are performed on the internal memory, then L test results can be obtained, where L is greater than or equal to 1. Each fault test corresponds to one test result, and each test result can be... Figure 3 The image shows a fault bitmap.

[0123] The aforementioned fault testing includes at least one of the following: fault testing with different test items and fault testing with different test conditions. L fault tests can correspond to L1 test items and L2 test conditions. Different fault tests can correspond to different test items and / or test conditions, and L1 × L2 = L. Therefore, when L is greater than or equal to 2, fault testing of the main array of the internal memory can be performed using at least two test items and / or at least two test conditions, obtaining the test result for each test item under each test condition, i.e., obtaining L test results. Each test item is used to test at least one fault mode, and thus each test result marker in the fault bitmap indicates whether the corresponding memory cell has at least one fault.

[0124] The test conditions mentioned above include at least one of the following: temperature, time, and voltage.

[0125] In some implementations, the test results can be obtained by performing a fault test on the main array of the internal memory with the error correction function disabled, thereby identifying the first faulty unit. The error correction function corrects data errors caused by the faulty unit on a block-by-block basis, preventing further data errors. Therefore, even with the error correction function disabled, all faulty units in the internal memory can be detected as much as possible, including those that may be corrected by the error correction codes. This helps avoid missing the first faulty unit and further improves yield.

[0126] When the aforementioned error correction function is disabled, the faults that can be tested include, but are not limited to: faults that did not occur in earlier processes but only appeared in later processes due to the internal memory manufacturing process, soft defects, and degradation faults caused by potential defects. The phenomenon of degradation faults in memory cells can be called bit degradation.

[0127] Among these, faults that did not occur in earlier processes but appeared in later processes can be, for example, variable retention time faults or faults between memory cells. Variable retention time faults refer to faults caused by the variable retention time of data in memory cells, while faults between memory cells can be caused by the coupling between memory cells, resulting in faults in adjacent memory cells.

[0128] The degradation faults caused by the aforementioned soft defects and potential defects can include gate-induced drain leakage (GIDL), junction leakage, weak contacts, and other faults. These faults can be detected through system layer testing (SLT), infrared reflow (IRR), aging testing, and early lifetime failure rate testing. In some embodiments, the first fault cell can be determined by L fault bitmaps obtained from L fault tests, or the L fault bitmaps can be merged into a composite fault bitmap to determine the first fault cell. The same memory cell corresponds to a test result marker in the composite test result. One test result marker in the composite test result is used to represent the test result obtained by combining multiple test items. When at least one fault bitmap indicates that a memory cell is faulty, the test result marker in the composite fault bitmap indicates that the memory cell is faulty. When all fault bitmaps indicate that a memory cell is not faulty, the test result marker in the composite fault bitmap indicates that the memory cell is not faulty.

[0129] Figure 4 This is a schematic diagram of another fault bitmap provided in an embodiment of this disclosure. Figure 5 This is provided by the embodiments of this disclosure. Figure 3and Figure 4 The composite fault bitmap is obtained by combining the two fault bitmaps shown.

[0130] Reference Figure 4 As shown, since the test result markers in the 1st row and 2nd column, the 2nd row and 1st column, and the 4th row and 1st column of the fault bitmap are all 1, the memory cells in the 1st row and 2nd column, the 2nd row and 1st column, and the 4th row and 1st column are all faulty. Since the test result markers in the remaining positions are all 0, the memory cells in the remaining positions are not faulty.

[0131] Reference Figure 5 As shown, since the test result markers in the 1st row and 2nd column, the 2nd row and 1st column, the 4th row and 1st column, and the 8th row and 4th column of the fault bitmap are all 1, the memory cells in the 1st row and 2nd column, the 2nd row and 1st column, the 4th row and 1st column, and the 8th row and 4th column are all faulty. Since the test result markers in the remaining positions are all 0, the memory cells in the remaining positions are not faulty.

[0132] It can be seen that, through Figure 3 and Figure 4 All first fault units identified separately and through Figure 5 The identified first fault unit is consistent.

[0133] S202: Determine the risk priority of the first fault unit.

[0134] The risk priority of any fault unit is associated with at least one of the following: the test item corresponding to the fault unit, the test conditions corresponding to the fault unit, and the fault mode of the fault unit.

[0135] In some implementations, firstly, a risk priority can be pre-assigned to each test item according to its importance. Then, a risk priority is assigned to each failure mode based on its severity. Next, the risk priority of the test conditions is determined based on their leniency. Finally, the priority of the faulty unit is determined based on the risk priority of the test item, the risk priority of the failure mode, and the risk priority of the test condition; the higher the risk priority of the test item, and / or the higher the risk priority of the failure mode, and / or the higher the risk priority of the test condition, the higher the risk priority of the faulty unit.

[0136] The leniency of the test conditions is determined by the probability that those conditions will detect a fault. The lower the probability of a fault being detected under a test condition, the less likely it is to be detected; thus, the more lenient the test conditions, the higher the risk priority. Units that are still detected under lenient test conditions are considered to have a higher risk priority, and vice versa.

[0137] For example, when testing for data retention failure, after writing data, wait for a preset time T before reading the data. This allows the consistency between the read and written data to determine if a data retention failure exists in the storage unit. A shorter preset time T indicates a more lenient test condition, and consequently, a higher risk priority for that test condition.

[0138] S203: The first fault unit with a risk priority higher than or equal to the priority threshold obtained through pre-training is designated as the second fault unit.

[0139] The training of the priority threshold can be performed in advance, for example, periodically. In some implementations, the priority threshold training process can also be performed when the manufacturing process of the first internal memory changes. In this way, the priority threshold can be updated with the process change, which can improve the matching degree between the priority threshold and the process, and help to further improve the yield and reduce the failure rate.

[0140] In some implementations, the training process for the priority threshold mentioned above includes S2031 to S2033.

[0141] S2031: Initialize the current priority threshold.

[0142] The current priority threshold can be initialized to any value.

[0143] S2032: Determine the number of redundant units required to repair the second internal memory based on the current priority threshold.

[0144] The number of redundant units is the same as the number of fourth fault units that need to be repaired in the second internal memory. The fourth fault units are all or part of the third fault units that have faults in the second internal memory.

[0145] In some implementations, the process of determining the number of redundant units may include: first, determining the third fault unit in the main array of the second internal memory, and the risk priority of the third fault unit; then, determining the third fault unit with a risk priority higher than or equal to the current priority threshold as the fourth fault unit; and finally, determining the number of redundant units based on the number of fourth fault units.

[0146] The third fault unit can be obtained by performing a fault test on the second internal memory. The fault detection process here is the same as the fault test process for the first fault unit. The process for determining the risk priority of the third fault unit is the same as the process for determining the risk priority of the first fault unit, and will not be repeated here.

[0147] It is understood that the second internal memory can also be a memory memory with known third and fourth fault bits, in which case fault testing of the second internal memory is not required. However, the embodiments of this disclosure can accurately determine the allocation of redundant units through fault testing, so that the allocated redundant units are obtained with the current state of the second internal memory and match the current state, which helps to improve the utilization efficiency of the redundant units.

[0148] In some implementations, the third faulty cell in the main array of the second internal memory can be identified even when the error correction function is disabled. For example, a fault test can be performed on the main array of the second internal memory to identify the third faulty cell when the error correction function is disabled.

[0149] In some implementations, certain test items are of higher importance. These test items can be designated as target test items. Before determining the number of redundant units based on the number of fourth faulty units and repairing the fourth faulty units, the corresponding third faulty units obtained from these target test items are added to the fourth faulty unit. In this way, in addition to repairing the third faulty units with higher risk priority, the aforementioned third faulty units corresponding to the target test items can also be repaired, reducing the number of faulty units in the repaired target test items and improving the yield of the target test items.

[0150] In other implementations, before determining the number of redundant units based on the number of fourth fault units, for at least one error correction code block, a portion of the third fault units included in each error correction code block are selected and added to the fourth fault unit. The remaining third fault units in each error correction code block are the fault units that do not need to be repaired in that error correction code block. By using the error correction function of the error correction code block to correct the fault units that do not need to be repaired, the use of redundant units can be further reduced, which helps to further improve the yield and reduce the failure rate by providing a basis for subsequent repair of more remaining redundant units.

[0151] The error correction code block includes storage units for valid data and error correction data. Error correction data can also be understood as redundant data. It is used to correct errors in valid data, improving read / write accuracy. This error correction function can be implemented using ECC (error correcting code) or ECS (error check and scrub). On-chip ECC / ECS is an advanced feature used for error correction. During writing, not only valid data but also error correction data needs to be written. During reading, not only valid data but also error correction data needs to be read to correct errors in the valid data, improving data accuracy.

[0152] S2033: Determine whether the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to the first preset error. If so, then with the error correction function enabled, determine the yield rate after the second internal memory repair; if the absolute error between the yield rate and the preset yield rate is less than or equal to the second preset error, then determine the current priority threshold as the priority threshold obtained from training.

[0153] The maximum redundancy can be understood as the maximum number of redundant units that can be used in this repair. To avoid subsequent faulty units being found without redundant units, a maximum redundancy can be set for each repair. After multiple repairs with the corresponding maximum redundancy, the total number of storage units in the redundant array corresponding to the main array can be obtained. In other words, the total number of storage units can be pre-allocated to each repair according to the number of repairs.

[0154] It should be noted that the absolute error between the number of redundant units and the maximum number of redundant units can be the absolute value of the difference between the number of redundant units and the maximum number of redundant units. Similarly, the absolute error between the yield and the preset yield can be the absolute value of the difference between the yield and the preset yield.

[0155] The embodiments disclosed herein can use the current priority threshold when both the yield and the number of redundant units meet expectations as the priority threshold obtained during training. This can maximize the yield and minimize the failure rate while ensuring the maximum number of redundant units.

[0156] It is understandable that when the current priority threshold is set appropriately, it does not need to be adjusted, and the priority threshold can be determined through the above process. However, in practical applications, the current priority threshold usually needs to be adjusted. The adjustment strategies for the current priority threshold in this embodiment include two types: the first adjustment strategy is to perform a first adjustment on the current priority threshold if the absolute error between the number of redundant units and the maximum number of redundant units is greater than a first preset error. The second adjustment strategy is to perform a second adjustment on the current priority threshold if the absolute error between the yield rate and the preset yield rate is greater than a second preset error. After the first and second adjustments, the process can proceed to the aforementioned step of determining the number of redundant units required to repair the second internal memory based on the current priority threshold, for the next round of training.

[0157] As can be seen, the embodiments of this disclosure can continuously adjust the current priority threshold so that when the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to the first preset error, and the absolute error between the yield and the preset yield is less than or equal to the second preset error, the training ends and the current priority threshold is determined as the priority threshold obtained by training.

[0158] For the aforementioned first adjustment, the condition for the first adjustment is that the absolute error between the number of redundant units and the maximum number of redundant units is greater than a first preset error. At this point, the current priority threshold can be further adjusted based on the relationship between the number of redundant units and the maximum number of redundant units.

[0159] Specifically, if the number of redundant units is greater than the maximum number of redundant units, the current priority threshold is increased to reduce the number of fourth fault units that need to be repaired with a risk priority greater than or equal to the priority threshold, thereby reducing the number of redundant units, so that the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to the first preset error.

[0160] If the number of redundant units is less than the maximum number of redundant units, the current priority threshold is reduced to increase the number of fourth faults that need to be repaired. This allows for the use of as many redundant units as possible within the limit of the maximum number of redundant units, thereby reducing the number of fourth faults that do not need to be repaired and helping to improve yield.

[0161] Accordingly, for the second adjustment mentioned above, the condition for the second adjustment is that the absolute error between the yield rate and the preset yield rate is greater than the second preset error. At this time, the current priority threshold can be further adjusted based on the relationship between the yield rate and the preset yield rate.

[0162] Specifically, if the yield rate is greater than the preset yield rate, the current priority threshold is increased to reduce the number of fourth fault units that need to be repaired with a risk priority greater than or equal to the priority threshold, thereby reducing the number of redundant units, saving redundant units, and preventing subsequent fault units from being unable to be repaired.

[0163] If the yield is less than the preset yield, the current priority threshold is reduced to increase the number of fourth faults that need to be repaired. This allows for the use of as many redundant units as possible within the limit of the maximum redundancy, thereby reducing the number of fourth faults that do not need to be repaired. This helps to increase the yield, with the expectation that the absolute error between the yield and the preset yield is less than or equal to the second preset error.

[0164] In some implementations, the process of determining the yield of the repaired second internal memory in S2033 when the error correction function is enabled may include: first, classifying the repaired second internal memory to determine the usage scenario of the second internal memory; then, determining the target test conditions based on the usage scenario; and finally, testing the yield of the second internal memory under the target test conditions when the error correction function is enabled.

[0165] As can be seen, the yield rate mentioned above was obtained through another test. The test used to identify the first faulty unit can be called front-end testing, and the test used to determine the yield rate can be called back-end testing. The yield rate obtained from the back-end testing can be called the back-end yield. Back-end testing can include: final test (FT), system layer test (SLT), and quality testing, etc.

[0166] The repair of the second internal memory involves repairing the fourth fault unit. This fourth fault unit can include not only the third fault units with a risk priority greater than or equal to the current priority threshold, but also the third fault units corresponding to the target test item. If there are other third fault units besides these two types in the error-correcting code block, some of these remaining third fault units can be added to the fourth fault units that need repair. The maximum number of third fault units remaining that the error-correcting code block can correct is considered as fault units that do not need repair. In summary, the remaining fault units that do not need repair in an error-correcting code block have the following characteristics: a risk priority less than the priority threshold, and the corresponding test item is one of the test items other than the target test item. This minimizes the impact of fault units that do not need repair.

[0167] It should be noted that the repair of the aforementioned fourth fault unit can be performed at any time after the fourth fault unit is detected and before the second internal memory is classified here.

[0168] In this embodiment of the disclosure, during the yield testing of the second internal memory, the target test conditions are determined based on the usage scenario of the second internal memory. These target test conditions match the environmental parameters of the usage scenario. This allows for better simulation of the yield under the usage scenario, ensuring that the priority threshold obtained during training is well reflected in that scenario, thus contributing to further improvement in yield. For example, if the usage scenario of the second internal memory is at a high temperature, then the target test conditions may include a high temperature. Conversely, if the usage scenario of the second internal memory is at a low temperature, then the target test conditions may include a low temperature.

[0169] As can be seen from the above process, before repairing the first internal memory in a certain usage scenario, the second internal memory can be pre-tested for yield in that usage scenario to obtain the priority threshold corresponding to that usage scenario, so as to improve the efficiency and yield of repairing the first internal memory using redundant units.

[0170] S204: Repair the second faulty unit.

[0171] It is understood that before repairing the second faulty unit, redundant units required for repair can be allocated to each second faulty unit, that is, a one-to-one correspondence can be established between the second faulty unit and the redundant units. The redundant units used to repair the second faulty unit can be randomly allocated or allocated according to a preset rule, where the preset rule can be based on the corresponding position. This disclosure embodiment does not limit the allocation rule of the redundant units.

[0172] In some implementations, embodiments of this disclosure can also use the repaired first internal memory to perform feedback training on the priority threshold. Specifically, after repairing the second faulty unit, the first internal memory is used as the aforementioned second internal memory, and the process proceeds to a step of testing the yield of the second internal memory with the error correction function enabled, in order to initiate training on the priority threshold.

[0173] As can be seen from the aforementioned priority threshold training process, after obtaining the yield of the second internal memory, if the absolute error between the yield and the preset yield is greater than or equal to the second preset error, it means that the yield of the repaired internal memory does not meet the yield requirements. At this time, it is necessary to continue adjusting the current priority so that the priority threshold obtained by the final training can guarantee that the repaired internal memory meets the yield requirements.

[0174] In some implementations, the corresponding first fault unit obtained from the target test item can be added to the second fault unit before the second fault unit is repaired.

[0175] In other embodiments, before repairing the second fault unit, for at least one error correction code block, a portion of the first fault units included in each error correction code block may be selected and added to the second fault unit.

[0176] The second fault unit described in this embodiment corresponds to the fourth fault unit in the training process of the priority threshold and has the same principle. Therefore, this embodiment will not be described again here.

[0177] As can be seen, the fourth fault unit to be repaired in this embodiment includes first fault units with a risk priority greater than or equal to the priority threshold, and may also include first fault units of the target test item. If there are other first fault units besides these two types of second fault units in the error correction code block, then some of the remaining first fault units can be added to the second fault units to be repaired, with the maximum number of first fault units remaining that the error correction code block can correct considered as fault units that do not need to be repaired. In summary, the remaining fault units that do not need to be repaired in an error correction code block have the following characteristics: risk priority less than the priority threshold, and the corresponding test item is another test item besides the target test item. In this way, the impact of fault units that do not need to be repaired can be minimized as much as possible.

[0178] In summary, the internal memory fault repair method of this disclosure requires two processes: a priority threshold training process and a priority threshold application fault repair process. Figure 6 This is a detailed flowchart illustrating the training process of a priority threshold provided in an embodiment of this disclosure. Figure 7 This is a detailed flowchart illustrating a fault repair process using priority thresholds provided in this embodiment of the disclosure.

[0179] Reference Figure 6 As shown, the training process for the priority threshold in this embodiment includes S301 to S318.

[0180] S301: Initialize the current priority threshold.

[0181] S302: With the error correction function disabled, perform a fault test on the main array of the second internal memory to obtain the third fault unit and the risk priority of the third fault unit.

[0182] S303: The third fault unit with a risk priority higher than or equal to the current priority threshold is identified as the fourth fault unit.

[0183] S304: Add the third fault unit corresponding to the target test item to the fourth fault unit.

[0184] S305: For at least one error-correcting code block, select a portion of the third fault units from the third fault units included in each error-correcting code block and add them to the fourth fault unit.

[0185] S306: Determine the number of redundant units based on the number of fourth fault units.

[0186] S307: Determine whether the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to a first preset error. If yes, proceed to S311; if no, proceed to S308.

[0187] S308: Determine whether the number of redundant units is greater than the maximum number of redundant units.

[0188] S309: Increase the current priority threshold and proceed to S303.

[0189] S310: Decrease the current priority threshold and proceed to S303.

[0190] S311: Classify the repaired second internal memory to determine the usage scenarios of the second internal memory.

[0191] S312: Determine the target test conditions based on the usage scenario.

[0192] S313: With error correction enabled, test the yield of the second internal memory under target test conditions.

[0193] S314: Determine whether the absolute error between the yield rate and the preset yield rate is greater than the second preset error. If yes, proceed to S315; if no, proceed to S318.

[0194] S315: Determine if the yield rate is greater than the preset yield rate. If yes, proceed to S316; otherwise, proceed to S317.

[0195] S316: Increase the current priority threshold and proceed to S303.

[0196] S317: Decrease the current priority threshold and proceed to S303.

[0197] S318: Set the current priority threshold to the priority threshold obtained during training.

[0198] Reference Figure 7 As shown, the application priority threshold for fault repair in this embodiment includes S319 to S327.

[0199] S319: Has the manufacturing process of the first internal memory been changed? If yes, proceed to S321; otherwise, proceed to S320.

[0200] S320: With the error correction function disabled, a fault test is performed on the main array of the first internal memory to obtain the test results, thereby identifying the aforementioned first faulty unit.

[0201] S321: The training process for executing priority thresholds.

[0202] S322: Determine the risk priority of the first fault unit.

[0203] S323: The first fault unit with a risk priority higher than or equal to the priority threshold obtained through pre-training is designated as the second fault unit.

[0204] S324: Add the first fault unit corresponding to the target test item to the second fault unit.

[0205] S325: For at least one error-correcting code block, select a portion of the first fault units from the first fault units included in each error-correcting code block and add them to the second fault unit.

[0206] S326: Repair the second faulty unit.

[0207] S327: The first internal memory is used as the aforementioned second internal memory, and then proceed to S321.

[0208] The detailed descriptions of S301 to S327 above can be found in the foregoing description, and will not be repeated here. Furthermore, it should be noted that the order of the aforementioned different steps can be flexibly adjusted without interdependence, and this disclosure does not limit this.

[0209] Experiments have shown that, compared to the overall yield without error correction, the overall yield of the embodiments disclosed herein using error correction is improved by 20%, and the optimal internal memory ratio reaches over 50%. Furthermore, the error correction function can withstand over 30,000 single-bit failures (SBF) at high temperatures and over 20,000 single-bit failures at low temperatures.

[0210] Corresponding to the above method embodiments, Figure 8 This is a schematic diagram of the structure of an internal memory fault repair device provided in an embodiment of this disclosure. Please refer to... Figure 8 The aforementioned internal memory fault repair device 400 includes:

[0211] The first fault unit determination module 401 is used to determine the first fault unit of the main array in the first internal memory.

[0212] Risk priority determination module 402 is used to determine the risk priority of the first fault unit.

[0213] The second fault unit determination module 403 is used to identify the first fault unit whose risk priority is higher than or equal to the priority threshold obtained in pre-training as the second fault unit.

[0214] The second fault unit repair module 404 is used to repair the second fault unit.

[0215] In some implementations, it also includes:

[0216] The first unit adding module is used to add the first fault unit corresponding to the target test item to the second fault unit before repairing the second fault unit.

[0217] In some implementations, it also includes:

[0218] The second unit adding module is used to, before repairing the second fault unit, select a portion of the first fault units from the first fault units included in each error correction code block and add them to the second fault unit.

[0219] In some implementations, the first fault unit determining module is further configured to:

[0220] With the error correction function disabled, a fault test is performed on the main array in the first internal memory to obtain the first faulty unit.

[0221] In some implementations, the training process for the priority threshold includes:

[0222] The initialization module is used to initialize the current priority threshold.

[0223] A redundancy unit determination module is used to determine the number of redundant units required to repair the second internal memory based on the current priority threshold.

[0224] The yield determination module is used to determine the yield of the second internal memory after repair if the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to a first preset error, when the error correction function is turned on.

[0225] The priority threshold determination module is used to determine the current priority threshold as the priority threshold obtained by training if the absolute error between the yield and the preset yield is less than or equal to the second preset error.

[0226] In some implementations, the redundancy unit determination module is further configured to:

[0227] Determine the third faulty unit in the main array of the second internal memory, and the risk priority of the third faulty unit;

[0228] The third fault unit whose risk priority is higher than or equal to the current priority threshold is identified as the fourth fault unit;

[0229] The number of redundant units is determined based on the number of the fourth fault units.

[0230] In some implementations, the redundancy unit determination module is further configured to:

[0231] With the error correction function disabled, a fault test is performed on the main array of the second internal memory to obtain the third fault unit.

[0232] In some embodiments, the apparatus further includes:

[0233] The third unit adding module is used to add the third fault unit corresponding to the target test item to the fourth fault unit before determining the number of redundant units based on the number of the fourth fault units.

[0234] In some embodiments, the apparatus further includes:

[0235] The fourth unit adding module is used to select a portion of the third fault units from the third fault units included in each error correction code block and add them to the fourth fault unit before determining the number of redundant units based on the number of the fourth fault units.

[0236] In some embodiments, the apparatus further includes:

[0237] The first adjustment module is used to make a first adjustment to the current priority threshold if the absolute error between the number of redundant units and the maximum number of redundant units is greater than the first preset error.

[0238] In some implementations, the first adjustment module is further configured to:

[0239] If the number of redundant units is greater than the maximum number of redundant units, then the current priority threshold is increased;

[0240] If the number of redundant units is less than the maximum number of redundant units, then the current priority threshold is reduced.

[0241] In some implementations, it also includes:

[0242] The adjustment loop module is used to adjust the current priority threshold a second time if the absolute error between the yield rate and the preset yield rate is greater than the second preset error, and then proceed to the step of determining the number of redundant units required to repair the second internal memory based on the current priority threshold.

[0243] In some implementations, the adjustment cycle module is further configured to:

[0244] If the yield rate is greater than the preset yield rate, then the current priority threshold is increased;

[0245] If the yield rate is less than the preset yield rate, then the current priority threshold is reduced.

[0246] In some implementations, the yield determination module is further used for:

[0247] The repaired second internal memory is classified to determine the use cases of the second internal memory;

[0248] Determine the target test conditions based on the described use case;

[0249] With the error correction function enabled, the yield of the second internal memory is tested under the target test conditions.

[0250] In some embodiments, the apparatus further includes:

[0251] The second loop module is used to, after repairing the second faulty unit, use the first internal memory as the second internal memory and proceed to the step of testing the yield of the second internal memory under the target test conditions when the error correction function is enabled.

[0252] In some embodiments, the fault test includes at least one of the following: fault test with different test items, fault test with different test conditions, wherein the test conditions include at least one of the following: temperature, time, and voltage.

[0253] In some implementations, the risk priority is associated with at least one of the following: the test item corresponding to the faulty unit, the test conditions corresponding to the faulty unit, and the fault mode of the faulty unit.

[0254] The above-described apparatus embodiment is an embodiment corresponding to the foregoing method embodiment, and has the same technical effects as the method embodiment. A detailed description of this apparatus embodiment can be found in the detailed description of the foregoing method embodiment, and will not be repeated here.

[0255] Figure 9 This is a structural block diagram of an electronic device provided in an embodiment of the present disclosure. The electronic device 600 includes a memory 602 and at least one processor 601.

[0256] Among them, memory 602 stores computer-executed instructions.

[0257] At least one processor 601 executes computer execution instructions stored in memory 602, causing electronic device 601 to implement the aforementioned internal memory fault repair method.

[0258] In addition, the electronic device may also include a receiver 603 and a transmitter 604, wherein the receiver 603 is used to receive information from other devices or equipment and forward it to the processor 601, and the transmitter 604 is used to send information to other devices or equipment.

[0259] This disclosure also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a computing device, enable the computing device to implement a method for repairing internal memory faults.

[0260] This disclosure also provides a computer program product for executing the aforementioned internal memory fault repair method.

[0261] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0262] The sequence numbers of the embodiments disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0263] The above are merely preferred embodiments of the present disclosure and do not limit the patent scope of the present disclosure. Any equivalent structural or procedural transformations made based on the description and drawings of the present disclosure, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present disclosure.

Claims

1. A method for repairing faults in internal memory, characterized in that, The method includes: Identify the first faulty cell in the main array within the first internal memory; Determine the risk priority of the first fault unit; The first fault unit whose risk priority is higher than or equal to the priority threshold obtained through pre-training is designated as the second fault unit; Repair the second faulty unit; The training process for the priority threshold includes: Initialize the current priority threshold; The number of redundant units required to repair the second internal memory is determined based on the current priority threshold. If the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to the first preset error, then the yield rate of the second internal memory after repair is determined when the error correction function is enabled. If the absolute error between the yield rate and the preset yield rate is less than or equal to the second preset error, then the current priority threshold is determined as the priority threshold obtained through training.

2. The method according to claim 1, characterized in that, Before repairing the second faulty unit, the method further includes: Add the first fault unit corresponding to the target test item to the second fault unit.

3. The method according to claim 1, characterized in that, Before repairing the second faulty unit, the method further includes: For at least one error-correcting code block, a portion of the first fault units included in each error-correcting code block are selected and added to the second fault unit.

4. The method according to claim 1, characterized in that, The process of determining the first faulty cell of the main array in the first internal memory includes: With the error correction function disabled, a fault test is performed on the main array in the first internal memory to obtain the first faulty unit.

5. The method according to claim 4, characterized in that, Determining the number of redundant units required to repair the second internal memory based on the current priority threshold includes: Determine the third faulty unit in the main array of the second internal memory, and the risk priority of the third faulty unit; The third fault unit whose risk priority is higher than or equal to the current priority threshold is identified as the fourth fault unit; The number of redundant units is determined based on the number of the fourth fault units.

6. The method according to claim 5, characterized in that, The step of determining the third faulty unit in the main array of the second internal memory includes: With the error correction function disabled, a fault test is performed on the main array of the second internal memory to obtain the third fault unit.

7. The method according to claim 5, characterized in that, Before determining the number of redundant units based on the number of the fourth faulty units, the method further includes: Add the third fault unit corresponding to the target test item to the fourth fault unit.

8. The method according to claim 5, characterized in that, Before determining the number of redundant units based on the number of the fourth faulty units, the method further includes: For at least one error-correcting code block, a portion of the third fault units included in each error-correcting code block are selected and added to the fourth fault unit.

9. The method according to claim 4, characterized in that, The method further includes: If the absolute error between the number of redundant units and the maximum number of redundant units is greater than the first preset error, then the current priority threshold is adjusted for the first time.

10. The method according to claim 9, characterized in that, The first adjustment to the current priority threshold includes: If the number of redundant units is greater than the maximum number of redundant units, then the current priority threshold is increased; If the number of redundant units is less than the maximum number of redundant units, then the current priority threshold is reduced.

11. The method according to claim 1, characterized in that, Also includes: If the absolute error between the yield rate and the preset yield rate is greater than the second preset error, then the current priority threshold is adjusted for the second time, and the process proceeds to the step of determining the number of redundant units required to repair the second internal memory based on the current priority threshold.

12. The method according to claim 11, characterized in that, The second adjustment to the current priority threshold includes: If the yield rate is greater than the preset yield rate, then the current priority threshold is increased; If the yield rate is less than the preset yield rate, then the current priority threshold is reduced.

13. The method according to claim 1, characterized in that, Determining the yield of the repaired second internal memory when the error correction function is enabled includes: The repaired second internal memory is classified to determine the use cases of the second internal memory; Determine the target test conditions based on the described use case; With the error correction function enabled, the yield of the second internal memory is tested under the target test conditions.

14. The method according to claim 13, characterized in that, The method further includes: After the second faulty unit is repaired, the first internal memory is used as the second internal memory, and the process proceeds to the step of testing the yield of the second internal memory under the target test conditions when the error correction function is enabled.

15. The method according to claim 3 or 6, characterized in that, The fault test includes at least one of the following: fault test with different test items, fault test with different test conditions, wherein the test conditions include at least one of the following: temperature, time, and voltage.

16. The method according to any one of claims 1 to 14, characterized in that, The risk priority is associated with at least one of the following: the test item corresponding to the fault unit, the test conditions corresponding to the fault unit, and the fault mode of the fault unit.

17. A fault repair device for internal memory, characterized in that, include: The first fault unit determination module is used to determine the first fault unit of the main array in the first internal memory. The risk priority determination module is used to determine the risk priority of the first fault unit; The second fault unit determination module is used to identify the first fault unit whose risk priority is higher than or equal to the priority threshold obtained through pre-training as the second fault unit. The second fault unit repair module is used to repair the second fault unit; The training process for the priority threshold includes: Initialize the current priority threshold; The number of redundant units required to repair the second internal memory is determined based on the current priority threshold. If the absolute error between the number of redundant units and the maximum number of redundant units is less than or equal to the first preset error, then the yield rate of the second internal memory after repair is determined when the error correction function is enabled. If the absolute error between the yield rate and the preset yield rate is less than or equal to the second preset error, then the current priority threshold is determined as the priority threshold obtained through training.

18. An electronic device, characterized in that, include: At least one processor and memory; The memory stores computer-executed instructions; The at least one processor executes computer execution instructions stored in the memory, causing the electronic device to implement the method as described in any one of claims 1 to 16.

19. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a computing device, cause the computing device to implement the method as described in any one of claims 1 to 16.

20. A computer program product, characterized in that, The computer program product is used to perform the method according to any one of claims 1 to 16.

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