Super junction mosfet device drift region parabolic variable resistance model and modeling method

Abstract

The application relates to a super-junction MOSFET device drift region parabolic variable resistance model and a modeling method, which comprises the following steps: constructing a super-junction MOSFET circuit model, wherein the model is composed of a MOSFET, a drift region parabolic variable resistance, a body diode and a first resistance I and a first resistance II; resistance modeling is carried out on the drift region of the super-junction MOSFET device according to the physical structure parameters of the super-junction MOSFET, and a parabolic variable resistance model of the drift region is obtained by adopting a parabolic approximation; a Taylor polynomial is introduced to describe a self-heating first resistance model. The parameters of the drift region parabolic variable resistance model are obtained through the physical structure parameters of the super-junction MOSFET device, the parameters of a conventional MOSFET model, the parameters of a body diode model and the parameters of a self-heating first resistance model are obtained through actual measurement data of the device. The application can well simulate the characteristics of the super-junction MOSFET device in various working regions, and the simulation accuracy is high.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of simulation of semiconductor devices, in particular to a parabolic variable resistance model of a drift region of a super-junction MOSFET device and a modeling method. BACKGROUND

[0002] In recent years, thanks to the rapid development of computer technology, circuit simulation is more and more familiar and utilized by people, and gradually becomes an indispensable key link in circuit design. SPICE (Simulation Program for Integrated Circuits Emphasis) is developed by the Electronics Research Laboratory of the University of California, Berkeley in 1975, and integrated circuit design, PCB board level and system level design cannot be separated from SPICE simulation. Device model is regarded as a bridge connecting circuit design and process production. With the help of circuit simulator, a large number of virtual experiments-simulation can be carried out by using device model to predict the performance of the circuit, so as to improve the design efficiency and reduce the design cost.

[0003] The accuracy of the device model directly affects the results of circuit behavior simulation and performance evaluation; however, the traditional MOSFET model is designed for small power MOS devices with lateral structure, and cannot accurately describe the characteristics of power super-junction MOSFET devices. When the circuit design is applied to super-junction MOSFET devices, the simulation result is greatly deviated; therefore, one or more methods are needed to solve the above problems. SUMMARY

[0004] The present application is aimed at the problem that the traditional MOSFET model cannot accurately describe the characteristics of super-junction MOSFET devices. On the one hand, a parabolic variable resistance model of a drift region of a super-junction MOSFET device is provided; on the other hand, a modeling method of a super-junction MOSFET device is provided, and the specific technical solutions are as follows.

[0005] A parabolic variable resistance model of a drift region of a super-junction MOSFET device, comprising:

[0006] MOSFET 1, parabolic variable resistance 2 of the drift region, body diode 3 and first resistance I 41, first resistance II 42;

[0007] According to the moving characteristics of the carriers between the source, the gate, the source region and the well region of the super-junction MOSFET device, the source, the gate, the source region and the well region are equivalent to a MOSFET 1; according to the moving characteristics of the carriers between the JFET region and the N column of the super-junction MOSFET device, the two regions of the JFET region and the N column are equivalent to a drift region parabolic variable resistance 2 in parallel with a first resistance I 41; the substrate of the super-junction MOSFET device is equivalent to a first resistance II 42; according to the moving characteristics of the carriers between the well region, the P column and the N column of the super-junction MOSFET device, the regions of the well region, the P column and the N column are equivalent to a body diode 3;

[0008] The drain 12 of the MOSFET is connected with the first end of the drift region parabolic variable resistance 2; the source 11 of the MOSFET is connected with the positive electrode of the body diode 3; the first end of the first resistance I 41 is connected with the second end of the drift region parabolic variable resistance 2, and the second end of the first resistance I 41 is connected with the first end of the first resistance II 42; the second end of the first resistance II 42 is connected with the negative electrode of the body diode 3.

[0009] The gate 51 of the MOSFET gate lead-out circuit model, the source 11 of the MOSFET is connected with the positive electrode of the body diode 3; the first end of the first resistance I 41 is connected with the second end of the drift region parabolic variable resistance 2, and the second end of the first resistance I 41 is connected with the first end of the first resistance II 42; the second end of the first resistance II 42 is connected with the negative electrode of the body diode 3.

[0010] As a preferred mode, the first resistance I 41 is a voltage-controlled resistance; the first resistance II 42 is a constant resistance, and the first resistance I and the first resistance II are equivalent to a first resistance, and the first resistance is actually a temperature-controlled resistance.

[0011] The application also provides a super-junction MOSFET device modeling method, comprising the following steps:

[0012] (1) constructing a super-junction MOSFET circuit model topology structure;

[0013] (2) performing resistance modeling on the drift region of the super-junction MOSFET, obtaining a drift region parabolic variable resistance model by using a parabolic approximation; introducing a Taylor polynomial to describe a device self-heating effect first resistance model;

[0014] (3) obtaining the drift region parabolic variable resistance model parameters through the physical structure parameters of the super-junction MOSFET device, obtaining the MOSFET model parameters, the body diode model parameters and the self-heating first resistance model parameters through the measured data of the device.

[0015] As a preferred mode, the drift region parabolic variable resistance model in step (2) is calculated and derived through a physical formula, and the derivation mode is as follows:

[0016] Because the resistance of JFET region also changes with the drain voltage, in order to make the model continuous, the super junction structure will be simplified in the model building process. When the super junction MOSFET is normally turned on, the device resistance is mainly composed of channel region resistance R ch , JFET resistance R JFET and N column drift region resistance R Drift , other resistances such as source region resistance R N+ , substrate resistance R sub and metal resistance can be ignored, so the total resistance R on of the device when turned on can be expressed as

[0017] R on =R ch +R JFET +R Drift

[0018] When the super junction MOSFET is turned on, for any height y position in the drift region, the potential V(y) can be expressed by the voltage division formula of series resistance as

[0019]

[0020] In the formula, R(y) is the resistance value of the drift region from 0 to height y, V ds is the drain-source voltage, R ch is the channel region resistance, and R varied is the parabolic variable resistance of the drift region. When the gate voltage is near the threshold voltage, the change of the variable resistance can be ignored relative to the channel resistance, at this time the variable resistance is regarded as a constant R0, and when the gate voltage increases to the point that the channel carrier surface scattering is dominant, with the increase of the drain voltage, the channel resistance can be regarded as zero relative to the variable resistance of the drift region, so the potential at height y is

[0021]

[0022] Considering the charge balance of PN column, when the width of PN column is the same, the doping concentration N P of P column is equal to the doping concentration N N of N column, at this time the width of P column in the N column depletion region at the same height y can be obtained as

[0023]

[0024] In the formula, N Drift is the doping concentration of the drift region, which is equal to the doping concentration of P and N column, V bi is the built-in potential of PN junction, and ε siwhere k is the dielectric constant of silicon, q is the charge, and 2W is the total width of the depletion region at the height of y for the entire cell DN where W(y) is the width of the current at the height of y i (y) is

[0025]

[0026] where W cell is the cell width of the super-junction MOSFET, and through the above analysis, it is easy to know that the path of the current flowing from the bottom of the drift region to the top of the drift region is from narrow to wide. Taking the depletion line as a parabola with the top axis of the N-column as the vertex, it is easy to know that the parabola opens upward, and passes through two points A, B, which are the highest point of the depletion line on the right side of the N-column and the lowest point of the depletion line on the right side of the N-column. Taking the middle axis as the y-axis and downward as the positive direction, the expression of the parabola is

[0027] y = Px 2 + Q

[0028] where P and Q are both constants, and it is easy to know that the coordinates of the two points A and B are (W top / 2, 0) and (W bot / 2, H) respectively, H is the thickness of the epitaxial layer of the super-junction MOSFET, W top is the width of the current at the height of 0, and W bot is the width of the current at the height of H. Thus, P and Q can be obtained by the method of undetermined coefficients, which are 4H / (W bot 2 -W top 2 ), W top 2 H / (W top 2 -W bot 2 respectively; thus, the above formula can be expressed as

[0029]

[0030] Therefore, the width of the current of the drift region at the height of y is

[0031]

[0032] Therefore, the size of the resistance dR(y) at the height of y can be expressed as

[0033]

[0034] where Z is the length of the super-junction MOSFET cell along the vertical direction, and μ nTo find the electron mobility, we integrate along the resistance dR(y) from 0 to y to obtain the variable resistance R in the drift region. varied With drain voltage V ds The expression is

[0035]

[0036] As a preferred method, the measured data in step (3) includes: output characteristic curve, transfer characteristic curve and body diode current-voltage curve.

[0037] As a preferred method, simulation is performed using the SPICE simulation circuit simulator.

[0038] The beneficial effects of this invention are as follows: This invention provides a parabolic variable resistance model and modeling method for the drift region of a superjunction MOSFET device. It simulates the structure of the superjunction MOSFET device as an equivalent simulation, which can effectively simulate the characteristics of the superjunction MOSFET device in each working region. The simulation accuracy is high, it can fit the measured data of the superjunction MOSFET well, and it is applicable to all superjunction MOSFET devices. Attached Figure Description

[0039] Figure 1 This is a flowchart of the simulation method for the superjunction MOSFET device of the present invention.

[0040] Figure 2 This is a schematic diagram of the cell structure of the superjunction MOSFET device of the present invention.

[0041] Figure 3 This is a schematic diagram of the circuit model structure of the superjunction MOSFET device of the present invention.

[0042] Appendix Figure 2 Notation: P represents the P-pillar of the superjunction MOSFET, N represents the N-pillar of the superjunction MOSFET, P+ represents the ohmic contact region of the superjunction MOSFET, N+ represents the source region of the superjunction MOSFET, P-body represents the body region of the superjunction MOSFET, N+sub represents the substrate of the superjunction MOSFET, W... i (y) represents the width of the current at a height of y. Point A is the highest point of the parabola passing through the depletion line on the right side of the N-pillar, and point B is the lowest point of the parabola passing through the depletion line on the right side of the N-pillar. O is the origin of the coordinate system, Gate is the superjunction gate, Source is the superjunction source, and Drain is the superjunction drain.

[0043] Appendix Figure 3Mark: 1 is MOSFET; 11 is MOSFET source; 12 is MOSFET drain; 2 is drift region parabolic variable resistance; 3 is body diode; 41 is first resistance I; 42 is first resistance II; 51 is circuit model gate; 52 is circuit model source; 53 is circuit model drain. DETAILED DESCRIPTION

[0044] The present application is described herein with reference to specific embodiments thereof which are illustrated in the attached drawings. These embodiments are described in detail to enable those skilled in the art to practice the application, and will provide embodiments of the application to support the claims hereinafter. Those skilled in the art will understand that not all of the features and / or aspects of the embodiments are necessary to practice the application, and thus other embodiments of the application encompass substitutions, permutations, additions and a like of the described or claimed features and / or aspects. Numerous specific details of the application are described herein in order to provide a thorough understanding of the application. The various connections between elements are not limited to direct connections, but include indirect "electrical" connections between or more other elements, and it will be apparent that many modifications, additions, substitutions, and changes can be made to the application, and in some instances, not all of these will serve as the basis for claims, but will serve to convey the spirit of the application.

[0045] Embodiment 1

[0046] The present embodiment provides a super-junction MOSFET device drift region parabolic variable resistance model, comprising:

[0047] MOSFET 1, drift region parabolic variable resistance 2, body diode 3, and first resistance I 41 and first resistance II 42;

[0048] According to the movement characteristics of the carriers between the source, gate, source region and well region of the super-junction MOSFET device, the source, gate, source region and well region are equivalent to MOSFET 1; according to the movement characteristics of the carriers between the JFET region and N column of the super-junction MOSFET device, the two regions of the JFET region and the N column are equivalent to the parallel connection of the drift region parabolic variable resistance 2 and the first resistance I 41; the substrate of the super-junction MOSFET device is equivalent to the first resistance II 42; according to the movement characteristics of the carriers between the well region, P column and N column of the super-junction MOSFET device, the well region, P column and N column region are equivalent to the body diode 3;

[0049] The drain 12 of the MOSFET is connected with the first end of the drift region parabolic variable resistance 2; the MOSFET source 11 is connected with the positive electrode of the body diode 3; the first end of the first resistance I 41 is connected with the second end of the drift region parabolic variable resistance 2, and the second end of the first resistance I 41 is connected with the first end of the first resistance II 42; the second end of the first resistance II 42 is connected with the negative electrode of the body diode 3;

[0050] The MOSFET gate leads out the circuit model gate 51, the MOSFET source 11 leads out the circuit model source 52, and the negative electrode of the body diode 3 leads out the circuit model drain 53.

[0051] The first resistance I41 is a voltage-controlled resistance; the first resistance II 42 is a constant resistance; the first resistance I41 and the first resistance II 42 are equivalent to a first resistance; and the first resistance is actually a temperature-controlled resistance.

[0052] Embodiment 2

[0053] The embodiment provides a super-junction MOSFET device modeling method, comprising the following steps:

[0054] (1) constructing a super-junction MOSFET circuit model topology structure;

[0055] (2) modeling a drift region of the super-junction MOSFET, adopting a parabolic approximation to obtain a drift region parabolic variable resistance model; and introducing a Taylor polynomial to describe a first resistance model of a self-heating effect of the device;

[0056] (3) obtaining a drift region parabolic variable resistance model parameter through a physical structure parameter of the super-junction MOSFET device, obtaining a MOSFET model parameter, a body diode model parameter and a self-heating first resistance model parameter through measured data of the device.

[0057] Embodiment 3

[0058] In the example embodiment, a super-junction MOSFET device modeling method is provided; as shown in Figure 1 , the method specifically comprises the following steps:

[0059] S1, constructing a super-junction MOSFET circuit model topology structure, wherein the super-junction MOSFET circuit model comprises a MOSFET 1, a drift region parabolic variable resistance 2, a body diode 3, a first resistance I 41 and a first resistance II 42;

[0060] According to the movement characteristics of carriers between a source, a gate, a source region and a well region of the super-junction MOSFET device, the source, the gate, the source region and the well region are equivalent to the MOSFET 1; according to the movement characteristics of carriers between a JFET region and an N column of the super-junction MOSFET device, the JFET region and the N column are equivalent to the drift region parabolic variable resistance 2 and the first resistance I 41 in parallel; a substrate of the super-junction MOSFET device is equivalent to the first resistance II 42; and according to the movement characteristics of carriers between the well region, a P column and an N column of the super-junction MOSFET device, the well region, the P column and the N column are equivalent to the body diode 3;

[0061] The drain 12 of the MOSFET is connected with the first end of the drift region parabolic variable resistor 2; the source 11 of the MOSFET is connected with the positive electrode of the body diode 3; the first end of the first resistor I 41 is connected with the second end of the drift region parabolic variable resistor 2, and the second end of the first resistor I 41 is connected with the first end of the first resistor II 42; the second end of the first resistor II 42 is connected with the negative electrode of the body diode 3;

[0062] The MOSFET gate lead-out circuit model gate 51, the MOSFET source 11 lead-out circuit model source 52, the body diode 3 negative electrode lead-out circuit model drain 53.

[0063] S2, the JFET region and the drift region of the super junction MOSFET are modeled by resistance, and the drift region parabolic variable resistance model is obtained by using parabolic approximation; Taylor polynomial is introduced to describe the first resistance model of the self-heating effect of the device. The drift region parabolic variable resistance model is calculated by physical formula, and the derivation method is as follows:

[0064] Because the resistance of the JFET region also changes with the change of the drain voltage, in order to make the model continuous, the super junction structure will be simplified in the process of model establishment. When the super junction MOSFET is normally turned on, the resistance of the device is mainly composed of the channel region resistance R ch , the JFET resistance R JFET and the N column drift region resistance R Drift , other resistances such as the source region resistance R N+ , the substrate resistance R sub and the metal resistance can be ignored, so the total resistance R on of the device when turned on can be represented as

[0065] R on =R ch +R JFET +R Drift

[0066] When the super junction MOSFET is turned on, for any height y position in the drift region, the potential V(y) size can be represented by the voltage division formula of series resistance as

[0067]

[0068] In the formula, R(y) is the resistance value of the drift region from 0 to the height y, V ds is the drain-source voltage, R ch is the channel region resistance, R variedThe variable resistance of the drift region is a parabola. When the gate voltage is near the threshold voltage, the change of the variable resistance is negligible compared with the channel resistance, and the variable resistance is regarded as a constant R0. When the gate voltage increases to the point where the surface scattering of the channel carriers is dominant, the channel resistance is regarded as zero compared with the variable resistance of the drift region, and the potential at the height y is

[0069]

[0070] Considering the charge balance of the PN pillars, when the widths of the PN pillars are the same, the doping concentration N P of the P pillar is equal to the doping concentration N N of the N pillar, and the width of the depletion region of the N pillar at the same height y can be obtained as

[0071]

[0072] where N Drift is the doping concentration of the drift region, which is equal to the doping concentrations of the P and N pillars. V bi is the built-in potential of the PN junction, ε si is the dielectric constant of silicon, and q is the charge amount. For the entire cell, the total width of the depletion region at the height y of the N pillar is 2W DN (y), and the width W i (y) of the current at the height is

[0073]

[0074] where W cell is the cell width of the super-junction MOSFET. Through the above analysis, it is easy to know that the path of the current flowing from the bottom of the drift region to the top of the drift region is from narrow to wide. The depletion line is regarded as a parabola with the top axis of the N pillar as the vertex, and it is easy to know that the parabola opens upward and passes through the highest point A of the right depletion line of the N pillar and the lowest point B of the right depletion line of the N pillar. Taking the middle axis as the y-axis and the downward direction as the positive direction, the expression of the parabola is

[0075] y = Px 2 + Q

[0076] where P and Q are constants, and it is easy to know that the coordinates of the two points A and B are (W top / 2, 0) and (W bot / 2, H), respectively. H is the thickness of the epitaxial layer of the super-junction MOSFET, W top is the width of the current at the height of 0, and W bot is the width of the current at the height of H. Thus, P and Q can be obtained by the method of undetermined coefficients as 4H / (W bot 2 -Wtop 2 ), W top 2 H / (W top 2 -W bot 2 ). Thus the above equation can be expressed as

[0077]

[0078] Therefore, the current width of the drift region at the height y position is

[0079]

[0080] Therefore, the resistance dR(y) size at the height y position can be expressed as

[0081]

[0082] Where Z is the length of the super junction MOSFET cell along the vertical direction, μ n The electron mobility, along the resistance dR(y) from 0 to y, the drift region variable resistance R varied And the drain voltage V ds The expression is

[0083]

[0084] Because of the existence of self-heating effect of super junction MOSFET device: when the gate and drain voltage of super junction MOSFET device is large enough that the power consumption generated by the working current cannot be dissipated in time, at this time the temperature of super junction MOSFET device will rise, and the temperature has a significant impact on super junction MOSFET device, it will make the carrier mobility of the drift region decrease, so that the drift region resistance of super junction MOSFET device when the forward is turned on will increase with the temperature rise, and this resistance has a relationship with the gate and drain voltage of super junction MOSFET device, therefore, using the first resistance model 141 equivalent to the resistance of super junction MOSFET device, the first resistance model 141 is a voltage controlled resistance model, which is fitted by Taylor polynomial to establish a voltage controlled resistance model;

[0085] S3, the physical structure parameters of the super junction MOSFET device are obtained, the MOSFET model parameters, the body diode model parameters and the self-heating first resistance model parameters are obtained through the measured data of the device. According to the output characteristic curve of the parabolic region of super junction MOSFET device, the model parameters K p , V th , K p The intrinsic conductivity factor of MOSFET model 1, Vth This represents the threshold voltage of MOSFET model 1;

[0086] When the gate voltage of a superjunction MOSFET device satisfies the condition that the device is operating in the saturation region, the channel resistance of the superjunction MOSFET device is very large, and the drift region resistance is relatively negligible. In this case, MOSFET Model 1 dominates, and the following current-voltage model formulas apply.

[0087] I ds =K P / 2(V gs -V th ) 2

[0088] In the formula, I ds K is the drain-source current of MOSFET1. p V is the intrinsic conductivity factor of MOSFET1. gs V is the gate-source voltage of MOSFET1. th This is the threshold voltage of MOSFET1;

[0089] When the gate voltage of a superjunction MOSFET is high enough that the superjunction MOSFET will not experience a saturation region, as the drain voltage increases, the superjunction MOSFET will experience a quasi-saturation region. At this time, the channel resistance of the superjunction MOSFET is very small, and the drain voltage of the superjunction MOSFET is concentrated in the drift region. At this time, the parabolic variable resistance model of the drift region dominates, and the parameters of the parabolic variable resistance model of the drift region are determined by the physical structure parameters of the superjunction MOSFET.

[0090] The model parameters in the Taylor polynomial of the first resistor model I are fitted based on the current and voltage data when the self-heating effect occurs; the parameters N and I of the body diode 3 are determined based on the source-drain forward bias current and voltage of the superjunction MOSFET device. S IK and the parasitic resistance of body diode 3; N is the emission coefficient of body diode 3, IS is the reverse saturation current of body diode 3, IK characterizes the current decay of body diode 3 under large injection conditions; the parasitic capacitance is R. S .

[0091] For body diode 3, the following current formula applies.

[0092]

[0093]

[0094] In the formula, I d For the body diode 3 current under large injection conditions, I d1is the body diode 3 current without large injection, IK represents the current recession degree of the body diode 3 under large injection, I S is the body diode 3 reverse saturation current, V d is the body diode 3 voltage, N is the body diode 3 emission coefficient, V T is the thermal voltage, J S is the body diode 3 reverse saturation current per unit area (in the bottom surface direction), J SW is the body diode 3 reverse saturation current per unit length (in the circumference direction). Area and PJ are the junction area and length of the body diode 3, respectively.

[0095] The model parameters N, IK and the parasitic resistance R of the body diode 3 are determined according to the current-voltage curve of the source-drain positive bias of the super-junction MOSFET device. S S The specific extraction method is to compare the model simulation curve with the measured curve, and constantly adjust the parameters of the body diode 3 so that the model simulation curve and the measured curve can be perfectly fitted.

[0096] In the embodiment of the present example, the super-junction MOSFET device is simulated by using a SPICE simulator.

[0097] The super-junction MOSFET device drift region parabolic variable resistance model and modeling method provided in the embodiment of the present example is equivalent to the corresponding simulation from the structural level of the super-junction MOSFET device, which can effectively simulate the characteristics of the super-junction MOSFET device in each working region, has high simulation accuracy, can well fit the measured data of the super-junction MOSFET, and is suitable for all super-junction MOSFET devices.

[0098] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical thought of the present application should be covered by the claims of the present application.​

Claims

1. A method of modeling a super junction MOSFET device, the method comprising: It comprises the following steps: (1) constructing a super-junction MOSFET circuit model topology structure; (2) performing resistance modeling on the drift region of the super-junction MOSFET, and obtaining a drift region parabolic variable resistance model by using a parabolic approximation; a Taylor polynomial is introduced to describe the first resistance model of the self-heating effect of the device; The drift region parabolic variable resistance model comprises: MOSFET (1), drift region parabolic variable resistance (2), body diode (3), and first resistance I (41) and first resistance II (42); According to the movement characteristics of the carriers between the source, gate, source region and well region of the super-junction MOSFET device, the source, gate, source region and well region are equivalent to the MOSFET (1); according to the movement characteristics of the carriers between the JFET region and N column of the super-junction MOSFET device, the JFET region and N column are equivalent to the drift region parabolic variable resistance (2) and the first resistance I (41) in series; the substrate of the super-junction MOSFET device is equivalent to the first resistance II (42); according to the movement characteristics of the carriers between the well region, P column and N column of the super-junction MOSFET device, the well region, P column and N column are equivalent to the body diode (3); The drain (12) of the MOSFET is connected with the first end of the drift region parabolic variable resistance (2); the source (11) of the MOSFET is connected with the positive electrode of the body diode (3); the first end of the first resistance I (41) is connected with the second end of the drift region parabolic variable resistance (2), and the second end of the first resistance I (41) is connected with the first end of the first resistance II (42); the second end of the first resistance II (42) is connected with the negative electrode of the body diode (3); The MOSFET gate (51) is led out from the circuit model gate, the MOSFET source (11) is led out from the circuit model source, and the body diode (3) negative electrode is led out from the circuit model drain (53); (3) obtaining the drift region parabolic variable resistance model parameters through the physical structure parameters of the super-junction MOSFET device, obtaining the MOSFET model parameters, the body diode model parameters and the self-heating first resistance model parameters through the measured data of the device; The drift region parabolic variable resistance (2) in step (2) is calculated by a physical formula, and the derivation method is as follows: Because the resistance of JFET region also changes with the drain voltage, in order to make the model continuous, the super-junction structure will be simplified in the model building process. When the super-junction MOSFET is normally turned on, the device resistance is mainly composed of channel region resistance R ch , JFET resistance R JFET and N-column drift region resistance R Drift , and the source region resistance R N+ , substrate resistance R sub and metal resistance are ignored, so the total resistance R on of the device when turned on is represented as When the super-junction MOSFET is turned on, for any height y position in the drift region, the potential V(y) is represented by the voltage division formula of the series resistance as where R(y) is the resistance of the drift region from 0 to height y, V ds is the drain-source voltage, R ch is the channel resistance, R varied is the parabolic variable resistance of the drift region; when the gate voltage is near the threshold voltage, the change in the variable resistance is negligible compared to the channel resistance, so the variable resistance is considered a constant R0, and when the gate voltage increases to the point where the surface scattering of the channel carriers dominates, the channel resistance is considered zero compared to the variable resistance of the drift region, so the potential at height y is Considering the PN pillar charge balance, when the PN pillar width is the same, then the doping concentration N of the P pillar is equal to the doping concentration N of the N pillar P The doping concentration N of the N pillar is equal to the doping concentration N of the P pillar N At this time, the PN pillar at the same height y in the N pillar is the width of the depletion region where N Drift is the doping concentration of the drift region, which is equal to the doping concentration of the P and N pillars, V bi is the built-in potential of the PN junction, ε si is the dielectric constant of silicon, q is the charge, and for the entire cell, the total width of the depletion region at a height of y in the N pillar is 2W DN (y), then the current width W i (y) is wherein W cell is the cell width of the super junction MOSFET, the path of the current from the bottom of the drift region to the top of the drift region is from narrow to wide, the depletion line is regarded as a parabola with the top point on the axis of the N-pillar, the parabola opens upward, and passes through two points A, the highest point of the right side depletion line of the N-pillar, and B, the lowest point of the right side depletion line of the N-pillar, the axis is regarded as the y-axis and the downward direction is positive, then the expression of the parabola is wherein P and Q are constants, and the coordinates of points A and B are (W / 2, 0) and (W / 2, H) respectively, H is the thickness of the epitaxial layer of the super-junction MOSFET, W is the width of the current at a height of 0, and W is the width of the current at a height of H, so that P and Q are obtained by the method of undetermined coefficients as 4H / (W top bot top bot bot 2 top 2 top 2 top 2 bot 2 ; thus the above formula is represented as​​​​​​​​ Therefore, the current width of the drift region at the height y position is Therefore, the resistance dR(y) at the height y position is represented as where Z is the length of the super-junction MOSFET cell along the vertical direction, μ n is the electron mobility, and R is the variable resistance of the drift region, obtained by integrating the resistance dR(y) from 0 to y varied and the drain voltage V ds is given by 。 2. The method of claim 1, wherein, The measured data in step (3) comprises output characteristic curves, transfer characteristic curves and body diode current-voltage curves.

3. The modeling method of a super junction MOSFET device according to claim 1, wherein, Simulation is performed by using a simulation circuit simulator SPICE.

4. The method of claim 1, wherein: The first resistance I (41) is a voltage-controlled resistance; the first resistance II (42) is a constant resistance, and the first resistance I (41) and the first resistance II (42) are equivalent to the first resistance, which is actually a temperature-controlled resistance.

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