A delay compensation method for strapdown inertial navigation system synchronization with external clock

Abstract

The present invention discloses a delay compensation method for synchronizing a strapdown inertial navigation system with an external clock. A navigation computer utilizes an FPGA module and a DSP module in conjunction with each other to achieve delay compensation for the strapdown inertial navigation system clock synchronization. The present invention utilizes the FPGA module and DSP module in the navigation computer in conjunction with each other. Because the internal clock is not affected by the external clock, even if the external clock experiences abnormal jitter, it will not affect the internal clock, nor will it affect normal navigation calculations. The clock is soft-synchronized by the delay compensation module, achieving delay compensation for the inertial navigation system clock synchronization.

Description

Technical Field

[0001] The present invention relates to the technical field of inertial navigation, and in particular to a delay compensation method for synchronization of a strapdown inertial navigation system with an external clock. Background Art

[0002] During the use of strapdown inertial navigation, due to sensor acquisition, solution, and transmission delays, the carrier attitude and heading angle information output by the strapdown inertial navigation under dynamic conditions is not the attitude and heading information of the carrier's current spatial position at the moment, and may be ahead or behind. This is because the strapdown inertial navigation is not synchronized with the system time. Currently, the commonly used method is to use an external clock to align the internal clock with the rising or falling edge of the external clock through hardware to achieve time synchronization. The disadvantage of this method is that the external clock may have anomalies. For example, if the external clock is intermittent or interfered with, the internal clock will be affected at the same time. This will cause changes in the strapdown inertial navigation sampling data and solution cycle, resulting in navigation solution anomalies. Summary of the Invention

[0003] In view of the above-mentioned deficiencies in the prior art, the object of the present invention is to provide a delay compensation method for synchronizing a strapdown inertial navigation system with an external clock, so as to solve the problem of inaccurate synchronization between the internal and external system clocks of the inertial navigation system in the prior art.

[0004] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0005] A delay compensation method for synchronizing a strapdown inertial navigation system with an external clock is implemented by cooperating with an FPGA module and a DSP module, and specifically includes the following steps:

[0006] (1) The FPGA module generates an internal clock signal and an IMU sampling trigger clock. At the same time, the IMU sampling trigger clock triggers the DSP's external interrupt 1.

[0007] (2) After the FPGA module obtains the external clock signal, it processes the delay count between the external clock signal and the internal clock signal, and sends the value of the delay count to the DSP module through the EMIF bus; it triggers the interrupt 2 signal to the DSP module;

[0008] (3) After the DPS module obtains the value of the delay count, it compensates for the attitude delay error through the delay compensation model and outputs the navigation data of the compensated attitude and navigation solution.

[0009] Preferably, the delay compensation model obtains the attitude angle at the current external clock departure time through the following formula:

[0010] The attitude angle at the current external clock departure time: Q bn1 =Q bn *Q t *Q△t ;

[0011] Among them, Q bn1 Q is the attitude quaternion output after compensation. bn Solve the attitude quaternion for the normal internal clock, Q t The arrival time of the external clock, that is, the rotation quaternion of the difference between the external and internal clocks, Q △t is the delayed quaternion.

[0012] Preferably, the Q t The value is obtained by the acquisition unit of the inertial measurement unit (IMU) from the completion of the navigation solution to the current moment, and the gyro output angle increment is converted into a rotation quaternion.

[0013] Preferably, the Q △t The angular increment is obtained by integrating the gyro angular velocity value within the current minimum acquisition period with the delay time, and then converted into a rotation quaternion.

[0014] Compared with the prior art, the present invention has the following beneficial effects:

[0015] The present invention utilizes the cooperation of the FPGA module and the DSP module in the navigation computer. Since the internal clock is not interfered with by the external clock, even if the external clock jitters abnormally, it will not affect the internal clock. The clock is soft-synchronized through the delay compensation model to achieve inertial navigation clock synchronization delay compensation. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 The present invention is a flowchart of a delay compensation method for synchronizing a strapdown inertial navigation system with an external clock. DETAILED DESCRIPTION

[0017] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0018] The present invention provides a delay compensation method for strapdown inertial navigation system synchronization with an external clock, such as Figure 1 As shown in the figure, the navigation computer realizes the inertial navigation clock synchronization delay compensation through the cooperation of FPGA module and DSP module, which includes the following steps:

[0019] (1) The FPGA module generates an internal clock signal and an IMU sampling trigger clock. At the same time, the IMU sampling trigger clock triggers the DSP's external interrupt 1.

[0020] (2) After the FPGA module obtains the external clock signal, it processes the delay count between the external clock signal and the internal clock signal, and sends the value of the delay count to the DSP module through the EMIF bus; it triggers the interrupt 2 signal to the DSP module;

[0021] (3) After the DPS module obtains the value of the delay count, it compensates for the attitude delay error through the delay compensation model and outputs the navigation data of the compensated attitude and navigation solution.

[0022] In specific implementation, the attitude quaternion updated by normal navigation solution and the external clock are used to sample the rotation quaternion at all times using the gyro, and the time difference (delay) between the external clock and the inertial measurement unit sampling clock is multiplied by the rotation quaternion to obtain the attitude angle at the current external clock triggering moment. The delay compensation model obtains the attitude angle at the current external clock departure moment through the following formula:

[0023] The attitude angle at the current external clock departure time: Q bn1 =Q bn *Q t *Q △t ;

[0024] Among them, Q bn1 Q is the attitude quaternion output after compensation. bn Solve the attitude quaternion for the normal internal clock, Q t The quaternion is rotated when the external clock arrives, Q △t is the delayed quaternion. t The value is obtained by the acquisition unit of the inertial measurement unit from the completion of the navigation solution to the current moment, and the gyro output angle increment is converted into a rotation quaternion. △t The angular increment is obtained by integrating the gyro angular velocity value within the current minimum acquisition period with the delay time, and then converted into a rotation quaternion.

[0025] The present invention utilizes the cooperation of the FPGA module and the DSP module in the navigation computer. Since the internal clock is not interfered by the external clock, even if the external clock jitters abnormally, it will not affect the internal clock. The clock is soft-synchronized through the delay compensation module to achieve inertial navigation clock synchronization delay compensation.

[0026] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit the technical solutions. Those skilled in the art should understand that modifications or equivalent replacements of the technical solutions of the present invention that do not depart from the purpose and scope of the technical solutions of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A delay compensation method for synchronizing a strapdown inertial navigation system with an external clock, characterized in that: This is achieved through the cooperation of the FPGA module and the DSP module, specifically including the following steps: (1) The FPGA module generates an internal clock signal and an IMU sampling trigger clock. At the same time, the IMU sampling trigger clock triggers the DSP's external interrupt 1. (2) After the FPGA module obtains the external clock signal, it processes the delay count between the external clock signal and the internal clock signal, and sends the value of the delay count to the DSP module through the EMIF bus; it triggers the interrupt 2 signal to the DSP module; (3) After the DPS module obtains the value of the delay count, it compensates the attitude delay error through the delay compensation model and outputs the navigation data of the compensated attitude and navigation solution; The delay compensation model obtains the attitude angle at the current external clock departure time through the following formula: The attitude angle at the current external clock departure time: Q bn1 =Q bn *Q t *Q △t ; Among them, Q bn1 Q is the attitude quaternion output after compensation. bn Solve the attitude quaternion for the normal internal clock, Q t The rotation quaternion of the difference between the external and internal clocks at the time of arrival of the external clock, Q △t is the delayed quaternion; The Q t The value is obtained by the acquisition unit of the inertial measurement unit from the completion of the navigation solution to the current moment, and the gyro output angle increment is converted into a rotation quaternion; The Q △t The angular increment is obtained by integrating the gyro angular velocity value within the current minimum acquisition period with the delay time, and then converted into a rotation quaternion.

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