Fault detection circuit, method and chip for signal transmission line

Abstract

The present invention discloses a fault detection circuit, method, chip, electronic device and vehicle for a signal transmission line. The fault detection circuit is arranged in a system-level chip, and includes a signal generation branch and a first detection branch. The signal generation branch has a synchronizer module and a functional module that are the same as the signal transmission line, wherein the functional module is used to receive an IO signal through the synchronizer module and process the received IO signal. The first detection branch is connected between the output end of the synchronizer circuit module of the signal transmission line and the output end of the synchronizer circuit module of the signal generation branch. Thus, the signal transmission line is judged for faults according to the first signal relationship between the first intermediate signal at the output end of the synchronizer module of the signal transmission line and the first generation signal at the output end of the synchronizer module of the signal generation branch through the first detection branch, and the signal transmitted by the signal transmission line is monitored in real time.

Description

Technical Field

[0001] The present invention relates to the field of microprocessor technology, and in particular to a fault detection circuit, method, chip, electronic equipment and vehicle for a signal transmission line. Background Art

[0002] With the popularity of smart devices, the use requirements of chips are getting higher and higher. Chips are usually equipped with a large number of IO (Input Output) signal transmission lines to connect to peripheral devices. How to ensure the correctness of IO signals during the transmission process within the entire chip and how to effectively detect IO signals in real time are very critical factors for a high-functional safety chip and the system using these chips. Especially for input signals with high importance, in order to ensure the accuracy of signal transmission, it is necessary to monitor the signal transmission line in real time so that any circuit failure or signal interference in the signal path can be detected and reported in real time. Summary of the invention

[0003] In order to solve the above problems, the embodiments of the present invention provide a fault detection circuit, method, chip, electronic device and vehicle for a signal transmission line.

[0004] According to a first aspect of the present invention, a fault detection circuit for a signal transmission line is provided, and the fault detection circuit is arranged in a system-level chip, comprising: a signal generating branch, having a synchronizer module and a functional module which are the same as those of the signal transmission line, and the functional module is used to receive an IO signal through the synchronizer module and process the received IO signal; a first detection branch, connected between an output end of the synchronizer circuit module of the signal transmission line and an output end of the synchronizer circuit module of the signal generating branch, comprising: a first detection module, used to determine a first signal relationship between a first intermediate signal at an output end of the synchronizer module of the signal transmission line and a first generating signal at an output end of the synchronizer module of the signal generating branch, and to perform fault determination on the signal transmission line based on the first signal relationship; and a first error injection module, used to determine a working state of the first detection module.

[0005] According to one embodiment of the present invention, the first detection module is an inequality comparison module; accordingly, when the first signal relationship is that the first intermediate signal and the first generated signal are not equal, the first detection module determines that a fault occurs in the signal transmission line and outputs a first interrupt signal.

[0006] According to one embodiment of the present invention, the signal generating branch and the signal transmission line both further include a pulse width filter module; correspondingly, the fault detection circuit further includes: a second detection branch, connected between the output end of the pulse width filter module of the signal transmission line and the output end of the pulse width filter module of the signal generating branch, including: a second detection module, used to determine the second signal relationship between the second intermediate signal at the output end of the pulse width filter module of the signal transmission line and the second generated signal at the output end of the pulse width filter module of the signal generating branch, and to perform fault determination on the signal transmission line based on the second signal relationship; a second error injection module, used to determine the working status of the second detection module.

[0007] According to one embodiment of the present invention, the second detection branch also includes: a selector, whose input end is connected to the output end of the synchronizer module of the signal transmission line and the output end of the synchronizer module of the signal generating line, and whose output end is connected to the input end of the pulse width filter module of the signal generating branch, and is used to select the output end signal of the synchronizer module of the signal transmission line or the output end signal of the signal generating branch as the input signal of the pulse width filter module of the signal generating branch.

[0008] According to an embodiment of the present invention, the pulse width filtering module of the signal transmission line and the pulse width filtering module of the signal generation branch are configured as a filtering configuration for filtering pulses of the same pulse width and opposite polarity.

[0009] According to one embodiment of the present invention, the second detection branch also includes: an inverter, connected between the output end of the synchronizer module of the signal transmission line and the input end of the pulse width filtering module of the signal generating branch, for inverting the output end signal of the synchronizer module of the signal transmission line and then inputting it into the pulse width filtering module of the signal generating branch; accordingly, the pulse width filtering module of the signal transmission line and the pulse width filtering module of the signal generating branch are configured as a filtering configuration for filtering pulses of the same pulse width and opposite polarity.

[0010] According to an embodiment of the present invention, the signal generation branch is an independently set signal transmission line that is the same as the signal transmission line or another signal transmission line that is the same as the signal transmission line and is currently in an idle state.

[0011] According to a second aspect of the present invention, a fault detection method for a signal transmission line is also provided, the method comprising: receiving a first intermediate signal at an output end of a synchronizer module of a signal transmission line and a first generating signal at an output end of a synchronizer module of a signal generating branch; and outputting a first interrupt instruction when a first signal relationship between the first intermediate signal and the first generating signal satisfies a first set condition.

[0012] According to a third aspect of the present invention, a chip is further provided, the chip comprising the above-mentioned signal transmission line fault detection circuit.

[0013] According to a fourth aspect of the present invention, an electronic device is further provided, the electronic device comprising the above chip.

[0014] According to a fifth aspect of the present invention, a vehicle is further provided, the vehicle comprising the above electronic device.

[0015] In the fault detection circuit, method, chip, electronic device and vehicle of the signal transmission line of the embodiment of the present invention, the fault detection circuit is arranged in the system-level chip, including a signal generating branch and a first detection branch. The signal generating branch has a synchronizer module and a functional module that are the same as the signal transmission line, wherein the functional module is used to receive the IO signal through the synchronizer module and process the received IO signal. The first detection branch is connected between the output end of the synchronizer circuit module of the signal transmission line and the output end of the synchronizer circuit module of the signal generating branch. The first detection branch includes a first detection module and a first error injection module. The first detection module is used to determine the first signal relationship between the first intermediate signal at the output end of the synchronizer module of the signal transmission line and the first generation signal at the output end of the synchronizer module of the signal generating branch, and to perform fault judgment on the signal transmission line based on the first signal relationship. The first error injection module is used to determine the working state of the first detection module. Thus, the signal transmission line is judged to have a fault according to the first signal relationship between the first intermediate signal at the output end of the synchronizer module of the signal transmission line and the first generation signal at the output end of the synchronizer module of the signal generation branch through the first detection branch, and the signal transmitted by the signal transmission line is monitored in real time to ensure the correctness of signal transmission. When problems such as circuit failure or signal interference occur, the signal transmission line is judged to have a fault in time, thereby meeting the high functional safety requirements for the signal transmission line. In addition, the signal generation branch and the signal transmission line have the same module setting, so the currently idle signal transmission line can be used as the signal generation branch, effectively saving circuit resources.

[0016] It should be understood that the teachings of the present invention are not required to achieve all of the beneficial effects described above, but specific technical solutions can achieve specific technical effects, and other embodiments of the present invention can also achieve beneficial effects not mentioned above. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects, features and advantages of the exemplary embodiments of the present invention will become readily understood by reading the following detailed description with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present invention are shown in an exemplary and non-limiting manner, in which:

[0018] In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.

[0019] Figure 1 A schematic diagram showing the structure of a signal transmission line detected by a fault detection circuit according to an embodiment of the present invention is shown;

[0020] Figure 2 A schematic diagram showing the structure of a fault detection circuit for a signal transmission line provided by an embodiment of the present invention is shown;

[0021] Figure 3 A schematic diagram showing the structure of a fault detection circuit for a signal transmission line provided by another embodiment of the present invention is shown;

[0022] Figure 4 A schematic diagram showing the structure of a fault detection circuit for a signal transmission line provided by yet another embodiment of the present invention is shown;

[0023] Figure 5 A schematic diagram showing the composition and structure of a specific application example of a fault detection circuit for a signal transmission line provided by an embodiment of the present invention is shown;

[0024] Figure 6 A schematic diagram showing the composition and structure of a specific application example of a fault detection circuit for a signal transmission line provided by another embodiment of the present invention is shown;

[0025] Figure 7 A schematic diagram showing the composition and structure of a specific application example of a fault detection circuit for a signal transmission line provided by another embodiment of the present invention is shown;

[0026] Figure 8 A schematic diagram of the implementation flow of a fault detection method for a signal transmission line provided in an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0027] The principles and spirit of the present invention will be described below with reference to several exemplary embodiments. It should be understood that these embodiments are provided only to enable those skilled in the art to better understand and implement the present invention, and are not intended to limit the scope of the present invention in any way. On the contrary, these embodiments are provided to make the present invention more thorough and complete, and to fully convey the scope of the present invention to those skilled in the art.

[0028] The technical solution of the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0029] Figure 1 A schematic diagram of the structure of a signal transmission line detected by a fault detection circuit according to an embodiment of the present invention is shown.

[0030] refer to Figure 1, a signal transmission line is shown with two lines. The signal transmission line mainly transmits IO signals. The signal transmission line may include an IO PAD (IO pin), a synchronizer, a pulse width filter and a functional module. Figure 1 Each signal transmission line in the figure can show the signal flow diagram of the input signal from the IO PAD to the functional module.

[0031] Specifically, IO PAD is the pin processing module of the chip, which can process the IO signals received by the chip pins and send them to the inside of the chip, and can also process the IO signals output from the inside of the chip and send them to the chip pins, and then further transmit them to the outside of the chip. The synchronizer can be used to perform two-stage sampling on the input IO signals to avoid the propagation of the metastable state of signal sampling. The pulse width filter can eliminate the glitches of the specified pulse width on the IO signal. The physical routing and drive buffer of the chip can be Figure 1 The connection lines between different modules are shown in FIG. The input IO signal is input from the IO PAD to the chip, firstly synchronized by the synchronizer, then filtered by the pulse width filter for possible glitches on the IO signal, and finally enters the function module for function triggering.

[0032] It should be noted that the pulse width filter is a module configured in the signal transmission line of the preferred IO signal, and the pulse width filter may not be configured in some signal transmission lines. Since there are a large number of IO signal transmission lines in the chip that need to be connected to peripheral devices, it is particularly important to ensure the correctness and stability of the IO signal during the transmission process in the entire chip. Based on this, the present application designs a fault detection circuit and method for the signal transmission line as described below.

[0033] Figure 2 A schematic diagram showing the structure of a fault detection circuit for a signal transmission line provided in an embodiment of the present invention is shown.

[0034] refer to Figure 2The fault detection circuit of the signal transmission line of the embodiment of the present invention is arranged in the SOC (System on Chip), and includes a signal generation branch 12 and a first detection branch 13. The signal generation branch 12 has a synchronizer module 111 and a functional module 112 that are the same as the signal transmission line 11. Among them, the functional module 112 is used to receive the IO signal through the synchronizer module 111 and process the received IO signal. The first detection branch 13 is connected between the output end of the synchronizer circuit module 111 of the signal transmission line 11 and the output end of the synchronizer circuit module 111 of the signal generation branch 12. The first detection branch 13 includes a first detection module 131 and a first error injection module 132. The first detection module 131 is used to determine the first signal relationship between the first intermediate signal at the output end of the synchronizer module 111 of the signal transmission line 11 and the first generated signal at the output end of the synchronizer module of the signal generation branch, and to perform fault judgment on the signal transmission line 11 based on the first signal relationship. The first error injection module 132 is used to determine the working state of the first detection module 131.

[0035] Among them, the first error injection module 132 is used to determine the working state of the first detection module 131, which can be achieved through the following operations: at a set time, the first error injection module 132 inputs a preset error signal to the first detection module 131, and the error signal is different from the output signal of the synchronizer module 111 of the signal transmission line 11. Therefore, the first detection module 131 needs to be able to identify the signal error when receiving the error signal and output an error interrupt. If the first detection module 131 normally outputs the error interrupt at this time, it can be determined that the first detection module 131 is in a normal working state. In this way, the logic self-check of the first detection module 131 is realized. The following Figure 2 to Figure 7 The judgment of the working state of the first detection module 131 by the first error injection module 132 and the judgment of the working state of the second detection module 141 by the second error injection module 142 can all be referred to the above description and will not be repeated below.

[0036] It should be noted that for Figure 2 In the fault detection circuit of the signal transmission line shown, the signal transmission line 11 and the signal generating circuit 12 may or may not have a pulse width filtering module. If the signal transmission line 11 has a pulse width filtering module, the signal generating branch 12 is preferably also equipped with a pulse width filtering module.

[0037] In order to further improve the timeliness and accuracy of fault detection in the fault detection circuit, Figure 2 Based on the fault detection circuit shown, the present invention provides Figure 3 Another embodiment is shown.

[0038] Figure 3 A schematic diagram showing the structure of a fault detection circuit for a signal transmission line provided in another embodiment of the present invention is shown.

[0039] refer to Figure 3 In this embodiment of the present invention, the signal generating branch 12 and the signal transmission line 11 both further include a pulse width filter module 113. Correspondingly, the fault detection circuit further includes: a second detection branch 14, connected between the output end of the pulse width filter module 113 of the signal transmission line 11 and the output end of the pulse width filter module 113 of the signal generating branch 12. The second detection branch 14 includes: a second detection module 141 and a second error injection module 142. The second detection module 141 is used to determine the second signal relationship between the second intermediate signal at the output end of the pulse width filter module 113 of the signal transmission line 11 and the second generated signal at the output end of the pulse width filter module 113 of the signal generating branch, and to perform fault judgment on the signal transmission line 11 based on the second signal relationship. The second error injection module 142 is used to determine the working state of the second detection module 141.

[0040] In this embodiment of the present invention, the second detection branch 14 may also include a selector ( Figure 2 and Figure 3 Not shown, Figure 4 The selector is connected to the output of the synchronizer module 111 of the signal transmission line 11 and the output of the synchronizer module of the signal generation line 12. The selector is connected to the input of the pulse width filter module 113 of the signal generation branch 12, and is used to select the output signal of the synchronizer module 111 of the signal transmission line 11 or the output signal of the signal generation branch 12 as the input signal of the pulse width filter module 113 of the signal generation branch 12.

[0041] in, Figure 3 Other specific implementation processes and Figure 2 The specific implementation details in the illustrated embodiments are similar and will not be repeated here.

[0042] Figure 4 A schematic diagram showing the structure of a fault detection circuit for a signal transmission line provided in yet another embodiment of the present invention is shown.

[0043] In this embodiment of the present invention, the second detection branch 13 further includes an inverter N. The inverter N is connected between the output end of the signal transmission line 11 and the input end of the pulse width filtering module 113 of the signal generating branch 12, and is used to invert the output end signal of the synchronizer module 111 of the signal transmission line 11 and then input it into the pulse width filtering module 113 of the signal generating branch 12. Accordingly, the pulse width filtering module 113 of the signal transmission line 11 and the pulse width filtering module 113 of the signal generating branch 12 are configured as a filtering configuration for filtering pulses of opposite polarity with the same pulse width.

[0044] It should be noted that, as mentioned above Figure 2 to Figure 4 In the illustrated embodiment, if the second detection branch includes an inverter, the pulse width filtering module of the signal transmission circuit and the pulse width filtering module of the signal generation branch are configured as a filtering configuration for filtering pulses of the same pulse width and opposite polarity. If the second detection branch 14 does not include an inverter, the pulse width filtering module of the signal transmission circuit and the pulse width filtering module of the signal generation branch need to be configured as a filtering configuration for filtering pulses of the same pulse width and opposite polarity.

[0045] In such Figure 2 to Figure 4 In the embodiment of the present invention shown in FIG. 1 , the first detection module 131 may use an unequal comparison module ( Figure 2-Figure 4 Accordingly, when the first signal relationship is that the first intermediate signal and the first occurrence signal are not equal, the first detection module 131 determines that a fault occurs in the signal transmission line 11 and outputs a first interrupt signal.

[0046] In such Figure 2 to Figure 4 In the illustrated embodiment of the present invention, the signal generation branch 12 may be an independently arranged signal transmission line that is the same as the signal transmission line or another signal transmission line that is the same as the signal transmission line and is currently in an idle state.

[0047] in, Figure 4 Other specific implementation processes and Figure 2 and Figure 3 The specific implementation details in the illustrated embodiments are similar and will not be repeated here.

[0048] The following combination Figure 5 to Figure 7 The specific application example of the fault detection circuit for a signal transmission line provided by the embodiment of the present invention is shown to further illustrate the implementation logic of the fault detection circuit for a signal transmission line provided by the embodiment of the present invention.

[0049] Figure 5 A schematic diagram of the structure of a specific application example of a fault detection circuit for a signal transmission line provided by an embodiment of the present invention is shown.

[0050] refer to Figure 5 , the external input signal 1 is simultaneously input into the chip from both IO PAD1 and IO PAD2.

[0051] After the IO signals pass through the synchronizer module 111 of the signal transmission line 11 and the synchronizer module 111 of the signal generation branch 12, they enter the unequal comparison module 151 for real-time comparison. If the signals output by the synchronizer module 111 of the signal transmission line 11 and the synchronizer module 111 of the signal generation branch 12 are not equal, an error interrupt can be reported. For example, a first interrupt can be reported to the CPU.

[0052] Furthermore, before the signal is input into the unequal comparison module 151 through the synchronizer module 111 of the signal generation branch 12, a first error injection module 132 is added. The first error injection module 132 can provide a logic self-test for the unequal comparison module to detect whether the working state of the unequal comparison module 151 is normal.

[0053] Here, considering the sampling deviation that the signals passing through the synchronizer module 111 of the signal transmission line 11 and the synchronizer module 111 of the signal generation branch 12 may have. Physically, it is restricted that the difference between the path delay T1 from the IO PAD 101 of the signal transmission line 11 to the synchronizer 111 and the path delay T2 from the IO PAD 101 of the signal generation branch 12 to the synchronizer 111 is less than one sampling clock period. That is, |T1 - T2| < Tclk_period, where Tclk_period represents one sampling clock period. Thus, it can be ensured that the sampling deviation of the two synchronizers is less than or equal to one period. Furthermore, when comparing signals, the signal changes at the two signal edges need to be filtered. In the first sampling clock period when the input IO signal changes, the unequal comparison module 151 does not perform signal comparison, effectively avoiding false alarms of faults in the signal transmission circuit caused by sampling deviation.

[0054] The unequal comparison module 151 can perform real-time fault detection on all circuits on the signal transmission path between the IO PAD 101 and the synchronizer module 111 on the signal transmission line, ensuring the correctness of the output signal of the synchronizer module 111.

[0055] It should be noted that Figure 4 to Figure 7 the signal transmission line 11, the signal generation branch 12, etc. are not specifically boxed in Figure 2 and Figure 3 . Refer to the schematic diagram of the fault detection circuit composition shown in

[0056] Since there will definitely be sampling deviations in the outputs of the synchronizer module 111 of the signal transmission line 11 and the synchronizer module 111 of the signal generating branch 12, if they are respectively used as inputs of the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generating branch 12, even if there is no fault in the circuit, the outputs of the two pulse width filters 113 may be different, and there is a greater possibility of false fault alarm when detecting and comparing the outputs of the pulse width filter modules.

[0057] Therefore, based on the fact that the inequality comparison module 151 has ensured the correctness of the output signal of the synchronizer module 111, here, only the output of the synchronizer module 111 of the signal transmission line can be used as the input of the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12. The pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12 are further compared through the equality comparison module 152. At the same time, the output of the synchronizer module 111 of the signal transmission branch 11 can be inverted by the inverter N and then input to the pulse width filter module 113 of the signal generation branch. In this way, the common cause interference that may occur in the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12 can be eliminated. At this time, the software pulse filtering configuration of the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12 needs to be configured to filter the same pulse width and different pulse polarity. For example, if the pulse width filter module 113 of the signal transmission line 11 is configured to filter positive edge pulses for 3 cycles, the pulse width filter module 113 of the signal generation branch 12 needs to be configured to filter negative edge pulses for 3 cycles.

[0058] After the signal passes through the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12, it is input to the equality comparison module 152. The equality comparison module 152 only needs to compare whether the two signals input by the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12 are equal. If they are equal, an interrupt error is generated, for example, a second interrupt can be generated and reported to the CPU.

[0059] Similarly, before the output signal of the pulse width filter module 113 of the signal generation branch 12 is input to the equality comparison module 152, a second error injection module 142 is added to provide a logic self-check test for the equality comparison module 152.

[0060] The output of the pulse width filter module 113 of the signal transmission line 11 is monitored in real time by the equality comparison module 152, which effectively ensures the correctness of the output signal of the pulse width filter module 113 of the signal transmission line 11. Furthermore, the output signal of the pulse width filter module 113 of the signal transmission line 11 is input to the function module 112 of the signal transmission line 11 to trigger the function.

[0061] It should be noted that the inverter N may not be added between the synchronizer module 111 and the pulse width filter module 113 of the signal generation branch 12. In this case, the circuit and software configuration need to be adjusted. Figure 6 The embodiment shown.

[0062] Figure 6 A schematic diagram of the structure of a specific application example of a fault detection circuit for a signal transmission line provided by another embodiment of the present invention is shown.

[0063] refer to Figure 6 , no inverter N is configured between the synchronizer module 111 and the pulse width filter module 113 of the signal generation branch 12. At this time, the software pulse filter configuration of the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12 needs to be configured to filter with the same pulse width and the same pulse polarity. For example, if the pulse width filter module 113 of the signal transmission line 11 is configured to filter positive edge pulses for 3 cycles, the pulse width filter module 113 of the signal generation branch 12 also needs to be configured to filter positive edge pulses for 3 cycles.

[0064] Furthermore, Figure 5 The equality comparison module 152 shown in needs to be replaced by another inequality comparison module 151. Thus, the inequality comparison module 151 performs inequality comparison on the two input signals of the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12. If the two signals input by the pulse width filter module 113 of the signal transmission line 11 and the pulse width filter module 113 of the signal generation branch 12 are not equal, an interrupt error is generated, for example, a second interrupt can be generated, and the second interrupt is reported to the CPU.

[0065] Further, based on Figure 5 The specific application example of the fault detection circuit of the signal transmission line shown in the figure is that when the chip is used in some application fields with lower functional safety requirements, the currently idle signal transmission line can be released as a signal generation branch. At this time, some software configuration changes need to be made. For details, please refer to Figure 7 .

[0066] Figure 7A schematic diagram of the structure of a specific application example of a fault detection circuit for a signal transmission line provided by yet another embodiment of the present invention is shown.

[0067] refer to Figure 7 As shown, the input enable signal io_lockstep_en of the IO lockstep (IO lock synchronization circuit) can be set to 0 through software, and the output signal of the synchronizer module 111 of the currently idle signal transmission line can be input to the inequality comparison module 151, and compared with the output signal of the synchronizer module 111 of the signal transmission line that currently needs to be detected for faults, so as to realize the fault detection of the signal transmission line that currently needs to be detected for faults.

[0068] If the signal transmission function of the currently idle signal transmission line needs to be enabled, the inequality comparison module 151 and the equality comparison module 152 can be turned off by software.

[0069] In the fault detection circuit, method, chip, electronic device and vehicle of the signal transmission line of the embodiment of the present invention, the fault detection circuit is arranged in the system-level chip, including a signal generating branch and a first detection branch. The signal generating branch has a synchronizer module and a functional module that are the same as the signal transmission line, wherein the functional module is used to receive the IO signal through the synchronizer module and process the received IO signal. The first detection branch is connected between the output end of the synchronizer circuit module of the signal transmission line and the output end of the synchronizer circuit module of the signal generating branch. The first detection branch includes a first detection module and a first error injection module. The first detection module is used to determine the first signal relationship between the first intermediate signal at the output end of the synchronizer module of the signal transmission line and the first generation signal at the output end of the synchronizer module of the signal generating branch, and to perform fault judgment on the signal transmission line based on the first signal relationship. The first error injection module is used to determine the working state of the first detection module. Thus, the signal transmission line is judged to have a fault according to the first signal relationship between the first intermediate signal at the output end of the synchronizer module of the signal transmission line and the first generation signal at the output end of the synchronizer module of the signal generation branch through the first detection branch, and the signal transmitted by the signal transmission line is monitored in real time to ensure the correctness of signal transmission. When problems such as circuit failure or signal interference occur, the signal transmission line is judged to have a fault in time, thereby meeting the high functional safety requirements for the signal transmission line. In addition, the signal generation branch and the signal transmission line have the same module setting, so the currently idle signal transmission line can be used as the signal generation branch, effectively saving circuit resources.

[0070] Similarly, based on the above signal transmission line fault detection circuit, the embodiment of the present invention also provides a signal transmission line fault detection method, such as Figure 8As shown, the method includes at least the following processes: operation 801, receiving a first intermediate signal at an output end of a synchronizer module of a signal transmission line and a first generating signal at an output end of a synchronizer module of a signal generating branch; operation 802, outputting a first interrupt instruction when a first signal relationship between the first intermediate signal and the first generating signal satisfies a first set condition.

[0071] Furthermore, based on the above signal transmission line fault detection circuit, an embodiment of the present invention further provides a chip, and the chip includes the above signal transmission line fault detection circuit.

[0072] Furthermore, based on the fault detection circuit of the signal transmission line described above, an embodiment of the present invention further provides an electronic device, and the electronic device includes the above chip.

[0073] Furthermore, based on the fault detection circuit of the above signal transmission line, an embodiment of the present invention also provides a vehicle, and the vehicle includes the above electronic device.

[0074] It should be noted that the above description of the fault detection method, chip, electronic device and vehicle embodiment for the signal transmission line is different from the above description of the fault detection method, chip, electronic device and vehicle embodiment for the signal transmission line. Figures 1 to 7 The description of the method embodiment shown is similar, with the same Figures 1 to 7 The transmission line fault detection circuit embodiment shown in the figure has similar beneficial effects, so it will not be described in detail. For technical details not disclosed in the transmission line fault detection method, chip, electronic device and vehicle embodiment of the present invention, please refer to the aforementioned Figures 1 to 7 The description of the embodiment of the fault detection circuit for the transmission line shown in FIG. 1 is understood, and will not be repeated for the sake of saving space.

[0075] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0076] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical or other forms.

[0077] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0078] In addition, all functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately used as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0079] A person skilled in the art can understand that all or part of the steps of implementing the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiment; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM), magnetic disks or optical disks, etc., various media that can store program codes.

[0080] Alternatively, if the above-mentioned integrated unit of the present invention is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present invention can be essentially or partly reflected in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods of each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0081] The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A fault detection circuit for a signal transmission line, wherein the fault detection circuit is arranged in a system-level chip, include: A signal generation branch having the same synchronizer module and functional module as the signal transmission line, wherein the functional module of the signal generation branch is used to receive the IO signal through the synchronizer module and process the received IO signal; The first detection branch is connected between the synchronizer circuit module output end of the signal transmission line and the synchronizer circuit module output end of the signal generation branch, and includes: a first detection module, used for determining a first signal relationship between a first intermediate signal at an output end of a synchronizer module of the signal transmission line and a first generated signal at an output end of a synchronizer module of the signal generation branch, and for determining a fault of the signal transmission line based on the first signal relationship; the first detection module is an inequality comparison module; accordingly, when the first signal relationship is that the first intermediate signal and the first generated signal are not equal, the first detection module determines that a fault occurs in the signal transmission line and outputs a first interrupt signal; The first error injection module is used to determine the working status of the first detection module; the first error injection module can be used to determine the working status of the first detection module through the following operations: at a set time, the first error injection module inputs a preset error signal to the first detection module, and the error signal is different from the output signal of the synchronizer module of the signal transmission line; if the first detection module outputs an error interrupt, it can be determined that the first detection module is in a normal working state.

2. The circuit according to claim 1, wherein the signal generation branch and the signal transmission line both further include a pulse width filter module; correspondingly, the fault detection circuit further includes: include: The second detection branch is connected between the output end of the pulse width filter module of the signal transmission line and the output end of the pulse width filter module of the signal generation branch, and includes: a second detection module, configured to determine a second signal relationship between a second intermediate signal at an output end of a pulse width filter module of the signal transmission line and a second generated signal at an output end of a pulse width filter module of the signal generating branch, and to perform a fault determination on the signal transmission line based on the second signal relationship; The second injection error module is used to determine the working status of the second detection module.

3. The circuit according to claim 2, wherein the second detection branch further include: A selector, whose input end is connected to the output end of the synchronizer module of the signal transmission line and the output end of the synchronizer module of the signal generating line, and whose output end is connected to the input end of the pulse width filter module of the signal generating branch, is used to select the output end signal of the synchronizer module of the signal transmission line or the output end signal of the signal generating branch as the input signal of the pulse width filter module of the signal generating branch. 4 . The circuit according to claim 3 , wherein the pulse width filtering module of the signal transmission line and the pulse width filtering module of the signal generation branch are configured as a filtering configuration for filtering pulses of the same pulse width but opposite polarities.

5. The circuit according to claim 3, wherein the second detection branch further include: An inverter is connected between the output end of the synchronizer module of the signal transmission line and the input end of the pulse width filter module of the signal generation branch, and is used to invert the output end signal of the synchronizer module of the signal transmission line and then input it into the pulse width filter module of the signal generation branch; accordingly, The pulse width filtering module of the signal transmission line and the pulse width filtering module of the signal generation branch are configured as a filtering configuration for filtering pulses of the same pulse width but opposite polarities.

6. The circuit according to claim 1, wherein the signal generating branch is an independently set signal transmission line that is the same as the signal transmission line or another signal transmission line that is the same as the signal transmission line and is currently in an idle state.

7. A signal transmission line fault detection method, applied to the signal transmission line fault detection circuit according to any one of claims 1 to 6, the method include: A first intermediate signal at an output end of a synchronizer module of a receiving signal transmission line and a first generated signal at an output end of a synchronizer module of a signal generating branch; Outputting a first interrupt instruction when a first signal relationship between the first intermediate signal and the first generating signal satisfies a first set condition, including: when the first signal relationship is that the first intermediate signal and the first generating signal are not equal, determining that a fault occurs in the signal transmission line, and outputting a first interrupt instruction.

8. A chip, comprising the fault detection circuit for the signal transmission line according to any one of claims 1 to 5.

9. An electronic device comprising the chip according to claim 8.

10. A vehicle comprising the electronic device according to claim 9.

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