Stretchable pixel array substrate

By designing a gate driving circuit with a base structure and segments of multiple islands and bridges in the pixel array substrate of electronic products, the structural breakage and internal line breakage caused by stress when the electronic products are stretched is solved, and higher tensileability and manufacturing yield are achieved.

CN115458536BActive Publication Date: 2025-05-27AU OPTRONICS CORP
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202211213652.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2022-05-16
Filing Date
2022-09-30
Publication Date
2025-05-27
Estimated Expiration
2042-09-30

AI Technical Summary

Technical Problem

When existing electronic products are stretched, they are prone to structural breakage and internal circuit breakage due to stress, resulting in low manufacturing yield and product reliability.

Method used

A stretchable pixel array substrate is designed, including a substrate, a plurality of pixel structures and a gate driving circuit electrically connected to the pixel structure. The peripheral region of the substrate has a first island, a second island and a first bridge defined by a plurality of openings, the pixel structure is arranged in the active region, and the gate driving circuit is divided into a first and a second part arranged on the first island and the second island.

Benefits of technology

With this design, the substrate can effectively disperse stress when stretched, reduce the risk of structural fracture, thereby improving tensileability and manufacturing yield.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN115458536B_ABST
    Figure CN115458536B_ABST
Patent Text Reader

Abstract

The present invention discloses a stretchable pixel array substrate, including a substrate, a plurality of pixel structures, and a gate driving circuit electrically connected to the plurality of pixel structures. The substrate has an active area and a peripheral area outside the active area. The peripheral area has a plurality of openings to define a plurality of first islands, a plurality of second islands, and a plurality of first bridges in the peripheral area. The area of each first island is larger than the area of each second island. At least a part of the plurality of first bridges is connected between the plurality of first islands and the plurality of second islands. The plurality of pixel structures are disposed in the active area of the substrate. The gate driving circuit includes a plurality of first parts disposed on the plurality of first islands and a plurality of second parts disposed on the plurality of second islands and electrically connected to the plurality of first parts.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to a pixel array substrate, and more particularly to a stretchable pixel array substrate. Background Art

[0002] With the highly developed electronic technology, electronic products are constantly updated. In order to enable electronic products to be applied to various different fields, the characteristics of stretchability, thinness, and unrestricted appearance have gradually attracted attention. That is to say, electronic products are gradually required to have different appearances according to different application methods and application environments. Therefore, electronic products need to have stretchability.

[0003] However, when an electronic product is in a stretched state, it may be structurally broken due to stress, and even further cause an open circuit in the internal circuit. Therefore, how to make stretchable electronic products have good manufacturing yield and product reliability is an urgent problem to be solved at present. Summary of the Invention

[0004] The present invention provides a stretchable pixel array substrate with excellent stretchability.

[0005] The stretchable pixel array substrate of the present invention includes a substrate, a plurality of pixel structures, and a gate driving circuit electrically connected to the plurality of pixel structures. The substrate has an active area and a peripheral area outside the active area. The peripheral area has a plurality of openings to define a plurality of first islands, a plurality of second islands, and a plurality of first bridges in the peripheral area. The area of each first island is larger than the area of each second island. At least a part of the plurality of first bridges is connected between the plurality of first islands and the plurality of second islands. The plurality of pixel structures are disposed in the active area of the substrate. The gate driving circuit includes a plurality of first parts disposed on the plurality of first islands and a plurality of second parts disposed on the plurality of second islands and electrically connected to the plurality of first parts.

[0006] In an embodiment of the present invention, each of the above-mentioned first islands has an upper edge, a lower edge, a first side, and a second side. The upper edge is disposed opposite to the lower edge. The first side is connected between the upper edge and the lower edge. The second side is disposed opposite to the first side and connected between the upper edge and the lower edge. The length of the upper edge is greater than or equal to the length of the lower edge, and the lengths of the first side and the second side are less than the length of the lower edge.

[0007] In an embodiment of the present invention, each of the above-mentioned second islands has a first side adjacent to the first island, and an acute angle is formed between the first side of the second island and the first side of the first island.

[0008] In an embodiment of the present invention, the acute angle is θ, and 8° ≤ θ ≤ 40°.

[0009] In an embodiment of the present invention, the above-mentioned acute angle is θ, and 10° ≤ θ ≤ 35°.

[0010] In an embodiment of the present invention, the above-mentioned first island has a width b in a direction parallel to the first side, and a first part of the gate driving circuit disposed on the first island has a width a in the direction, and b / 6 ≤ a ≤ 2b / 3.

[0011] In an embodiment of the present invention, the first part of the above-mentioned gate driving circuit has a first edge and a second edge opposite to each other, the first edge and the second edge are respectively adjacent to the upper edge and the lower edge of the first island, and the second edge of the first part of the gate driving circuit has an arc-shaped structure concave towards the first edge.

[0012] In an embodiment of the present invention, the distance between the arc-shaped structure of the first part of the above-mentioned gate driving circuit and the lower edge of the first island gradually changes as it moves away from the first side of the first island.

[0013] In an embodiment of the present invention, each first island in the peripheral area of the above-mentioned substrate includes a first part and a second part; the peripheral area of the substrate further has a second bridge, and the second bridge is connected between the first part and the second part of the first island; the peripheral area of the substrate further has a curved serpentine structure, and the curved serpentine structure is disposed opposite to the second bridge and is connected between the first part and the second part of the first island.

[0014] In an embodiment of the present invention, the multiple first parts of the above-mentioned gate driving circuit include multiple active elements, and the multiple second parts include multiple passive (non-source) elements.

[0015] In an embodiment of the present invention, each of the above-mentioned first islands has an upper edge, a lower edge, a first side, and a second side, the upper edge is disposed opposite to the lower edge, the first side is connected between the upper edge and the lower edge, the second side is disposed opposite to the first side and is connected between the upper edge and the lower edge, the length of the upper edge is greater than or equal to the length of the lower edge, the lengths of the first side and the second side are less than the length of the lower edge, and multiple active elements are arranged along the upper edge of the first island.

[0016] In an embodiment of the present invention, the multiple first islands in the peripheral area of the above-mentioned substrate, the multiple second islands in the peripheral area of the substrate, the multiple first bridges in the peripheral area of the substrate, and the gate driving circuit are divided into multiple structural units. Each structural unit at least includes a first island, a second island adjacent to the first island, a first bridge connected between the first island and the second island, and a first part of the gate driving circuit and a second part of the gate driving circuit respectively disposed on the first island and the second island; the multiple structural units are arranged in multiple structural unit rows and multiple structural unit columns, and one structural unit column and the next structural unit column are mirror-symmetric to each other.

[0017] In an embodiment of the present invention, the bending directions of the multiple first islands of multiple structural units belonging to the same structural unit column and respectively belonging to two adjacent structural unit rows are opposite.

[0018] In an embodiment of the present invention, the above-mentioned structural unit row and the next structural unit row are mirror-symmetrical to each other.

[0019] In an embodiment of the present invention, each of the above-mentioned structural units further includes another second island adjacent to the first island. The second island and another second island of each structural unit are respectively located on opposite sides of the first island; each structural unit further includes another first bridge connected between the first island and the other second island; each structural unit further includes another second part of the gate driving circuit, and the other second part of the gate driving circuit is disposed on the other second island. Description of the Drawings

[0020] Figure 1 A top view schematic diagram of the stretchable pixel array substrate 10 according to an embodiment of the present invention;

[0021] Figure 2 An enlarged schematic diagram of a structural unit U of the stretchable pixel array substrate 10 according to an embodiment of the present invention;

[0022] Figure 3 A cross-sectional schematic diagram of the stretchable pixel array substrate 10 according to an embodiment of the present invention;

[0023] Figure 4 An equivalent circuit schematic diagram of the gate driving circuit 200 according to an embodiment of the present invention;

[0024] Figure 5 A schematic diagram of multiple active elements 211 of the first part 210 of the gate driving circuit 200 of the stretchable pixel array substrate 10 according to an embodiment of the present invention;

[0025] Figure 6 A schematic diagram of the first island 121 of the stretchable pixel array substrate 10A and the first part 210 of the gate driving circuit 200 according to another embodiment of the present invention;

[0026] Figure 7 A schematic diagram of the first island 121 of the stretchable pixel array substrate 10B and the first part 210 of the gate driving circuit 200 according to still another embodiment of the present invention;

[0027] Figure 8 A top view schematic diagram of the stretchable pixel array substrate 10C according to still another embodiment of the present invention;

[0028] Figure 9 A top view schematic diagram of the stretchable pixel array substrate 10D according to an embodiment of the present invention;

[0029] Figure 10 An enlarged schematic view of a structural unit UD of a stretchable pixel array substrate 10D according to an embodiment of the present invention.

[0030] Symbol description

[0031] 10, 10A, 10B, 10C, 10D: Stretchable pixel array substrate

[0032] 100: Substrate

[0033] 110: Active region

[0034] 111: Island

[0035] 112: Bridge

[0036] 113, 128: Opening

[0037] 120: Peripheral region

[0038] 121: First island

[0039] 121-1: First part

[0040] 121-2: Second part

[0041] 121a, 122a: Upper edge

[0042] 121b, 122b: Lower edge

[0043] 121c, 122c: First side

[0044] 121d, 122d: Second side

[0045] 122: Second island

[0046] 123, 124, 125, 126, 127: First bridge

[0047] 129: Second bridge

[0048] 200: Gate driving circuit

[0049] 210: First part

[0050] 210a: First edge

[0051] 210b: Second edge

[0052] 210bs: Arc-shaped structure

[0053] 211: Active element

[0054] 220: Second part

[0055] 222: Passive element

[0056] a, b: Width

[0057] C: Structural unit row

[0058] D: Distance

[0059] d1: Direction

[0060] GI: First insulating layer

[0061] L: Element layer

[0062] LED: Light emitting diode element

[0063] L121a, L122a, L121b, L122b, L121c, L122c, L121d, L122d: Length

[0064] p: Pad

[0065] PL: Second insulating layer

[0066] PX: Pixel structure

[0067] R: Structural unit column

[0068] SN: Bent serpentine structure

[0069] T1: First transistor

[0070] T1a, 211a: First end

[0071] T1b, 211b: Second end

[0072] T1c, 211c: Control end

[0073] T1d, 211d: Semiconductor pattern

[0074] U, UD: Structural unit

[0075] θ: Acute angle

[0076] I-I’: Section line Detailed implementation manners

[0077] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals will be used in the drawings and the description to refer to the same or like parts.

[0078] It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, no intervening element is present. As used herein, "connected" can refer to physical and / or electrical connection. Furthermore, "electrically connected" or "coupled" can mean that other elements exist between two elements.

[0079] As used herein, "about", "approximate", or "substantially" includes the stated value and an average within an acceptable deviation range of a particular value determined by a person of ordinary skill in the art, taking into account the particular amount of the measurement being discussed and the errors associated with the measurement (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, "about", "approximate", or "substantially" as used herein can be selected to have a more acceptable deviation range or standard deviation depending on optical properties, etching properties, or other properties, rather than applying one standard deviation to all properties.

[0080] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by a person of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this invention, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0081] Figure 1 A top view schematic diagram of a stretchable pixel array substrate 10 according to an embodiment of the present invention. Figure 2 An enlarged schematic diagram of a structural unit U of a stretchable pixel array substrate 10 according to an embodiment of the present invention.

[0082] Please refer to Figure 1 , the stretchable pixel array substrate 10 includes a substrate 100. The substrate 100 has elasticity and ductility. For example, in this embodiment, the material of the substrate 100 may include polyimide (PI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polycarbonates (PC), polyether sulfone (PES), or polyarylate, other suitable materials, or a combination of at least two of the foregoing materials, but the present invention is not limited thereto.

[0083] The substrate 100 has an active area 110 and a peripheral area 120 outside the active area 110. In this embodiment, the active area 110 is a display area for displaying an image, and the peripheral area 120 is located beside at least one side of the display area. For example, in this embodiment, the peripheral area 120 may be a rectangular area surrounding the active area 110, but the present invention is not limited thereto.

[0084] Please refer to Figure 1 and Figure 2 , the peripheral area 120 of the substrate 100 has a plurality of openings 128 to define a plurality of first islands 121, a plurality of second islands 122, and a plurality of first bridges 123, 124, 125, 126, 127 in the peripheral area 120. The area of each first island 121 is larger than the area of each second island 122, and at least a part of the plurality of first bridges 123, 124, 125, 126, 127 is connected between the plurality of first islands 121 and the plurality of second islands 122.

[0085] Please refer to Figure 2 , in this embodiment, each first island 121 has an upper edge 121a, a lower edge 121b, a first side 121c, and a second side 121d. The upper edge 121a is disposed opposite to the lower edge 121b. The first side 121c is connected between the upper edge 121a and the lower edge 121b. The second side 121d is disposed opposite to the first side 121c and is connected between the upper edge 121a and the lower edge 121b. The length L121a of the upper edge 121a is greater than or equal to the length of the lower edge L121b, and the lengths L121c of the first side 121c and L121d of the second side 121d are less than the length L121b of the lower edge 121b. In short, in this embodiment, the first island 121 may be an elongated area. In addition, in this embodiment, the length L121a of the upper edge 121a of the first island 121 may be between 100 μm and 800 μm; preferably, the length L121a of the upper edge 121a of the first island 121 may be between 300 μm and 700 μm; however, the present invention is not limited thereto.

[0086] In this embodiment, each second island 122 has an upper edge 122a, a lower edge 122b, a first side 122c, and a second side 122d. The upper edge 122a is disposed opposite to the lower edge 122b. The first side 122c is connected between the upper edge 122a and the lower edge 122b. The second side 122d is disposed opposite to the first side 122c and is connected between the upper edge 122a and the lower edge 122b. The length L122a of the upper edge 122a is substantially equal to the length of the lower edge L122b, and the lengths L122c of the first side 122c and L122d of the second side 122d are substantially equal to the length L122b of the lower edge 122b. In short, in this embodiment, the second island 122 can be a square region, and the area of the elongated first island 121 is larger than the area of the square second island 122. For example, in this embodiment, the area of the first island 121 can be more than twice the area of the second island 122, but the present invention is not limited thereto.

[0087] In this embodiment, the plurality of first bridges 123, 124, 125, 126, 127 include the first bridge 123, the first bridge 124, the first bridge 125, the first bridge 126, and the first bridge 127. Among them, the first bridge 123 and the first bridge 124 are respectively connected to the first side 121c and the second side 121d of the first island 121. The first bridge 123c is connected between the first side 121c of the first island 121 and the first side 122c of the second island 122, and the first bridge 125, the first bridge 126, and the first bridge 127 are respectively connected to the upper edge 122a, the second side 122d, and the lower edge 122b of the second island 122. That is to say, in this embodiment, the left and right sides of the first island 121 with a larger area are connected to the plurality of first bridges 123, 124, but the upper and lower sides of the first island 121 with a larger area are not connected to any bridge, while the upper, lower, left, and right four sides of the second island 122 with a smaller area are respectively connected to the plurality of first bridges 123, 125, 126, 127.

[0088] Please refer to Figure 2 , in this embodiment, the second island 122 has a first side 122c adjacent to the first island 121, and an acute angle θ is formed between the first side 122c of the second island 122 and the first side 121c of the first island 121. For example, in this embodiment, 8o ≤ θ ≤ 40o; preferably, 10o ≤ θ ≤ 35o, but the present invention is not limited thereto.

[0089] Please refer to Figure 1, in this embodiment, the active region 110 of the substrate 100 has a plurality of openings 113 to define multiple islands 111 and multiple bridges 112 of the active region 110 of the substrate 100, wherein two adjacent islands 111 are connected to each other through a bridge 112. In this embodiment, the areas of the multiple islands 111 of the active region 110 of the substrate 100 are substantially the same, unlike the peripheral region 120 of the substrate 100 which has a first island 121 and a second island 122 with different areas. In this embodiment, the area of the small island (i.e., the second island 122) in the peripheral region 120 may be greater than or equal to the area of the island 111 in the active region 110.

[0090] Figure 3 Schematic cross-sectional view of the stretchable pixel array substrate 10 according to an embodiment of the present invention. Figure 3 Corresponding Figure 1 section line I-I'.

[0091] Please refer to Figure 1 and Figure 3 , the stretchable pixel array substrate 10 further includes an element layer L (labeled in Figure 3 ). The element layer L has a plurality of pixel structures PX. The plurality of pixel structures PX are disposed on the active region 110 of the substrate 100. Specifically, in this embodiment, the plurality of pixel structures PX may be respectively disposed on the multiple islands 111 of the active region 110.

[0092] Please refer to Figure 3 , for example, in this embodiment, each pixel structure PX may include a first transistor T1, a pair of pads p, and a light-emitting diode element LED. The first transistor T1 has a first end T1a, a second end T1b, a control end T1c, and a semiconductor pattern T1d. The first end T1a and the second end T1b are respectively electrically connected to different two regions of the semiconductor pattern T1d. A first insulating layer GI is interposed between the control end T1c of the first transistor T1 and the semiconductor pattern T1d. A second insulating layer PL is interposed between the first transistor T1 and a pair of pads p. The pair of pads p is electrically connected to the second end T1b of the first transistor T1, and a pair of electrodes (not shown) of the light-emitting diode element LED is electrically connected to the pair of pads p. In this embodiment, each pixel structure PX may selectively further include a second transistor (not shown), wherein the second transistor has a first end, a second end, and a control end, and the second end of the second transistor is electrically connected to the control end T1c of the first transistor T1; however, the present invention is not limited thereto.

[0093] Figure 4 Schematic equivalent circuit diagram of the gate driving circuit 200 according to an embodiment of the present invention. Please refer to Figure 1 , Figure 2 , Figure 3 and Figure 4, the element layer L of the stretchable pixel array substrate 10 further has a gate driving circuit 200. The gate driving circuit 200 is electrically connected to a plurality of pixel structures PX. Specifically, in this embodiment, each pixel structure PX further includes a scanning line (not shown), wherein the scanning line is electrically connected to the control end of the second transistor of the aforementioned pixel structure PX, and the gate driving circuit 200 is electrically connected to the scanning line.

[0094] Please refer to Figure 1 and Figure 2 , the gate driving circuit 200 includes a plurality of first parts 210 and a plurality of second parts 220. The plurality of first parts 210 of the gate driving circuit 200 are disposed on a plurality of first islands 121 in the peripheral area 120 of the substrate 100. The plurality of second parts 220 of the gate driving circuit 200 are disposed on a plurality of second islands 122 in the peripheral area 120 of the substrate 100 and are electrically connected to the plurality of first parts 210. The first parts 210 and the second parts 220 of the gate driving circuit 200 are respectively disposed on the first islands 121 and the second islands 122 with different areas, so that when the stretchable pixel array substrate 10 is flexed, the gate driving circuit 200 is not easily damaged, thereby improving the stretchability.

[0095] Figure 5 Shows a plurality of active elements 211 of the first part 210 of the gate driving circuit 200 of the stretchable pixel array substrate 10 according to an embodiment of the present invention. Figure 5 The second part 220 of the gate driving circuit 200 is omitted.

[0096] Please refer to Figure 1 , Figure 2 and Figure 5 , in this embodiment, the first part 210 of the gate driving circuit 200 includes a plurality of active elements 211, and the second part 220 of the gate driving circuit 200 includes a plurality of passive elements 222. For example, in this embodiment, the active element 211 of the first part 210 of the gate driving circuit 200 may be a thin film transistor, and the passive element 222 of the second part 220 of the gate driving circuit 200 may be a wire (such as but not limited to: a power line). Please refer to Figure 5 , each active element 211 (i.e., a thin film transistor) has a first end 211a, a second end 211b, a control end 211c, and a semiconductor pattern 211d. The first end 211a and the second end 211b are respectively electrically connected to different two regions of the semiconductor pattern 211d. A first insulating layer GI (refer to Figure 2 ) is interposed between the control end 211c and the semiconductor pattern 211d. In this embodiment, the boundary of the first part 210 of the gate driving circuit 200 can be the first insulating layer GI (refer to Figure 2) is defined by the sidewalls (not shown). In this embodiment, the plurality of active elements 211 of the first part 210 of the gate driving circuit 200 may be arranged along the upper edge 121a of the first island 121 of the substrate 100.

[0097] Please refer to Figure 2 , in this embodiment, the first island 121 in the peripheral region 120 of the substrate 100 has a width b in the direction d1 parallel to the first side 121c, the first part 210 of the gate driving circuit 200 disposed on the first island 121 has a width a in the direction d1, and b / 6 ≤ a ≤ 2b / 3. The first part 210 of the gate driving circuit 200 does not occupy the entire area of the first island 121. The first part 210 of the gate driving circuit 200 is arranged in a region farther from the first bridges 123 and 124 and is not arranged in a region closer to the first bridges 123 and 124 as much as possible. Thus, the first part 210 of the gate driving circuit 200 can avoid the stress concentration region (i.e., the region closer to the first bridges 123 and 124 in the first island 121), thereby improving the stretchability of the stretchable pixel array substrate 10. In this embodiment, 10 μm ≤ b ≤ 250 μm, but the present invention is not limited thereto.

[0098] Please refer to Figure 1 , in this embodiment, the plurality of first islands 121 in the peripheral region 120 of the substrate 100, the plurality of second islands 122 in the peripheral region 120 of the substrate 100, the plurality of first bridges 123, 124, 125, 126, 127 in the peripheral region 120 of the substrate 100, and the gate driving circuit 200 can be divided into a plurality of structural units U. Each structural unit U at least includes one first island 121, one second island 122 adjacent to the first island 121, one first bridge 123 connecting the first island 121 and the second island 122, and the first part 210 and the second part 220 of the gate driving circuit 200 respectively disposed on the first island 121 and the second island 122.

[0099] In this embodiment, the plurality of structural units U can be arranged in a plurality of structural unit rows C and a plurality of structural unit columns R, and a structural unit column R and the next structural unit column R can be mirror-symmetrical to each other. In addition, in this embodiment, the bending directions of the plurality of first islands 121 of the plurality of structural units U belonging to the same structural unit column R and belonging to two adjacent structural unit rows C respectively are opposite. For example, in this embodiment, the plurality of first islands 121 of the plurality of structural units U belonging to the same structural unit column R at the uppermost and belonging to the left and right adjacent structural unit rows C respectively bend upward and downward, but the present invention is not limited thereto.

[0100] It should be noted here that the following embodiments follow the component numbers and some content of the foregoing embodiments, where the same numbers are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, reference can be made to the foregoing embodiments, and the following embodiments will not be repeated.

[0101] Figure 6 Show the first island 121 of the stretchable pixel array substrate 10A and the first part 210 of the gate driving circuit 200 according to another embodiment of the present invention.

[0102] Please refer to Figure 6 , in this embodiment, the first part 210 of the gate driving circuit 200 has a first edge 210a and a second edge 210b opposite to each other. The first edge 210a and the second edge 210b are adjacent to the upper edge 121a and the lower edge 121b of the first island 121 respectively. The second edge 210b of the first part 210 of the gate driving circuit 200 has an arc-shaped structure 210bs concave towards the first edge 210a. The distance D between the arc-shaped structure 210bs of the first part 210 of the gate driving circuit 200 and the lower edge 121b of the first island 121 gradually changes as it moves away from the first side 121c of the first island 121. Specifically, the distance D between the arc-shaped structure 210bs of the first part 210 of the gate driving circuit 200 and the lower edge 121b of the first island 121 first increases and then decreases as it moves away from the first side 121c of the first island 121. The arc-shaped structure 210bs of the first part 210 of the gate driving circuit 200 is a kind of anti-strain design. Through the arc-shaped structure 210bs, the stretchable performance of the stretchable pixel array substrate 10A is further improved.

[0103] Figure 7 Show the first island 121 of the stretchable pixel array substrate 10B and the first part 210 of the gate driving circuit 200 according to another embodiment of the present invention.

[0104] Please refer to Figure 7 , in this embodiment, the first island 121 includes a first part 121-1 and a second part 121-2; the peripheral area 120 of the substrate 100 further has a second bridge 129, and the second bridge 129 is connected between the first part 121-1 and the second part 121-2 of the first island 121; the peripheral area 120 of the substrate 100 further has a curved serpentine structure SN, and the curved serpentine structure SN is disposed opposite to the second bridge 129 and is connected between the first part 121-1 and the second part 121-2 of the first island 121. The curved serpentine structure SN is another anti-strain design. Through the curved serpentine structure SN, the stretchable performance of the stretchable pixel array substrate 10B is further improved.

[0105] Figure 8Top view schematic diagram of the stretchable pixel array substrate 10C according to another embodiment of the present invention. Figure 8 The stretchable pixel array substrate 10C and Figure 1 The stretchable pixel array substrate 10 are similar. The differences between the two are described as follows.

[0106] Please refer to Figure 8 , in this embodiment, not only is a structural unit column R mirror-symmetrical to the next structural unit column R, but also the structural unit row C is mirror-symmetrical to the next structural unit row C.

[0107] Figure 9 Top view schematic diagram of the stretchable pixel array substrate 10D according to an embodiment of the present invention. Figure 10 Enlarged schematic diagram of a structural unit UD of the stretchable pixel array substrate 10D according to an embodiment of the present invention.

[0108] Figure 9 The stretchable pixel array substrate 10D and Figure 10 The structural unit UD are respectively similar to Figure 1 The stretchable pixel array substrate 10 and Figure 2 The structural unit U. The differences are described as follows.

[0109] Please refer to Figure 9 and Figure 10 , in this embodiment, each structural unit UD further includes another second island 122 adjacent to the first island 121. A second island 122 and another second island 122 of each structural unit UD are respectively located on opposite sides of the first island 121. Each structural unit UD further includes another first bridge 124 connected between the first island 121 and another second island 122. The first bridge 123 is connected between a second island 122 and the first side 121c of the first island 121, and another first bridge 124 is connected between another second island 122 and the second side 121d of the first island 121. Each structural unit UD further includes another second part 220 of the gate driving circuit 200, and the another second part 220 of the gate driving circuit 200 is disposed on another second island 122.

Claims

1. A stretchable pixel array substrate, comprising: a substrate having an active region and a peripheral region outside the active region, wherein the peripheral region has a plurality of openings to define a plurality of first islands, a plurality of second islands and a plurality of first bridges in the peripheral region, the area of each of the first islands being larger than the area of each of the second islands, and at least a part of the first bridges being connected between the first islands and the second islands, wherein each of the first islands has an upper edge, a lower edge, a first side and a second side, the upper edge being disposed opposite to the lower edge, the first side being connected between the upper edge and the lower edge, the second side being disposed opposite to the first side and connected between the upper edge and the lower edge, the length of the upper edge being greater than or equal to the length of the lower edge, and the lengths of the first side and the second side being less than the length of the lower edge; a plurality of pixel structures disposed in the active region of the substrate; and a gate driving circuit electrically connected to the pixel structures and comprising: a plurality of first parts disposed in the first islands of the peripheral region of the substrate; and a plurality of second parts disposed in the second islands of the peripheral region of the substrate and electrically connected to the first parts.

2. The stretchable pixel array substrate according to claim 1, wherein each of the second islands has a first side adjacent to the first island, and the first side of the second island and the first side of the first island form an acute angle.

3. The stretchable pixel array substrate according to claim 2, wherein the acute angle is θ, and 8° ≤ θ ≤ 40°.

4. The stretchable pixel array substrate according to claim 3, wherein the acute angle is θ, and 10° ≤ θ ≤ 35°.

5. The stretchable pixel array substrate according to claim 1, wherein the first island has a width b in a direction parallel to the first side, and the first part of the gate driving circuit disposed on the first island has a width a in this direction, and b / 6 ≤ a ≤ 2b / 3.

6. The stretchable pixel array substrate according to claim 1, wherein the first part of the gate driving circuit has a first edge and a second edge opposite to each other, the first edge and the second edge are respectively adjacent to the upper edge and the lower edge of the first island, and the second edge of the first part of the gate driving circuit has an arc-shaped structure concave inward toward the first edge.

7. The stretchable pixel array substrate according to claim 6, wherein the distance between the arc-shaped structure of the first part of the gate driving circuit and the lower edge of the first island gradually changes as it moves away from the first side of the first island.

8. The stretchable pixel array substrate according to claim 1, wherein each of the first islands in the peripheral region of the substrate comprises a first part and a second part; the peripheral region of the substrate further has a second bridge connecting between the first part and the second part of the first island; the peripheral region of the substrate further has a curved serpentine structure disposed opposite to the second bridge and connecting between the first part and the second part of the first island.

9. The stretchable pixel array substrate as claimed in claim 1, wherein the first portions of the gate driving circuit include a plurality of active elements, and the second portions include a plurality of passive elements.

10. The stretchable pixel array substrate as claimed in claim 9, wherein each of the first islands has an upper edge, a lower edge, a first side, and a second side, the upper edge is disposed opposite to the lower edge, the first side is connected between the upper edge and the lower edge, the second side is disposed opposite to the first side and is connected between the upper edge and the lower edge, the length of the upper edge is greater than or equal to the length of the lower edge, the lengths of the first side and the second side are less than the length of the lower edge, and the active elements are arranged along the upper edge of the first island.

11. The stretchable pixel array substrate as claimed in claim 1, wherein the first islands in the peripheral region of the substrate, the second islands in the peripheral region of the substrate, the first bridges in the peripheral region of the substrate, and the gate driving circuit are divided into a plurality of structural units, each structural unit at least includes the first island, the second island adjacent to the first island, the first bridge connected between the first island and the second island, and the first portion of the gate driving circuit and the second portion of the gate driving circuit respectively disposed on the first island and the second island; the structural units are arranged in a plurality of structural unit rows and a plurality of structural unit columns, and the structural unit column and the next structural unit column are mirror-symmetrical to each other.

12. The stretchable pixel array substrate as claimed in claim 11, wherein the bending directions of the first islands of the structural units belonging to the same structural unit column and respectively belonging to two adjacent structural unit rows are opposite.

13. The stretchable pixel array substrate as claimed in claim 11, wherein the structural unit row and the next structural unit row are mirror-symmetrical to each other.

14. The stretchable pixel array substrate as claimed in claim 11, wherein each structural unit further includes another second island adjacent to the first island, the second island and the other second island of each structural unit are respectively located on opposite sides of the first island; each structural unit further includes another first bridge connected between the first island and the other second island; each structural unit further includes another second portion of the gate driving circuit, and the other second portion of the gate driving circuit is disposed on the other second island.

Citation Information

Patent Citations

  • Display panel, manufacturing method thereof and display device

    CN111326542A

  • Display panel and display device

    CN111341813A