Low power anti-jamming method and system

By acquiring interference signal parameters and dynamically adjusting the number of array elements and taps, the anti-interference system is optimized, solving the problems of high power consumption and resource waste in existing technologies, and achieving a low-power, high-efficiency anti-interference effect.

CN115459876BActive Publication Date: 2026-03-31CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-06
Publication Date
2026-03-31

AI Technical Summary

Technical Problem

Existing anti-interference systems have high power consumption and serious resource waste, especially in the case of multipath interference and narrowband interference. Traditional methods require a large number of array elements and taps, resulting in excessive system energy consumption.

Method used

By acquiring interference signal parameters, the number of array elements and taps is dynamically adjusted. Based on the proportional relationship between interference power and bandwidth, the anti-interference structure is optimized to reduce the use of unnecessary array elements and taps. The STAP algorithm, power inversion algorithm, or space-frequency adaptive processing method are adopted.

Benefits of technology

While ensuring anti-interference effectiveness, the system power consumption is significantly reduced, achieving low-power anti-interference effect and avoiding resource waste.

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Abstract

The application discloses a low-power anti-interference method and system, and belongs to the technical field of anti-interference communication. The method comprises the following steps: acquiring a space interference signal; processing the space interference signal by using a signal processing method to obtain an interference parameter, wherein the interference parameter comprises an interference quantity, an interference power and an interference bandwidth; and dynamically adjusting the number of array elements and the number of taps in an interference suppression structure based on the interference parameter, wherein the interference suppression structure is configured to realize an anti-interference algorithm by using a maximum value of the number of array elements and a maximum value of the number of taps; wherein the number of taps is in a proportional relationship with the interference power or the interference bandwidth, and the number of array elements is N+1, wherein N is the interference quantity. The application can ensure high-performance anti-interference while greatly reducing system power consumption, thereby achieving the purpose of low power consumption.
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Description

Technical Field

[0001] This invention relates to the field of anti-interference communication technology, and specifically to a low-power anti-interference method and system. Background Technology

[0002] In satellite communication and navigation systems, it is necessary to suppress various types of interference signals to ensure normal satellite communication and navigation positioning functions. Interference suppression is usually achieved using space-time adaptive filtering methods. These methods require a large number of interference suppression units (PMs) in both the space and time domains to achieve the desired suppression. This results in anti-interference systems typically having high power consumption and system resource consumption, which is detrimental to the portability and endurance of navigation systems.

[0003] Global navigation systems play an irreplaceable role in both civilian and military fields. For these systems to function properly, satellite signals must be received even in complex electromagnetic environments. Therefore, strong anti-interference capabilities are crucial for navigation receivers. Due to the randomness of interference, the signal form, direction, and location of interfering signals are unknown. This necessitates the use of multi-element adaptive antenna arrays for interference suppression.

[0004] Traditional adaptive arrays utilize spatial degrees of freedom to zero out the radiation pattern in the direction of interference to cancel it. This method is very effective in suppressing broadband interference signals; however, it is not very effective in canceling narrowband interference signals, especially when multipath effects exist in space. Spatial adaptive filtering cannot effectively suppress interference signals in this case. Cancellation of broadband interference signals requires the anti-interference system to have degrees of freedom in both the spatial and temporal domains. A combined spatial-temporal anti-interference processing approach can simultaneously suppress interference and its multipath interference. Its basic structure is as follows: Figure 1 As shown. The working principle of this filter is to dynamically change the space-time two-dimensional weights according to the constraint target and other feedback signals, thereby filtering out various forms of interference signals and multipath interference. The delay time T should be less than 1 / B, where B is the system's processing bandwidth. The total delay (P-1)T of each filter has different requirements for different multipath delays. The adaptive filter selects appropriate filter weights to maximize the filtering out of all interference signals while preserving the desired satellite signal.

[0005] The Space-Time Adaptive Processing (STAP) algorithm has the advantage of suppressing multiple narrowband and wideband signals, and can also significantly suppress multipath interference in complex environments. Using STAP, interference can be suppressed to near-noise levels without causing serious damage to satellite signals. However, a drawback of this method is that it requires prior information, namely, crucial information such as the direction of the desired signal and the satellite's position.

[0006] Since prior information about the desired signal is difficult to obtain, another algorithm based on power inversion (PI) is applied to navigation receivers. The advantage of the power inversion algorithm is obvious: it does not require prior information about the satellite signal.

[0007] Another method to suppress multi-bandwidth interference signals is to use a space-frequency adaptive processing method. This method receives the array signal, transforms it to the frequency domain using Fourier transform, then adaptively filters the signal in the frequency domain, and finally restores the signal to the time domain for output.

[0008] based on Figure 1 The space-time adaptive filtering structure shown typically requires a large number of array elements to cover different interference levels, numbers, and locations, depending on the interference intensity, number, and location. Furthermore, it necessitates the use of numerous time-domain taps for each element to suppress both broadband and narrowband interference, making the filtering structure extremely complex and large. For example, to suppress up to six broadband interferences, the anti-jamming array requires at least seven array elements to form the receiving antenna array, and more than 20 tap coefficients are needed to form the time-domain filter to suppress broadband interference. In this case, with 160 anti-jamming units operating simultaneously in the hardware implementation, the power consumption of the anti-jamming system would be extremely high. However, in normal operation, six broadband interferences are rarely present simultaneously; the system typically experiences little or no interference, resulting in significant resource and energy waste for the anti-jamming system.

[0009] In related technologies, Chinese invention patent document CN112162299A describes a space-time adaptive anti-interference method, including the following steps: acquiring digital intermediate frequency (IF) signals and performing orthogonal frequency conversion on the IF signals to obtain complex baseband signals; performing time-domain tapping processing on each complex baseband signal according to a space-time anti-interference architecture to obtain tapped data; calculating the covariance matrix of each tapped data and inverting the covariance matrix to obtain an inverse matrix; calculating the anti-interference weights of each tapped data using the LCMV criterion based on the inverse matrix; and performing space-time two-dimensional filtering on the corresponding tapped data using the anti-interference weights to obtain the anti-interference filtered complex baseband signal. However, this scheme focuses on using the LCMV criterion and matrix inversion to achieve anti-interference, and does not have adjustable functionality. Summary of the Invention

[0010] The technical problem to be solved by this invention is how to reduce the power consumption of the anti-interference system and avoid resource waste.

[0011] The present invention solves the above-mentioned technical problems through the following technical means:

[0012] This invention proposes a low-power anti-interference method, the method comprising:

[0013] Acquire spatial interference signals;

[0014] The spatial interference signal is processed using signal processing methods to obtain interference parameters, which include interference quantity, interference power, and interference bandwidth.

[0015] Based on the interference parameters, the number of array elements and the number of taps in the interference suppression structure are dynamically adjusted. The interference suppression structure defaults to using the maximum number of array elements and the maximum number of taps to implement the anti-interference algorithm.

[0016] The number of taps is directly proportional to the interference power or the interference bandwidth, and the number of array elements is N+1, where N is the number of interference elements.

[0017] This invention acquires interference parameters based on spatial interference signals and dynamically adjusts the number of taps and array elements of the interference suppression structure according to the interference parameter detection results. In order to ensure the strongest anti-interference effect, the interference suppression structure defaults to the maximum number of array elements and taps. This can greatly reduce system power consumption while ensuring high-performance anti-interference, thus achieving the goal of low power consumption.

[0018] Furthermore, the process of using signal processing methods to process the spatial interference signal to obtain interference parameters includes:

[0019] The spatial interference signal is processed using a source number estimation method to obtain the number of interference sources;

[0020] The spatial interference signal is processed using a fast Fourier transform to obtain the interference power and the interference bandwidth.

[0021] Furthermore, adjusting the number of array elements and the number of taps in the interference suppression structure based on the interference parameters includes:

[0022] Based on the proportional relationship between the number of taps and the interference power or the interference bandwidth, the number of enable taps is determined, and the enable control signal controls the enable of the taps corresponding to the number of enable taps.

[0023] When all taps of a certain array element are disabled, control that array element to stop participating in anti-interference.

[0024] Furthermore, the anti-interference algorithm employs the STAP algorithm, the power inversion algorithm, or the space-frequency adaptive processing method.

[0025] Furthermore, the array of array elements is a two-dimensional surface array or a three-dimensional array.

[0026] Furthermore, this invention also proposes a low-power anti-interference system, comprising: a signal receiving module, an interference parameter detection module, an adjustment module, and a controllable interference suppression structure. The output of the signal receiving module is connected to the inputs of the interference parameter detection module and the controllable interference suppression structure, respectively. The output of the interference parameter detection module is connected to the controllable interference suppression structure via the adjustment module, wherein:

[0027] The signal receiving module is used to acquire spatial interference signals;

[0028] The interference parameter detection module is used to process the spatial interference signal using signal processing methods to obtain interference parameters, which include interference quantity, interference power, and interference bandwidth.

[0029] The adjustment module is used to dynamically adjust the number of array elements and the number of taps in the controllable interference suppression structure based on the interference parameters. The controllable interference suppression structure defaults to using the maximum number of array elements and the maximum number of taps to implement the anti-interference algorithm.

[0030] The number of taps is directly proportional to the interference power or the interference bandwidth, and the number of array elements is N+1, where N is the number of interference elements.

[0031] Furthermore, the signal receiving module adopts a multi-element array, which can be a two-dimensional area array or a three-dimensional array.

[0032] Furthermore, the interference parameter detection module includes:

[0033] The first detection unit is used to process the spatial interference signal using a source number estimation method to obtain the number of interference signals;

[0034] The second detection unit is used to process the spatial interference signal using a fast Fourier transform to obtain the interference power and the interference bandwidth.

[0035] Furthermore, the adjustment module includes:

[0036] A tap quantity adjustment unit is used to determine the number of enable taps based on the proportional relationship between the number of taps and the interference power or the interference bandwidth, and to control the enable of the taps corresponding to the number of enable taps through an enable control signal.

[0037] The array element quantity adjustment unit is used to control the array element to stop participating in anti-interference when all taps of a certain array element are disabled.

[0038] Furthermore, the anti-interference algorithm used in the controllable interference suppression structure is the STAP algorithm, the power inversion algorithm, or the space-frequency adaptive processing method.

[0039] The advantages of this invention are:

[0040] (1) The present invention obtains interference parameters based on spatial interference signals, and dynamically adjusts the number of taps and array elements of the interference suppression structure according to the interference parameter detection results. In order to ensure the strongest anti-interference effect, the interference suppression structure defaults to the maximum number of array elements and taps. While ensuring high-performance anti-interference, it can greatly reduce system power consumption and achieve the goal of low power consumption.

[0041] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the space-time adaptive filtering structure mentioned in the background section of this invention;

[0043] Figure 2 This is a flowchart illustrating the low-power anti-interference method in the first embodiment of the present invention;

[0044] Figure 3 This is a schematic diagram illustrating the principle of adjusting the number of taps in this invention;

[0045] Figure 4 This is a schematic diagram illustrating the principle of adjusting the number of array elements in this invention;

[0046] Figure 5 This is a schematic diagram of the low-power anti-interference system in the second embodiment of the present invention. Detailed Implementation

[0047] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0048] like Figure 2 As shown, the first embodiment of the present invention proposes a low-power anti-interference method, the method comprising the following steps:

[0049] S10. Acquire spatial interference signals;

[0050] S20. The spatial interference signal is processed using a signal processing method to obtain interference parameters, including interference quantity, interference power and interference bandwidth.

[0051] S30. Based on the interference parameters, the number of array elements and the number of taps in the interference suppression structure are dynamically adjusted. The interference suppression structure defaults to using the maximum number of array elements and the maximum number of taps to implement the anti-interference algorithm.

[0052] The number of taps is directly proportional to the interference power or the interference bandwidth, and the number of array elements is N+1, where N is the number of interference elements.

[0053] This embodiment obtains interference parameters based on spatial interference signals and dynamically adjusts the number of taps and array elements of the interference suppression structure according to the interference parameter detection results. In order to ensure the strongest anti-interference effect, the interference suppression structure has the maximum number of array elements and taps by default. This can greatly reduce system power consumption while ensuring high-performance anti-interference, thus achieving the goal of low power consumption.

[0054] In one embodiment, in step S10, a multi-element array is used to receive spatial interference signals, wherein the array can be a two-dimensional surface array such as a linear array or a circular array, or a three-dimensional array.

[0055] It should be noted that spatial interference signals are usually first sampled by an ADC before entering the interference suppression structure. In this embodiment, the received array signal is first subjected to interference parameter detection, and then the number of taps and array elements in the controllable interference suppression structure are adjusted based on the detected interference parameters.

[0056] In one embodiment, step S20 includes the following steps:

[0057] S21. The spatial interference signal is processed using a source number estimation method to obtain the number of interference signals;

[0058] The estimation of the number of interferences N is achieved using a source number estimation method based on methods including but not limited to MDI and AIC.

[0059] S22. The spatial interference signal is processed by Fast Fourier Transform to obtain the interference power and the interference bandwidth.

[0060] In one embodiment, step S30 includes the following steps:

[0061] S31. Based on the proportional relationship between the number of taps and the interference power or the interference bandwidth, determine the number of enableable taps, and control the enable of the taps corresponding to the number of enableable taps through the enable control signal.

[0062] It should be noted that, assuming the power of the interference is P and the bandwidth of the interference is B, the number of taps M = aP or M = bB, where a and b are both proportionality coefficients and are positive numbers.

[0063] S32. When all taps of a certain array element are disabled, control that array element to stop participating in anti-interference.

[0064] It should be noted that, as Figures 3 to 4 As shown, since the maximum number of interferences that can be suppressed in the anti-interference principle is equal to the number of array antennas minus one, the number of array signals participating in the anti-interference module is controlled to be M'=N+1 based on the detected number of interferences N. After determining the number of array elements based on the number of interferences, when all taps of a certain array element are disabled, the array element is controlled to stop participating in anti-interference to reduce power consumption.

[0065] The more taps there are, the better the suppression effect on broadband signals and the better the suppression of high-power interference. Therefore, based on the detected interference bandwidth B and interference power P, the larger B or P is, the more taps need to be enabled.

[0066] In one embodiment, the anti-interference algorithm used in the interference suppression structure includes, but is not limited to, the STAP algorithm, the power inversion algorithm, or the space-frequency adaptive processing method.

[0067] In addition, such as Figure 5 As shown, the second embodiment of the present invention also proposes a low-power anti-interference system, the system comprising: a signal receiving module 10, an interference parameter detection module 20, an adjustment module 30, and a controllable interference suppression structure 40. The output terminal of the signal receiving module 10 is connected to the input of the interference parameter detection module 20 and the controllable interference suppression structure 40, respectively. The output of the interference parameter detection module 20 is connected to the controllable interference suppression structure 40 via the adjustment module 30, wherein:

[0068] The signal receiving module 10 is used to acquire spatial interference signals;

[0069] The interference parameter detection module 20 is used to process the spatial interference signal using a signal processing method to obtain interference parameters, which include interference quantity, interference power and interference bandwidth.

[0070] The adjustment module 30 is used to dynamically adjust the number of array elements and the number of taps in the controllable interference suppression structure 40 based on the interference parameters. The controllable interference suppression structure 40 defaults to using the maximum number of array elements and the maximum number of taps to implement the anti-interference algorithm.

[0071] The number of taps is directly proportional to the interference power or the interference bandwidth, and the number of array elements is N+1, where N is the number of interference elements.

[0072] This embodiment calculates interference parameters based on spatial interference signals and dynamically adjusts the number of array elements and taps of the anti-interference system according to interference power and interference quantity. By adaptively adjusting the anti-interference system, low power consumption is achieved.

[0073] In one embodiment, the signal receiving module 10 employs a multi-element array, which may be a two-dimensional area array or a three-dimensional array.

[0074] In one embodiment, the interference parameter detection module 20 includes:

[0075] The first detection unit is used to process the spatial interference signal using a source number estimation method to obtain the number of interference signals;

[0076] The second detection unit is used to process the spatial interference signal using a fast Fourier transform to obtain the interference power and the interference bandwidth.

[0077] In one embodiment, the adjustment module 30 includes:

[0078] A tap quantity adjustment unit is used to determine the number of enable taps based on the proportional relationship between the number of taps and the interference power or the interference bandwidth, and to control the enable of the taps corresponding to the number of enable taps through an enable control signal.

[0079] The array element quantity adjustment unit is used to control the array element to stop participating in anti-interference when all taps of a certain array element are disabled.

[0080] In one embodiment, the anti-interference algorithm used by the controllable interference suppression structure is the STAP algorithm, the power inversion algorithm, or the space-frequency adaptive processing method.

[0081] It should be noted that other embodiments or implementation methods of the low-power anti-interference system described in this invention can refer to the above-described method embodiments, and will not be repeated here.

[0082] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0083] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0084] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0085] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0086] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A low-power anti-interference method, characterized in that, The method comprises: acquiring a spatial interference signal; processing the spatial interference signal by using a signal processing method to obtain interference parameters, the interference parameters comprising an interference quantity, an interference power and an interference bandwidth; dynamically adjusting the number of array elements and the number of taps in an interference suppression structure based on the interference parameters, comprising determining an enabled number based on a proportional relationship between the number of taps and the interference power or the interference bandwidth, and controlling the taps corresponding to the enabled number to be enabled by using an enabling control signal; when all the taps of a certain array element are not enabled, controlling the array element to stop participating in anti-interference; wherein the interference suppression structure defaults to implementing an anti-interference algorithm with a maximum value of the number of array elements and a maximum value of the number of taps; wherein the number of taps is in a proportional relationship with the interference power or the interference bandwidth, and the number of array elements is N+1, N being the interference quantity.

2. The low power consumption anti-jamming method of claim 1, wherein, The processing of the spatial interference signal by using a signal processing method to obtain interference parameters comprises: processing the spatial interference signal by using a signal source quantity estimation method to obtain the interference quantity; processing the spatial interference signal by using a fast Fourier transform to obtain the interference power and the interference bandwidth.

3. The low power consumption anti-jamming method of claim 1, wherein, The anti-interference algorithm uses an STAP algorithm or a power inversion algorithm or a space-frequency adaptive processing method.

4. The low power consumption anti-jamming method of claim 1, wherein, The array of array elements is a two-dimensional surface array or a three-dimensional array.

5. A low power consumption anti-jamming system, characterized in that, The system comprises a signal receiving module, an interference parameter detection module, an adjusting module and a controllable interference suppression structure, the output end of the signal receiving module being connected to the input of the interference parameter detection module and the controllable interference suppression structure respectively, and the output of the interference parameter detection module being connected to the controllable interference suppression structure through the adjusting module, wherein: the signal receiving module is configured to acquire a spatial interference signal; the interference parameter detection module is configured to process the spatial interference signal by using a signal processing method to obtain interference parameters, the interference parameters comprising an interference quantity, an interference power and an interference bandwidth; the adjusting module is configured to dynamically adjust the number of array elements and the number of taps in the controllable interference suppression structure based on the interference parameters, the controllable interference suppression structure defaulting to implementing an anti-interference algorithm with a maximum value of the number of array elements and a maximum value of the number of taps; wherein the number of taps is in a proportional relationship with the interference power or the interference bandwidth, and the number of array elements is N+1, N being the interference quantity. The adjusting module comprises: a tap number adjusting unit configured to determine an enabled number based on a proportional relationship between the number of taps and the interference power or the interference bandwidth, and control the taps corresponding to the enabled number to be enabled by using an enabling control signal; an array element number adjusting unit configured to control a certain array element to stop participating in anti-interference when all the taps of the array element are not enabled.

6. The low power consumption anti-jamming system of claim 5, wherein, The signal receiving module uses a multi-array element array, and the array uses a two-dimensional surface array or a three-dimensional array.

7. The low power consumption anti-jamming system of claim 5, wherein, The interference parameter detection module comprises: a first detection unit configured to process the spatial interference signal by using a signal source quantity estimation method to obtain the interference quantity; A second detection unit is configured to process the spatial interference signal by using fast Fourier transform to obtain the interference power and the interference bandwidth.

8. The low power consumption anti-jamming system of claim 5, wherein, The anti-interference algorithm used by the controllable interference suppression structure is STAP algorithm, power inversion algorithm or space-frequency adaptive processing method.

Citation Information

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