Printed circuit board for mounting ball grid array package chip and manufacturing method thereof

Abstract

The application relates to the technical field of circuit boards, and discloses a printed circuit board for mounting a ball grid array package chip and a manufacturing method thereof. The manufacturing method comprises the following steps: providing a first sub-board, wherein the first sub-board comprises a circuit area and a board edge area surrounding the periphery of the circuit area, and the circuit area comprises a first area; manufacturing inner-layer circuits on the first sub-board, manufacturing a first target on the first area, and manufacturing a second target on the board edge area; providing a second sub-board, wherein the second sub-board comprises a second area; pressing the first sub-board and the second sub-board, and making the first area of the first sub-board opposite to the second area of the second sub-board; manufacturing a first hole in the second area of the second sub-board according to the first target, and manufacturing a second hole on the second sub-board according to the second target. The printed circuit board and the manufacturing method thereof can solve the technical problem of low alignment accuracy between blind holes and circuit patterns in related circuit board products by improving the blind hole manufacturing process of the circuit board.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit board, in particular to a printed circuit board for mounting ball grid array package chip and a manufacturing method thereof. BACKGROUND

[0002] Ball grid array package (BGA) is a kind of surface mount packaging technology applied to integrated circuit, BGA package can realize interconnection with printed circuit board by making array solder balls on the bottom of the package body as I / O terminal of the circuit. In BGA packaging technology, the surface of the bottom of the package body is covered with array distributed pins, the number of pins is large, and the average length of the pins is short, which meets the development trend of small size, high integration and high performance of printed circuit board.

[0003] In the prior art, a printed circuit board for mounting ball grid array package chip is provided, the printed circuit board includes a BGA area for mounting BGA package chip, and the BGA area is provided with blind holes and circuit patterns. Since the number of pins on the BGA package chip is large, the blind holes in the BGA area are densely distributed, and the aperture of the blind hole and the distance between the blind holes are small. When the printed circuit board is manufactured by using the conventional manufacturing method, the alignment accuracy between the blind holes and the circuit patterns in the BGA area on the circuit board is low, and problems such as hole deviation and abnormal wiring are prone to occur, which affects the blind hole conduction effect and the quality of the circuit board. SUMMARY

[0004] The present application aims to provide a printed circuit board for mounting ball grid array package chip and a manufacturing method thereof, which solves the technical problem of low alignment accuracy between blind holes and circuit patterns in related circuit board products.

[0005] To solve the above problems, in a first aspect, the present application provides a manufacturing method of a printed circuit board for mounting ball grid array package chip, the manufacturing method comprising:

[0006] providing a first sub-board, the first sub-board comprising a circuit area and a board edge area surrounding the periphery of the circuit area, the circuit area comprising a first area;

[0007] manufacturing inner layer circuit on the first sub-board, and manufacturing a first target on the first area and a second target on the board edge area;

[0008] providing a second sub-board, the second sub-board comprising a second area;

[0009] pressing the first sub-board and the second sub-board together, and making the first area of the first sub-board opposite to the second area of the second sub-board;

[0010] The first holes are made in a second area of the second sub-board according to the first targets, and the second holes are made on the second sub-board according to the second targets, the distribution density of the first holes being greater than that of the second holes.

[0011] In an embodiment, after the first holes and the second holes are made on the second sub-board, the manufacturing method further comprises: making a hole ring and an outer layer circuit on the second sub-board by using a laser direct imaging technology.

[0012] In an embodiment, the hole ring comprises a first hole ring and a second hole ring, the first hole ring surrounding the hole mouth of the first hole, and the second hole ring surrounding the hole mouth of the second hole.

[0013] The outer layer circuit comprises a first circuit and a second circuit, the first circuit being at least partially arranged in the second area, and the second circuit being arranged outside the second area.

[0014] Making the hole ring and the outer layer circuit on the second sub-board comprises: making the first hole ring and the first circuit, and making the second hole ring and the second circuit.

[0015] In an embodiment, the first hole ring has an outer diameter R1 and an inner diameter R2.

[0016] If R1-R2≥50μm, the making of the first hole ring and the first circuit comprises: making the first hole ring and the first circuit according to the first targets.

[0017] If R1-R2<50μm, while the first holes are made in the second area of the second sub-board, the manufacturing method further comprises: making a third target in the second area according to the first targets; and the making of the first hole ring and the first circuit comprises: making the first hole ring and the first circuit according to the third target.

[0018] In an embodiment, before the first holes and the second holes are made, the manufacturing method further comprises:

[0019] Grabbing the second targets, and drilling positioning target holes at the positions of the second targets;

[0020] Making target windows on the second sub-board according to the positioning target holes, so as to expose the first targets.

[0021] In an embodiment, the target windows are made by using a laser, a milling cutter or an etching liquid.

[0022] In an embodiment, the number of the first targets is multiple, and the multiple first targets are not collinear.

[0023] In an embodiment, the connecting lines of the multiple first targets enclose a square area.

[0024] In an embodiment, the first target and the second target are circular copper plates.

[0025] The manufacturing method of the printed circuit board for mounting the ball grid array package chip provided by the application comprises the following steps: manufacturing a first target and a second target simultaneously when manufacturing inner layer circuits on a first sub-board; and manufacturing a first hole and a second hole on the second sub-board step by step according to the first target and the second target respectively after pressing the first sub-board and the second sub-board. Since the first target is arranged in the first region, the alignment degree between the first target and the inner layer circuits in the first region is high, and the expansion error is small, so that the alignment degree between the first hole and the inner layer circuits can be effectively improved by adding the first target and manufacturing the first hole according to the first target, and the conduction effect of the blind hole on the printed circuit board and the quality of the printed circuit board can be improved.

[0026] In a second aspect, the application further provides a printed circuit board for mounting a ball grid array package chip, which is manufactured by the manufacturing method as described in the first aspect.

[0027] The printed circuit board for mounting the ball grid array package chip provided by the application can effectively improve the alignment degree among the inner layer circuits, the blind hole and the outer layer circuits by improving the manufacturing process of the blind hole and the outer layer circuits on the printed circuit board, specifically, by arranging different targets and manufacturing the blind hole and the outer layer circuits step by step in different regions, so that the conduction effect of the blind hole on the printed circuit board and the quality of the printed circuit board can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description only constitute some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor based on these drawings.

[0029] Figure 1 The structural schematic diagram of the printed circuit board provided by the embodiment of the application;

[0030] Figure 2 One of the flowcharts of the manufacturing method provided by the embodiment of the application;

[0031] Figure 3 The second flowchart of the manufacturing method provided by the embodiment of the application.

[0032] Explanation of main element symbols:

[0033] 1, first target; 2, second target; 3, first hole; 4, second hole. DETAILED DESCRIPTION

[0034] In order to make the purposes, technical solutions, and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are merely intended to explain the present application and not to limit the present application.

[0035] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly or indirectly on the other component. When a component is referred to as being "connected to" another component, it can be directly or indirectly connected to the other component. The terms "upper", "lower", "left", "right", and the like indicate the orientation or positional relationship shown in the drawings based on the orientation or positional relationship shown in the drawings, and are merely for the convenience of description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the patent. The terms "first", "second" are merely for the purpose of convenient description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features. The meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0036] In the present application, the reference to "one embodiment", "some embodiments" or "embodiments" means that the specific features, structures or characteristics described in connection with the embodiment are included in one or more embodiments of the present application. Therefore, the statements "in one embodiment", "in some embodiments", "in other some embodiments", "in further some embodiments" and the like appearing in different places in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized. In addition, in one or more embodiments, specific features, structures or characteristics can be combined in any suitable manner.

[0037] In a first aspect, the present application provides a manufacturing method of a printed circuit board for mounting a ball grid array package chip, as shown in Figure 1 and Figure 2 The manufacturing method comprises the following steps:

[0038] S1, providing a first sub-board, the first sub-board comprising a circuit area and a board edge area surrounding the periphery of the circuit area, the circuit area comprising a first area.

[0039] The first sub-board can be a double-layer core board, or can be a multi-layer core board with multiple layers of circuits already manufactured. The number of layers of the first sub-board is calculated according to the number of copper layers it contains.

[0040] Figure 1 The area indicated by arrow A can be understood as the circuit area, the area indicated by arrow B can be understood as the board edge area, and the area indicated by arrow C can be understood as the first area.

[0041] S2, making inner layer circuit on the first sub-board, and making first target 1 on the first area and second target 2 on the board edge area.

[0042] The inner layer circuit, the first target 1 and the second target 2 are all formed on the metal layer of the first sub-board.

[0043] The first target 1 is arranged in the non-functional circuit area and does not overlap with the inner layer circuit.

[0044] S3, providing a second sub-board, the second sub-board comprising a second area.

[0045] S4, pressing the first sub-board and the second sub-board, and making the first area of the first sub-board opposite to the second area of the second sub-board.

[0046] The second sub-board can be an outer layer core board, or a metal layer and an insulating medium layer pressed on the first sub-board. The second sub-board is size-fitted with the first sub-board, and further comprises an outer layer circuit area and an outer layer board edge area opposite to the circuit area and the board edge area of the first sub-board respectively, and the first sub-board and the second sub-board are pressed to form a mother board of the printed circuit board.

[0047] The second area is a BGA area for mounting BGA packaged chips.

[0048] S5, making first holes 3 on the second area of the second sub-board according to the first target 1, and making second holes 4 on the second sub-board according to the second target 2. The distribution density of the first holes 3 is greater than that of the second holes 4.

[0049] Herein, making the first holes 3 according to the first target 1 means that the first holes 3 are drilled by using a drilling machine or the like with the first target 1 as the alignment reference; and making the second holes 4 according to the second target 2 means that the second holes 4 are drilled by using a drilling machine or the like with the second target 2 as the alignment reference.

[0050] The first holes 3 and the second holes 4 are made step by step, and the sequence is not limited. Optionally, in an embodiment, the first holes 3 arranged on the partial board surface can be made first, and then the second holes 4 arranged on the whole board surface are made.

[0051] The first holes 3 are high-density blind holes, and the second holes 4 are conventional blind holes or through holes. The high-density blind hole and the conventional blind hole are relative concepts. Compared with the conventional blind hole, the high-density blind hole has a smaller hole diameter and a more dense distribution. The hole diameter and size of the high-density blind hole and the conventional blind hole are designed according to actual needs, which are not limited here.

[0052] In an embodiment, the first holes 3 are used to connect the BGA packaged chips, and the hole diameter ranges from 15 μm to 25 μm.

[0053] The application provides a manufacturing method of a printed circuit board for mounting a ball grid array package chip. When manufacturing inner layer circuits on a first sub-board, a first target 1 and a second target 2 are synchronously manufactured. After pressing the first sub-board and a second sub-board, the first hole 3 and the second hole 4 are step by step manufactured on the second sub-board according to the first target 1 and the second target 2 respectively. Since the first target 1 is arranged in the first area, the alignment between the first target 1 and the inner layer circuits in the first area is high, and the expansion error is small. Therefore, by adding the first target 1 and manufacturing the first hole 3 according to the first target 1, the alignment between the first hole 3 and the inner layer circuits can be effectively improved, and the conduction effect of the blind hole on the printed circuit board and the quality of the printed circuit board can be improved.

[0054] It should be noted that the first sub-board and the second sub-board can be divided into a plurality of first areas and a plurality of second areas. Correspondingly, a corresponding first target 1 can be arranged in each first area. The first hole 3 and the second hole 4 are manufactured by step by step manufacturing. During the step by step manufacturing process, multiple alignment operations need to be performed according to different targets. The number of step by step manufacturing and the number of alignment operations can be designed according to actual needs, which is not limited herein. In addition, the circuit board manufactured by the above manufacturing method can be directly manufactured into a printed circuit board through subsequent processes, or can be re-used as an inner layer board for further lamination to manufacture a multi-layer board.

[0055] In addition, Figure 1 The accompanying drawings show a structure diagram of a printed circuit board, which is used to illustrate the positional relationship between the first target 1, the second target 2, the first hole 3 and the second hole 4, and to illustrate the division of each area. Figure 1 The content shown does not refer to the actual structure, and does not limit the actual structure of the printed circuit board.

[0056] In one embodiment provided by the application, as shown in Figure 1 and Figure 2 After the first hole 3 and the second hole 4 are manufactured on the second sub-board, the manufacturing method further includes:

[0057] S6, manufacturing a hole ring and an outer layer circuit on the second sub-board by using a laser direct imaging technology.

[0058] The laser direct imaging technology (LDI) is a technology of directly using data output by a CAM workstation to drive a laser imaging device to perform image imaging on a printed circuit board coated with a photoresist.

[0059] By using the laser direct imaging technology to manufacture the outer layer circuit, on the one hand, the circuit manufacturing process can be simplified, and the manufacturing cost can be saved. On the other hand, the image resolution and positioning accuracy are high, which is beneficial to manufacturing fine circuits.

[0060] The hole ring comprises a first hole ring and a second hole ring, the first hole ring surrounds the hole of the first hole 3, and the second hole ring surrounds the hole of the second hole 4. The outer layer circuit comprises a first circuit and a second circuit, the first circuit is at least partially arranged in the second area, and the second circuit is arranged outside the second area. The first circuit is connected to the first hole 3 through the first hole ring, and the second circuit is connected to the second hole 4 through the second hole ring.

[0061] In one embodiment of the present application, the outer layer circuit manufactured on the second sub-board comprises: manufacturing the first hole ring and the first circuit, and manufacturing the second hole ring and the second circuit.

[0062] That is, the first hole ring and the first circuit are manufactured through the same process, and the second hole ring and the second circuit are manufactured through the same process, and the manufacturing sequence is not limited.

[0063] By using the manufacturing method, the alignment between the outer layer circuit and the blind hole can be improved, so that the conduction effect of the blind hole on the printed circuit board and the quality of the printed circuit board can be further improved.

[0064] It can be understood that in some embodiments, when the line width of the first circuit is large and the distribution density is small, the first circuit and the second circuit can also be manufactured synchronously by using a conventional manufacturing process.

[0065] In the manufacturing method provided by the present application, when the hole ring and the outer layer circuit are manufactured, a suitable alignment reference is selected to ensure that the alignment between the hole ring and the blind hole and between the outer layer circuit and the hole ring meets the design requirements, so that problems such as poor conduction of the blind hole or poor connection of the circuit can be avoided.

[0066] Since the aperture of the second hole 4 is relatively large and the distribution density is small, and the line width of the second circuit is large, the alignment requirement between the second hole ring and the second circuit and the second hole 4 is low, and the second hole ring and the second circuit can be directly manufactured by taking the second target 2 as the alignment reference.

[0067] Since the aperture of the first hole 3 is relatively small and the distribution density is high, and the line width of the first circuit is small, the alignment requirement between the first hole ring and the first circuit and the first hole 3 is high, and the first hole ring and the first circuit can be manufactured by selecting different alignment references according to the size of the first hole ring.

[0068] The outer diameter of the first hole ring is R1, and the inner diameter is R2.

[0069] If R1-R2≥50μm, the manufacturing of the first hole ring and the first circuit comprises: manufacturing the first hole ring and the first circuit according to the first target 1.

[0070] If R1-R2<50μm, while the first hole 3 is made in the second area of the second sub-board, the method further comprises: making a third target in the second area according to the first target 1; and making the first hole ring and the first circuit comprises: making the first hole ring and the first circuit according to the third target. The third target is arranged in the non-functional circuit area and does not overlap with the first hole 3 and the outer layer circuit. The third target is made synchronously with the first hole 3, and the alignment between the third target and the first hole 3 is higher, so that the alignment between the first hole ring and the first circuit made according to the third target and the first hole 3 is also higher, and the first hole ring is less likely to be offset or broken.

[0071] In one embodiment of the present application, as shown in Figure 1 、 Figure 2 and Figure 3 Before the first hole 3 and the second hole 4 are made, the method further comprises:

[0072] S501, grab the second target 2, and drill a positioning target hole at the position of the second target 2.

[0073] Specifically, the second target 2 is identified, and a positioning target hole is punched at the position of the second target 2 by using a punching needle or other processing equipment.

[0074] The positioning target hole can be used as a positioning reference for the second hole 4, the second hole ring and the second circuit.

[0075] S502, make a target window on the second sub-board according to the positioning target hole to expose the first target 1.

[0076] The area of the target window is larger than the area of the corresponding first target 1, that is, the projection of the target window at the first target 1 can cover the first target 1, so that the first target 1 can be exposed without damage.

[0077] The target window is arranged to expose the first target 1, which can eliminate the interference factors when the X-ray target machine grabs the target, and reduce the difficulty of grabbing the target.

[0078] When the target window is made, the outer layer metal layer and the outer layer substrate (that is, the insulating dielectric layer) opposite to the first target 1 need to be removed, and in the method provided by the present application, the target window is made by using laser, milling cutter or etching liquid.

[0079] It can be understood that the above methods can be used in combination or individually. For example, the outer layer metal layer and the outer layer substrate can be removed in sequence by laser ablation; or the outer layer metal layer can be removed by etching liquid etching, and then the outer layer substrate can be removed by laser ablation; or the outer layer metal layer can be removed by mechanical milling cutter, and then the outer layer substrate can be removed by laser ablation.

[0080] To ensure the use effect of the first target 1, in one embodiment of the present application, the number of the first targets 1 is multiple, and the multiple first targets 1 are not collinear.

[0081] Further, the lines of the multiple first targets 1 enclose a square region.

[0082] In one embodiment, the number of the first targets 1 is four. The four first targets 1 are distributed at the four corners or the four edges of the first region.

[0083] In one embodiment of the present application, the first target 1 and the second target 2 are circular copper plates. The circular target shape is regular and easy to grab the center point.

[0084] It can be understood that the first target 1 and the second target 2 can also be other regular patterns that are easy to grab the center point of the target, such as a circular ring, etc.

[0085] The complete process flow of the present solution includes: engineering design, cutting, making inner layer circuit and target, pressing the substrate, X-ray targeting, laser drilling, electroplating treatment, making outer layer circuit, quality detection, and post-process.

[0086] Among them, the engineering design is to design the target pattern and the circuit pattern according to the content described in the present solution. The cutting is to cut the copper-clad plate and the PP large material into the specified size according to the production layout size requirement. The electroplating treatment is to sink copper in the hole that needs to be metallized and electroplate a copper layer with a specified thickness. The quality detection is inner layer AOI (Automatic Optical Inspection), which compares the circuit pattern on the circuit board with the designed circuit pattern by using optical principles to check whether the circuit has open circuit, short circuit and other bad problems.

[0087] In summary, the manufacturing method provided by the present application can effectively improve the alignment degree between the inner layer circuit, the blind hole and the outer layer circuit by improving the manufacturing process of the blind hole and the outer layer circuit on the printed circuit board, thereby ensuring the conduction effect of the blind hole on the printed circuit board and the quality of the printed circuit board.

[0088] In a second aspect, the present application provides a printed circuit board for mounting a ball grid array package chip, which is manufactured by the manufacturing method of the first aspect.

[0089] The printed circuit board for mounting a ball grid array package chip provided by the present application can effectively improve the alignment degree between the inner layer circuit, the blind hole and the outer layer circuit by improving the manufacturing process of the blind hole and the outer layer circuit on the printed circuit board, specifically by setting different targets and manufacturing the blind hole and the outer layer circuit in different zones and steps, thereby improving the conduction effect of the blind hole on the printed circuit board and the quality of the printed circuit board.

[0090] The above-described embodiments are only used to illustrate the technical solutions of the present application, but not limit them; although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A method for manufacturing a printed circuit board for mounting ball grid array packaged chips, characterized in that, The manufacturing method includes: A first sub-board is provided, the first sub-board including a circuit area and a board edge area surrounding the circuit area, the circuit area including a first region; An inner layer circuit is fabricated on the first sub-board, and a first target is fabricated in the first region and a second target is fabricated in the edge region of the board. A second subboard is provided, the second subboard including a second region; Press the first sub-plate and the second sub-plate together, and make the first region of the first sub-plate face the second region of the second sub-plate; A first hole is made in a second region of the second sub-plate according to the first target, and a second hole is made in the second sub-plate according to the second target, wherein the distribution density of the first hole is greater than the distribution density of the second hole; A first hole ring, a first line, a second hole ring, and a second line are fabricated on the second sub-board. The first hole ring is arranged around the first hole. The first line is at least partially located in the second area and connected to the first hole through the first hole ring. The second hole ring is arranged around the second hole. The second line is located outside the second area and connected to the second hole through the second hole ring. Wherein, the outer diameter of the first hole ring is R1 and the inner diameter is R2. If R1-R2≥50μm, the first hole ring and the first circuit are made according to the first target. If R1-R2<50μm, a third target is made in the second region according to the first target, and the first hole ring and the first circuit are made according to the third target. The third target is set in the non-functional circuit area of ​​the second sub-board and does not overlap with the first hole and the first circuit.

2. The manufacturing method according to claim 1, characterized in that, The manufacturing method further includes: using laser direct imaging technology to manufacture the first hole ring, the first circuit, the second hole ring, and the second circuit.

3. The manufacturing method according to claim 1, characterized in that, Before making the first hole and the second hole, the manufacturing method further includes: Grasp the second target and drill a positioning target hole at the position of the second target; Based on the positioning target hole, a target window is made on the second sub-plate to expose the first target.

4. The manufacturing method according to claim 3, characterized in that, The target window is created using a laser, milling cutter, or etching solution.

5. The manufacturing method according to any one of claims 1-4, characterized in that, There are multiple first targets, and the multiple first targets are not collinear.

6. The manufacturing method according to claim 5, characterized in that, The lines connecting multiple first targets form a square area.

7. The manufacturing method according to any one of claims 1-4, characterized in that, The first target and the second target are circular copper disks.

8. A printed circuit board for mounting ball grid array packaged chips, characterized in that, It is manufactured using the method described in any one of claims 1-7.

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