Semiconductor testing device, semiconductor testing method, and method for manufacturing semiconductor device

Abstract

The test body (100) comprises a first semiconductor element (1), a first main electrode (51) electrically connected to the positive electrode of the first semiconductor element (1), a second main electrode (52) electrically connected to the negative electrode of the first semiconductor element (1), and a first capacitor (22) connected between the first main electrode (51) and the second main electrode (52). The semiconductor test device (110) comprises a DC power supply (30) connected between a first probe (41) and a second probe (42), and a control unit (31). When the first probe (41) is connected to the first main electrode (51) and the second probe (42) is connected to the second main electrode (52), the control unit (31) charges the first capacitor (22) with a DC voltage supplied from the DC power supply (30), and after charging the first capacitor (22), inputs a control signal for turning on the first semiconductor element (1) to a control electrode of the first semiconductor element (1).

Description

Technical Field

[0001] The present disclosure relates to a semiconductor testing device, a semiconductor testing method, and a method for manufacturing a semiconductor device. Background Art

[0002] The product performance of semiconductor elements is guaranteed by performing characteristic tests (characteristic inspection and screening, etc., by applying high voltage and / or high current to semiconductor elements) in the test process of the manufacturing process. On the other hand, as a problem of such characteristic tests, there is the following problem: when the semiconductor element is destroyed, a large destruction current flows between the semiconductor element and the semiconductor test device, thereby damaging the semiconductor element and the semiconductor test device.

[0003] In Japanese Patent Gazette No. 2014-175643 (Patent Document 1), the following structure is disclosed: as a test method for a semiconductor transistor, it includes a process of charging one end of a capacitor built into a test voltage application circuit to a test voltage, and a process of applying a test voltage to the drain terminal by connecting one end of the charged capacitor to the drain terminal of the transistor under test.

[0004] In Patent Document 1, a test voltage is applied to the drain terminal of the transistor under test via a pre-charged capacitor, so that when the transistor under test fails during a high voltage test, the amount of charge flowing into the transistor under test from the test device side can be suppressed to a minimum. This prevents damage from spreading from the location where the failure occurs, making it easy to identify the factor causing the failure and the location where the failure occurs.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2014-175643 Summary of the invention

[0008] Problem that the invention aims to solve

[0009] However, in the test method described in Patent Document 1, since the test device includes a capacitor, in a dynamic characteristic test such as a short-circuit test requiring a large amount of charge, if a semiconductor element as a test object is damaged, damage to the test device such as a test jig is likely to progress. As a result, problems such as the need to repair or replace the test device may occur.

[0010] The present disclosure is made to solve the above-mentioned problems, and an object of the present disclosure is to provide a semiconductor testing device, a semiconductor testing method, and a method for manufacturing a semiconductor device having the semiconductor element, which can suppress the progress of damage to the testing device caused by the destruction current of the semiconductor element.

[0011] Means used to solve problems

[0012] In one embodiment of the present disclosure, a semiconductor test device is a semiconductor test device for testing the characteristics of a test body having a first semiconductor element. The first semiconductor element has a positive electrode, a negative electrode, and a control electrode, and is turned on or off according to a first control signal input to the control electrode. The test body also has: a first main electrode, which is electrically connected to the positive electrode of the first semiconductor element; a second main electrode, which is electrically connected to the negative electrode of the first semiconductor element; and a first capacitor, which is electrically connected between the first main electrode and the second main electrode. The semiconductor test device includes: a first probe and a second probe; a DC power supply, which is electrically connected between the first probe and the second probe; and a control unit, which is used to generate a first control signal. When the first probe is connected to the first main electrode and the second probe is connected to the second main electrode, the control unit charges the first capacitor by a DC voltage supplied from the DC power supply, and after charging the first capacitor, inputs a first control signal for turning on the first semiconductor element to the control electrode of the first semiconductor element.

[0013] In another embodiment of the present disclosure, a semiconductor testing method is a semiconductor testing method for testing the characteristics of a test body having a semiconductor element. The semiconductor body element has a positive electrode, a negative electrode, and a control electrode, and is turned on or off according to a control signal input to the control electrode. The test body also has: a first main electrode, which is electrically connected to the positive electrode of the semiconductor element; a second main electrode, which is electrically connected to the negative electrode of the semiconductor element; and a first capacitor, which is electrically connected between the first main electrode and the second main electrode. The semiconductor testing method has the following steps: charging the first capacitor by a DC voltage supplied from a DC power supply electrically connected between the first main electrode and the second main electrode; and after charging the first capacitor, inputting a control signal for turning on the semiconductor element to the control electrode of the semiconductor element.

[0014] In another embodiment of the present disclosure, a method for manufacturing a semiconductor device includes the following steps: assembling a semiconductor device by mounting a semiconductor element in a housing; testing the characteristics of the semiconductor device; and commercializing a semiconductor device that passes the test. The semiconductor element has a positive electrode, a negative electrode, and a control electrode, and is turned on or off according to a control signal input to the control electrode. The semiconductor device also includes: a first main electrode electrically connected to the positive electrode of the semiconductor element; a second main electrode electrically connected to the negative electrode of the semiconductor element; and a first capacitor electrically connected between the first main electrode and the second main electrode. The test process includes the following steps: charging the first capacitor by a DC voltage supplied from a DC power supply electrically connected between the first main electrode and the second main electrode; and after charging the first capacitor, inputting a control signal for turning on the semiconductor element to the control electrode of the semiconductor element.

[0015] Effects of the Invention

[0016] According to the present disclosure, it is possible to provide a semiconductor testing device, a semiconductor testing method, and a method for manufacturing a semiconductor device that can suppress the progress of damage to the testing device caused by a breakdown current of a semiconductor element. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 : is a circuit diagram showing the structure of the semiconductor testing device according to the first embodiment.

[0018] Figure 2 This is a timing chart for explaining the operation of the test device and the test object in the short-circuit test of the first embodiment.

[0019] Figure 3 This is a flowchart for explaining the processing steps of the semiconductor testing method according to the first embodiment.

[0020] Figure 4 This is a circuit diagram showing the structure of a semiconductor testing device according to the second embodiment.

[0021] Figure 5 This is a timing chart for explaining the operation of the test device and the test object in the short-circuit test of the second embodiment.

[0022] Figure 6 This is a flowchart for explaining the processing steps of the test method of the second embodiment.

[0023] Figure 7 This is a circuit diagram showing the structure of a semiconductor testing device according to a third embodiment.

[0024] Figure 8 : is a circuit diagram showing the structure of a semiconductor testing device according to a fourth embodiment.

[0025] Fig. 9 This is a circuit diagram showing the structure of a semiconductor testing device according to a fifth embodiment.

[0026] Fig.10 This is a flowchart for explaining the processing steps of the semiconductor testing method according to the fifth embodiment.

[0027] Fig.11 This is a flowchart for explaining the processing steps of the semiconductor testing method according to the fifth embodiment.

[0028] Fig.12 This is a circuit diagram showing the structure of a semiconductor testing device according to a sixth embodiment.

[0029] Fig.13 This is a timing chart for explaining the operation of the test device and the test object in the short-circuit test of the sixth embodiment.

[0030] Fig.14 This is a flowchart for explaining the processing steps of the short-circuit test in the sixth embodiment.

[0031] Fig.15 This is a timing chart for explaining the operation of the test device and the test object in the short-circuit test of the sixth embodiment.

[0032] Fig.16 This is a flowchart for explaining the processing steps of the short-circuit test in the sixth embodiment.

[0033] Fig.17 This is a block diagram showing a first configuration example of a control unit of a semiconductor testing apparatus.

[0034] Fig.18 This is a block diagram showing a second configuration example of the control unit of the semiconductor testing apparatus.

[0035] Fig.19 This is a flowchart for illustrating a method for manufacturing a semiconductor device according to a sixth embodiment. DETAILED DESCRIPTION

[0036] Hereinafter, the embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In addition, in the following, the same reference numerals are given to the same or corresponding parts in the drawings, and the description thereof will not be repeated in principle.

[0037] Implementation method 1.

[0038] (Structure of semiconductor testing equipment)

[0039] Figure 11 is a circuit diagram showing the structure of a semiconductor test device according to Embodiment 1. The semiconductor test device 110 according to Embodiment 1 is a device for testing dynamic characteristics such as a short-circuit test of a test body 100 having a semiconductor switch element as a test object. In the following description, the semiconductor test device 110 is also referred to as "test device 110" for short.

[0040] Reference Figure 1 The test device 110 includes a DC power supply 30, a control unit 31, a capacitor 32, a switch 33, and probes 41, 42, 43. The DC power supply 30 is configured to apply a DC voltage between the main electrodes 51, 52 of the test body 100. The DC power supply 30 is, for example, a battery. The power supply voltage of the DC power supply 30 is, for example, about 650V.

[0041] The control unit 31 is configured to be electrically connected to the control unit 21 included in the test object 100 , and to control the control unit 21 in order to perform a test on the test object.

[0042] The capacitor 32 and the switch 33 are electrically connected in series between the positive electrode and the negative electrode of the DC power source 30. For example, an electrolytic capacitor, a film capacitor, or a ceramic capacitor can be used for the capacitor 32. The capacitor 32 is useful when a current exceeding the supply capacity of the DC power source 30 is supplied to the test body 100 in a short time. In addition, the DC voltage of the DC power source 30 can be smoothed by the capacitor 32. The capacitor 32 corresponds to an embodiment of the "second capacitor".

[0043] The switch 33 constitutes a cutoff circuit for cutting off the charging of the capacitor 32 by the DC power supply 30. A semiconductor switch or a mechanical switch can be applied to the switch 33. Representatively, the semiconductor switch is a semiconductor switch element such as an IGBT or a MOSFET. The mechanical switch is, for example, a switch such as a relay. The switch 33 corresponds to an embodiment of the "first switch".

[0044] The switch 33 is turned on (on) or off (off) according to a control signal supplied from the control unit 31. When the switch 33 is turned on, DC power is supplied from the DC power supply 30 to the capacitor 32, and the capacitor 32 is charged. When the switch 33 is turned off, the charging of the capacitor 32 is cut off.

[0045] The first terminal of the probe 41 is electrically connected to the positive electrode of the DC power supply 30, and the second terminal is electrically connected to the high-voltage side main electrode 51 of the test body 100. The first terminal of the probe 42 is electrically connected to the negative electrode of the DC power supply 30, and the second terminal is electrically connected to the low-voltage side main electrode 52 of the test body 100. The first terminal of the probe 43 is electrically connected to the control unit 31, and the second terminal is electrically connected to the control terminal 53 of the test body 100. The control terminal 53 is electrically connected to the control unit 21. The probe 41 corresponds to an embodiment of the "first probe", and the probe 42 corresponds to an embodiment of the "second probe". The high-voltage side main electrode 51 corresponds to an embodiment of the "first main electrode", and the low-voltage side main electrode 52 corresponds to an embodiment of the "second main electrode".

[0046] (First Configuration Example of Test Item 100)

[0047] As a main circuit, the test body 100 of the first structural example comprises: a full-bridge three-phase inverter circuit 150, which converts the DC power input between the high-voltage side main electrode 51 and the low-voltage side main electrode 52 into three-phase AC power; a three-phase output electrode 25 (U-phase output electrode 25_1, V-phase output electrode 25_2, W-phase output electrode 25_3); a control unit 21 for controlling the three-phase inverter circuit 150; a capacitor 22; and a discharge resistor 23.

[0048] The three-phase inverter circuit 150 includes semiconductor switch elements 1 to 6 and diodes 11 to 16. The semiconductor switch elements 1 to 6 each include a positive electrode, a negative electrode, and a control electrode. The semiconductor switch elements 1 to 6 are configured to control the formation (connection) and cutoff (disconnection) of a current path between the positive electrode and the negative electrode according to a control signal (voltage or current) input from the control unit 21 to the control electrode.

[0049] Any self-arc extinguishing semiconductor element can be applied to the semiconductor switch elements 1 to 6. For example, when the semiconductor switch element is a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), the positive electrode is the drain electrode, the negative electrode is the source electrode, and the control electrode is the gate electrode. When the semiconductor switch element is an IGBT (Insulated Gate Transistor), the positive electrode is the emitter electrode, the negative electrode is the collector electrode, and the control electrode is the gate electrode. Figure 1 In the configuration example, the semiconductor switch element is an IGBT. In the following description, the semiconductor switch elements 1 to 6 are also referred to as IGBTs 1 to 6.

[0050] In the three-phase inverter circuit 150, the emitter electrodes of IGBT1, 3, and 5 are connected to the high-voltage side main electrode 51, and the collector electrodes of IGBT2, 4, and 6 are connected to the low-voltage side main electrode 52. The collector electrode of IGBT1 is connected to the emitter electrode of IGBT2 through the U-phase output electrode 25_1. The collector electrode of IGBT3 is connected to the emitter electrode of IGBT4 through the V-phase output electrode 25_2. The collector electrode of IGBT5 is connected to the emitter electrode of IGBT6 through the W-phase output electrode 25_3. The three-phase output electrode 25 is connected to a load such as a motor, for driving the load.

[0051] Diodes 11 to 16 are connected in anti-parallel to IGBTs 1 to 6, respectively, to form freewheeling diodes. When MOSFET is used as the semiconductor switching element, the built-in body diode can be used as a freewheeling diode. As a material constituting the semiconductor switching element, in addition to silicon (Si), silicon carbide (SiC) or gallium nitride (GaN) as a wide-bandgap semiconductor can also be applied.

[0052] In addition, a sensing terminal is connected to each emitter electrode of IGBT1 to 6, but the illustration is omitted. The sensing terminal is electrically connected to the control unit 21. A current (hereinafter also referred to as a sensing current) that is obtained by diverting the main current (emitter current) flowing between the collector electrode and the emitter electrode of the corresponding IGBT at a fixed ratio (e.g., 1 / 10000, etc.) flows in the sensing terminal.

[0053] The control unit 21 is configured to control the current flowing to the main electrodes 51, 52 or the three-phase output electrodes 25_1 to 25_3 of the test body 100 based on the sense current of each of the IGBTs 1 to 6. For example, when the sense current of the IGBT 1 becomes greater than a threshold value (for example, greater than 1A), the control unit 21 determines that the main current (emitter current) of the IGBT 1 is an overcurrent, and generates a control signal for shutting down the IGBT 1. The control unit 21 inputs the generated control signal to the gate electrode of the IGBT 1.

[0054] IGBTs 1 to 6 are turned on when the control signal input to the gate electrode changes from an L (logic low) level to an H (logic high) level, and are turned off when the control signal changes from an H level to an L level. In addition, IGBTs 1 to 6 may be configured to be turned on when the control signal changes from an H level to an L level, and to be turned off when the control signal changes from an L level to an H level.

[0055] A function generator (arbitrary waveform generator) can be used as the control unit 21. Alternatively, the functions of the control unit 21 can be realized by software processing and / or hardware processing by a microcomputer.

[0056] In the test of the test body 100 using the test apparatus 110, the control unit 31 generates a control signal for turning on or off the IGBTs 1 to 6. The control unit 21 receives the control signal from the control unit 31 via the probe 43 and the control terminal 53. The control unit 21 inputs the received control signal to the gate electrodes of the IGBTs 1 to 6.

[0057] The capacitor 22 is electrically connected between the high voltage side main electrode 51 and the low voltage side main electrode 52. The capacitor 22 is a capacitor for smoothing a DC voltage. For example, an electrolytic capacitor, a film capacitor, or a ceramic capacitor can be used for the capacitor 22. The capacitor 22 corresponds to an embodiment of the "first capacitor".

[0058] The discharge resistor 23 is a resistor for discharging the capacitor 22 and the wiring of the test body 100 (not shown) and the parasitic capacitance of IGBT1 to 6. For example, in actual operation, when the test body 100 and the external control circuit that controls the test body 100 are electrically disconnected due to a disconnection, the discharge resistor 23 is used to discharge the charge charged to the test body 100. In this case, it is expected that the discharge is completed within a few seconds after the disconnection occurs. For example, when the sum of the capacitor 22, the wiring of the test body 100, and the parasitic capacitance of IGBT1 to 6 is 100μF, the resistance value of the discharge resistor 23 is expected to be about 20kΩ.

[0059] (Operation of semiconductor testing equipment)

[0060] Next, the operation of the semiconductor testing apparatus 110 according to the first embodiment will be described.

[0061] First, as a comparative example of the semiconductor testing method of the first embodiment, a general semiconductor testing method using the testing apparatus 110 will be described.

[0062] In a conventional semiconductor test method, the capacitor 32 is preliminarily charged using the DC power supply 30 by turning on the switch 33 in the test apparatus 110. Thus, the charged capacitor 32 supplies power to the test body 100. In order to reduce costs, the DC power supply 30 is often a high voltage power supply with a maximum output current of 1A or less.

[0063] When the subject in the test body 100 fails while energy is supplied from the capacitor 32 to the subject, the failure of the subject is detected and the switch 33 is quickly closed, thereby suppressing the progress of damage to the subject and the probes 41 and 42 .

[0064] However, when a mechanical switch is used for the switch 33, the time required to close the switch 33 is usually several tens of milliseconds. For example, when the voltage applied between the main electrodes 51 and 52 is 650V, the electrostatic capacitance of the capacitor 32 is 10000μF, and the resistance component included in the current path formed between the capacitor 32 and the subject is 0.2Ω, a current of a maximum of 3250A can flow continuously in the current path for 20 milliseconds. Therefore, when the switch 33 is closed, all the charges accumulated in the capacitor 32 are discharged, which may cause damage to the subject and the probes 41 and 42.

[0065] On the other hand, when a semiconductor switch is used for the switch 33, for example, when an IGBT is used for the switch 33, the time required to close the switch 33 is usually several μ seconds. Therefore, the switch 33 can be closed to cut off the current path before the charge of the capacitor 32 is completely discharged. However, in general, when a current of several thousand A continues to flow for several μ seconds, a probe with a rated current of several tens of A may be damaged to the extent that it cannot be used any more.

[0066] In this way, in a configuration in which energy previously stored in the capacitor 32 of the test apparatus 110 is supplied to the subject, damage to the subject and the probes 41 and 42 may develop due to the time required to close the switch 33 connected in series with the capacitor 32 .

[0067] Next, use Figure 2 and Figure 3 The semiconductor test method of Embodiment 1 is described. In the following description, the element to be tested is IGBT1, and a short-circuit test of IGBT1 is performed as a dynamic characteristic test. In addition, in the short-circuit test, the IGBT3 to 6 other than IGBT1 and IGBT2 connected in series with IGBT1 are always in the off state.

[0068] Figure 2 1 is a timing chart for explaining the operation of the test device 110 and the test body 100 in the short-circuit test of the first embodiment. Figure 2 , the waveforms of the switch 33, the gate voltage of IGBT2, the gate voltage of IGBT1, the emitter current of IGBT1, and the collector-emitter (CE) voltage of IGBT1 are shown in order from the top. Figure 2 In the example of FIG. 1 , the switch 33 is also turned off by receiving a control signal at an L level and turned on by receiving a control signal at an H level, similarly to the IGBT.

[0069] Reference Figure 2At time t0, the control unit 31 inputs an H-level control signal to the gate electrode of IGBT2 through the control unit 21 while keeping the switch 33 in the off state. As a result, IGBT2 is turned on. At this time, an L-level control signal is input to the gate electrode of IGBT1, so IGBT1 is not turned on. Therefore, no current flows between the high-voltage side main electrode 51 and the low-voltage side main electrode 52. In the test device 110, since the switch 33 is turned off, the capacitor 32 is not charged. Therefore, after time t0, only the capacitor 22 of the test body 100 is charged.

[0070] Next, at time t1, the control unit 31 inputs an H-level control signal to the gate electrode of the IGBT 1 through the control unit 21, thereby turning on the IGBT 1. When the IGBT 1 is turned on, the main electrodes 51 and 52 are short-circuited. As a result, a short-circuit current starts to flow between the main electrodes 51 and 52 due to the charge accumulated in the capacitor 22. The short-circuit current flows through Figure 1 The current path 61 shown by the solid line in FIG. 1 flows from the positive electrode of the capacitor 22 to the negative electrode of the capacitor 22 via IGBT1 and IGBT2. Figure 1 The current path 62 indicated by the dotted line in FIG. 6 flows from the positive electrode of the DC power supply 30 to the negative electrode of the DC power supply 30 via the probe 41 , the high voltage side main electrode 51 , the IGBT1 , the IGBT2 , the low voltage side main electrode 52 , and the probe 42 . Figure 2 The waveform of the emitter current of IGBT1 in φ represents the temporal change of the short-circuit current.

[0071] Here, when comparing the short-circuit current flowing in the current path 61 with the short-circuit current flowing in the current path 62, the short-circuit current flowing in the current path 61 is much larger. Therefore, the short-circuit current flowing in the current path 62 can be ignored. This is because, in a conventional test device, the maximum output current of the DC power supply 30 is mostly below 1A, so the short-circuit current reaching several thousand A at time t2 is basically all supplied from the capacitor 22. In addition, the capacitor 22 and the IGBT 1 are built into the same test body 100, while the DC power supply 30 is often set at a position separated from the test body 100 by several meters. In this case, the current path 62 contains a larger stray inductance than the current path 61, so the stray inductance hinders the increase of the current. As a result, sometimes only a current smaller than the maximum output current of the DC power supply 30 flows in the current path 62.

[0072] like Figure 2As shown in FIG. 1 , after time t1, the emitter current (i.e., short-circuit current) of IGBT1 increases. The control unit 21 monitors the emitter current of IGBT1 based on the sense currents of IGBT1 and IGBT2. When the sense current is detected to be above the threshold at time t2, the control unit 21 changes the control signal input to the gate electrode of IGBT1 from the H level to the L level. As a result, IGBT1 is turned off.

[0073] After IGBT1 is turned off at time t2, the short-circuit mode between the main electrodes 51 and 52 is released. Therefore, as shown in waveform k1, the emitter current of IGBT1 decreases sharply after time t2. Simultaneously with the decrease in the emitter current, as shown in waveform k3, the collector-emitter voltage of IGBT1 increases to the H level. At this time, the charge accumulated in the capacitor 22 is discharged through the discharge resistor 23, so the emitter current of IGBT1 decreases according to the time constant CR determined by the electrostatic capacitance C of the capacitor 22 and the resistance value R of the discharge resistor 23. For example, when the electrostatic capacitance C = 1000μF and the resistance value R = 200kΩ, about 63% of the charge is discharged within 2 seconds.

[0074] On the other hand, when the IGBT1 is destroyed in the short-circuit mode, since the IGBT1 is not turned off at time t2, the emitter current continues to increase after time t2 as shown in waveform k2. On the other hand, the collector-emitter voltage of the IGBT1 is maintained at the L level as shown in waveform k4. For example, when the applied voltage between the main electrodes 51 and 52 is 650V, the electrostatic capacitance of the capacitor 22 is 1000μF, and the resistance component included in the current path 61 is 0.2Ω, a maximum short-circuit current of 3250A continues to flow for 2m seconds.

[0075] Here, consider the case where a short-circuit current is supplied to the IGBT 1 from the capacitor 32 built into the test device 110 as in the above-mentioned comparative example. The electrostatic capacitance of the capacitor 22 is set to an optimal capacitance corresponding to the specification of the test body 100, whereas the electrostatic capacitance of the capacitor 32 is sometimes set to 10 times or more of the electrostatic capacitance of the capacitor 22 because the test device 110 needs to test various semiconductor elements.

[0076] When the electrostatic capacitance of capacitor 32 is 10 times the electrostatic capacitance of capacitor 22, when the applied voltage between main electrodes 51 and 52 is 650V, the electrostatic capacitance of capacitor 32 is 10000μF, and the resistance component included in current path 62 is 0.2Ω, after time t1, a maximum current of 3250A continues to flow in probes 41 and 42 for 20ms.

[0077] Generally, the contact area between the probe and the main electrode is smaller than the entire area of ​​the main electrode, and therefore, the rated current of the probe is often several tens of A. Therefore, as described above, due to the continuous flow of a current of up to 3250 A, the probes 41 and 42 may burn out, or the probe 41 and the high-voltage side main electrode 51 and / or the probe 42 and the low-voltage side main electrode 52 may be welded. As a result, each time the IGBT of the test object is damaged, the operation of the test device 110 is stopped, and operations such as replacement of the probes 41 and 42 and / or fault confirmation of the test device 110 are required.

[0078] In contrast, in the semiconductor test method of the first embodiment, when the IGBT 1 as the test object is damaged, a short-circuit current flows in the current path 61 formed between the capacitor 22 and the IGBTs 1 and 2 inside the test body 100, so that a large current can be prevented from flowing to the test device 110. Therefore, it is possible to suppress the progress of damage to the test jig such as the probes 41 and 42 that come into contact with the damaged semiconductor element, damage to the test body 100 caused by damage to the test jig, and poor handling of the test body to be tested next to the test body 100.

[0079] Figure 3 1 is a flowchart for explaining the processing steps of the semiconductor test method according to the first embodiment. Figure 3 2 shows an example of a short-circuit test procedure when the IGBT 1 is used as the object to be tested.

[0080] Reference Figure 3 When the short-circuit test by the test device 110 is started in step S01, the probes 41 and 42 of the test device 110 are connected to the main electrodes 51 and 52 of the test body 100 respectively in step S02, thereby electrically connecting the test body 100 and the test device 110. In addition, the control unit 21 and the control unit 31 are connected in a communicable manner by connecting the probe 43 of the test device 110 to the control terminal 53 of the test body 100. In this state, in step S03, the control unit 31 keeps the switch 33 in the off state, thereby not charging the capacitor 32.

[0081] Next, in step S04, the control unit 21 receives the instruction from the control unit 31 and inputs an H-level control signal to the gate electrode of the IGBT 2, thereby turning on the IGBT 2. Next, in step S05, the control unit 31 applies a DC voltage between the main electrodes 51 and 52 from the DC power supply 30 of the test device 110 via the probes 41 and 42. By applying this DC voltage, the capacitor 22 inside the test body 100 is charged in step S06.

[0082] When the capacitor 22 is charged, the control unit 21 inputs an H-level control signal to the gate electrode of the IGBT 1 in step S07, thereby turning on the IGBT 1. As a result, both the IGBTs 1 and 2 are turned on, and the main electrodes 51 and 52 are short-circuited.

[0083] The control unit 21 monitors the emitter current of IGBT1 based on the sense currents of IGBT1 and IGBT2. When the sense current becomes greater than the threshold value, the control unit 21 detects an overcurrent of the emitter current of IGBT1. In this case, the control unit 21 changes the control signal input to the gate electrode of IGBT1 from the H level to the L level in step S08, thereby turning off IGBT1.

[0084] When the IGBT 1 is not turned off even when receiving the L-level control signal and the sense current continues to increase, the control unit 21 determines that the IGBT 1 is damaged (Yes in S09), and determines in step S10 that the dynamic characteristics of the IGBT 1 are unqualified. On the other hand, when the IGBT 1 is normally turned off and the sense current is reduced, the control unit 21 determines that the IGBT 1 is not damaged (No in S09), and determines in step S11 that the dynamic characteristics of the IGBT 1 are qualified.

[0085] In addition, when the short-circuit test is performed on IGBT2 as the test object, in the above description, IGBT1 can be replaced by IGBT2 and IGBT2 can be replaced by IGBT1. In addition, when the short-circuit test is performed on the IGBTs of other phases of the three-phase inverter circuit 150, IGBT1 can be replaced by the IGBT of the other phase and IGBT2 can be replaced by the IGBT connected in series with the IGBT of the other phase. In this way, the short-circuit test can be performed on all IGBTs 1 to 6 constituting the three-phase inverter circuit 150.

[0086] As described above, according to the semiconductor test device and the semiconductor test method of the first embodiment, the capacitor 22 connected between the main electrodes 51 and 52 in the test body 100 is charged in advance, and the characteristic test of the test object is performed using the energy stored in the capacitor 22. Therefore, when the test object is damaged during the test, a large current can be prevented from flowing into the test device. As a result, the progress of damage to the test device caused by the damage current of the semiconductor element can be suppressed.

[0087] Implementation method 2.

[0088] (Structure of semiconductor testing equipment)

[0089] Figure 4 2 is a circuit diagram showing the structure of a semiconductor testing device according to a second embodiment. Figure 4The semiconductor testing device 110 of the second embodiment and Figure 1 The semiconductor testing device 110 of the first embodiment shown is different from the semiconductor testing device 110 in that a series circuit of the capacitor 32 and the switch 33 is not provided.

[0090] In the semiconductor test method of the first embodiment described above, the switch 33 is opened before applying the DC voltage between the main electrodes 51 and 52 of the test body 100 from the DC power supply 30, thereby preventing the capacitor 32 from being charged. In contrast, in the semiconductor test method of the second embodiment, the test apparatus 110 does not include a series circuit of the capacitor 32 and the switch 33, and therefore, it is not necessary to open the switch 33.

[0091] (Operation of semiconductor testing equipment)

[0092] Next, use Figure 5 and Figure 6 The operation of the semiconductor test device 110 according to the second embodiment will be described. In the second embodiment, as in the first embodiment, the semiconductor element to be tested is set to IGBT1, and a short-circuit test of IGBT1 is performed. Figure 2 and Figure 3 The difference between the operation of the semiconductor testing apparatus 110 according to the first embodiment described in FIG.

[0093] Figure 5 1 is a timing chart for explaining the operation of the test device 110 and the test body 100 in the short-circuit test of the second embodiment. Figure 5 , the waveforms of the gate voltage of IGBT2, the gate voltage of IGBT1, the emitter current of IGBT1, and the collector-emitter voltage of IGBT1 are shown in order from the top. That is, Figure 5 The timing diagram is similar to Figure 2 The waveform of switch 33 is removed from the timing diagram of FIG.

[0094] Figure 6 This is a flowchart for explaining the processing steps of the test method of the second embodiment. Figure 6 Flowchart and from Figure 3 The flowchart shown is the same as the flowchart except that the process of step S03 (process of keeping the switch 33 in the OFF state) is removed.

[0095] In the second embodiment, when the IGBT 1 is turned on after the capacitor 22 in the test body 100 is charged (time t1), the main electrodes 51 and 52 are short-circuited, and the short-circuit current starts to flow using the charge accumulated in the capacitor 22. Most of the short-circuit current at this time is Figure 4Since the current flows through the current path 61 shown in , it is possible to prevent a large current from flowing into the test device 110. Therefore, it is possible to obtain the same operational effects as the semiconductor test device and the test method of the first embodiment.

[0096] Implementation method 3.

[0097] (Second structural example of test body)

[0098] Figure 7 2 is a circuit diagram showing the structure of a semiconductor testing device according to Embodiment 3. Figure 7 The semiconductor testing device 110 of the third embodiment and Figure 1 Compared with the semiconductor testing device 110 of the first embodiment shown, the structure of the test body 100 is different.

[0099] Figure 7 The test body 100 of the second structural example shown includes an IGBT 1, a diode 11, and a capacitor 22. The emitter electrode of the IGBT 1 is connected to the high-voltage side main electrode 51, and the collector electrode of the IGBT 1 is connected to the low-voltage side main electrode 52. The diode 11 is connected in anti-parallel to the IGBT 1. The sense terminal (not shown) of the IGBT 1 is electrically connected to the control unit 21. The capacitor 22 is electrically connected in parallel to the IGBT 1 between the high-voltage side main electrode 51 and the low-voltage side main electrode 52.

[0100] (Operation of semiconductor testing equipment)

[0101] In the semiconductor testing device 110 of the third embodiment, it is also possible to Figure 3 The flowchart shown in the figure performs a short-circuit test on the IGBT1 as the test object. However, since there is no IGBT2 in the test object 100, the processing of step S04 can be omitted. That is, the test device 110 is connected between the main electrodes 51 and 52 of the test object 100 ( Figure 3 S01), keep switch 33 in the off state ( Figure 3 S03 and applying a DC voltage ( Figure 3 After the capacitor 22 receives the DC voltage and is charged ( Figure 3 S06), the control unit 21 turns on IGBT1 ( Figure 3 The short-circuit current is detected based on the sense current of IGBT1. When the sense current of IGBT1 becomes greater than the threshold value, the control unit 21 turns off IGBT1 ( Figure 3 S08), and based on the sensed current after cutoff, determine whether IGBT1 is damaged ( Figure 3 S09).

[0102] In the third embodiment, similarly to the first embodiment, when the IGBT 1 is turned on, most of the short-circuit current flows in Figure 7 Since the current flows through the current path 61 shown in , it is possible to prevent a large current from flowing into the test device 110. Therefore, it is possible to obtain the same operational effects as the semiconductor test device and the test method of the first embodiment.

[0103] Implementation method 4.

[0104] (Third structural example of test body)

[0105] Figure 8 2 is a circuit diagram showing the structure of a semiconductor testing device according to a fourth embodiment. Figure 8 The semiconductor testing device 110 of the fourth embodiment and Figure 1 Compared with the semiconductor testing device 110 of the first embodiment shown, the structure of the test body is different.

[0106] The test body 200 of the third structural example is Figure 1 The test body 100 of the first structural example shown is obtained by adding a boost converter circuit 210 to the DC side of the three-phase inverter circuit 150. The boost converter circuit 210 has semiconductor switch elements 7, 8, diodes 17, 18, a reactor 81, and input electrodes 91, 92. The semiconductor switch elements 7, 8 have a positive electrode, a negative electrode, and a control electrode, respectively, similar to the semiconductor switch elements 1 to 6, and are configured to be able to control on and off according to a control signal applied from the control unit 21 to the control electrode. Figure 8 In the configuration example, the semiconductor switch elements 7 and 8 are IGBTs. In the following description, the semiconductor switch elements 7 and 8 are also referred to as IGBTs 7 and 8. The input electrodes 91 and 92 correspond to an example of a “first input electrode” and a “second input electrode”.

[0107] In the boost converter circuit 210, the emitter electrode of the IGBT 7 is connected to the high-voltage side main electrode 51, and the emitter electrode of the IGBT 8 is connected to the low-voltage side main electrode 52 and the low-voltage side input electrode 92. The emitter electrode of the IGBT 7 and the collector electrode of the IGBT 8 are connected to the first terminal of the reactor 81. The second terminal of the reactor 81 is connected to the high-voltage side input electrode 91.

[0108] The test body 200 is configured to boost the DC voltage applied between the input electrodes 91 and 92 to a voltage capable of driving a load (e.g., a motor) connected to the three-phase output electrode 25 through the boost converter circuit 210, and convert the boosted voltage into a three-phase AC voltage through the three-phase inverter circuit 150 and supply it to the load. Specifically, the control unit 21 calculates a duty cycle for setting the output voltage of the boost converter circuit 210 to a target voltage, and based on the calculated duty cycle, generates a control signal for controlling the on / off of the IGBTs 7 and 8 of the boost converter circuit 210. The control unit 21 also generates a control signal for controlling the on / off of the IGBTs 1 to 6 of the three-phase inverter circuit 150. The control unit 21 inputs the generated control signal to the control electrodes of the IGBTs 1 to 8.

[0109] In the test body 200 of the third configuration example, the test apparatus 110 can also perform the short-circuit test of the IGBTs 1 to 6 constituting the three-phase inverter circuit 150 using the semiconductor test method of the first embodiment.

[0110] Implementation method 5.

[0111] Fig. 9 2 is a circuit diagram showing the structure of a semiconductor testing device according to a fifth embodiment. Fig. 9 The semiconductor testing device 110 of the fifth embodiment and Figure 8 Compared with the semiconductor testing apparatus 110 of the fifth embodiment shown in FIG. 1 , the connection relationship between the testing apparatus 110 and the test object 200 is different.

[0112] The semiconductor test device 110 of the fifth embodiment is connected between the input electrodes 91 and 92 of the test body 200. Specifically, the probe 41 is connected to the high-voltage input electrode 91, and the probe 42 is connected to the low-voltage input electrode 92.

[0113] (Operation of semiconductor testing equipment)

[0114] Next, the operation of the semiconductor testing apparatus 110 according to the fifth embodiment will be described.

[0115] Fig.10 This is a flowchart for explaining the processing steps of the semiconductor testing method according to the fifth embodiment. Fig.10 2 shows an example of a short-circuit test procedure when the IGBT 1 is used as the object to be tested.

[0116] Fig.10 The flowchart shown is Figure 3Step S05 in the flowchart shown in FIG. 1 is replaced with step S051. In step S051, the control unit 21 controls the on / off of the IGBTs 7 and 8 constituting the boost converter circuit 210, thereby boosting the DC voltage applied between the input electrodes 91 and 92 to a target voltage (e.g., 650 V). As a result, a DC voltage for testing (e.g., 650 V) is generated between the main electrodes 51 and 52.

[0117] In step S06, the DC voltage generated between the main electrodes 51 and 52 is received to charge the capacitor 22 inside the test body 200. After the capacitor 22 receives the DC voltage and is charged (S06), the control unit 21 turns on the IGBT 1 (S07) and detects the short-circuit current based on the sense current of the IGBT 1. When the sense current of the IGBT 1 becomes greater than the threshold value, the control unit 21 turns off the IGBT 1 (S08), and determines whether the IGBT 1 is damaged based on the sense current after the turn-off (S09).

[0118] In the fifth embodiment, when the IGBT1 is turned on, most of the short-circuit current is also Fig. 9 Since the current flows through the current path 61 shown in , it is possible to prevent a large current from flowing into the test device 110. Therefore, it is possible to obtain the same operational effects as the semiconductor test device and the test method of the first embodiment.

[0119] Furthermore, according to the test device 110 of the fifth embodiment, it is possible to perform an avalanche test on the test body 200. The avalanche test is a test for evaluating the resistance to avalanche destruction, in which, at the moment when the control signal input to the control electrode of the semiconductor switching element is changed from the H level to the L level, the energy accumulated in the reactor flows suddenly between the positive electrode and the negative electrode, thereby causing the avalanche destruction.

[0120] Fig.11 2 shows an example of the processing procedure of the avalanche test when the IGBT 1 is used as the test object.

[0121] Reference Fig.11 , through and Figure 3 When the avalanche test by the test device 110 is started in the same steps S01 to S03, the probes 41 and 42 of the test device 110 are connected to the main electrodes 51 and 52 of the test body 100, respectively, thereby connecting the test body 100 to the test device 110. In this state, the switch 33 is kept in the off state in step S03, so that the capacitor 32 is not charged.

[0122] Next, in step S041 , the control unit 21 inputs an H-level control signal to each gate electrode of the IGBT1 and the IGBT2 , thereby turning on the IGBT1 and the IGBT2 .

[0123] In step S051 , the control unit 21 controls the on / off of the IGBTs 7 and 8 constituting the boost converter circuit 210 , thereby boosting the DC voltage applied between the input electrodes 91 and 92 to generate a test voltage (eg, 650 V) between the main electrodes 51 and 52 .

[0124] In step S06, the capacitor 22 in the test body 200 is charged by receiving the DC voltage generated between the main electrodes 51 and 52. In step S061, energy is stored in the reactor 81.

[0125] Next, the control unit 21 inputs an L-level control signal to the gate electrode of IGBT1 through step S071, thereby turning off IGBT1. When IGBT1 is turned off, the collector-emitter voltage of IGBT1 rises to the avalanche voltage of the IGBT through the energy accumulated in the reactor 81. As a result, IGBT1 enters the avalanche mode. In the avalanche mode, the energy accumulated in the reactor 81 is consumed by IGBT1, so the emitter current of IGBT1 decreases. In the case where avalanche destruction does not occur in IGBT1, the avalanche mode continues until all the energy accumulated in the reactor 81 is released, and the avalanche mode ends when the emitter current becomes 0.

[0126] On the other hand, when avalanche destruction occurs in IGBT 1 before all the energy stored in reactor 81 is released, the collector-emitter voltage of IGBT 1 decreases to nearly 0 V. Therefore, reactor 81 starts to store magnetic energy again, and emitter current of IGBT 1 starts to increase.

[0127] The control unit 21 monitors the emitter current of IGBT1 for a reference time based on the sensed current of IGBT1 through step S09. The reference time can be set based on the result obtained by dividing the inductance value of the reactor 81 by the difference between the avalanche voltage of IGBT1 and the power supply voltage. When avalanche destruction is detected within the reference time from the time when IGBT1 is turned off due to the rise of the emitter current (yes in S09), the control unit 21 determines that the dynamic characteristics of IGBT1 are unqualified through step S10. On the other hand, when the emitter current becomes 0, the control unit 21 determines that avalanche destruction of IGBT1 has not occurred (no in S09), and determines that the dynamic characteristics of IGBT1 are qualified through step S11.

[0128] As described above, according to the semiconductor testing device and testing method of embodiment 5, the capacitor 22 connected between the main electrodes 51 and 52 inside the test body 200 is charged, and the energy stored in the capacitor 22 is used to perform the test of the test object. Thus, when a short-circuit damage occurs to the test object, a large current can be prevented from flowing into the testing device.

[0129] Implementation method 6.

[0130] (Fourth structural example of test body)

[0131] Fig.12 2 is a circuit diagram showing the structure of a semiconductor testing device according to a sixth embodiment. Fig.12 The semiconductor testing device 110 of the sixth embodiment and Figure 1 Compared with the semiconductor testing device 110 of the first embodiment shown, the structure of the test body is different.

[0132] The test body 200 of the fourth configuration example includes a boost converter circuit 210, switches 160, 161, a discharge resistor 163, and input electrodes 91, 92. A test device 110 is connected between the input electrodes 91, 92. The power supply voltage VD of the DC power supply 30 included in the test device 110 is, for example, about 500V.

[0133] The boost converter circuit 210 is called a multi-level chopper and includes semiconductor switching elements 7 to 10 , diodes 17 to 20 , a reactor 81 , and capacitors 24 and 25 .

[0134] The semiconductor switch elements 7 to 10 have a positive electrode, a negative electrode, and a control electrode, respectively, similarly to the semiconductor switch elements 1 to 6, and are configured to be controllable in terms of on and off by a control signal applied to the control electrode from the control unit 21. Fig.12 In the configuration example, the semiconductor switching elements 7 to 10 are IGBTs. In the following description, the semiconductor switching elements 7 to 10 are also referred to as IGBTs 7 to 10.

[0135] In the boost converter circuit 210, IGBTs 7 to 10 are connected in series between a high-voltage side main electrode 51 and a low-voltage side main electrode 52. The collector electrode of IGBT 7 is connected to the high-voltage side main electrode 51. The emitter electrode of IGBT 8 and the collector electrode of IGBT 9 are connected to the first terminal of the reactor 81. The second terminal of the reactor 81 is connected to the high-voltage side input electrode 91. The emitter electrode of IGBT 10 is connected to the low-voltage side main electrode 52 and the low-voltage side input electrode 92. IGBTs 7 to 10 correspond to one embodiment of the "first semiconductor element", "second semiconductor element", "third semiconductor element" and "fourth semiconductor element", respectively.

[0136] The first terminal of capacitor 24 is connected to the second terminal of reactor 81 and high-voltage input electrode 91, and the second terminal is connected to low-voltage input electrode 92. Capacitor 24 is a smoothing capacitor for reducing voltage fluctuations between input electrodes 91,92.

[0137] The first terminal of the capacitor 25 is connected to the emitter electrode of the IGBT 7 and the collector electrode of the IGBT 8, and the second terminal is connected to the emitter electrode of the IGBT 9 and the collector electrode of the IGBT 10. The capacitor 25 is a charge pump configured to increase the voltage by converting the stored charge and superimposing a voltage on the input voltage. The capacitor 25 corresponds to an embodiment of the "third capacitor".

[0138] The first terminal of the switch 161 is connected to the high-voltage input electrode 91, and the second terminal is connected to the second terminal of the reactor 81. The switch 161 corresponds to an embodiment of the "second switch". The switch 160 and the discharge resistor 163 are connected in series between the second terminal of the switch 161 and the low-voltage input electrode 92.

[0139] The test body 200 of the fourth structural example is configured to boost the DC voltage applied between the input electrodes 91 and 92 to a voltage capable of driving the load connected between the main electrodes 51 and 52 by the boost converter circuit 210 and supply the voltage to the load. Specifically, the control unit 21 calculates a duty ratio for setting the output voltage of the boost converter circuit 210 to a target voltage, and based on the calculated duty ratio, generates a control signal for controlling the on / off of the IGBTs 7 to 10 of the boost converter circuit 210. The control unit 21 inputs the generated control signal to the control electrodes of the IGBTs 7 to 10.

[0140] (Operation of semiconductor testing equipment)

[0141] Next, the operation of the semiconductor testing apparatus 110 according to the sixth embodiment will be described.

[0142] First, the processing procedure when the IGBT 7 is used as the test object and the short-circuit test of the IGBT 7 is performed as the dynamic characteristic test will be described. In the short-circuit test, the IGBTs 8 and 9 are always in the off state.

[0143] Fig.13 1 is a timing chart for explaining the operation of the test device 110 and the test body 200 in the short-circuit test of the sixth embodiment. Fig.13 The waveforms of switch 161, switch 160, gate voltage of IGBT 10, gate voltage of IGBT 7, voltage V0 between terminals of capacitor 25, voltage V1 between terminals of capacitor 24, voltage V2 between terminals of capacitor 22, collector-emitter (CE) voltage of IGBT 10, CE voltage of IGBT 7, and emitter current of IGBT 7 are shown in order from top to bottom. Fig.13 In the example of , the switches 161 and 160 are also turned off by receiving an L-level control signal and turned on by receiving an H-level control signal, similar to the IGBT.

[0144] Fig.14 This is a flowchart for explaining the processing steps of a short-circuit test when the IGBT 7 is used as the test object. Fig.13 and Fig.14 , the semiconductor testing method of embodiment 6 is described.

[0145] Reference Fig.14 When the short-circuit test by the test device 110 is started in step S21, the probes 41 and 42 of the test device 110 are connected to the input electrodes 91 and 92 of the test body 200, respectively, in step S22, thereby electrically connecting the test body 200 and the test device 110. In addition, by connecting the probe 43 of the test device 110 to the control terminal 53 of the test body 200, the control unit 21 and the control unit 31 are connected in a communicable manner. In this state, in step S23, the control unit 31 keeps the switch 33 in the off state, thereby not charging the capacitor 32.

[0146] Next, in step S24, the control unit 21 receives the instruction from the control unit 31 and inputs the control signal of the H level to the switch 161, thereby turning on the switch 161 ( Fig.13 When the switch 161 is turned on, the capacitors 24 and 22 in the test body 200 are charged by the DC voltage VD applied between the input electrodes 91 and 92. As a result, the voltages V1 and V2 between the terminals of the capacitors 24 and 22 rise, respectively, and V1=V2=DC voltage VD.

[0147] After the capacitors 24 and 22 are charged, the control unit 21 turns off the switch 161 and turns on the switch 160 in step S25 ( Fig.13 At time t1), the test body 200 is electrically disconnected from the test device 110 by turning off the switch 161. When the switch 160 is turned on in this state, the discharge of the capacitor 24 starts. On the other hand, the discharge of the capacitor 22 is not performed through the diode 17.

[0148] Next, in step S26, the control unit 21 receives the instruction from the control unit 31 and inputs the H-level control signal to the gate electrode of the IGBT 10, thereby turning on the IGBT 10 ( Fig.13 At time t2). By turning on IGBT10, the voltage between CE of IGBT7 becomes DC voltage VD. In the state where IGBT10 is turned on, the control unit 21 receives the instruction from the control unit 31 and inputs the control signal of H level to the gate electrode of IGBT7, thereby turning on IGBT7 ( Fig.13 at the moment t3).

[0149] When the main electrodes 51 and 52 are short-circuited by turning on both the IGBTs 7 and 10, the capacitor 22 starts to discharge in step S28. The short-circuit current starts to flow between the main electrodes 51 and 52 due to the charge accumulated in the capacitor 22. Fig.12 A current path 160 indicated by a solid line in FIG. 1 flows from the positive electrode of the capacitor 22 to the negative electrode of the capacitor 22 via the IGBT 7 , the capacitor 25 , and the IGBT 10 .

[0150] The control unit 21 monitors the emitter current of the IGBT 7 based on the sense current of the IGBT 7. When the sense current becomes greater than the threshold value, the control unit 21 detects an overcurrent of the IGBT 7. In this case, the control unit 21 changes the control signal input to the gate electrode of the IGBT 7 from the H level to the L level in step S29, thereby turning off the IGBT 7 ( Fig.13 at time t4).

[0151] When the IGBT 7 is not turned off even when receiving the control signal of the L level, and the sense current continues to increase, the control unit 21 determines that the IGBT 7 is damaged (Yes in S30), and determines in step S31 that the dynamic characteristics of the IGBT 7 are unqualified. On the other hand, when the IGBT 7 is normally turned off and the sense current is reduced, the control unit 21 determines that the IGBT 7 is not damaged (No in S30), and determines in step S32 that the dynamic characteristics of the IGBT 7 are qualified.

[0152] In addition, when the short-circuit test is performed using the IGBT10 as the test object, the IGBT7 may be replaced by the IGBT10 and the IGBT10 may be replaced by the IGBT7 in the above description. Fig.13 If the capacitor 24 is not discharged at time t1, the capacitor 25 will be charged at time t2, so the short-circuit test cannot be performed.

[0153] Next, a description will be given of a processing procedure when the IGBT 8 is used as a test object and a short-circuit test of the IGBT 8 is performed as a dynamic characteristics test.

[0154] Fig.15 1 is a timing chart for explaining the operation of the test device 110 and the test body 200 in the short-circuit test of the sixth embodiment. Fig.15 , the waveforms of switch 161, switch 160, gate voltage of IGBT10, gate voltage of IGBT9, gate voltage of IGBT8, gate voltage of IGBT7, voltage V0 between terminals of capacitor 25, voltage V1 between terminals of capacitor 24, voltage V2 between terminals of capacitor 22, voltage between CE of IGBT9, voltage between CE of IGBT8, and emitter current of IGBT8 are shown in order from the top. Fig.15 In the example of , the switches 161 and 160 are also turned off by receiving an L-level control signal and turned on by receiving an H-level control signal, similar to the IGBT.

[0155] Fig.16 This is a flowchart for explaining the processing steps of a short-circuit test when the IGBT 8 is used as the test object. Fig.15 and Fig.16 , the semiconductor testing method of embodiment 6 is described.

[0156] Reference Fig.16 When the short-circuit test by the test device 110 is started in step S21, the probes 41 and 42 of the test device 110 are connected to the input electrodes 91 and 92 of the test body 200, respectively, in step S22, thereby electrically connecting the test body 200 and the test device 110. In addition, the control unit 21 and the control unit 31 are connected in a communicable manner by connecting the probe 43 of the test device 110 to the control terminal 53 of the test body 200. In this state, in step S23, the control unit 31 keeps the switch 33 in the off state, thereby not charging the capacitor 32.

[0157] Next, in step S240, the control unit 21 receives the instruction from the control unit 31 and inputs the H-level control signal to the switch 161, thereby turning on the switch 161. In addition, the control unit 21 receives the instruction from the control unit 31 and inputs the H-level control signal to the gate electrode of the IGBT 10, thereby turning on the IGBT 10 ( Fig.15 When the switch 161 and the IGBT 10 are turned on, the capacitors 25, 24, and 22 in the test body 200 are charged by the DC voltage VD applied between the input electrodes 91 and 92. As a result, the voltages V0, V1, and V2 between the terminals of the capacitors 25, 24, and 22 rise, and V0=V1=V2=DC voltage VD.

[0158] After the capacitors 25, 24, and 22 are charged, the control unit 21 turns off the switch 161 and turns on the switch 160 in step S25 ( Fig.15 At time t1, when switch 160 is turned on instead of switch 161, the discharge of capacitor 24 starts. On the other hand, the discharge of capacitor 22 is not performed through diode 17. In addition, the discharge of capacitor 25 is not performed through diode 18.

[0159] Next, in step S260, the control unit 21 receives the instruction from the control unit 31 and inputs the H-level control signal to the gate electrode of the IGBT 9, thereby turning on the IGBT 9 ( Fig.15 At time t2). IGBT9 is turned on, and the voltage between CE of IGBT8 becomes DC voltage VD. When IGBT9 is turned on, the control unit 21 receives the instruction from the control unit 31 and inputs the H-level control signal to the gate electrode of IGBT8 through step S270, thereby turning on IGBT8 ( Fig.15 at the moment t3).

[0160] When both IGBTs 8 and 9 are turned on and the terminals of capacitor 25 are short-circuited, discharge of capacitor 25 starts in step S28. The short-circuit current starts to flow to IGBTs 8 and 9 due to the charge accumulated in capacitor 25. Fig.15 The current path 161 indicated by the dotted line in FIG. 1 flows from the positive electrode of the capacitor 25 to the negative electrode of the capacitor 25 via the IGBT 8 and the IGBT 9 .

[0161] The control unit 21 monitors the emitter current of the IGBT 8 based on the sense current of the IGBT 8. When the sense current becomes greater than the threshold value, the control unit 21 detects an overcurrent of the IGBT 8. In this case, the control unit 21 changes the control signal input to the gate electrode of the IGBT 8 from the H level to the L level in step S290, thereby turning off the IGBT 8 ( Fig.15 at time t4).

[0162] When the IGBT 8 is turned off even when receiving the control signal of the L level, and the sense current continues to increase, the control unit 21 determines that the IGBT 8 is damaged (Yes in S300), and determines in step S31 that the dynamic characteristics of the IGBT 8 are unqualified. On the other hand, when the IGBT 8 is normally turned off and the sense current decreases, the control unit 21 determines that the IGBT 8 is not damaged (No in S300), and determines in step S32 that the dynamic characteristics of the IGBT 8 are qualified.

[0163] In addition, when the short-circuit test is performed using IGBT9 as the test object, in the above description, IGBT8 may be replaced by IGBT9 and IGBT9 may be replaced by IGBT8. Fig.15 If the capacitor 24 is not discharged at time t1, when the IGBT 9 is turned on at time t2, the charge of the capacitor 24 is moved so that V1+V0=V2. If the capacitances of the capacitors 22, 23, and 24 are the same, V0=VD / 2. In this case, the short-circuit current becomes 1 / 2 of the original short-circuit current, so a short-circuit test with good accuracy cannot be performed.

[0164] As described above, according to the semiconductor testing device and testing method of embodiment 6, a capacitor 22 connected between the main electrodes 51 and 52 inside a test body 200 having a multi-level chopper is charged, and a test of IGBT7 or IGBT10 is performed using the energy stored in the capacitor 22. The multi-level chopper includes IGBT7~10 connected in series between the main electrodes 51 and 52, and a capacitor 25 for a charge pump. Thus, in the event of a short-circuit damage to the test body, a large current can be prevented from flowing to the testing device.

[0165] In the above configuration, capacitor 25 inside test body 200 is charged and the IGBT 8 or 9 test is performed using the energy stored in capacitor 25 . This can prevent a large current from flowing into the test device when a short-circuit failure of the test body occurs.

[0166] (Other structural examples)

[0167] In the semiconductor testing apparatus 110 of the above-mentioned embodiments 1 to 6, Fig.17 As shown in FIG. 3 , the control unit 31 can be configured using a function generator 310 and a pulse generator 312. Fig.17In the first configuration example shown, the function generator 310 generates a signal voltage having a desired waveform and / or a desired frequency. The pulse generator 312 generates a control signal for controlling the three-phase inverter circuit 150 (including the boost converter circuit 210) of the test body 100 (or 200) based on the signal voltage generated by the function generator 310, and sends the generated control signal to the control unit 21.

[0168] Or, if Fig.18 As shown in the second configuration example, the control unit 31 can be configured to include a processor 314, a memory 316, an input / output interface (I / F) 318, and a communication interface 320. These components are connected to each other via a bus (not shown) so as to be able to communicate with each other.

[0169] Typically, the processor 314 is a calculation processing unit such as a CPU (Central Processing Unit) or an MPU (Micro Processing Unit) The processor 314 controls the operation of each unit of the testing device 110 by reading and executing a program stored in the memory 316 .

[0170] The memory 316 is implemented by a nonvolatile memory such as a RAM (Random Access Memory), a ROM (Read Only Memory), or a flash memory, and stores programs executed by the processor 314 or data used by the processor 314 .

[0171] The input / output interface 318 is an interface for exchanging various data between the processor 314 and the display unit 324 and the input unit 322. The display unit 324 is composed of a liquid crystal panel capable of displaying images. The input unit 322 receives user input of operation to the test device 110. Typically, the input unit 322 is composed of a touch panel, a keyboard, a mouse, etc.

[0172] The communication interface 320 is a communication interface for exchanging various data between the test device 110 and other devices including the test bodies 100 and 200, and is implemented by an adapter or a connector, etc. In addition, the communication method may be a wireless communication method based on a wireless LAN (Local Area Network) or the like, or a wired communication method using a USB (Universal Serial Bus) or the like.

[0173] Implementation method 7.

[0174] In Embodiment 7, a method for manufacturing a semiconductor device as test pieces 100 and 200 in Embodiments 1 to 6 described above will be described. In other words, in Embodiment 7, a method for manufacturing a semiconductor device in which the semiconductor test method of Embodiments 1 to 5 is included in the manufacturing process will be described.

[0175] The semiconductor device manufactured by the present manufacturing method has a semiconductor switch element and can be applied to the first structural example (see Figure 1 )、Second structural example (refer to Figure 7 )、The third structural example (refer to Figure 8 ) and the fourth structural example (refer to Fig.12 In the following description, it is assumed that the semiconductor device is the test body 100 of the first structural example (see Figure 1 ). That is, the semiconductor device includes a full-bridge three-phase inverter circuit 150 , a control unit 21 , a capacitor 22 , and a discharge resistor 23 .

[0176] Fig.19 This is a flowchart for illustrating a method for manufacturing a semiconductor device according to a sixth embodiment.

[0177] Reference Fig.19 The method for manufacturing a semiconductor device includes a step of assembling a semiconductor device (S100), a step of testing the dynamic characteristics of the assembled semiconductor device (S200), and a step of commercializing the semiconductor device that has passed the test (S300).

[0178] In the process (S100) of assembling the semiconductor device, there are: a process (S110) of making a three-phase inverter circuit 150; a process (S120) of making a control unit 21; a process (S130) of installing the manufactured three-phase inverter circuit 150, the control unit 21, the discharge resistor 23 and the capacitor 22; and a process (S140) of wiring between the installed three-phase inverter circuit 150, the control unit 21, the discharge resistor 23 and the capacitor 22.

[0179] In the step ( S110 ) of manufacturing the three-phase inverter circuit 150 , the semiconductor switching elements (IGBT) 1 to 6 and the diodes 11 to 16 are mounted on a substrate.

[0180] In the step ( S120 ) of manufacturing the control unit 21 , a function generator (or a microcomputer) constituting the control unit 21 , a gate drive circuit of a semiconductor switch element, and the like are mounted on a substrate.

[0181] In the mounting step (S130), the substrate on which the three-phase inverter circuit 150 is fabricated and the substrate on which the control unit 21 is fabricated are mounted on the housing of the semiconductor device. The discharge resistor 23 and the capacitor 22 are further mounted on the housing.

[0182] In the wiring process (S140), the electrodes on the substrate mounted on the housing, the discharge resistor 23, and the capacitor 22 are connected by wiring, thereby electrically connecting the three-phase inverter circuit 150, the control unit 21, the discharge resistor 23, and the capacitor 22 to each other. Figure 1 The semiconductor device (test body 100) shown.

[0183] In addition, in the process (S100) of assembling the semiconductor device, a test is performed to confirm the functions of the three-phase inverter circuit 150, the control unit 21, etc., which are manufactured separately, and the components that have passed the test are installed in the housing of the semiconductor device. Alternatively, it is also possible to manufacture these components directly on the housing of the semiconductor device instead of manufacturing the three-phase inverter circuit 150 and the control unit 21 separately. Compared with the former structure, the latter structure can omit the operation of testing each component, thereby reducing the working hours. On the other hand, the defect rate may worsen. Therefore, comparing the increase in the original price rate caused by the increase in working hours and the increase in the original price rate caused by the worsening of the defect rate, the structure with less increase can be adopted.

[0184] Next, in the test step (S200), the assembled semiconductor device is used as a test body to perform a characteristic test. Figure 3 The semiconductor device characteristic test is performed according to the process steps described in Figure 1 ) is electrically connected to the semiconductor device, and a test (such as a short-circuit test) of the dynamic characteristics of the semiconductor switching element being tested is performed.

[0185] Next, in the productization process (S300), first, it is determined whether the test result in the test process (S200) is qualified or unqualified (S310). Next, for the semiconductor device whose test result is qualified (Yes in S310), a process of installing a cover on the housing is performed (S320). Thus, the housing of the semiconductor device is sealed to become a product. At this time, the semiconductor device whose test result is unqualified (No in S310) is excluded. The productized semiconductor device is shipped through the factory shipment process (S330).

[0186] exist Fig.19In the step (S200) of testing the semiconductor device in the manufacturing method of the semiconductor device shown, as described in the first embodiment, the capacitor 22 connected between the main electrodes 51 and 52 inside the semiconductor device is charged in advance, and the characteristic test of the test object is performed using the energy stored in the capacitor 22. As a result, when the test object is damaged during the test, a large current can be prevented from flowing into the semiconductor test device. As a result, the development of damage to the semiconductor test device caused by the damage current of the semiconductor element can be suppressed.

[0187] In addition, the present disclosure can combine the various embodiments or appropriately modify or omit the various embodiments within the scope of the disclosure.

[0188] The embodiments disclosed this time are illustrative in all aspects and should not be considered restrictive. The scope of the present disclosure is indicated by the claims rather than the above description, and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0189] Description of Reference Numerals

[0190] 1 to 10 semiconductor switching elements, 11 to 18 diodes, 25 three-phase output electrodes, 21, 31 control unit, 22, 32 capacitors, 23, 163 discharge resistors, 30 DC power supply, 33, 160, 161 switches, 41 to 43 probes, 51, 52 main electrodes, 53 control terminals, 61, 62 current paths, 81 reactors, 91, 92 input electrodes, 100, 200 test bodies, 110 semiconductor test equipment (test equipment), 150 three-phase inverter circuit, 210 boost converter circuit, 310 function generator, 312 pulse generator, 314 processor, 316 memory, 318 input / output interface, 320 communication interface, 322 input unit, 324 display unit.

Claims

1. A semiconductor testing device for testing the characteristics of a test body having a first semiconductor element, wherein: The first semiconductor element has an anode, a cathode, and a control electrode, and is turned on or off according to a first control signal input to the control electrode. The test body also has: a first main electrode electrically connected to the positive electrode of the first semiconductor element; a second main electrode electrically connected to the cathode of the first semiconductor element; and a first capacitor electrically connected between the first main electrode and the second main electrode, The semiconductor testing device comprises: Probe 1 and Probe 2; a direct current power source electrically connected between the first probe and the second probe; and a control unit configured to generate the first control signal, When the first probe is connected to the first main electrode and the second probe is connected to the second main electrode, the control unit charges the first capacitor with the DC voltage supplied from the DC power supply, and after charging the first capacitor, inputs the first control signal for turning on the first semiconductor element to the control electrode of the first semiconductor element, The semiconductor test device further includes a first switch and a second capacitor, wherein the first switch and the second capacitor are electrically connected in series between the first probe and the second probe. When the first probe is connected to the first main electrode and the second probe is connected to the second main electrode, the control unit charges the first capacitor by keeping the first switch in an off state.

2. The semiconductor testing device according to claim 1, wherein: The electrostatic capacitance of the second capacitor is larger than the electrostatic capacitance of the first capacitor.

3. The semiconductor testing device according to claim 1, wherein: The test body further includes a second semiconductor element electrically connected in series with the first semiconductor element between the first main electrode and the second main electrode. The second semiconductor element has an anode, a cathode, and a control electrode, and is turned on or off according to a second control signal input to the control electrode. When the first probe is connected to the first main electrode and the second probe is connected to the second main electrode, the control unit inputs the second control signal for turning on the second semiconductor element to the control electrode of the second semiconductor element, and after the first capacitor is charged and the second semiconductor element is turned on, the control unit inputs the first control signal for turning on the first semiconductor element to the control electrode of the first semiconductor element.

4. The semiconductor testing device according to claim 2, wherein: The test body further includes a second semiconductor element electrically connected in series with the first semiconductor element between the first main electrode and the second main electrode. The second semiconductor element has an anode, a cathode, and a control electrode, and is turned on or off according to a second control signal input to the control electrode. When the first probe is connected to the first main electrode and the second probe is connected to the second main electrode, the control unit inputs the second control signal for turning on the second semiconductor element to the control electrode of the second semiconductor element, and after the first capacitor is charged and the second semiconductor element is turned on, the control unit inputs the first control signal for turning on the first semiconductor element to the control electrode of the first semiconductor element.

5. The semiconductor testing device according to any one of claims 1 to 4, wherein: The test body further comprises: 1st input electrode; a second input electrode; and a boost converter circuit that boosts a DC voltage input between the first input electrode and the second input electrode and outputs the DC voltage between the first main electrode and the second main electrode, When the first probe is connected to the first main electrode and the second probe is connected to the second main electrode, the control unit performs the following processing: The boost converter circuit is controlled so that the first capacitor is charged with a voltage boosted from a DC voltage supplied from the DC power supply, and After the first capacitor is charged, the first control signal for turning on the first semiconductor element is input to the control electrode of the first semiconductor element.

6. The semiconductor testing device according to claim 3 or 4, wherein: The test body further comprises: 1st input electrode; a second input electrode; and a boost converter circuit that uses energy stored in the reactor to boost a DC voltage input between the first input electrode and the second input electrode, and outputs the boosted DC voltage between the first main electrode and the second main electrode, When the first probe is connected to the first input electrode and the second probe is connected to the second input electrode, the control unit performs the following processing: inputting the first control signal for turning on the first semiconductor element to the control electrode of the first semiconductor element, and inputting the second control signal for turning on the second semiconductor element to the control electrode of the second semiconductor element, The boost converter circuit is controlled so that the first capacitor is charged with a voltage boosted from a DC voltage supplied from the DC power supply, and After the first capacitor is charged, the first control signal for turning off the first semiconductor element is input to the control electrode of the first semiconductor element.

7. The semiconductor testing device according to claim 1 or 2, wherein: The test body also has: The first input electrode on the high voltage side; A second input electrode on the low voltage side, connected to the second main electrode; a second semiconductor element, a third semiconductor element, and a fourth semiconductor element, which are electrically connected in series with the first semiconductor element between the first main electrode and the second main electrode; and a first diode, a second diode, a third diode, and a fourth diode, which are connected in anti-parallel to the first semiconductor element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element, respectively; The second semiconductor element, the third semiconductor element, and the fourth semiconductor element have a positive electrode, a negative electrode, and a control electrode, and are turned on or off according to a second control signal, a third control signal, and a fourth control signal input to the control electrode, respectively. The test body also has: a third capacitor connected between the cathode of the first semiconductor element and the anode of the second semiconductor element and between the cathode of the third semiconductor element and the anode of the fourth semiconductor element; and a reactor and a second switch, which are electrically connected in series between the cathode of the second semiconductor element and the anode of the third semiconductor element and the first input electrode, When the first probe is connected to the first input electrode and the second probe is connected to the second input electrode, the control unit performs the following processing: By turning on the second switch, the first capacitor is charged. After the first capacitor is charged, the second switch is turned off, and the fourth control signal for turning on the fourth semiconductor element is input to the control electrode of the fourth semiconductor element. After the fourth semiconductor element is turned on, the first control signal for turning on the first semiconductor element is input to the control electrode of the first semiconductor element.

8. The semiconductor testing device according to claim 7, wherein: When the first probe is connected to the first input electrode and the second probe is connected to the second input electrode, the control unit performs the following processing: The second switch is turned on, and the fourth control signal for turning on the fourth semiconductor element is input to the control electrode of the fourth semiconductor element. After the first capacitor and the third capacitor are charged, the second switch is turned off, and the third control signal for turning on the third semiconductor element is input to the control electrode of the third semiconductor element. After the third semiconductor element is turned on, the second control signal for turning on the second semiconductor element is input to the control electrode of the second semiconductor element.

9. A semiconductor testing method for testing the characteristics of a test body having a first semiconductor element, wherein: The first semiconductor element has an anode, a cathode, and a control electrode, and is turned on or off according to a first control signal input to the control electrode. The test body also has: a first main electrode electrically connected to the positive electrode of the first semiconductor element; a second main electrode electrically connected to the cathode of the first semiconductor element; and a first capacitor electrically connected between the first main electrode and the second main electrode, The semiconductor testing method comprises the following steps: charging the first capacitor by a DC voltage supplied from a DC power source electrically connected between the first main electrode and the second main electrode; as well as After the first capacitor is charged, the first control signal for turning on the first semiconductor element is input to the control electrode of the first semiconductor element. A series circuit of a second capacitor and a first switch is electrically connected between the positive electrode and the negative electrode of the DC power supply. The step of charging the first capacitor includes the step of charging the first capacitor while keeping the first switch in an off state.

10. The semiconductor testing method according to claim 9, wherein: The test body further includes a second semiconductor element, which is electrically connected in series with the first semiconductor element between the first main electrode and the second main electrode, and the second semiconductor element has a positive electrode, a negative electrode, and a control electrode, and is turned on or off according to a second control signal input to the control electrode. The semiconductor testing method further comprises the steps of: inputting the second control signal for turning on the second semiconductor element to the control electrode of the second semiconductor element, The step of inputting the first control signal to the control electrode of the first semiconductor element includes the step of inputting the first control signal for turning on the first semiconductor element to the control electrode of the first semiconductor element after the first capacitor is charged and the second semiconductor element is turned on.

11. The semiconductor testing method according to claim 9 or 10, wherein: The test body further comprises: 1st input electrode; a second input electrode; and a boost converter circuit that boosts a DC voltage input between the first input electrode and the second input electrode and outputs the DC voltage between the first main electrode and the second main electrode, The step of charging the first capacitor includes the step of controlling the boost converter circuit so as to charge the first capacitor with a voltage obtained by boosting a DC voltage supplied from the DC power supply.

12. The semiconductor testing method according to claim 10, wherein: The test body further comprises: 1st input electrode; a second input electrode; and a boost converter circuit that uses energy stored in the reactor to boost a DC voltage input between the first input electrode and the second input electrode, and outputs the boosted DC voltage between the first main electrode and the second main electrode, The semiconductor testing method further comprises the following steps: inputting the first control signal for turning on the first semiconductor element to the control electrode of the first semiconductor element, and inputting the second control signal for turning on the second semiconductor element to the control electrode of the second semiconductor element; controlling the boost converter circuit so as to charge the first capacitor with a voltage boosted from a DC voltage supplied from the DC power supply; as well as After the first capacitor is charged, the first control signal for turning off the first semiconductor element is input to the control electrode of the first semiconductor element.

13. The semiconductor testing method according to claim 9, wherein: The test body also has: The first input electrode on the high voltage side; a second input electrode on the low voltage side, connected to the second main electrode; and a second semiconductor element, a third semiconductor element, and a fourth semiconductor element, which are electrically connected in series with the first semiconductor element between the first main electrode and the second main electrode, The first semiconductor element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element each include a diode connected in anti-parallel. The second semiconductor element, the third semiconductor element, and the fourth semiconductor element have a positive electrode, a negative electrode, and a control electrode, and are turned on or off according to a second control signal, a third control signal, and a fourth control signal input to the control electrode, respectively. The test body also has: a third capacitor having a first terminal connected to the cathode of the first semiconductor element and the anode of the second semiconductor element, and a second terminal connected to the cathode of the third semiconductor element and the anode of the fourth semiconductor element; and a reactor and a second switch, which are electrically connected in series between the cathode of the second semiconductor element and the anode of the third semiconductor element and the first input electrode, The semiconductor testing method further comprises the following steps: When a DC power source is electrically connected between the first input electrode and the second input electrode, the first capacitor is charged by turning on the second switch; After the first capacitor is charged, the second switch is turned off, and the fourth control signal for turning on the fourth semiconductor element is input to the control electrode of the fourth semiconductor element; as well as After the fourth semiconductor element is turned on, the first control signal for turning on the first semiconductor element is input to the control electrode of the first semiconductor element.

14. The semiconductor testing method according to claim 13, wherein: The semiconductor testing method further comprises the following steps: The second switch is turned on, and the fourth control signal for turning on the fourth semiconductor element is input to a control electrode of the fourth semiconductor element, thereby charging the first capacitor and the third capacitor; After the first capacitor and the third capacitor are charged, the second switch is turned off, and the third control signal for turning on the third semiconductor element is input to the control electrode of the third semiconductor element; as well as After the third semiconductor element is turned on, the second control signal for turning on the second semiconductor element is input to the control electrode of the second semiconductor element.

15. A method for manufacturing a semiconductor device, the semiconductor device having a semiconductor element, wherein: The method for manufacturing a semiconductor device comprises the following steps: assembling the semiconductor device by mounting the semiconductor element in a housing; testing the characteristics of the semiconductor device; and commercializing the semiconductor device that has passed the test process, The semiconductor element has an anode, a cathode and a control electrode, and is turned on or off according to a control signal input to the control electrode. The semiconductor device further comprises: a first main electrode electrically connected to the positive electrode of the semiconductor element; a second main electrode electrically connected to the cathode of the semiconductor element; and a first capacitor electrically connected between the first main electrode and the second main electrode, The test process comprises the following steps: charging the first capacitor by a DC voltage supplied from a DC power source electrically connected between the first main electrode and the second main electrode; as well as After the first capacitor is charged, the control signal for turning on the semiconductor element is input to the control electrode of the semiconductor element. A first switch and a second capacitor are electrically connected between the positive electrode and the negative electrode of the DC power supply, and the first switch and the second capacitor are electrically connected in series between the positive electrode and the negative electrode of the DC power supply. The step of charging the first capacitor includes the step of charging the first capacitor while keeping the first switch in an off state.

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