Electronic packaging and manufacturing method thereof

Abstract

The present invention relates to an electronic package and a method for manufacturing the same, comprising configuring a conductive structure and a packaging layer covering the conductive structure on one side of a carrier structure having a circuit layer, and configuring electronic components on the other side. The packaging layer increases the rigidity of the carrier structure, thereby resolving problems such as warping or wavy deformation caused by the electronic package needing to increase its volume according to functional requirements.

Description

Technical Field

[0001] The present invention relates to a semiconductor device, in particular to an electronic package and a manufacturing method thereof. Background Art

[0002] With the rapid development of high-speed computing application end products (such as autonomous driving, supercomputers, or mobile devices), the chip (IC) size and package size of the flip chip ball grid array (FCBGA) packaging structure are also increasing.

[0003] Figure 1 FIG. 1 is a cross-sectional view of a conventional semiconductor package 1. Figure 1 As shown, the semiconductor package 1 includes a packaging substrate 10, a single-chip system (SoC) type semiconductor chip 11 mounted on the upper side of the packaging substrate 10 in a flip-chip manner, a chip module 12 mounted on the upper side of the packaging substrate 10 in a flip-chip manner, and a plurality of solder balls 16 implanted on the lower side of the packaging substrate 10. Electronic components 17 such as capacitors can be configured on the lower side of the packaging substrate 10 as needed.

[0004] The existing semiconductor package 1 needs to be increased in size according to functional requirements, which makes it easy to cause problems such as warpage or wavy deformation. Therefore, the following methods are usually used to overcome the problem:

[0005] In a first approach, the package substrate 10 adopts a circuit structure with a thicker core layer to provide sufficient rigidity.

[0006] In a second approach, a metal stiffener (not shown) is disposed on the upper side of the package substrate 10 to provide additional rigidity.

[0007] In a third approach, at least one heat sink 13 is disposed on the upper side of the package substrate 10. For example, the top plate 130 of the heat sink 13 is disposed on the inactive surface 11b of the semiconductor chip 11 via a thermal interface material (TIM) 14, and the supporting legs 131 of the heat sink 13 are mounted on the package substrate 10 via an adhesive layer 15.

[0008] However, the above methods all lead to the following problems:

[0009] In the first approach, the thickness of the package substrate 10 is increased, causing the electronic component 17 to be too far away from the semiconductor chip 11 , resulting in a decrease in the overall electrical performance of the semiconductor package 1 .

[0010] In the second method, the configuration of the reinforcement will increase the cost of manufacturing the semiconductor package 1 , and the packaging substrate 10 needs to expand the layout area for configuring the reinforcement, thereby increasing the overall size of the semiconductor package 1 .

[0011] In the third approach, the heat dissipation capacity of the heat sink 13 is limited by the heat transfer capacity of the thermally conductive interface material 14, and this increases the cost of manufacturing the semiconductor package 1. Furthermore, because the heat sink 13 enhances the rigidity of the package substrate 10, it is not possible to directly configure the heat dissipation fins of the system end of the end product in subsequent manufacturing processes.

[0012] In addition, due to the defects of the above methods, the industry has even adopted methods such as reducing electrical and heat dissipation performance to replace the first to third methods. Although this can avoid the above problems, it also makes it difficult for the semiconductor package 1 to meet multifunctional requirements.

[0013] Therefore, how to overcome the various problems of the above-mentioned prior art has become a topic that needs to be solved urgently. Summary of the Invention

[0014] In view of the above-mentioned various defects of the prior art, the present invention provides an electronic package and a manufacturing method thereof, which can avoid the problems of warping or wave-like deformation.

[0015] The electronic package of the present invention includes: a supporting structure having a circuit layer, which has a first side and a second side opposite to each other; a conductive structure, which is arranged on the first side of the supporting structure and electrically connected to the circuit layer; an encapsulation layer, which is arranged on the first side of the supporting structure and covers the conductive structure, and allows a portion of the surface of the conductive structure to be exposed to the encapsulation layer; and an electronic component, which is arranged on the second side of the supporting structure and electrically connected to the circuit layer.

[0016] In the aforementioned electronic package, the conductive structure includes a conductive column coupled to the circuit layer. For example, the end surface of the conductive column is exposed to the packaging layer. Alternatively, the conductive column is coupled to the circuit layer via a conductor.

[0017] The aforementioned electronic package further includes a functional pad embedded in the packaging layer, and the functional pad is combined with the circuit layer. For example, a portion of the surface of the functional pad is exposed outside the packaging layer.

[0018] In the aforementioned electronic package, the conductive structure includes a solder ball, for example, the solder ball protrudes from the packaging layer.

[0019] In the aforementioned electronic package, the conductive structure comprises a circuit block. For example, the circuit block comprises at least one conductive post electrically connected to the circuit layer, with the end surface of the conductive post exposed to the packaging layer. Alternatively, the circuit block comprises at least one circuit portion electrically connected to the circuit layer, with a portion of the surface of the circuit portion exposed to the packaging layer.

[0020] The present invention also provides a method for manufacturing an electronic package, comprising: providing a conductive frame, which includes a plate body and a plurality of conductive posts separately arranged on the plate body; arranging the conductive frame on a supporting structure having a circuit layer, wherein the conductive frame is connected to the circuit layer with its plurality of conductive posts via a conductor; forming a packaging layer on the supporting structure to cover the plurality of conductive posts and the conductor, and allowing the plate body of the conductive frame to be exposed to the packaging layer; removing the plate body to expose the end surface of the conductive post to the packaging layer, wherein the conductive post and the conductor serve as a conductive structure; and configuring at least one electronic component on the supporting structure, and the electronic component is electrically connected to the circuit layer.

[0021] In the aforementioned manufacturing method, the conductive frame further includes a functional pad, so that after the plate is removed, a portion of the surface of the functional pad is exposed to the packaging layer.

[0022] The present invention also provides a method for manufacturing an electronic package, comprising: providing a supporting structure having a circuit layer; forming a plurality of conductive structures on the circuit layer of the supporting structure; forming a packaging layer on the supporting structure to cover the plurality of conductive structures, and allowing a portion of the surface of the conductive structure to be exposed to the packaging layer; and configuring at least one electronic component on the supporting structure, and the electronic component is electrically connected to the circuit layer.

[0023] The present invention also provides a method for manufacturing an electronic package, including: providing a conductive frame, which includes a plate body and a plurality of conductive pillars separately arranged on the plate body; forming a packaging layer on the plate body so that the packaging layer covers the plurality of conductive pillars; forming a supporting structure having a circuit layer on the packaging layer so that the circuit layer is electrically connected to the plurality of conductive pillars via a conductor; removing the plate body so that the end surface of the conductive pillar is exposed to the packaging layer, wherein the conductive pillar and the conductor serve as a conductive structure; and configuring at least one electronic component on the supporting structure, and the electronic component is electrically connected to the circuit layer.

[0024] The aforementioned electronic package and its manufacturing method further include embedding another electronic component electrically connected to the circuit layer in the packaging layer.

[0025] From the above, it can be seen that in the electronic package and its manufacturing method of the present invention, the rigidity of the supporting structure is mainly increased through the packaging layer, so there is no need to configure heat dissipation components, reinforcement components or thickening of the supporting structure as in the prior art, so as to easily solve the problems such as warping or wavy deformation caused by the need to increase the volume of the electronic package according to functional requirements. Therefore, compared with the prior art, the electronic package of the present invention can not only overcome problems such as warping or wavy shape, but also improve electrical performance and heat dissipation capabilities, reduce the cost of manufacturing the electronic package, and reduce the overall size of the electronic package. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 Schematic cross-sectional view of a conventional semiconductor package.

[0027] Figures 2A to 2E FIG. 1 is a cross-sectional view of a first embodiment of a method for manufacturing an electronic package according to the present invention.

[0028] Figure 2E-1 and Figure 2E-2 for Figure 2E Schematic cross-sectional view of other embodiments.

[0029] Figure 3 FIG. 1 is a cross-sectional view of a second embodiment of a method for manufacturing an electronic package according to the present invention.

[0030] Figures 4A to 4B It is a cross-sectional schematic diagram of a third embodiment of the method for manufacturing an electronic package of the present invention.

[0031] Figures 5A to 5C It is a cross-sectional schematic diagram of a fourth embodiment of a method for manufacturing an electronic package of the present invention.

[0032] Description of Reference Numerals

[0033] 1:Semiconductor package

[0034] 10:Packaging substrate

[0035] 11: Semiconductor chips

[0036] 11b, 21b, 22b: non-active surface

[0037] 12: Chip module

[0038] 13: Heat sink

[0039] 130: Top sheet

[0040] 131:Supporting feet

[0041] 14: Thermal interface material

[0042] 15: Adhesive layer

[0043] 16: Solder ball

[0044] 17: Electronic components

[0045] 2,3,4,5: Electronic packaging

[0046] 2a: Conductive frame

[0047] 20,50: load-bearing structure

[0048] 20a,50a: First side

[0049] 20b, 50b: Second side

[0050] 200,500: circuit layer

[0051] 201: Insulation base

[0052] 202: solder mask

[0053] 21: First electronic component

[0054] 21a, 22a: Action surface

[0055] 210,220:Electrode pads

[0056] 211,221,510: conductive bumps

[0057] 22: Second electronic component

[0058] 23,331: Conductive column

[0059] 23a, 23b: end face

[0060] 230,530: Conductor

[0061] 24:Plate body

[0062] 240: concave part

[0063] 25,45: Encapsulation layer

[0064] 25a: first surface

[0065] 25b: Second surface

[0066] 27: Functional mat

[0067] 28: Passive components

[0068] 29,29a,39,49,59: Conductive structures

[0069] 31: Conductive element

[0070] 32: Primer

[0071] 33: Insulation

[0072] 330: Line Department

[0073] 501: dielectric layer

[0074] 512: bonding layer. DETAILED DESCRIPTION

[0075] The following describes the embodiments of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0076] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the conditions under which the present invention can be implemented. Therefore, they have no substantial technical significance. Any structural modification, change in proportional relationship, or adjustment in size should still fall within the scope of the technical content disclosed in the present invention without affecting the efficacy and purpose that can be achieved by the present invention. At the same time, terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of description and are not used to limit the scope of the implementation of the present invention. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of the present invention without substantially changing the technical content.

[0077] Figures 2A to 2E FIG. 1 is a cross-sectional view of a manufacturing method of a first embodiment of an electronic package 2 according to the present invention.

[0078] like Figure 2A As shown, a conductive frame 2 a is provided, which includes a plate 24 and a plurality of conductive posts 23 separately disposed on the plate 24 .

[0079] In this embodiment, the plate 24 and the conductive pillars 23 are integrally formed. For example, a portion of a metal plate is removed by etching, laser or other methods to form the conductive frame 2 a, which has recesses 240 for separating the conductive pillars 23 .

[0080] like Figure 2B As shown, the conductive frame 2 a is disposed on a supporting structure 20 , and at least one first electronic component 21 is disposed on the supporting structure 20 .

[0081] In this embodiment, the supporting structure 20 has a first side 20a and a second side 20b relative to each other, and the supporting structure 20 is, for example, a packaging substrate (substrate) with a core layer or a coreless packaging substrate, which has an insulating base 201 and a circuit layer 200 combined with the insulating base 201. The circuit layer 200 is, for example, a fan-out type redistribution layer (RDL for short), and a solder mask 202 can be formed on the first side 20a and the second side 20b as required, wherein a circuit layer (not shown) is arranged inside the supporting structure 20 to connect the circuit layer 200 on the first side 20a and the second side 20b. For example, the carrier structure 20 is a package substrate having a core layer, the circuit layer 200 is formed of copper, and the insulating base 201 is formed of a dielectric material such as polybenzoxazole (PBO), polyimide (PI), or prepreg (PP). It should be understood that the carrier structure may also be other carrier units capable of supporting electronic components such as chips, such as a lead frame or a silicon interposer, and is not limited to the above.

[0082] In addition, the first electronic component 21 is disposed on the first side 20a of the supporting structure 20, and the first electronic component 21 is an active component, a passive component, or a combination thereof, wherein the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor, and an inductor. For example, the first electronic component 21 has an active surface 21a and an inactive surface 21b opposite to each other, and the electrode pad 210 of the active surface 21a is disposed on the circuit layer 200 in a flip-chip manner via a plurality of conductive bumps 211 such as solder material and electrically connected to the circuit layer 200; alternatively, the electrode pad 210 of the first electronic component 21 can be electrically connected to the circuit layer 200 in a wire bonding manner via a plurality of bonding wires (not shown); or alternatively, the electrode pad 210 of the first electronic component 21 can be directly electrically connected to the circuit layer 200. However, the method for electrically connecting the first electronic component 21 to the supporting structure 20 is not limited to the above.

[0083] In addition, the conductive frame 2 a is connected to the circuit layer 200 on the first side 20 a of the supporting structure 20 via a conductor 230 such as solder through the end surface 23 a of the conductive pillar 23 of the conductive frame 2 a.

[0084] like Figure 2C As shown, a packaging layer 25 is formed on the first side 20 a of the supporting structure 20 to cover the first electronic component 21 , the conductive pillars 23 and the conductors 230 , and the plate 24 of the conductive frame 2 a is exposed from the packaging layer 25 .

[0085] In this embodiment, the encapsulation layer 25 has a first surface 25a and a second surface 25b that are opposite to each other. The first surface 25a is bonded to the first side 20a (or solder mask 202) of the supporting structure 20, with the board 24 exposed at the second surface 25b of the encapsulation layer 25. For example, a planarization process may be performed to align the second surface 25b of the encapsulation layer 25 with the surface of the board 24, exposing the surface of the board 24 to the encapsulation layer 25. Specifically, the planarization process may be performed by grinding to remove a portion of the material of the encapsulation layer 25.

[0086] Furthermore, the material forming the encapsulation layer 25 may be, but is not limited to, an insulating material such as polyimide (PI), dry film, epoxy, or a molding compound. For example, the encapsulation layer 25 may be formed on the first side 20a of the supporting structure 20 by lamination or molding.

[0087] In addition, the packaging layer 25 is filled between the first electronic component 21 and the first side 20a of the supporting structure 20 to cover the conductive bumps 211; alternatively, a primer (not shown) can be first filled between the first electronic component 21 and the first side 20a of the supporting structure 20 to cover the conductive bumps 211, and then the packaging layer 25 covers the primer.

[0088] like Figure 2D As shown, a flattening process is performed to remove the plate 24 of the conductive frame 2a and a portion of the packaging layer 25, so that the end surface 23b of the conductive column 23 is coplanar with the second surface 25b of the packaging layer 25 (i.e., the two are flush), and the end surface 23b of the conductive column 23 is exposed on the second surface 25b of the packaging layer 25, wherein the conductive column 23 and the conductor 230 serve as a conductive structure 29.

[0089] In this embodiment, the plate 24 and a portion of the packaging layer 25 are removed by grinding, etching, burning, cutting or other suitable methods, so that the end surface 23b of the conductive pillar 23 is exposed from the packaging layer 25 for subsequent configuration of related electronic circuit paths.

[0090] like Figure 2E As shown, at least one second electronic component 22 is disposed on the second side 20 b of the supporting structure 20 to obtain the required electronic package 2 .

[0091] In this embodiment, the second electronic component 22 is an active component, a passive component, or a combination thereof, wherein the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor, and an inductor. For example, the second electronic component 22 is a system-on-chip (SoC) semiconductor chip having an active surface 22a and an inactive surface 22b opposite to each other. The electrode pads 220 on the active surface 22a of the second electronic component 22 are flip-chip mounted on the circuit layer 200 via a plurality of conductive bumps 221 made of, for example, solder, and are electrically connected to the circuit layer 200. Alternatively, the electrode pads 220 of the second electronic component 22 can be electrically connected to the circuit layer 200 via a plurality of bonding wires (not shown). Alternatively, the electrode pads 220 of the second electronic component 22 can directly contact the circuit layer 200. However, the method for electrically connecting the second electronic component 22 to the supporting structure 20 is not limited to the above.

[0092] Furthermore, in subsequent manufacturing processes, the electronic package 2 can be connected to a circuit board (not shown) via solder balls (not shown) through the end surfaces 23 b of the conductive pillars 23 .

[0093] In addition, the conductive frame 2a may also be configured on the board 24 with at least one functional pad (E-pad) 27 (replacing the first electronic component 21) connected to the circuit layer 200 via a conductor 230, such as Figure 2E-1 As shown, after the plate 24 is removed, the functional pad 27 is exposed on the second surface 25 b of the packaging layer 25 for heat dissipation.

[0094] In addition, at least one passive component 28 may be disposed on the second side 20 b of the supporting structure 20 as required.

[0095] In other embodiments, Figure 2E-2 As shown, the electronic package 2 may also employ a conductive structure 29a, such as a solder ball, in place of the conductive frame 2a and the conductor 230, and the first electronic component 21 may be omitted from the first side 20a of the supporting structure 20 as needed. For example, the conductive structure 29a may protrude from the second surface 25b of the packaging layer 25 to facilitate attachment to an electronic device (not shown) such as a circuit board.

[0096] Therefore, the manufacturing method of the present invention mainly increases the rigidity of the supporting structure 20 through the packaging layer 25, so there is no need to configure heat dissipation components, reinforcement components, or thicken the core layer of the supporting structure 20 as in the prior art, so as to easily solve the problems such as warpage or wavy deformation of the electronic package 2 caused by the need to increase the volume according to functional requirements. Therefore, compared with the prior art, the electronic package 2 of the present invention can not only overcome the problems such as warpage or wavy shape, but also improve electrical performance and heat dissipation capabilities, reduce the cost of manufacturing the electronic package 2, and reduce the overall size of the electronic package 2.

[0097] Figure 3 2 is a cross-sectional view of a manufacturing method of a second embodiment of the electronic package 3 of the present invention. The difference between this embodiment and the first embodiment lies in the design of the conductive structure 39, so the similarities will not be described in detail below.

[0098] like Figure 3 As shown, first of all, Figure 2B In the manufacturing process shown, the conductive frame 2 a and the conductor 230 are replaced by a plurality of conductive structures 39 such as circuit blocks, so that the plurality of conductive structures 39 are spaced apart and arranged on the first side 20 a of the supporting structure 20 .

[0099] In this embodiment, the circuit block is a substrate having an insulating portion 33 and at least one conductive pillar 331 embedded in the insulating portion 33. For example, the conductive pillar 331 is a metal pillar such as a copper pillar, and the insulating portion 33 is formed of a material such as polyimide (PI), dry film, or an encapsulant such as epoxy resin or a molding compound. The insulating portion 33 may be formed by lamination or molding, but is not limited to the above.

[0100] Furthermore, in another embodiment of the circuit block, a circuit portion 330 may be formed in the insulating portion 33 , such as a fan-out redistribution layer (RDL) format.

[0101] It should be understood that the circuit block may also use a semiconductor base including silicon (Si), glass or other appropriate substrates to replace the insulating portion 33 .

[0102] In addition, the supporting structure 20 adopts a core-less packaging substrate.

[0103] Then, use something like Figure 2C to Figure 2E-2In the process shown, after the second electronic component 22 is disposed, the underfill 32 may be filled between the second electronic component 22 and the second side 20 b of the supporting structure 20 to cover the conductive bumps 221 .

[0104] In addition, the end surface of the conductive pillar 331 of the circuit block or a portion of the surface of the circuit portion 330 is exposed on the second surface 25b of the packaging layer 25 to be combined with the conductive element 31 such as solder material for connection to an electronic device such as a circuit board (not shown).

[0105] Therefore, the manufacturing method of the present invention mainly increases the rigidity of the supporting structure 20 through the packaging layer 25, so there is no need to configure heat dissipation components, reinforcement components, or thickening of the supporting structure 20 as in the prior art, so as to easily solve the problems such as warpage or wavy deformation of the electronic package 3 caused by the need to increase the volume according to functional requirements. Therefore, compared with the prior art, the electronic package 3 of the present invention can not only overcome the problems such as warpage or wavy shape, but also improve electrical performance and heat dissipation capabilities, reduce the cost of manufacturing the electronic package 3, and reduce the overall size of the electronic package 3.

[0106] Figures 4A to 4B 4 is a cross-sectional view of a manufacturing method of a third embodiment of the electronic package 4 of the present invention. The difference between this embodiment and the first embodiment lies in the design of the conductive structure 49, so the similarities will not be repeated below.

[0107] like Figure 4A As shown, the conductive structure 49 is a conductive column, which is directly formed on the circuit layer 200 of the first side 20a of the supporting structure 20 by electroplating, deposition or other methods. Therefore, the height of the conductive column can be adjusted as needed (for example, increased).

[0108] like Figure 4B As shown, the class is then used to Figure 2C to Figure 2E-2 The manufacturing process shown is used to obtain the desired electronic package 4.

[0109] Therefore, the manufacturing method of the present invention mainly increases the rigidity of the supporting structure 20 through the packaging layer 45, so there is no need to configure heat dissipation components, reinforcement components, or thicken the core layer of the supporting structure 20 as in the prior art, so as to easily solve the problems such as warpage or wavy deformation of the electronic package 4 caused by the need to increase the volume according to functional requirements. Therefore, compared with the prior art, the electronic package 4 of the present invention can not only overcome the problems such as warpage or wavy shape, but also improve electrical performance and heat dissipation capabilities, reduce the cost of manufacturing the electronic package 4, and reduce the overall size of the electronic package 4.

[0110] Figures 5A to 5C1 is a cross-sectional view of a fourth embodiment of the present invention's method for manufacturing an electronic package 5. This embodiment differs from the first embodiment in the sequence of process steps, so only the differences will be described below without reiterating the similarities.

[0111] like Figure 5A As shown, first, the conductive frame 2a is used as a carrier to combine the first electronic component 21 on the plate 24 of the conductive frame 2a via a bonding layer 512, and a packaging layer 45 is formed on the plate 24 so that the packaging layer 45 covers the first electronic component 21 and the conductive pillars 23.

[0112] In this embodiment, the first electronic component 21 is bonded to the board 24 via the bonding layer 512 at its inactive surface 21 b , and a plurality of conductive bumps 510 such as copper pillars may be formed on the electrode pads 210 of the active surface 21 a .

[0113] In addition, the packaging layer 45 may be formed by lamination, so that the packaging layer 45 covers the first electronic component 21 and the conductive pillars 23 , and the conductive bumps 510 may be exposed outside the packaging layer 45 .

[0114] like Figure 5B As shown, a circuit structure is formed on the packaging layer 45 so that the circuit structure serves as a supporting structure 50 having a first side 50 a and a second side 50 b opposite to each other, and the supporting structure 50 is combined with the packaging layer 45 at its first side 50 a.

[0115] In this embodiment, a fan-out redistribution circuit layer is directly manufactured on the packaging layer 45 to form the circuit structure, so that the insulating base of the supporting structure 50 includes multiple dielectric layers 501, and the circuit layer 500 of the supporting structure 50 is electrically connected to the conductive bump 510. When manufacturing the circuit layer 500, part of the circuit (i.e., conductive blind vias or metal columns) can be extended into the packaging layer 45 to serve as a conductor 530, thereby electrically connecting the conductive column 23.

[0116] It should be understood that if the conductive column 23 contacts the first side 50a of the supporting structure 50 (such as the end face of the conductive column 23 is flush with the surface of the packaging layer 45), the circuit layer 500 does not need to extend into the packaging layer 45 to contact the conductive column 23, and thus the conductor 530 can be omitted.

[0117] like Figure 5C As shown, one or more second electronic components 22 are placed on the second side 50b of the supporting structure 50, and then the plate 24 is removed to form the required electronic package 5, wherein the conductive structure 59 includes a conductive column 23 and a conductor 530, and the bonding layer 512 is exposed on the packaging layer 45.

[0118] In this embodiment, the second electronic components 22 are respectively a system-on-chip (SoC) semiconductor chip and a double data rate (DDR) memory module.

[0119] Therefore, the manufacturing method of the present invention mainly increases the rigidity of the supporting structure 50 through the packaging layer 45, so there is no need to configure heat dissipation components, reinforcement components, or thickening of the supporting structure 50 as in the prior art, so as to easily solve the problems of warpage or wavy deformation of the electronic package 5 caused by the need to increase the volume according to functional requirements. Therefore, compared with the prior art, the electronic package 5 of the present invention can not only overcome the problems of warpage or wavy shape, but also improve electrical performance and heat dissipation capacity, reduce the cost of manufacturing the electronic package 5, and reduce the overall size of the electronic package 5.

[0120] The present invention further provides an electronic package 2, 3, 4, 5, comprising: a supporting structure 20, 50 having a circuit layer 200, 500, at least one conductive structure 29, 29a, 39, 49, 59, a packaging layer 25, 45, and at least one second electronic component 22.

[0121] The supporting structure 20 , 50 has a first side 20 a , 50 a and a second side 20 b , 50 b opposite to each other.

[0122] The conductive structures 29 , 29 a , 39 , 49 , 59 are disposed on the first sides 20 a , 50 a of the supporting structures 20 , 50 and are electrically connected to the circuit layers 200 , 500 .

[0123] The packaging layer 25 , 45 is disposed on the first side 20 a , 50 a of the supporting structure 20 , 50 and covers the conductive structure 29 , 29 a , 39 , 49 , 59 , with portions of the surface of the conductive structure 29 , 29 a , 39 , 49 , 59 exposed by the packaging layer 25 , 45 .

[0124] The electronic component 22 is disposed on the second side 20 b , 50 b of the supporting structure 20 , 50 and is electrically connected to the circuit layer 200 .

[0125] In one embodiment, the conductive structure 29 , 49 , 59 includes a conductive pillar 23 coupled to the circuit layer 200 . For example, the end surface 23 b of the conductive pillar 23 is exposed from the packaging layer 25 , 45 . Alternatively, the conductive pillar 23 is coupled to the circuit layer 200 , 500 via a conductor 230 , 530 .

[0126] In one embodiment, the electronic package 2 further includes a functional pad 27 embedded in the packaging layer 25 , and the functional pad 27 is combined with the circuit layer 200 . For example, a portion of the surface of the functional pad 27 is exposed from the packaging layer 25 .

[0127] In one embodiment, the conductive structure 29 a includes a solder ball, for example, the solder ball protrudes from the packaging layer 25 .

[0128] In one embodiment, the conductive structure 39 comprises a circuit block. For example, the circuit block includes at least one conductive pillar 331 electrically connected to the circuit layer 200, with the end surface of the conductive pillar 331 exposed to the packaging layer 25. Alternatively, the circuit block includes at least one circuit portion 330 electrically connected to the circuit layer 200, with a portion of the surface of the circuit portion 330 exposed to the packaging layer 25.

[0129] In one embodiment, the electronic package 2 , 4 , 5 further includes a first electronic component 21 embedded in the packaging layer 25 , 45 , which is electrically connected to the circuit layer 200 .

[0130] In summary, the electronic package and its manufacturing method of the present invention increase the rigidity of the supporting structure through the packaging layer, thereby eliminating the need to configure heat sinks, reinforcements, or thicken the supporting structure as in the prior art, thereby easily solving problems such as warping or wavy deformation caused by the need to increase the volume of the electronic package according to functional requirements. Therefore, the electronic package of the present invention can not only overcome problems such as warping or wavy shape, but also improve electrical performance and heat dissipation capabilities, reduce the cost of manufacturing the electronic package, and reduce the overall size of the electronic package.

[0131] The above embodiments are intended only to illustrate the principles and effects of the present invention and are not intended to limit the present invention. Any skilled artisan may modify the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be as set forth in the appended claims.

Claims

1. An electronic package, characterized in that: include: A bearing structure having a circuit layer, the bearing structure having a first side and a second side opposite to each other; a conductive structure disposed on the first side of the supporting structure and electrically connected to the circuit layer; an encapsulation layer disposed on the first side of the supporting structure and covering the conductive structure, with a portion of the surface of the conductive structure exposed to the encapsulation layer; a functional pad embedded in the packaging layer for heat dissipation, and the functional pad is combined with the circuit layer; and The electronic component is disposed on the second side of the supporting structure and is electrically connected to the circuit layer.

2. The electronic package according to claim 1, wherein The conductive structure includes a conductive column combined with the circuit layer.

3. The electronic package according to claim 2, wherein: The end surface of the conductive column is exposed outside the packaging layer.

4. The electronic package according to claim 2, wherein: The conductive column is combined with the circuit layer via a conductor.

5. The electronic package according to claim 1, wherein: Part of the surface of the functional pad is exposed on the packaging layer.

6. The electronic package according to claim 1, wherein: The conductive structure includes a solder ball.

7. The electronic package according to claim 6, wherein: The solder ball protrudes from the packaging layer.

8. The electronic package according to claim 1, wherein: The conductive structure includes a circuit block.

9. The electronic package according to claim 8, wherein: The circuit block includes at least one conductive column electrically connected to the circuit layer, and an end surface of the conductive column is exposed from the packaging layer.

10. The electronic package according to claim 8, wherein The circuit block includes at least one circuit portion electrically connected to the circuit layer, and a portion of the surface of the circuit portion is exposed on the packaging layer.

11. The electronic package according to claim 1, wherein: The electronic package also includes another electronic component embedded in the packaging layer and electrically connected to the circuit layer.

12. A method for manufacturing an electronic package, characterized in that: include: Providing a conductive frame comprising a plate, a functional pad, and a plurality of conductive posts separately disposed on the plate; The conductive frame is disposed on a supporting structure having a circuit layer, wherein the conductive frame is connected to the circuit layer via a conductor through a plurality of conductive columns and the functional pad; forming a packaging layer on the supporting structure to cover the functional pad, the plurality of conductive pillars and the conductor, and allowing the plate body of the conductive frame to be exposed to the packaging layer; removing the plate to expose the end surface of the conductive pillar outside the packaging layer, wherein the conductive pillar and the conductor serve as a conductive structure, and the functional pad is used for heat dissipation; and At least one electronic component is disposed on the supporting structure, and the electronic component is electrically connected to the circuit layer.

13. The method for manufacturing an electronic package according to claim 12, wherein: After the plate is removed, part of the surface of the functional pad is exposed on the packaging layer.

14. The method for manufacturing an electronic package according to claim 12, wherein: The manufacturing method further comprises embedding another electronic component electrically connected to the circuit layer in the packaging layer.

15. A method for manufacturing an electronic package, characterized in that: include: Providing a bearing structure having a circuit layer; forming a plurality of conductive structures on the circuit layer of the supporting structure, and a functional pad combined with the circuit layer; Forming a packaging layer on the supporting structure to cover the plurality of conductive structures and the functional pad, with portions of the surfaces of the conductive structures and the functional pad exposed to the packaging layer, and the functional pad being used for heat dissipation; as well as At least one electronic component is disposed on the supporting structure, and the electronic component is electrically connected to the circuit layer.

16. A method for manufacturing an electronic package, characterized in that: include: Providing a conductive frame comprising a plate, a functional pad, and a plurality of conductive posts separately disposed on the plate; forming a packaging layer on the board so that the packaging layer covers the plurality of conductive pillars and the functional pad; forming a supporting structure having a circuit layer on the packaging layer, so that the circuit layer is electrically connected to the plurality of conductive pillars through a conductor and is combined with the functional pad; The plate is removed to expose the end surface of the conductive column and a portion of the surface of the functional pad to the packaging layer, and the functional pad is used for heat dissipation, wherein the conductive column and the conductor serve as a conductive structure; as well as At least one electronic component is disposed on the supporting structure, and the electronic component is electrically connected to the circuit layer.

17. The method for manufacturing an electronic package according to claim 15 or 16, wherein: The manufacturing method further comprises embedding another electronic component electrically connected to the circuit layer in the packaging layer.

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